JPH01162090A - Cross-talk removing circuit for chrominance signal - Google Patents

Abstract

PURPOSE:To obtain an image having no color dislocation by providing a first adding circuit to send a chrominance signal having no cross-talk and a second adding circuit, which adds the input signal of a first delay circuit and the output signal of a first inverter and sends the control signal of a color process circuit, in the reproducing circuit of a color television signal. CONSTITUTION:The output signal of a 1H delay circuit 8 is supplied through an inverter 9 [c] to a maximum potential detecting (MAX) circuit 6 and one input terminal of a minimum potential detecting (MIN) circuit 7 respectively. Respective output signals [f, i] of a MIN circuit 10 and a MAX circuit 11 are supplied to an adding circuit 12 and addition-processed. The output signal of this adding circuit 12 is supplied through a 1/2 gain circuit 13 [j], in which a gain is 1/2, to a reproducing chrominance signal output terminal 14. An input signal [a] of a three-line type logical operating tandem filter 17 and an output signal [b] of an inverter 5 are addition-processed and after that, they are supplied to a color process control signal output terminal 16.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a color television signal reproduction circuit.
In particular, the present invention relates to a noise removal circuit for a carrier color signal in a reproduction signal of a VTR or the like.

(Prior Art) For example, a color television signal reproduced by a VTR or the like is separated into a luminance signal and a carrier color signal (hereinafter simply referred to as a color signal). This separated color signal becomes noise as crosstalk components from adjacent tracks are superimposed on the color signal.

Conventionally, crosstalk removal circuits have been used to remove the above-mentioned crosstalk. In particular, if the recording format is low frequency conversion recording for color signals and there is no guard band, crosstalk is likely to be superimposed.In the NTSC system, the luminance signal and color signal are frequency interleaved, and the color signal is Since the phase is reversed every horizontal scan (IH) and the crosstalk noise is in phase, it is possible to separate the noise from the color signal using a so-called comb filter that delays the color signal by IH and adds it. .

FIG. 6 is a block diagram of a conventional color signal noise removal circuit in the NTSC system using a comb filter.

In the same figure, the color signal including crosstalk supplied to the input terminal 21 is processed by a delay circuit (
The signal from the input terminal 21 is supplied to the negative input terminal of the adder circuit 23 via the IHDL 22, and the positive input terminal of the adder circuit 23 is supplied with the signal from the input terminal 21.

With the circuit configured as described above, the color signal having a different phase for each IH has a double level and is sent out from the output terminal 24, and the crosstalk component is subtracted and therefore removed.

(Problems to be Solved by the Invention) In this way, crosstalk of color signals is removed, but for example, as shown in FIG. 7(A), the upper half a of the original image is If the chromatic color is red and the lower half is colorless, there is no vertical color correlation between the upper half a and the lower half A, so the signal processed by the crosstalk removal circuit is as shown in Figure 7. As shown in (B), line C under IH of upper half a
had the problem of causing color shift.

(Means for Solving the Problems) In order to solve the above problems, the present invention aims to reduce the number of carrier color signals to one
A first delay circuit that delays by a horizontal period, a first inverter that inverts the output signal of the first delay circuit, and a DC level that is determined by comparing the output signal of the first inverter and the input signal of the first delay circuit. a first high potential detection circuit that sends out a signal with a higher potential in the positive direction; a first lowest potential detection circuit that sends out a signal with a lower potential in the positive direction; and an output signal of the first inverter. a second M delay circuit that delays the output signal by one horizontal period; a second inverter that inverts the output signal of the second delay circuit; and a comparison detection between the output signal of the second inverter and the input signal of the second delay circuit. a second high potential detection circuit, a second fi low potential detection circuit, and a third lowest potential detection circuit that compares and detects the output signals of the first and second highest potential detection circuits; and the first and second lowest potential detection circuits. a third highest potential detection circuit that compares and detects the output with the circuit; and a third highest potential detection circuit that adds the output signals of the third highest potential detection circuit and the third lowest potential detection circuit to send out a color signal without crosstalk. 1 addition circuit; and a second addition circuit that adds the input signal of the 1M extension circuit and the output signal of the first inverter and sends out a control signal for the color processing circuit. provides a crosstalk removal circuit.

(Embodiment) FIG. 1 is a block diagram showing an embodiment of the color signal noise removal circuit of the present invention. 1 is a color signal input terminal to which a color signal (including noise) is supplied;
is one input terminal of the high potential detection circuit (MAX) 2 which detects the one whose DC level is higher in the positive direction out of the two inputs, and which detects the one with the lower DC level in the positive direction among the two inputs. Low potential detection circuit (one input terminal for MIN>3, ■
IH delay circuit (IHDL) 4 that delays time by H period
are supplied respectively.

The output signal of the IHDL 4 is passed through the inverter 5 to the MA
The other input terminal of each of X2, M, and I N 3 and the high potential detection circuit
MIN) 7 and an IH delay circuit (IHDL) 8, respectively.

The output signal of the IHDL 8 is passed through the inverter 9 to the MA
It is supplied to the other input terminals of X6 and MIN7, respectively. Furthermore, the respective output signals of MAX2 and MAX6 are supplied to the lowest potential detection circuit (MAX) 10, and the respective output signals of MIN3 and MIN7 are supplied to the highest potential detection circuit (MAX) 11.

The respective output signals of MAX II and 10 are supplied to an adder circuit 12, and the output signal of this adder circuit 12 is supplied to a color signal output terminal 14 via a 1/2 gain circuit 13 whose gain is 1/2. .

The input signal of the IHLD 4 and the output signal of the inverter 5 are added in an adder circuit 15 and then supplied to a color process control signal output terminal 16.

Figure 2 (A) is the circuit diagram of MAX2, 6.11, Figure 2 (
B) is a circuit diagram of MIN3, 7.10, and Figure 3 is a diagram showing an example of a color signal pattern.The figure shows an example where the presence or absence of a color signal is clear, and A has no color signal (colorless). Pattern B is a pattern corresponding to the first line with a color signal added, C is a pattern where the lines before and after it have a color signal, that is, there is a vertical correlation, and D is a pattern corresponding to the first line with no color signal. This is a corresponding pattern.

Here, when the signal of pattern A is supplied to the input terminal 1, the arrangement of the signals a, b, and c in FIG. 1 on the pattern becomes as shown in FIG. 4(A). The waveforms of the color signals a to j (not including crosstalk) are shown in Figure 5 (A).
Illustrated in

Next, when signals of patterns A and C are supplied, a,
Since the color signals b and c have a vertical correlation, the arrangement relationship on the pattern is omitted from illustration, but the arrangement of the color signals a, b, and c when the signal of pattern D is supplied is shown in Figure 4 (B ).

As shown in FIG. 5(B), the waveforms of the color signals a to j in the above pattern D indicate that no color signals are sent to the output terminal 14.

Similarly, in the case of pattern C, the color signals a to j are shown in Fig. 5 (C
) as shown in the diagram.

In addition, when the change in hue is reversed, for example, as shown in Fig. 4 (C).
As shown in FIG. 5D, when magenta changes to green, the waveforms of the color signals a to j are completely distinguished between magenta and green, as shown in FIG. 5D.

Although the above description has been made regarding color signals (including colorless signals) on which noise is not superimposed, crosstalk components will be described below. As explained earlier, the crosstalk components are in phase between adjacent lines, so the noise components a to j in FIG. 1 become as shown in FIG.
It can be seen that crosstalk has been removed.

Note that the output signal of the color process control signal output terminal 16 controls the color process circuit that removes jitter. Color shift does not occur even at boundaries between hue changes, and a part of the circuit for removing this crosstalk can also be used as a circuit for generating control signals for the color process circuit, making it inexpensive. It has characteristics.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the color signal crosstalk removal circuit of the present invention, and FIG. (B) is a circuit diagram of the highest potential detection circuit (MAX) and lowest potential detection circuit (MIN) in Figure 1, Figures 3 and 4.
The figure shows an example of a color signal pattern.
(E) is a waveform diagram of each part in FIG. 1, FIG. 6 is a block diagram of a conventional color signal crosstalk removal circuit, and FIG. 7 is a color signal pattern for explaining FIG. 6. DESCRIPTION OF SYMBOLS 1... Carrier color signal input terminal, 2... First highest potential detection circuit (MAX), 3... First lowest potential detection circuit <MIN'), 4... First delay circuit ( IHLD), 5.9... Inverter, 6... Second highest potential detection circuit (MAX>, 7... Second lowest potential detection circuit (MIN), 8... Second delay circuit (IHLD) , 10...Third lowest potential detection circuit (MIN), 11...
- Third highest potential detection circuit (MAX), 12... First addition circuit, 13... 1/2 gain circuit, 14... Color signal output terminal, 15... Second addition circuit, 16. ...Color process control signal output terminal. (,4) (CnM4-Figure?i cfX input d b 0 --- Z δ bQ cLF) Q ef rlef'' Moe left figure 9z May 1988

Claims (1)

[Claims] a first delay circuit that delays a carrier color signal by one horizontal period; a first inverter that inverts an output signal of the first delay circuit; and an output signal of the first inverter and an input signal of the first delay circuit. A first high potential detection circuit that compares and sends out a signal with a higher potential in the positive direction of DC level, and D
The first signal whose C level is lower in potential in the positive direction
a lowest potential detection circuit; a second delay circuit that delays the output signal of the first inverter by one horizontal period; a second inverter that inverts the output signal of the second delay circuit; and an output signal of the second inverter. a second high potential detection circuit and a second lowest potential detection circuit that compare and detect the input signal of the second delay circuit; and a third lowest potential that compare and detect the output signals of the first and second highest potential detection circuits. a detection circuit, a third highest potential detection circuit that compares and detects the outputs of the first and second lowest potential detection circuits, and adds the output signals of the third highest potential detection circuit and the third lowest potential detection circuit; and a second addition circuit that adds the input signal of the first delay circuit and the output signal of the first inverter to send out a control signal for the color processing circuit. A color signal crosstalk removal circuit characterized by comprising a circuit.