JPH01162033A - Device for generating data delay - Google Patents
Device for generating data delayInfo
- Publication number
- JPH01162033A JPH01162033A JP62320659A JP32065987A JPH01162033A JP H01162033 A JPH01162033 A JP H01162033A JP 62320659 A JP62320659 A JP 62320659A JP 32065987 A JP32065987 A JP 32065987A JP H01162033 A JPH01162033 A JP H01162033A
- Authority
- JP
- Japan
- Prior art keywords
- data
- shift register
- delay
- clock signal
- reception
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003111 delayed effect Effects 0.000 claims abstract description 5
- 238000004891 communication Methods 0.000 claims description 12
- 230000001934 delay Effects 0.000 claims description 5
- 238000012360 testing method Methods 0.000 abstract description 8
- 238000011156 evaluation Methods 0.000 abstract description 3
- 230000005540 biological transmission Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Landscapes
- Data Exchanges In Wide-Area Networks (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はデジタルオンライン通信回線におけるオンライ
ンデータを遅延させるデータ遅延発生装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data delay generation device that delays online data in a digital online communication line.
従来、オンラインデータの外部要因による遅延【対する
試験及び評価は、遅延の発生している実回線を用いるか
、オンライン通信機器内のソフトウェアを擬似的に変更
して遅延環境を作成するかして対処するのが一般的であ
る。Traditionally, testing and evaluation of delays caused by external factors in online data have been handled by using the actual line where the delay occurs, or by creating a delay environment by modifying the software in the online communication equipment. It is common to do so.
しかしながら、実回線を用いた場合には、高価な通信回
線を用いて試験しなければならない上に、実回線の使用
状況では遅延量が変わり得るため試験の精度が薄れる。However, when an actual line is used, the test must be performed using an expensive communication line, and the amount of delay may change depending on the usage status of the actual line, which reduces the accuracy of the test.
また、オンライン通信機器内のソフトウェアを擬似的に
変更して遅延環境を作成してもこの通信機器が試験装置
と被試験装置とを兼ねるため、試験の正確度が失なわれ
る。Further, even if a delay environment is created by pseudo-changing the software in an online communication device, the accuracy of the test is lost because this communication device serves both as a test device and a device under test.
〔問題点を解決するだめの手段〕−
本発明のデータ遅延発生装置は、デジタルオンライン通
信回線に対するオンラインデータのクロック信号に同期
して前記オンラインデータを遅延させるシフトレジスタ
と、前記シフトレジスタにより遅延された前記オンライ
ンデータを遅延量に応じて選択出力するスイッチとを備
える。[Means for solving the problem] - The data delay generating device of the present invention includes a shift register that delays the online data in synchronization with a clock signal of the online data for a digital online communication line, and a shift register that delays the online data by the shift register. and a switch for selectively outputting the online data according to the amount of delay.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
一実施例を示す図を参照すると、データ端末装置lはオ
ンライン通信機器に相当する。データ終端装置2はオン
ライン通、信回線4とインタフェーサである。データ端
末装置1は通信回線4とデジタルインタフェースにより
結ばれており、一般列(!:I、てccITT 勧告で
示さhるVll、V24゜V28及びV35等のインタ
フェース形式が該当する。データ端末装置1とデータ終
端装置2との間にはデータ遅延発生装置3が設けられて
いる。Referring to the figure illustrating one embodiment, the data terminal device l corresponds to an online communication device. The data termination device 2 is an interface with the online communication line 4. The data terminal device 1 is connected to the communication line 4 by a digital interface, and the interface formats such as Vll, V24, V28, and V35 shown in the general column (!: I, ccITT recommendation) correspond to the data terminal device 1. A data delay generating device 3 is provided between the data terminal device 2 and the data terminating device 2 .
ここで、データ遅延発生装置3に入力された受信データ
31が修飾受信データ33としてどの様に遅延されるか
について説明する。受信データ31は受信クロック信号
32に対応付けされてデータ終端装置2から出力される
2値デジタル信号であゆ、シフトレジスタ34に受信ク
ロック信号32のタイミングで順次シフト入力される。Here, a description will be given of how the received data 31 input to the data delay generating device 3 is delayed as the modified received data 33. The received data 31 is a binary digital signal outputted from the data termination device 2 in correspondence with the received clock signal 32, and is sequentially shifted into the shift register 34 at the timing of the received clock signal 32.
この順次シフトは遅延が加わることを意味するものであ
り、シフトレジスタ34は可変マニュアルスイッチ35
の選択に従い遅延を与えた修飾受信データ33?出力す
る。データ端末装置1はデータ33がめたかも通常の受
信データの如く遅延のかかった受信データとして見える
。シフトレジスタ34は1ビツト/最小〜64キロビツ
ト/最犬の構成を採り、期待する遅延値によってスイッ
チ35を選択する。例えば、 9600 bpsの速度
で1秒の遅延をかける時は9600の値、また0、5秒
の遅延をかける時には4800の値を引出すように、ス
イッチ35を選択する。This sequential shift means that a delay is added, and the shift register 34 is controlled by a variable manual switch 35.
Modified received data 33 that is delayed according to the selection of ? Output. The data terminal device 1 sees the data 33 as received data with a delay, just like normal received data. The shift register 34 has a configuration of 1 bit/minimum to 64 kilobits/maximum, and the switch 35 is selected depending on the expected delay value. For example, the switch 35 is selected so as to pull out a value of 9600 when applying a delay of 1 second at a speed of 9600 bps, and a value of 4800 when applying a delay of 0.5 seconds.
上記実施例では、データ終端装置2からデータ端末装置
1に受信データ31を取込む場合について説明したが、
逆に送信データを取込む場合でも同様に実施できる。In the above embodiment, a case has been described in which the received data 31 is imported from the data terminal device 2 to the data terminal device 1.
Conversely, the same method can be used to capture transmission data.
以上説明したように本発明によれば、オンラインデータ
のクロック信号圧同期して送信または受信データをシフ
トレジスタに入力して遅延を与え選択的に出力すること
により、容易に種々の実環境に近い状態を作成すること
ができ、この結果オンライン通信機器の試験及び評価を
正確にかつ経済的に実施できる。As explained above, according to the present invention, transmit or receive data is synchronized with the clock signal pressure of online data, inputted to a shift register, delayed, and selectively output, thereby easily reproducing data similar to various actual environments. states can be created so that testing and evaluation of online communication equipment can be performed accurately and economically.
因は本発明の一実施例を示す構成図である。
l・・・・・・データ端末装置、2・・・・・・データ
終端装置、3・・・・・・データ遅延発生装置、4・・
・・・・オンライン通信機器、31・・・・・・受信デ
ータ、32・・・・・・受信りiffツク信号、33・
・・・・・・障飾受信データ、34・・・・・・シフト
レジスタ、35・・・・・・可変マニュアルスイッチ。
代理人 弁理士 内 原 晋This is a configuration diagram showing an embodiment of the present invention. l... Data terminal device, 2... Data termination device, 3... Data delay generating device, 4...
...online communication equipment, 31...received data, 32...received ift check signal, 33.
...Disturbance reception data, 34...Shift register, 35...Variable manual switch. Agent Patent Attorney Susumu Uchihara
Claims (1)
のクロック信号に同期して前記オンラインデータを遅延
させるシフトレジスタと、前記シフトレジスタにより遅
延された前記オンラインデータを遅延量に応じて選択出
力するスイッチとを備えることを特徴とするデータ遅延
発生装置。It is characterized by comprising a shift register that delays the online data in synchronization with a clock signal of the online data for a digital online communication line, and a switch that selectively outputs the online data delayed by the shift register according to the amount of delay. data delay generator.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62320659A JPH01162033A (en) | 1987-12-18 | 1987-12-18 | Device for generating data delay |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62320659A JPH01162033A (en) | 1987-12-18 | 1987-12-18 | Device for generating data delay |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01162033A true JPH01162033A (en) | 1989-06-26 |
Family
ID=18123884
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62320659A Pending JPH01162033A (en) | 1987-12-18 | 1987-12-18 | Device for generating data delay |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01162033A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6543523B2 (en) | 1997-10-08 | 2003-04-08 | Honda Giken Kogyo Kabushiki Kaisha | Cooling device for radiator of motorcycle |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5394811A (en) * | 1977-01-31 | 1978-08-19 | Nec Corp | Artificial circuit for communication circuit |
JPS6248319A (en) * | 1985-08-28 | 1987-03-03 | 株式会社クボタ | Waste straw treatment apparatus |
-
1987
- 1987-12-18 JP JP62320659A patent/JPH01162033A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5394811A (en) * | 1977-01-31 | 1978-08-19 | Nec Corp | Artificial circuit for communication circuit |
JPS6248319A (en) * | 1985-08-28 | 1987-03-03 | 株式会社クボタ | Waste straw treatment apparatus |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6543523B2 (en) | 1997-10-08 | 2003-04-08 | Honda Giken Kogyo Kabushiki Kaisha | Cooling device for radiator of motorcycle |
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