JPH01160268A - Wide range high resolution image pickup system - Google Patents

Abstract

PURPOSE:To attain high resolution pickup for a specific part while implementing a wide range of pickup simultaneously by forming an image forming face of an optical system to be a curved face in matching with a focal face of the optical system, arranging plural photodetection devices along the curved face and summing and synthesizing signal outputs. CONSTITUTION:The image forming face is made in matching with the shape of an ideal focal face and plural photodetector devices 5-1-5-5 are fitted along the curved image forming face 4. An adjacent ground surface picture is picked up without any interval by arranging the adjacent photodetection devices with a slight deviation alternately in the advancing direction of a satellite. Signal outputs obtained from the plural photodetection devices arranged in this way are selected and synthesized to attain high resolution and wide range of pickup.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an imaging and imaging signal processing method when observing high-resolution images of a wide area from an artificial satellite or the like.

[Conventional technology]

Images of various phenomena on the earth's surface are captured with high resolution from artificial satellites, etc.
As the importance of high-resolution observation systems for transmission to the ground is recognized, the demand for higher resolution is increasing. Furthermore, multi-element CODs (charge-coupled devices) have recently been increasingly used as light-receiving elements in high-resolution observation systems.

A conventional general example of such an observation system is shown in FIG. In FIG. 12, the artificial satellite 1 moves at a speed V relative to the earth's surface. The image 2 of the ground surface is created by the optical system 3.
An image is formed on a light receiving device 5 placed on an imaging plane 4. A photoelectric conversion element such as a C0D (charge-coupled device) is used as the light receiving device 5, whereby an image signal on the ground surface is converted into an electrical signal, processed, and transmitted to the ground.

[Problem that the invention seeks to solve]

Since the number of light receiving elements accommodated in the light receiving device 5 is limited, when imaging is performed using one COD, the range in which imaging with increasingly higher resolution can be performed becomes narrower, causing a problem. One method for solving this problem is to arrange a reflection mirror 29 in front of the optical system, as shown in FIG. 13, and select the area to be imaged by changing the angle of the reflection mirror 29.

However, as the resolution becomes higher, the aperture of the entrance section of the optical system needs to be increased, so the movable reflection mirror disposed in front of it also inevitably becomes larger.

Placing such a large movable optical structure in front of the optical system and operating it in space poses problems such as accuracy of imaging position setting, reliability, and life span in addition to deterioration of resolution due to mirror distortion. Further, in this method, it is possible to image a specific part, but it is impossible to simultaneously image a wide area.

As another example of the method, as shown in FIG. 14, there is a method in which a plurality of light receiving devices are arranged within the imaging plane to increase the imaging range. However, as shown in the figure, this method has the problem of defocusing at the edges of the imaging plane due to spherical aberration of the optical system and deterioration of resolution, making it impossible to capture high-resolution images over a wide range. It is possible. Therefore, an object of the present invention is to provide an imaging method that simultaneously performs high-resolution imaging of a specific portion while imaging a wide range.

[Means for solving problems]

The main measures taken by the present invention to solve these problems of the prior art and achieve the above object are as follows.

(2) The imaging plane of the optical system is a curved surface aligned with the focal plane of the optical system, and a plurality of light-receiving devices are arranged along this curved surface.

■ The electrical signal output of each of the plurality of light receiving devices is delayed in units of one pixel of the light receiving device, this output is supplied to a gate circuit that passes or cuts off in each pixel, and these signal outputs are added and synthesized. As a result, integration between adjacent pixels in a specific portion is performed, and sampling is performed in pixel units corresponding to the integration period.

■Furthermore, this synthesized and sampled signal output is supplied to a gate circuit that passes or blocks it in units of scanning line periods, and by adding and synthesizing these outputs, integration between adjacent scans of a specific portion is performed. Sampling is performed in scanning line units corresponding to the integration period.

■ This output signal is applied to a memory circuit, read out at equal intervals, and the output pulses are rearranged into a format suitable for transmission.

〔Example〕

The present invention will be specifically described below with reference to the drawings.

FIGS. 1(a) and 1(b) show an embodiment of the wide-area, high-resolution imaging system according to the present invention. In the figure, 1 is an artificial satellite, 2
is a ground surface image, 3 is an optical system, 4 is an imaging plane, 5 is a light receiving device, 6 is a signal selection and synthesis circuit, 7 is a signal processing circuit, 8 is a transmitter, 9 is a ground station receiver, IO is a received signal Processing circuit, 1
1 is an image processing circuit, and 12 is an image output.

As shown in the figure, the image of the earth's surface is focused by an optical system 3 in the satellite onto a light receiving device 5 placed on an imaging plane 4 and converted into an electrical signal, which is then passed through a signal selection and synthesis circuit 6 to a signal processing circuit 7. , is supplied to the transmitter 8 and sent to the ground station receiver 9. The output of the ground station receiver 9 is supplied to the image processing circuit 11 via the received signal processing circuit 10, and is output as an image output 12.

One of the features of the present invention is that a plurality of detectors 5 are arranged along a curved imaging plane 4 as shown in the figure. The specific structure of this part will be explained with reference to FIGS. 2 to 5. The ideal focal plane of the optical system has a curved shape, as shown by the imaging plane 4 in FIG. This shape can be accurately determined from the calculation results of the aberrations of the optical system. Therefore, by manufacturing the image forming surface to match the shape of this ideal focal plane and attaching a plurality of light receiving devices 5-1 to 5-5 along the curved image forming surface 4 as shown in the figure. As shown in the figure, each light receiving device can be arranged at the position of the ideal focal plane of the optical system.

Since each light-receiving device is housed in a package, by arranging adjacent light-receiving devices alternately and slightly shifted in the direction of travel of the satellite, as shown in Figure 3,
Adjacent ground surface images can be captured without gaps.

The focal plane of an optical system is generally circular, as shown by the dotted line 4 in Figure 3, but the actual shape of the image forming plane is a shape obtained by cutting out a part of this, as shown in Figure 4 (a). good. The image forming surface 4 can be made of metal or the like that is opaque to the incident light, and the light receiving device is shown in FIGS. 4(b) and (c).
As shown in FIG. 4, a window can be opened in the image plane and the image forming apparatus can be mounted inside the image plane as shown in FIG. 4(b), or outside it as shown in FIG. 4(c). Alternatively, as shown in the cross-sectional view in FIG. 5(a) and the perspective view in FIG. Surface images can be captured without gaps.

Next, a method for selecting and combining signal outputs obtained from a plurality of light receiving devices arranged in this manner to perform high resolution and wide area imaging will be specifically explained with reference to FIG.

FIG. 6 is a detailed diagram of the signal selection and synthesis circuit 6 shown in FIG. 1. Routes from 5-1 to 21-1 and 5-2 to 2 in the diagram
The route 1-2, the route 5-3 to 21-3, the route 5-4 to 21-4, and the route 5-5 to 21-5 are the same in principle. In the figure, the light receiving device 5-1
-5 electrical signal outputs are applied to pre-signal processing circuits 12-1-5. In the pre-signal processing circuits 12-1 to 12-5, the signals output from the light-receiving devices are amplified, and in order to simplify subsequent circuits, A/D conversion is performed and converted into digital signals. 13-1 to 5 and 17-1 to 5 are delay circuits, and 14-1 to 5 and 18-1 to 5 are gate circuits.

An example of the operation of the circuit shown in FIG. 6 will be explained using the waveform diagram shown in FIG. 7. The horizontal axis in FIG. 7 is the time axis, and the vertical axis represents the pulse level. In FIG. 7, the number of elements in each light-receiving device is shown as 12 to simplify the drawing. Further, T in the figure represents the scanning line period of one line in each light receiving element.

In FIG. 7, the operation during the scanning line period (2T) for two lines is shown by a solid line, and the operation corresponding to the period before that is shown by a dotted line.

Fig. 7 shows that in Fig. 6, gate) 14-1.4°5 and gate 18-1.4.5 are in the ON state, and gate) 14
−2 and 3, respectively, as shown in the figure, n (T
An example will be shown in which the ON-OF'F state of the gate is switched at the times of +TI) and nCT+T2).

In FIG. 6, gate circuits 14-1 to 5 and 18-1 to
5 is OFF (high-resolution imaging mode), the outputs of the pre-signal processing circuits 12-1 to 12-5 are applied as they are to each of the combining circuits 15-1 to 15-5, and these outputs are further applied as they are to each of the combining circuits 15-1 to 15-5. -1 to 5 are supplied. In this case, the sampling circuits 16-1 to 5 and 20-1 to 5 sample each pixel and each line, so high-resolution imaging in which one pixel in the light receiving device corresponds to one pixel on the ground surface is possible. It will be done.

In the example of the waveform diagram in FIG. 7, this state is expressed as n (T+T
1)≦t<(n+1)T period and gate circuit 14-
Corresponds to the period nT≦t<n (T+T2) in 3.18-3, and in this period the sampling circuit 20
The -2.20-30 output is output as a pulse train corresponding to each pixel on the ground surface as shown in the figure. Actual signal processing is often performed using digitally converted signals, but in order to make it easier to understand, in Fig. 7, the amplitude is expressed in the form of an analog signal (PAM) whose amplitude changes depending on the input light level. There is.

Next, gate circuits 14-1 to 14-5 and 18-1 to 5 are turned ON.
The operation in the state (wide area imaging mode) will be explained. When the gate circuit 14-1 is ON, the signal processing circuit 1
The output of 2-1 is passed through the delay circuit 13-1, and the signal delayed by one pixel and the undelayed signal are supplied to the synthesis circuit 15-1, where they are added to the adjacent pixels. That is, an integration operation is performed between adjacent pixels. Therefore, since the data after the addition is a collection of information for every two pixels, the sampling circuits 16-1 to 16-5 sample and output the data for every other pixel.

The outputs of the sampling circuits 16-1 to 16-5 are added to the -line delay circuit 1 in order to perform addition between pixels in adjacent scanning line periods.
After being supplied to 7-1 to 7-5, the synthesis circuit 19-
Addition is performed from 1 to 5.

In this case, since the integration operation is performed between adjacent lines, the output of the synthesis circuit is subjected to sampling operation every other line in the sampling circuits 20-1 to 20-5.

Therefore, the output pulse is nT of 2O-2OUT in Fig. 7≦
t<ix (T+TI), n of 2O-3OUT (T+
T2)≦t<(n+1)T and 20-1.20-4
．． As shown at 2O-5OUT, pressure is applied while sampling every other pixel and sampling every -line is performed. This sampling operation reduces the amount of data to be transmitted, making it possible to capture data from a wide range of areas corresponding to the reduced amount of data.

The outputs of the sampling circuits 20-1 to 20-5 are further supplied to the memory circuit 22 through gate circuits 21-1 to 21-5 in the output section, and the data from 20-1 to 20-5 are sequentially written. When read out, by reading out at equal intervals, it can be sent to the ground station as a high-speed pulse train with a constant data rate, as shown at 220UT in FIG.

Output gate circuits 21-1 to 21-5 are gate circuits for limiting the amount of data to be output when the amount of data to be transmitted to the ground is too large. When transmission is possible in the imaging mode, the gate circuits 21-1 and 21-4.5 are turned OFF to enable light receiving devices 5-2 and 5-3.
It becomes possible to transmit all outputs in high-resolution imaging mode.

Next, an example of a method for signal processing the pulse train sent out in this manner on the receiving side will be described.

FIG. 8 shows an example of a method of configuring the received signal processing circuit, and FIGS. 9 and 10 are waveform diagrams explaining the operation of FIG. 8. The horizontal and vertical axes in FIGS. 9 and 10 are the same as those on the transmitting side in FIG. 7, and represent operations over a period of two lines (2T). Further, as in the explanation on the transmitting side, the waveform diagram is displayed in analog format (PAM) for easy understanding. The configuration of the pulse train at the input of the received signal processing circuit is the same as the configuration of the output pulse train on the transmitting side in FIG. 7, as shown by IN in FIG.

This pulse train is first separated into pulse trains corresponding to each light receiving device by gate circuits 23-1 to 23-5. In an artificial satellite, the method of configuring a pulse train on the transmitting side is usually determined by a command from the ground station, so the configuring order of this pulse train is known on the receiving side, and as shown in FIG. 9, the gate circuit 23- 1 to 5 can be separated into pulse trains corresponding to each device output. In addition, as another method for separating, when configuring the transmission pulse train, 20-1 to 5
It is also possible to insert identification codes corresponding to the light-receiving devices 1 to 5 into the output pulses and detect this code on the receiving side to separate pulse trains corresponding to each device.

The pulse trains separated by gate circuits 23-1 to 23-5 are written to memory circuits 24-1 to 24-5, respectively. The read operation of the memory circuit is performed in the same manner as when configuring the pulse train on the transmitting side. That is, in the memory circuit 24-1.4.5, the readout speed is 1/2 the speed at high resolution imaging corresponding to the transmission side, and -line readout is performed. In the next line after that, the data of the previous line is used as it is as the data of that line. This operation is as shown in the figure, n at 24-2.
T≦t<n (T+TI) and n (
The same applies to the period T+T2)≦t<(n+1)T.

Next, in 24-2, n (T+TI)≦t(n+
1) nT≦t<n(T+T2) at T and 24-3
During the period, data is read at the normal high-speed read speed. That is, in this case, two lines of data having different information are read out.

The outputs of the memory circuits 24-1 to 24-5 are supplied to the multiplex circuit 28 via delay circuits 25, 26 and 27-1 to 27-5, and written into the memory within the circuit. When reading data from the multiplex circuit 28, as shown at 28OUT in FIG. 10, data 24-1 to 24-5 are sequentially read out for each line in accordance with the writing speed, and as shown in the figure, data 24-1 to 24-5 are read out in order according to the writing speed. Data is output in chronological order.

Therefore, the pulse density is high in the portion where high-resolution imaging is performed on the transmitting side, and the other portions are output in a sampled form corresponding to the period during which integration was performed.

The delay circuits 25, 26 and 27-1 to 27-5 in FIG. 8 are circuits for correcting the deviation in imaging time of each light receiving device from the arrangement on the transmitting side.

The delay circuits 25 and 26 are circuits corresponding to the case where the light receiving devices on the transmitting side are arranged at odd and even numbers as shown in Figures 3 and 4. This is to correct a delay time that is longer than a line. On the other hand, the delay circuits 27-1 to 27-5 are circuits for correcting slight time deviations in arrangement, and correct small delay times of about several pixels.

An example of a simple image pattern output in this manner is shown in FIG. The figure is a two-dimensional representation of a situation in which a black and white lattice-like tilted pattern is imaged. The horizontal axis corresponds to the positions of pixels arranged on the scanning line, and the vertical axis indicates the state in which the satellite flies and images are taken. The scale shown below the horizontal axis indicates the connection point of the light receiving device. As shown in the figure, high-resolution imaging is performed in a portion of the second and third light receiving devices, and an integration operation is performed for every two pixels in the other portions.

In the present invention, by increasing the capacity of the memory circuit 22 of the output section on the transmitting side to more than a few lines, high-resolution imaging is performed in a wide range for several lines, and the other few lines are switched to wide-area imaging mode. By transmitting data while keeping the overall data rate of several lines constant, it is also possible to capture a high-resolution image of a specific two-dimensional area within a wide area.

〔Effect of the invention〕

As described above, the present invention enables high-resolution imaging with excellent imaging characteristics of any specific part in a wide area without using any mechanical movable mechanism. It is extremely versatile, as it is possible to image a wide range of areas by switching between different areas, and it is also possible to image some areas at high resolution and other areas at a different resolution. This provides a wide range of high-performance imaging devices.

[Brief explanation of the drawing]

Figures 1 (a) and (b) are block diagrams showing an overview of the wide-area high-resolution imaging system of the present invention, respectively, and Figure 2 is a cross-section of the optical section and imaging section of the wide-area high-resolution imaging system of Figure 1. figure,
FIG. 3 is a front view of the imaging section of the wide-area high-resolution imaging method shown in FIG. A perspective view, a cross-sectional view, and other cross-sectional views, and FIGS. FIG. 6 is a block diagram showing the signal selection and synthesis circuit of the wide-area high-resolution imaging method shown in FIG. 1, FIG. 7 is an output waveform diagram of the signal selection and synthesis circuit of FIG. 6, and FIG. 8 is the wide-area high-resolution imaging system of the present invention. 9 and 10 are both input waveform diagrams of the received signal processing circuit of FIG. 8, and FIG. 11 is a block diagram showing an embodiment of the received signal processing circuit of the present invention. Image pattern example, 12th
13 is a schematic diagram of a movable reflection mirror, and FIG. 14 is a sectional view of an optical section and an imaging section according to a conventional imaging method. l...Artificial satellite, 2...Ground surface image, 3
...Optical system, 4...Imaging surface, 5...
... Light receiving device, 6 ... Signal selection and synthesis circuit, 7 ... Signal processing circuit, 8 ... Transmitter, 9 ... Ground station receiver , 10... Reception signal processing circuit, 11... Image processing circuit, 12.
...Image output, 13-1~5.17-1~5...
...Delay circuit, 14-1 to 5.18-1 to 5...
...Gate circuit, 15-1 to 5.19-1 to 5...
...Synthesis circuit, 16-1~5.20-1~5...
...Sampling circuit, 21-1 to 5...Gate circuit, 22...Memory circuit, 23...
・Gate circuit, 24...Memory circuit, 25.2
6... Delay circuit, 27... Delay circuit, 28
...Multiple circuit, 29...Movable reflecting mirror. Agent Patent Attorney Shinmu Uchihara 1 Figure 3: Yuei Station 4: Teikyuan 5- Lν5: Armchair 3 Lo (α) (b) (C) Figure 4 Figure 6 @ 2a-/s: Me tSume Tokimine 8 Figure \1-N-U-Shu-Gen-to13 + 3 1 'St
- Mi 1) Hi 0 O 0 Okame O 0
Fake note Q koshiki (Figure 3)

Claims (1)

[Claims] In an imaging method that performs photoelectric conversion by placing a light-receiving device composed of multiple light-receiving elements on the imaging plane of an imaging optical system, the satellite station sets the imaging plane to a curved surface that coincides with the focal plane of the optical system. a plurality of light receiving devices arranged along the curved surface; a first delay circuit that delays the electrical signal output of each of the plurality of light receiving devices in units of one pixel of the light receiving device; a first gate circuit that passes or blocks the output signal of the delay circuit pixel by pixel; a first synthesis circuit that adds and synthesizes the output of the first gate circuit and the electric signal; a first sampling circuit that samples the output of the synthesis circuit pixel by pixel; a second delay circuit that delays the output sampled by the first sampling circuit in units of scanning line periods; a second gate circuit that passes or blocks the output in units of scanning line periods;
a second synthesis circuit that adds and synthesizes the outputs of the sampling circuits; a second sampling circuit that samples the output of the second synthesis circuit; and temporarily records the output pulse train from the second sampling circuit. and a memory circuit that rearranges the gates at equal intervals, and performs wide-range imaging or high-resolution imaging of any specific part by opening and closing the first and second gate circuits. High resolution imaging method.