JPH01158984U - - Google Patents

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Publication number
JPH01158984U
JPH01158984U JP5498188U JP5498188U JPH01158984U JP H01158984 U JPH01158984 U JP H01158984U JP 5498188 U JP5498188 U JP 5498188U JP 5498188 U JP5498188 U JP 5498188U JP H01158984 U JPH01158984 U JP H01158984U
Authority
JP
Japan
Prior art keywords
input buffer
transition voltage
schmitt input
schmitt
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5498188U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5498188U priority Critical patent/JPH01158984U/ja
Publication of JPH01158984U publication Critical patent/JPH01158984U/ja
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例を示す集積回路の
ブロツク図、第2図は従来の集積回路のブロツク
図である。 図において、1はシユミツト入力バツフア、2
は内部回路、3は出力バツフア、4はシユミツト
入力バツフア遷移電圧測定用出力バツフア、5は
シユミツト入力バツフア遷移電圧測定容易化回路
である。なお、図中、同一符号は同一、又は相当
部分を示す。
FIG. 1 is a block diagram of an integrated circuit showing one embodiment of the present invention, and FIG. 2 is a block diagram of a conventional integrated circuit. In the figure, 1 is the Schmitt input buffer, 2
3 is an internal circuit, 3 is an output buffer, 4 is an output buffer for measuring Schmitt input buffer transition voltage, and 5 is a circuit for facilitating measurement of Schmitt input buffer transition voltage. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力端子としてシユミツト入力バツフアを用い
た集積回路にシユミツト入力バツフアの遷移電圧
測定用の端子を設けたことを特徴とするシユミツ
ト入力バツフア遷移電圧測定容易化回路。
A Schmitt input buffer transition voltage measurement facilitation circuit characterized in that an integrated circuit using a Schmitt input buffer as an input terminal is provided with a terminal for measuring the transition voltage of the Schmitt input buffer.
JP5498188U 1988-04-21 1988-04-21 Pending JPH01158984U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5498188U JPH01158984U (en) 1988-04-21 1988-04-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5498188U JPH01158984U (en) 1988-04-21 1988-04-21

Publications (1)

Publication Number Publication Date
JPH01158984U true JPH01158984U (en) 1989-11-02

Family

ID=31280889

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5498188U Pending JPH01158984U (en) 1988-04-21 1988-04-21

Country Status (1)

Country Link
JP (1) JPH01158984U (en)

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