JPH01154546A - Open terminal detecting circuit semiconductor device - Google Patents

Abstract

PURPOSE:To realize perfect fail-safe measures for an integrated circuit, by outputting an alarm signal if at least one of a plurality of terminals is opened. CONSTITUTION:GND terminals 1A, 1B on the package side are connected to bonding pads 2A, 2B on the chip side respectively by means of wire bonding. The bonding pads 2A, 2B are connected to each other at a point P and connected to an internal circuit from the point P. Comparators CMP A, and CMP B have a pair of input terminals respectively, one of which is connected to the bonding pads 2A, 2B while the other is connected to the point A. Output terminals thereof are connected to an alarm bonding pad 4. Alarm signal terminal 3 is wire-bonded to the alarm bonding pad 4 so that an alarm signal is sent out therefrom. If one of the GND terminals 1A and 1B is opened, a voltage effect of 2IR is produced in the resistance on the side of the GND terminal 1B or 1A. Thereby, an output signal from the comparators CMP A and CMP B is inverted from H to L and an alarm signal is output.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a semiconductor device having a function of detecting an open terminal failure.

The purpose is to issue an alarm signal before all of the multiple terminals connected in parallel become open, enabling complete fail-safe measures for semiconductor devices.

It has an alarm signal terminal, a plurality of power supply terminals, the same number of resistors, the same number of reference voltage sources, and the same number of comparators, each resistor is connected between each power supply terminal and the internal circuit, and each comparator is connected between each power supply terminal and the internal circuit. , one input terminal is connected to each power supply terminal, the other input terminal is connected to the connection point between the internal circuit and each resistor via each reference voltage source, and the output terminal is connected to the alarm signal terminal. Configure.

[Industrial application field]

The present invention relates to a semiconductor device having a function of detecting an open terminal failure.

In-vehicle integrated circuits are used for engine control, driving control, etc., and their reliability is more strictly required than for general integrated circuits.

In particular, open terminals due to vibration or temperature cycling are difficult to detect at an early stage, and fail-safe measures are required in the event of a field failure.

On the other hand, terminal short-circuit failures occur due to, for example, solder bridges, but these can be removed initially and are not as problematic as open terminals in terms of reliability.

[Conventional technology]

Countermeasures against open terminals can be taken using circuit technology in the case of signal input/output terminals, but
(including terminals)] was not possible.

For example, even if the input terminal is open, the power supply is still alive, so
In the case of an open terminal, the output of the integrated circuit is turned off so as not to perform a predetermined operation, thereby enabling a fail-safe measure. Once the open mode of the input terminal is known in this way, it is possible to change the output state from a circuit perspective.

However, if the power supply terminal became open, all the circuits within the integrated circuit stopped working, making it impossible to deal with this problem.

For this reason, it is conceivable to provide a plurality of one power supply terminal to improve reliability.

In the following example, a GND terminal will be explained as a power supply terminal.

FIGS. 2(1) and (21) are plan views illustrating power supply terminals of a conventional semiconductor device.

Figure 2 (1) shows the normal case where there is only one GND terminal. GND terminal 1 on the package side is connected to bonding pad 2 on the chip side by wire bonding, and bonding pad 2 is connected to the internal circuit inside the chip. Connected by internal wiring.

In this case, depending on manufacturing conditions or usage conditions.

For example, one G due to poor bonding, one defective soldering, etc.
If the ND terminal becomes open, the two integrated circuits will no longer function.

Figure 2 (2) shows a case where there are two GND terminals, and the GND terminals LA and IB on the package side are connected to bonding pads 2A and 2B on the chip side by wire bonding.

The bonding pads 2A and 2B are connected to each other and to an internal circuit by internal wiring.

Although the probability of failure occurring in this case is halved, this is still not a sufficient countermeasure.

(Problems to be Solved by the Invention) Conventional countermeasures against open power supply terminal failures have been limited to providing a plurality of parallel terminals, which has not been sufficient to maintain the reliability of integrated circuits.

[Means for solving problems]

The solution to the above problem is to have an alarm signal terminal, multiple power supply terminals, the same number of resistors, the same number of reference voltage sources, and the same number of comparators, and each resistor is connected between each power supply terminal and the internal circuit. Each comparator has one input terminal connected to each power supply terminal, the other input terminal connected to the connection point between the internal circuit and each resistor via each reference voltage source, and the output terminal connected to the alarm terminal. This is achieved by a semiconductor device with an open terminal detection circuit connected to a signal terminal.

[Effect]

The present invention provides a plurality of power terminals, and sends an alarm to the outside if even one of the terminals becomes open.

It is designed to perform fail-safe measures using other devices.

To this end, a detection resistor with a low resistance value (about 1Ω or less) that does not affect the operation of the integrated circuit is inserted between each terminal and the internal circuit.

By comparing the voltage effect across each resistor with a reference voltage, an open circuit is detected and an alarm is issued.

〔Example〕

FIG. 1 is a plan view of a power supply terminal portion of a semiconductor device illustrating an embodiment of the present invention.

In this case, there are two GND terminals, and the GND terminals 1Δ and IB on the package side are connected to the bonding pads 2A and 2B of the chip example by wire bonding.

The bonding pads 2A and 2B are connected to each other via a resistor R at a point P, and are connected to an internal circuit from the connection point P.

The comparators (1P A, and CMP B have one input terminal connected to the bonding pads 2A and 2B,
The other input terminals are each connected to the connection point P via a reference voltage source V, and each output terminal is connected to the alarm bonding pad 4.

The alarm signal terminal 3 is wire-bonded to the alarm bonding pad 4, from which an alarm signal is sent to the outside.

In this case, 1. Let I be the current flowing through each resistor R.

VR<IR.

vR>2rR.

Select one reference voltage VR so that

Now, when either GND terminal IA or IB becomes open, a voltage effect of 2JR occurs on the GND terminal IB or the resistor on the 18 side, and 1 comparator CMP A occurs.

The output signal of CMP B is inverted from "H" to "L" and an alarm signal is output.

The alarm signal is input to the microcomputer 2, which causes, for example, an indicator lamp to light up.

In automotive integrated circuits, microcomputers are used in a fail-safe manner, so if the present invention is applied to integrated circuits for ink faces, it can be expected to improve the reliability of the entire control system.

〔Effect of the invention〕

As explained above, according to the present invention, if even one of the plurality of terminals becomes open, an alarm signal is issued to the outside, thereby making it possible to completely fail-safe the integrated circuit.

[Brief explanation of the drawing]

FIG. 1 is a plan view of a power supply terminal portion of a semiconductor device illustrating an embodiment of the present invention. FIGS. 2(1) and 2(2) are plan views illustrating power supply terminals of a conventional semiconductor device. In fig. IA and IB are GND terminals. 2A and 2B are bonding panods for GND. 3 is the alarm signal terminal. 4 is the Alarm Ponding Pasodo Award #! , Side view, Figure 1, Figure 2, f) Figure 2,

Claims (1)

[Claims] It has an alarm signal terminal, a plurality of power supply terminals, the same number of resistors, the same number of reference voltage sources, and the same number of comparators, each resistor being connected between each power supply terminal and the internal circuit. Each comparator has one input terminal connected to each power supply terminal, the other input terminal connected to the connection point between the internal circuit and each resistor via each reference voltage source, and the output terminal connected to the alarm signal. A semiconductor device with an open terminal detection circuit, characterized in that the semiconductor device is connected to a terminal.