JPH01152806A - Capacitive coupling circuit - Google Patents

Abstract

PURPOSE:To quickly correct the error and to decrease the error occurrence period by supplying a current canceling the electric charge by the error due to a current flowing from a rectifier element to an output terminal when the amplitude of an input signal is restored to a normal value after an input signal exceeds a normal level and the rectifier element is conducted. CONSTITUTION:The circuit is provided with a capacitive element 4 coupling capacitively both terminals 1, 2 and connected between them and with a voltage supply means adding a DC component to the output terminal 2 and connected thereto, and when an input signal with a large amplitude exceeding a normal level is inputted, the rectifier element 5 is conductive and an integration device 22 detects a current flowing to the rectifier element 5 and integrates it. The charge flowing to the rectifier element 5 is grasped from the integration value of the integration device 22. When the input signal is decreased to a normal level or below, a constant current source 11 and a switch element 16 being a current supply means give a current decided based on the integration value to the output terminal 2. Thus, the rectifier element 5 is conductive and the current corresponding to the charge flowing from the rectifier element 5 to the voltage source is injected to eliminate an error caused in the DC voltage difference between the input and output terminals in a short time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Applications] The present invention relates to a capacitive coupling circuit, and particularly to a capacitive coupling circuit suitable for integration into an integrated circuit.

[Prior Art] When transmitting and receiving electrical signals between devices, there is often a difference in DC level between the devices, and in order to remove this DC level difference, capacitive coupling has traditionally been used. There is. FIG. 4 is a circuit diagram showing this type of conventional capacitive coupling circuit which is integrated circuit (hereinafter referred to as IC).

A capacitive element 4 is connected between the input terminal 1 and the output terminal 2. A rectifying element 5 is connected between the output terminal 2 and the power terminal 3, and the anode of the rectifying element 5 is connected to the output terminal 2, and the cathode is connected to the power terminal 3. A voltage supply means 21 constituted by the element 6 and a constant voltage source 7 is also connected, and a constant voltage VREF is applied thereto. Note that a power supply voltage of DD is applied to the power supply terminal 3.

Generally, when the capacitive element 4 is also integrated, the area of the IC often becomes extremely large, so the capacitive element 4 is configured externally, and the other elements are integrated. That is, the elements surrounded by the broken line 35 in FIG. 4 are formed on the IC.

The electrical signal output from the output terminal 2 is supplied to other circuits formed inside the IC. Each circuit in the IC is a MOS
In the case of an FET, the output terminal 2 is often connected to the gate of an MO3FET. In this case, in order to protect the MOSFET from electrostatic damage, it is necessary to take some measures against static electricity at the output terminal 2.

In the circuit shown in FIG. 4, the rectifying element 5 allows MO
Electrostatic damage to SFET is prevented.

That is, when a voltage higher than the sum of the voltage VDD of the power supply terminal 3 and the forward voltage VF of the rectifying element 5 (hereinafter referred to as reference voltage) V on + V p is applied to the output terminal 2, Since the rectifying element 5 conducts in the forward direction, the voltage applied to the output terminal 2 is equal to the reference voltage V on +
Limited to V p or less. Thereby, the circuit element (MOSFET) connected to the output terminal 2 is protected from electrostatic damage.

A DC constant voltage V REF is applied to the output terminal 2 from the voltage supply means 21 . Then, the capacitor C4 and the resistor R6 are selected so that the frequency fo determined based on the following formula is sufficiently lower than the frequency of the AC component of the input signal input to the input terminal 1.

fo = 1/ (2πxc4XR6) However, C4: Capacitance R6 of capacitive element 4; Resistance of resistive element 6 Then, the DC component of the electrical signal applied to input terminal 1 is removed by capacitive element 4, and the AC Only the component is transmitted to the output terminal 2.

FIG. 5 is a graph diagram showing an example of input/output characteristics of the circuit shown in FIG. 4. A curve A shown in FIG. 5 is the waveform of the input signal input to the input terminal 1, and an AC signal component is placed on the DC level VRI. Curve B is the waveform of the output signal output from the output terminal 2, with the constant voltage VIP being the DC level, and the AC signal component being placed above it. In this way, the DC level of the input signal input to input terminal 1 is V
FII is converted to VREF and output from output terminal 2.

[Problems to be Solved by the Invention] By the way, since the above-described conventional capacitive coupling circuit has the rectifying element 5 as a countermeasure against electrostatic damage, the amplitude of the AC component of the input signal is (VDD+VF) -V R , , a forward current flows through the rectifying element 5 and the voltage at the output terminal 2 is limited. In this case, the current flowing out through the rectifying element 5 causes the DC voltage difference between the input and output terminals (VRI VREF
) an error occurs.

The latter half of the curve B shown by the solid line in FIG. 5 shows this situation, and is shifted to a lower level side than the characteristic shown by the broken curve C when there is no error. This error is output as a DC component to the output terminal 2, and decreases in time proportional to the time constant (C4XR6).

However, as mentioned above, fo is usually selected to be sufficiently low relative to the frequency of the AC component of the input signal, so
This time constant (C4XR6) has a considerably large value compared to the change in input, and there is a problem that an error remains for a considerable period of time.

The present invention has been made in view of such problems, and includes:
It is an object of the present invention to provide a capacitive coupling circuit that can eliminate errors occurring in a DC voltage difference between input and output terminals due to a large amplitude of an input signal in a short time after the amplitude of the input signal returns to a normal value.

[Means for Solving the Problems] A capacitive coupling circuit according to the present invention includes a capacitive element connected between an input terminal and an output terminal to capacitively couple the two, and a capacitive element connected to the output terminal and connected to the output terminal. a voltage supply means for adding a DC component; a rectifier connected between the output terminal and the voltage source; and a rectifier that rectifies the rectifier when the input signal from the input terminal exceeds a normal level and the rectifier becomes conductive. It has an integrating means for detecting and integrating the current flowing through the element, and a current supplying means for injecting a current determined based on the integrated value of the integrating means into the output terminal when the input signal falls below a normal level. It is characterized by

[Operation] In the present invention, when an input signal with a large amplitude exceeding a normal level is input, the rectifying element becomes conductive, and the integrating means detects and integrates the current flowing through the rectifying element. The amount of charge flowing into the rectifying element can be determined from the integral value of this integrating means.

Next, when the input signal falls below a normal level, the current supply means injects a current determined based on the integral value into the output terminal. As a result, the rectifying element becomes conductive, and a current corresponding to the amount of charge flowing from the rectifying element to the voltage source is injected, making it possible to eliminate errors occurring in the DC voltage difference between the input and output terminals in a short time. can.

[Embodiments] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. - FIG. 1 is a circuit diagram showing a capacitive coupling circuit according to an embodiment of the present invention. A capacitive element 4 is connected between the input terminal 1 and the output terminal 2, and the input terminal 1 and the output terminal 2 are capacitively coupled. A series connection of a resistive element 6 and a constant voltage source 7 constituting a voltage supply means 21 is connected to the output terminal 2, and a constant voltage F is applied to the output terminal 2 by this voltage supply means 21. Ru. A power supply voltage of VDD is applied to the power supply terminal 3.

A rectifying element 5 and a resistive element 8 having a resistance value of R8 are connected in series between the power supply terminal 3 and the output terminal 2. The anode of the rectifying element 5 is connected to the resistive element 8, and the cathode is connected to the power supply terminal 3. It is connected to the. Both ends of the resistive element 8 are connected to a non-inverting terminal and an inverting terminal of a voltage-current converter 10, respectively, and are also connected to an inverting terminal and a non-inverting terminal of a comparator 9, respectively.

The mutual conductance of the voltage-current converter 10 is gm, and the output terminal is connected to the input terminal of the amplifier 13 via the switch 18, and is also connected to the non-inverting input terminal of one comparator.

A capacitive element 14 is connected between the input end and the output end of the amplifier 13.
and the reset switch element 15 are connected in parallel. The amplifier 13, the capacitive element 14, and the switch element 15 constitute an integrator 22. The output signal of the integrator 22 is input to the inverting input terminal of one comparator.

The output terminal of comparator 19 is connected to control circuit 20 .

The output terminal of the comparator 9 is also connected to the control circuit 20, and the control circuit 20 outputs a control signal to control the opening and closing of the switch elements 16 to 18 based on the output signal of the comparator 9.19. do.

Constant current source 11 connects resistive element 8 via switch element 16.
and the rectifying element 5, and the constant current source 1
2 is connected to the connection point between the integrator 22 and the switch element 18 via the switch element 17. Constant current source 11.1
The currents generated by 2 are 111+112, respectively, and the ratio of the current values 11, : , □ is constant as given by the following equation.

Ill: 112=1: (Ra is converted into an IC. In FIG. 1, the elements within the broken line 23 are elements formed on the IC.

FIG. 2 is a circuit diagram showing an example in which the voltage-current converter 10 is constructed using MOSIC. The non-inverting input terminal 24 of the voltage-current converter 10 is connected to the gate of a depletion type P-channel MOSFET 30 via a resistive element 27, and the inverting input terminal 25 is connected to the gate of a depletion-type P-channel MOSFET 31 via a resistive element 26. connected to the gate. MO8FET30.31 gate and each resistive element 2
The connection points with 7.26 are connected to the power supply terminal 3 via rectifying elements 28.29, respectively, and MO3FET30.31
The drain or source of is connected to the power supply voltage VD from the power supply terminal 3.
o is supplied (not shown in FIG. 1).

N-channel type MO3FETs 32 and 33 are connected between the source or train of MO3FET 30 and the ground, respectively, and the drain of MO3FET 32 is connected to the MO3F
Commonly connected to the gates of ET32 and 33. MO3
An output terminal 34 is connected to the connection point between the FET 31 and the MO8FET 33. Input terminals 24 and 25 are the first
It is connected to both ends of the resistive element 8 shown in the figure, the output terminal 34 is connected to the switch element 18, and a current g1 times the voltage difference between both ends of the resistive element 8 is output from the output terminal 34. .

MOSFET30.31 is depletion type, so
input terminal 24.25 than the power supply voltage VDD of power supply terminal 3
It is possible to operate even when the voltage is high. Rectifying elements 28, 29 are connected to protect the gates of MOSFET 30, 31, and thereby MOSFET 3
The gate voltage of 0.31 is the power supply voltage of power supply terminal 3 ■D
The voltage is suppressed to a voltage equal to or less than the sum of the forward voltages of D and the rectifying elements 28 and 29. By setting the forward voltage of the rectifying elements 28 and 29 to be larger than the forward voltage VF of the rectifying element 5 (see FIG. 1), when a forward current flows through the rectifying element 5, Also, no current flows through the rectifying elements 28 and 29, and the voltage input to the input terminals 24 and 25 can be accurately converted into current and output from the output terminal 34. Note that the rectifying element 5 is a Schottky Such a combination can be easily obtained by configuring the rectifying elements 28 and 29 using PN junction diodes.

Also, in the comparator 9 shown in FIG. 1, the rectifying element 5 is
Operation can be made possible even when conduction occurs in the forward direction. The switch element 15 of the integrator 22 is activated during the period when the initial conditions are given to the circuit (for example, immediately after the IC is powered on).
Only, it turns on and the initial value of the integrator 22 ■! Set. After setting the initial value, the switch element 15 is turned off and the integrator 22 starts integrating.

Next, the operation of the capacitive coupling circuit configured in this way will be explained with reference to the time charts shown in FIGS. The line E in Figure 3(b) shows the voltage drop that occurs in the resistive element 8, and the line E is positive when the current flows from the output terminal 2 side. The line F in Fig. 3(C) is the output of the comparator 9, the line G in Fig. 3(d) is the output waveform of the integrator 22, and the line H in Fig. 3(e) is the output of one comparator. 3(f) is the control signal for the switch element 18, and the line J in FIG. 3(g) is the control signal for the switch element 18.
indicates control signals for switch elements 16 and 17. Control signals shown by lines I and J are output from the control circuit 20 based on the outputs of the comparators 9 and 19.

Now, during the period ■ in FIG. When the reference voltage given as the sum V DD + V p is exceeded, the rectifying element 5 becomes conductive and current flows through the resistive element 8 [Figure 3 (a)], so the potential of the output terminal 2 does not rise any further. do not. In this case, the current flowing through the rectifying element 5 passes through the resistive element 8 for current detection, so
The current causes a voltage drop in the resistive element 8 as shown in FIG. 3(b). This voltage drop is detected by the comparator 9, and the output of the comparator 9 is as shown in FIG. 3(C).
Changes from low level to high level. The control circuit 20 that receives the change in the output of the comparator 9 is connected to the switch element 18.
Turn on.

On the other hand, the potential across the resistive element 8 is determined by the voltage-current converter 10.
is also input, and from this voltage-current converter 10,
A current gm times the voltage drop generated in the resistive element 8 is output. Therefore, when the switch element 18 is turned on, a current g1 times the voltage drop generated in the resistive element 8 is input to the integrator 22 and integrated. Since the output of the integrator 22 increases in proportion to the input current, the period I portion in FIG. It shows the sum of the values.

On the other hand, the comparator 19 compares the output level of the integrator 22 with the output level of the integrator 22.
The input level of comparator 1 is compared with the input level of comparator 1.
The output of 9 changes from low level to high level [3rd
Figure (e)]. The output signal of the comparator 19 is input to the control circuit 20, and by outputting a high-level signal from one of the comparators, the occurrence of an error due to the outflow current of the rectifying element 5 is transmitted to the control circuit 20. .

Next, when the level of the signal applied to the input terminal 1 becomes small and the rectifying element 5 becomes non-conductive, each signal level enters the period ■ in FIG. 3, and the current flowing through the resistive element 8 becomes negative -Ill [Figure 3(a)]. As a result, the voltage drop occurring across the resistive element 8 is negative -111×
R8 [FIG. 3(b)], so the output of the comparator 9 changes from high level to low level [FIG. 3(C)].

When the control circuit 20 receives the output signal of the comparator 9,
As shown in FIG. 3(f), the control signal is set to low level to turn off the switch element 18. As a result, the output of the voltage-current converter 10 is not input to the integrator 22, and the integrator 22 stops integrating the output current of the voltage-current converter 10. Furthermore, since the output of the comparator 19 is at a high level [Fig. 3(e)], the control circuit 20 determines that an error has occurred and turns off the switch element 18, and at the same time, as shown in Fig. 3(g). ) The switch elements 16, 1 are activated by the control signal shown in
Turn on 7. As a result, a correction current III is injected from the constant current source 11 to the output terminal 2 side, and a current 112 flows from the constant current source 12 to the integrator 22.

Integrator 22 integrates this current I12. Figure 3 (d
) indicates a change in the output of the integrator 22 when this current 112 is flowing.

Then, when the output of the integrator 22 rises and reaches V,
The output of the comparator 19 changes from high level to low level, as shown in FIG. 3(e).

When the low level of the comparator 19 is input to the control circuit 20, the control circuit 20 turns off the switch elements 16 and 17. As a result, the supply of the correction current Ill to the output terminal 2 and the supply of the current 11□ to the integrator 22 are stopped. As a result, both the current flowing through the resistive element 8 and the voltage drop across the resistive element 8 become O.

By the way, in period I, the integrator 22 integrates a current that is (R8Xg-) times the current flowing through the rectifying element 5. Then, the current ratio Ill of the currents 111 and 112 respectively flowing out from the constant current sources 11 and 12 during the period ■,
If□ is directly set as shown in the following formula.

III: 112=1: (Ra Xgffl) Therefore, since the correction current Ill is 1/(Rs 22 reaches the initial value V1 of the integrator 22, the correction current Il
By stopping the injection of l, a current corresponding to the amount of charge flowing out through the rectifying element 5 is injected into the output terminal 2. Thereby, errors occurring in the DC voltage difference between the input and output terminals can be quickly removed.

Note that when an input signal with a large amplitude that causes the rectifying element 5 to conduct is not input to the input terminal 1, only the alternating current component of the input signal is extracted, as in the conventional example shown in FIG.
A DC level determined by the voltage supply means 21 is applied and output.

Further, in the circuit shown in FIG. 1, the voltage supply means 21
is composed of a constant voltage source 7 and a resistive element 6, but by replacing the resistive element 6 with a switch element, the voltage setting time can be shortened and the holding time can be lengthened. .

Furthermore, in the embodiment shown in FIG. 1, the case where the input voltage increases is shown, but the rectifying element 5 and the current source 1.
If the polarities of 1", 12, etc. are reversed, the same operation can be carried out even when the input voltage is low, and it is also possible to carry out the operation simultaneously when the input voltage is high and low.

[Effects of the Invention] As explained above, according to the present invention, when the input signal exceeds the normal level and the rectifying element becomes conductive, the integrating means detects and integrates the current flowing through the rectifying element, and the input signal After the amplitude of has returned to its normal value, the current supply means injects a current determined based on the integral value of the integrating means into the output terminal, so that the current that cancels out the error charge due to the current flowing out from the rectifier is applied to the output terminal. This error can be corrected very quickly and the period during which the error occurs can be shortened.

When a capacitively coupled circuit is integrated into an integrated circuit, a rectifying element is often required to prevent electrostatic damage. Therefore, the present invention provides an integrated circuit of a capacitively coupled circuit, which quickly eliminates errors caused by this rectifying element. It is extremely useful for

[Brief explanation of the drawing]

111J is a time chart diagram for implementing the capacitive coupling circuit according to the embodiment of the present invention, FIG. 4 is a circuit diagram showing a conventional capacitive coupling circuit, and FIG. 5 is for explaining the operation of the conventional capacitive coupling circuit. FIG. 1.24, 25; input terminal, 2, 34: output terminal, 3;
Power terminal, 4, 14. Capacitive element, 5°28.29; Rectifying element, 6, 8, 26, 27; Resistive element, 7; Constant voltage source, 9, 19; Comparator, 10: Voltage-current converter, 11.
．． 12. Constant current source, 13; Amplifier, 15; Resetting switch element, 16 to 18; Switch element, 20; Control circuit, 21; Voltage supply means, 22; Integrator, 2B, 35;
Broken lines indicating the IC area, 30, 31. Depletion type P channel MO3FET, 32.33; N channel type MO3
FET Figure 2 and Figure 4

Claims (1)

[Claims] A capacitive element connected between the input terminal and the output terminal to capacitively couple the two, a voltage supply means connected to the output terminal and adding a DC component to the output terminal, and between the output terminal and the voltage source. a rectifying element connected to the input terminal, an integrating means for detecting and integrating a current flowing through the rectifying element when the input signal from the input terminal exceeds a normal level and the rectifying element becomes conductive; A capacitive coupling circuit comprising: current supply means for injecting a current determined based on the integrated value of the integrating means into the output terminal when the voltage decreases below the level.