JPH01151271U - - Google Patents
Info
- Publication number
- JPH01151271U JPH01151271U JP4750288U JP4750288U JPH01151271U JP H01151271 U JPH01151271 U JP H01151271U JP 4750288 U JP4750288 U JP 4750288U JP 4750288 U JP4750288 U JP 4750288U JP H01151271 U JPH01151271 U JP H01151271U
- Authority
- JP
- Japan
- Prior art keywords
- logarithmic conversion
- target
- ground clutter
- conversion circuit
- detecting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 6
- 238000001514 detection method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Radar Systems Or Details Thereof (AREA)
Description
第１図はこの考案の一実施例によるグラウンド
クラツタ中目標自動検出装置を示す図、第２図は
レーダの受信電力を表す図、第３図は従来のグラ
ウンドクラツタ中目標自動検出装置を示す図であ
る。
図において１は対数変換回路、２はシフト・レ
ジスタ、３は平均値演算回路、４は減算回路、５
は逆対数変換回路、６はスレツシヨルド演算回路
、７はレーダ、８は目標、９はグラウンドクラツ
タ、１０は受信機雑音である。なお、図中、同一
符号は同一、または相当部分を示す。
Fig. 1 is a diagram showing an automatic target detection device in ground clutter according to an embodiment of this invention, Fig. 2 is a diagram showing the received power of the radar, and Fig. 3 is a diagram showing a conventional automatic target detection device in ground clutter. FIG. In the figure, 1 is a logarithmic conversion circuit, 2 is a shift register, 3 is an average value calculation circuit, 4 is a subtraction circuit, and 5
is an inverse logarithmic conversion circuit, 6 is a threshold calculation circuit, 7 is a radar, 8 is a target, 9 is a ground clutter, and 10 is a receiver noise. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
る受信電力を入力信号とし、この信号を対数変換
する対数変換回路と、この対数変換回路の出力信
号の平均値演算を行う平均値演算回路と、この平
均値演算回路の出力信号の逆対数変換を行う逆対
数変換回路と、距離によりスレツシヨルドを演算
し、グラウンドクラツタを目標と誤つて検出する
確率を一定とし、目標を自動検出するためのスレ
ツシヨルドを設定する手段とを備えたことを特徴
とするグランドクラツタ中目標自動検出装置。 A logarithmic conversion circuit that takes the power received by ground clutter (waves reflected from land) as an input signal and logarithmically converts this signal; an average value calculation circuit that calculates the average value of the output signal of this logarithmic conversion circuit; An anti-logarithmic conversion circuit performs anti-logarithmic conversion of the output signal of the value calculation circuit, and a threshold is calculated based on the distance.The probability of detecting ground clutter as a target is constant, and a threshold is set for automatically detecting the target. A ground clutter medium target automatic detection device characterized by comprising means for detecting a target in a ground clutter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4750288U JPH01151271U (en) | 1988-04-08 | 1988-04-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4750288U JPH01151271U (en) | 1988-04-08 | 1988-04-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01151271U true JPH01151271U (en) | 1989-10-19 |
Family
ID=31273705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4750288U Pending JPH01151271U (en) | 1988-04-08 | 1988-04-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01151271U (en) |
-
1988
- 1988-04-08 JP JP4750288U patent/JPH01151271U/ja active Pending
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