JPH01150377A - Assembling method for semiconductor laser - Google Patents

Assembling method for semiconductor laser

Info

Publication number
JPH01150377A
JPH01150377A JP62308513A JP30851387A JPH01150377A JP H01150377 A JPH01150377 A JP H01150377A JP 62308513 A JP62308513 A JP 62308513A JP 30851387 A JP30851387 A JP 30851387A JP H01150377 A JPH01150377 A JP H01150377A
Authority
JP
Japan
Prior art keywords
semiconductor laser
heat
element forming
chip
forming part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62308513A
Other languages
Japanese (ja)
Inventor
Hiroshi Ogawa
洋 小川
Hideaki Horikawa
英明 堀川
Hiroshi Wada
浩 和田
Tatsuo Kunii
国井 達夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP62308513A priority Critical patent/JPH01150377A/en
Publication of JPH01150377A publication Critical patent/JPH01150377A/en
Pending legal-status Critical Current

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  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To obtain a laser device having excellent temperature characteristics by a method wherein the heat generated on a light emitting part is dispersed by a pair of heat sinks and the temperature rise on the light emitting part is suppressed by removing the substrate part of a semiconductor laser chip, and the remaining element forming part only is pinched by the heat sinks from the upper and the lower parts. CONSTITUTION:A P-side electrode is formed on the P-InGaAsP etching-stop layer 13 on which a semiconductor laser chip 11 is exposed. Also, a P-side heat sink 25 consisting or silicon and the like is bonded on a stem 24. Then, the electrode side on the P-side of the element forming part 11a of the chip 11 is bonded on the heat sink 25 with the structure, composed of an N-side beat sink 23 and the element forming part 11a of the chip 11, by turning upside down. By assembling a semiconductor laser as above-mentioned, the structure in which the element forming part 11a only of the chip 11 is pinched by the upper and the lower heat sinks is obtained, the heat generated by the heat- generating part in the element forming part 11a is quickly dispersed by the upper and the lower heat sinks 23 and 25, and the temperature rise of the heat- generating part can be suppressed.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は半導体レーザの組立方法に関するものでるる
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for assembling a semiconductor laser.

(従来の技術) 従来の半導体レーザの一般的な組立方法を第2図に示す
。図において、lはステムでめり、その上に、シリコン
などからなるヒートシンク2を固定し、このヒートシン
ク2上に半導体レーザチップ3をハンダ材(例えばAu
 −Snなど)でボンディングし、その半導体レーザチ
ップ3の電極4をAuワイヤ5で図示しない端子(前記
ステム1に絶縁貫通偏設される)に配線する。
(Prior Art) A general method for assembling a conventional semiconductor laser is shown in FIG. In the figure, l is bent by a stem, a heat sink 2 made of silicon or the like is fixed on top of the stem, and a semiconductor laser chip 3 is mounted on this heat sink 2 using a soldering material (for example, Au).
-Sn, etc.), and the electrode 4 of the semiconductor laser chip 3 is wired with an Au wire 5 to a terminal (not shown) (which is provided unevenly through the insulation of the stem 1).

(発明が解決しようとする問題点) このようにして組立てられた半導体レーザにおいて、半
導体レーザチップ3は、温度上昇とともに効率が低下し
、出力がおちる。そこで、上記組立法において半導体レ
ーザテッグ3は、発光部がヒートシンク2に近くなるよ
うにして該ヒートシンク2上にボンディングされている
が、特にInGaAsP系半導俸レーザチップし温度特
注が悪く、上記組立法では放熱が元号ではなく、100
℃8度1でしか発振が得られないという問題がめった。
(Problems to be Solved by the Invention) In the semiconductor laser assembled in this manner, the efficiency of the semiconductor laser chip 3 decreases as the temperature rises, and the output drops. Therefore, in the above assembly method, the semiconductor laser TEG 3 is bonded onto the heat sink 2 so that the light emitting part is close to the heat sink 2. However, since the temperature customization is particularly difficult for InGaAsP semiconductor laser chips, the above assembly method is difficult. Then, heat radiation is not the era name, but 100
A frequent problem was that oscillation could only be obtained at temperatures of 8°C and 1°C.

この発明は、半導体レーザチップの発光部で発生した熱
を速やかに逃がし、発光部の温度上昇を抑えることによ
り温度特性に差れた半導体レーザを得ることができる半
導体レーザの組立方法を提供することを目的とする。
An object of the present invention is to provide a method for assembling a semiconductor laser that can quickly release heat generated in the light emitting part of a semiconductor laser chip and suppress a temperature rise in the light emitting part to obtain a semiconductor laser with different temperature characteristics. With the goal.

(問題点を解決するための手段) この発明は、半導体レーザの組立方法において、半導体
レーザテッグの基板部を除去し、残った素子形成部のみ
を上下からヒートシンクで挾むようにしたものである。
(Means for Solving the Problems) The present invention is a method for assembling a semiconductor laser in which the substrate portion of the semiconductor laser TEG is removed and only the remaining element forming portion is sandwiched between top and bottom heat sinks.

(作用) 上記の組立法においては、半導体レーザチップの素子形
成部のみが上下のヒートシンクで挾まれ、素子形成部中
の発光部で発生した熱は、極近接し九上下のヒートシン
クに速やかに逃げるようになる。
(Function) In the above assembly method, only the element forming part of the semiconductor laser chip is sandwiched between the upper and lower heat sinks, and the heat generated in the light emitting part in the element forming part quickly escapes to the heat sinks located in close proximity and above and below. It becomes like this.

(実施例) 以下この発明の一実施例を第1図を参照して説明する。(Example) An embodiment of the present invention will be described below with reference to FIG.

まず5g1図(a)に示すような半導体レーザチップ1
1を用意する。この半導体レーザテッグ11はV I 
P S (V−grooved 1nner −5tr
ipe on P−8ubstrate )型半導体レ
ーザチップと称されるもので5p−InP基板12上に
1回目の液相成長によりp−InGaAsPエッチング
ストッグ層13 、 p−InPバッファ層14゜n−
InPブOyり層15.p−InPプOyり層16を順
次形成した後、ブロック層16.15とバッファ層14
の一部にV溝部7を形成し、そのV溝部を含む1回目の
成長層上に2回目の液相成長によりp−InPクラッド
層18 、 InGaAaP活性層19゜n−InPク
ラッド層20 、 n−InGaAsPキ’ryグ層2
1を順次層成1、さらにキャップ層21上にn側電極2
2を形成して製造される。このVIPS屋半導体レーザ
しッグ11が通常のVIPS型半導体レーザしッグと異
なる点は、p−1nPバッファ層14とp−InP基板
12間にp−InGaAsPエッチングストッグ層13
を有することであり、かりp−InP基板12の裏面に
p側電極が設けられていないことである。
First, a semiconductor laser chip 1 as shown in Fig. 5g1 (a)
Prepare 1. This semiconductor laser TEG 11 is VI
P S (V-grooved 1nner -5tr
A p-InGaAsP etching stock layer 13 and a p-InP buffer layer 14°n- are formed on a 5p-InP substrate 12 by first liquid phase growth.
InP layer 15. After sequentially forming the p-InP layer 16, the block layer 16.15 and the buffer layer 14 are formed.
A V-groove 7 is formed in a part of the V-groove, and a p-InP cladding layer 18, an InGaAaP active layer 19, an n-InP cladding layer 20, and a n-InP cladding layer 20 are formed on the first growth layer including the V-groove by second liquid phase growth. -InGaAsP key layer 2
1 is sequentially layered, and further an n-side electrode 2 is formed on the cap layer 21.
It is manufactured by forming 2. The difference between this VIPS semiconductor laser 11 and a normal VIPS semiconductor laser is that a p-InGaAsP etching stock layer 13 is formed between a p-1nP buffer layer 14 and a p-InP substrate 12.
, and no p-side electrode is provided on the back surface of the p-InP substrate 12.

次に、このような半導体レーザチップ11を、第1図(
b)に示すように、発光部(VI’1l17内の活性層
19部分)を下にして、換言すればp−InP基板12
を上にして、シリコンなどからなるn [lI!Iヒー
トシンク23上にボンディングする。
Next, such a semiconductor laser chip 11 is assembled as shown in FIG.
As shown in b), the light emitting part (active layer 19 part in VI'1l17) is facing down, in other words, p-InP substrate 12
With n [lI! Bonding is performed on the I heat sink 23.

この後、HCI!などのエツチング液を用いて、第1図
(c)に示すように、半導体レーザチップ11のp−r
nP基板基板全2ツチング除去する。この時、Hceは
InGaAsPをエツチングしないので、p−InGa
AsPエッチングストッグ層13にエツチングが達した
時、エツチングは正確に止る。したがって、単導体レー
ザチップ11のバッファ層14〜n側電極22の素子形
成部11mを正確に残すことができる。ただし、このエ
ツチング時、半導体レーザチップ11の端面からエツチ
ングされるのを防ぐため、該端面はレゾストなどでマス
クする必要がある。
After this, HCI! As shown in FIG. 1(c), using an etching solution such as
All two pieces of the nP substrate are removed. At this time, Hce does not etch InGaAsP, so p-InGa
When the etching reaches the AsP etch stock layer 13, the etching stops exactly. Therefore, the element forming portions 11m of the buffer layer 14 to the n-side electrode 22 of the single-conductor laser chip 11 can be left accurately. However, during this etching, in order to prevent the end face of the semiconductor laser chip 11 from being etched, the end face must be masked with resist or the like.

しかる後、半導体レーザチップ11の露出し九p−In
GaAsPエッチングストッグ層13上にp側電極を形
成する。一方、第1図(d)に示すようにステム24上
に、シリコンなどからなるp側ヒートシンク25をボン
ディングする。そして、このp側ヒートシンク25上に
、前記n ([Iヒートシンク23と半導体レーザチッ
プ11の素子形成部11aとの構造体を上下逆にして、
つまりn側ヒートシンク23を上にして半導体レーザチ
ップ11の素子形成部11aのp側′成極側をボンディ
ングする。
After that, the semiconductor laser chip 11 is exposed and the nine p-In
A p-side electrode is formed on the GaAsP etching stock layer 13. On the other hand, as shown in FIG. 1(d), a p-side heat sink 25 made of silicon or the like is bonded onto the stem 24. Then, on this p-side heat sink 25, the structure of the n
That is, the p-side polarization side of the element forming portion 11a of the semiconductor laser chip 11 is bonded with the n-side heat sink 23 facing upward.

最後に、n側ヒートシンク23(半導体レーザチップ1
1のn側電極取出し部となる)を端子(スキム24に絶
縁貫通植設される)にAuワイヤ26により配線する。
Finally, the n-side heat sink 23 (semiconductor laser chip 1
1) is wired to a terminal (which is implanted through insulation in the skim 24) using an Au wire 26.

このようにして組立てられた半導体レーザにおいては、
半導体レーザテッグ11の素子形成部11aのみが上下
のヒートシンク23.25で挾まれ之構造となる。した
がって、素子形成部11a中の発光部で発生した熱は、
極近接した上下のヒートシンク23.25に速やかに逃
げるようになり、その結果として発光部の温度上昇を抑
えることができ、温度特性は極めて優れたものとなる。
In the semiconductor laser assembled in this way,
Only the element forming portion 11a of the semiconductor laser TEG 11 is sandwiched between the upper and lower heat sinks 23, 25. Therefore, the heat generated in the light emitting part in the element forming part 11a is
The light quickly escapes to the upper and lower heat sinks 23 and 25 which are very close to each other, and as a result, the temperature rise in the light emitting section can be suppressed, resulting in extremely excellent temperature characteristics.

なお、上記一実施例は、VIPS型半導体レーザしッグ
を組立てる場合を説明したが、この発明において半導体
レーザチップの種類は特に限定されない。各種の半導体
V−ザチッグに対してこの発明を適用できる。
Although the above embodiment describes the case where a VIPS type semiconductor laser chip is assembled, the type of semiconductor laser chip is not particularly limited in the present invention. This invention can be applied to various semiconductor V-zatigs.

また、上記一実施例では、基板12とバッファ層14間
にエツチングストップ層13を有する特別な構造の半導
体レーザチップを用意したが、エツチングストップ層1
3が無くても基板12のエツチング除去を高精度に制御
できるのであれば、エツチングストップ層13は不要で
あり、通常の構蹟のレーザチップでよい。
Further, in the above embodiment, a semiconductor laser chip having a special structure having the etching stop layer 13 between the substrate 12 and the buffer layer 14 was prepared.
If the etching removal of the substrate 12 can be controlled with high precision even without the etching stop layer 13, the etching stop layer 13 is not necessary and a laser chip with a normal structure may be used.

(発明の効果) 以上詳述したように、この発明の組立方法によれば、半
導体レーザチップの基板部を除去し、残った素子形成部
のみを上下からヒートシンつて挾むようにしたので、発
光部からの熱を極近接した上下の一対のヒートシンクで
良好に逃がすことができ、発光部の温度上昇を確実に抑
えることができ、温度特性の極めて優れた半導体レーザ
を得ることができる。
(Effects of the Invention) As detailed above, according to the assembly method of the present invention, the substrate portion of the semiconductor laser chip is removed and only the remaining element forming portion is sandwiched between the top and bottom with heat sinks, so that the light emitting portion can be removed from the light emitting portion. The heat can be effectively dissipated by the pair of upper and lower heat sinks that are very close to each other, and the temperature rise in the light emitting part can be reliably suppressed, making it possible to obtain a semiconductor laser with extremely excellent temperature characteristics.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の半導体レーザの組立方法の一笑施例
を示す工程断面図、第2図は従来の半導体レーザの組立
方法を示す断面図である。 11・・・半導体レーザテッグ、lla・・・素子形成
部、12・・・p−InP基板、23・・・n側ヒート
シンク、25・・・p側ヒートシンク。 第2図
FIG. 1 is a process sectional view showing an embodiment of the semiconductor laser assembly method of the present invention, and FIG. 2 is a sectional view showing a conventional semiconductor laser assembly method. DESCRIPTION OF SYMBOLS 11... Semiconductor laser TEG, lla... Element formation part, 12... P-InP board, 23... N-side heat sink, 25... P-side heat sink. Figure 2

Claims (1)

【特許請求の範囲】[Claims] 半導体レーザチップの基板部を除去し、残った素子形成
部のみを上下からヒートシンクで挾むようにしたことを
特徴とする半導体レーザの組立方法。
A method for assembling a semiconductor laser, characterized in that the substrate portion of the semiconductor laser chip is removed, and only the remaining element forming portion is sandwiched between top and bottom by heat sinks.
JP62308513A 1987-12-08 1987-12-08 Assembling method for semiconductor laser Pending JPH01150377A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62308513A JPH01150377A (en) 1987-12-08 1987-12-08 Assembling method for semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62308513A JPH01150377A (en) 1987-12-08 1987-12-08 Assembling method for semiconductor laser

Publications (1)

Publication Number Publication Date
JPH01150377A true JPH01150377A (en) 1989-06-13

Family

ID=17981930

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62308513A Pending JPH01150377A (en) 1987-12-08 1987-12-08 Assembling method for semiconductor laser

Country Status (1)

Country Link
JP (1) JPH01150377A (en)

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