JPH01144360A - Automatic gain adjusting device - Google Patents

Abstract

PURPOSE:To prevent a malfunction by detecting the terminal voltage of a load by a voltage detection circuit and performing an error amplification between the detected voltage and the reference voltage by an error amplifier circuit. CONSTITUTION:An operational amplifier (an error amplifier) OP1 is such that the reference voltage generated from a reference voltage generation circuit 1 is supplied to an inverting input terminal as constant voltage divided by the resistance R13 and R14, the voltage supplied from a chopper 6 to a load 5 is divided by the resistance R11 and R12 which is a voltage detection circuit, and is supplied to a non-inverting input terminal. A first feedback loop is constituted of a path returning to the inverting input terminal of the operational amplifier OP1 through the resistance Rf1 from an output terminal of the operational amplifier OP1, and a second feedback loop is constituted of a path through the transistance R2, transistors(Tr) Q1-Q2 and from the operational amplifier OP1. The output of the operational amplifier OP1 and a signal of a triangle wave generation circuit 4 are supplied to a voltage comparator 2, and is supplied as a pulse signal to the chopper circuit 6 from a chopper controlling circuit 8.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an automatic gain adjustment circuit, and more particularly to an automatic gain adjustment circuit that can automatically adjust the gain of an error amplifier used in a DC-DC converter or the like according to a voltage applied to a load. Regarding circuits.

BACKGROUND ART FIG. 5 shows a circuit diagram of a DC-DC converter to which a conventional error amplification circuit is applied. In the figure, the voltage applied to load 5 at J3 is fed back to resistors R15 and R16.
Operational amplifier circuit (hereinafter abbreviated as operational amplifier) O
The reference voltage generation circuit 1 is supplied to the non-inverting input terminal of Pl.
The reference voltage generated by the resistor R17 supplies a constant voltage to the inverting input terminal of the amplifier OP.

The operational amplifier OP compares the voltage applied to the load 5 divided by the resistors R15 and R16 with the reference voltage, amplifies the difference, and outputs it.
The settings are made by R18, R1, and so on. The output voltage of the operational amplifier oP1 is supplied to a voltage comparison circuit 2, which compares it with a triangular wave signal voltage generated by a triangular wave generating circuit 4, and generates a binary pulse signal depending on the magnitude thereof.

61(A) to 61(D) schematically show the states of the above signals. In the same figure (A), the triangular wave a1 and the operational amplifier
The output signal b1 of P is compared in the voltage comparator circuit 2, and as shown in FIG.
1 is output. In the same figure (C), the output b2 of the operational amplifier OP1 is shown in the same figure (
This figure shows the situation when the voltage is lowered compared to A), and as a result, the output signal pulse of the voltage comparator circuit 2 becomes as shown in FIG.

The output signal of this voltage comparator circuit 2 is supplied to a chopper circuit 3, which chops the 'rR source voltage Vcc and smoothes it to supply a predetermined voltage to the load 5 as a substantially constant DC voltage. If the voltage supplied to the load 5 fluctuates due to some reason, this voltage fluctuation will be absorbed by the resistor R.
15 to the non-inverting input terminal of the operational amplifier OP1, and the operational amplifier OP amplifies the error between this fluctuating voltage and the reference voltage and supplies it to the voltage comparator circuit 2, thereby generating the output signal of the voltage comparator circuit 2. The pulse width of is adjusted appropriately, and the chopper circuit 3 changes the voltage supplied to the load 5 to a predetermined level according to this pulse width.

Problems to be Solved by the Invention However, the impedance of a load generally varies greatly depending on the usage conditions of various devices serving as the load. Therefore, especially when the impedance of the load 5 becomes higher than a certain value (this is called a light load) and the current flowing through the load 5 decreases, the overall gain of the entire circuit increases as shown in Figure 7! /i' to do. When this total gain rises above the level indicated by 2 in the figure, the entire circuit becomes unstable due to the high gain, and various disturbance phenomena accompanied by malfunctions occur. For example, the pulse signal C in FIGS. 6(B) and (D)
1.C2 occurs every few pulses, and the voltage applied to the load becomes an abnormal value, or the chopped output voltage contains a large ripple component, which affects the operation of the VI device connected as a load. There were problems such as.

The present invention has been created in view of the above points, and provides automatic gain adjustment that can prevent the total gain from becoming so high as to cause disturbance due to an increase in the impedance of the load and a decrease in the current flowing through the load. The purpose is to provide circuits.

Means for Solving the Problems The present invention includes a reference voltage generation circuit that generates a reference voltage, a voltage detection circuit that detects the terminal voltage of a load, a first feedback loop from the output side to the input side, and the output side. and an error amplification circuit that amplifies the error between the reference voltage and the detection voltage of the voltage detection circuit. When the output voltage of the error amplification circuit is below a predetermined level, the second feedback loop is disconnected by the switch circuit, and the error amplification circuit amplifies the error with the gain set by the first feedback loop. 2nd by circuit
feedback loops are connected, and the error amplification circuit is configured to perform error amplification with gains set by the first and second feedback loops.

Operation In the automatic gain adjustment circuit according to the present invention, the voltage detection circuit detects the terminal voltage of the load, and the error amplification circuit performs error amplification using this detected voltage and the reference voltage from the reference voltage generation circuit as input signals.

If the impedance of the load is sufficiently low, the overall gain of the entire circuit will be low, and the output voltage of the error amplification circuit will also be lower than a predetermined level. At this time, the second feedback loop is equivalently separated by the switch circuit, and the error amplifier circuit itself operates at a high gain determined by the first feedback loop.

If the load impedance is high, please refer to the general publication 1 for circuit interruption.
7 It gets expensive. At this time, the second feedback loop is equivalently connected by the switch circuit, and the error amplification circuit itself operates at a low gain determined by the first and second feedback loops.

Therefore, it is possible to prevent the total gain of the circuit from reaching a level so high as to cause disturbances.

Embodiment FIG. 1 shows a circuit diagram of a first embodiment of the present invention. In this figure, the same components as in FIG. 5 are given the same reference numerals. The operational amplifier OP1 functions as an error amplifier in the same way as in FIG. The supplied voltage is divided by resistors R11 and R1□, which serve as a voltage detection circuit, and is supplied to the non-inverting input terminal.

The path from the output terminal of the operational amplifier OP1 to the inverting input terminal of the operational amplifier OP1 via the resistor Rf1 constitutes a first feedback loop.
2, the inverting input terminal -F1. of the operational amplifier OP7 via the resistor Rf3. : The return path constitutes a second feedback loop.

Here, the PNP transistor Q1 and the NPN transistor Q2 constitute a switch circuit, and the PNP transistor Q1
When the voltage applied to the base of is below a predetermined level, P
Both NP transistor Q1 and NPN transistor Q2 are turned off, and when the voltage applied to the base of PNP transistor Q1 is equal to or higher than this predetermined level, both PNP transistor Q1 and NPN transistor Q2 are turned on.

The output voltage of the operational amplifier OP1 and the output voltage signal of the triangular wave generation circuit 4 are supplied to the voltage comparison circuit 2, which performs a comparison operation similar to that shown in FIG. 6, and generates a pulse signal corresponding to the comparison result. - It is supplied to the chopper circuit 6 via the chopper control circuit 8 to prevent the chopper circuit 6 from being turned on for some reason.

The chopper circuit 6 switches the power supply voltage Vcc supplied to the emitter by a pulse signal from the voltage comparator circuit 2 supplied to the base of the PNP transistor Q3 and outputs it from the collector, and this voltage is applied to one capacitor c1 . It is smoothed by c2 and supplied to load 5. Therefore, as explained in FIG.
If the period during which PNP transistor Q3 is turned on by the pulse signal supplied to the base of PNP transistor Q3 is long, the voltage supplied to load 5 becomes high;
When the period in which the switch is on is short, the voltage supplied to the load 5 becomes low.

Generally, the impedance of a device connected as a negative VJ3 varies greatly depending on its operating state. When the impedance of the load 5 is relatively low and the load is heavy, the load current is large as shown in FIG. 7, and in this case, the overall gain of the entire circuit shown in FIG. 1 becomes small. Conversely, when the load 5 is a light load with a relatively high impedance, the load current is small and the overall gain is large, as shown in FIG.

In FIG. 1, the voltage Vo at the connection point ◎ between the resistors R1 and R2 is as follows. Here, Vref is the base F1! This is the IS quasi-voltage generated by the voltage voltage circuit. Also, NPN transistor Q
The voltage Vε at the connection point O between 1 of 2 and resistor R3 is PN
Due to the level shift operation of the Pt-transistor Q1 and the NPN transistor Q2, the voltage becomes approximately equal to the voltage Vo at the point ◎.

Figure 2 (A) shows the relationship between the voltage vc at the 0 point, the positive peak P+, negative peak P- of the triangular wave output from the triangular wave generating circuit 4, and the load current, and the diagram (B) shows the relationship between the voltage VC at the 0 point and the load current.
1 shows the relationship between a gain AV of 1 and load current. In both FIGS. 2A and 2B, the horizontal axis represents the load current, and this load current changes as the impedance of the load 5 changes.

If the direction in which the load current increases (to the right in the figure) is m load, the direction in which the load current decreases (to the left in the figure) corresponds to a light load.

In the same figure (A), in the case of a small load where the load current is larger than T1, the voltage at the 0 point Vc is smaller than Vcs, and the voltage applied to the load is low, so the voltage at the terminal 7 is amplified by the operational amplifier OP1. The voltages at the point and zero point are sufficiently low, and the voltages at the PNP transistor Q1 and the NPN transistor Q
2 is off, and it is considered that the 0 point and the 0 point are substantially separated from each other. Therefore, the gain △v1 of the operational amplifier oP1 is reduced to AV by the resistor R13 = R14, Rf4.
I-ichigo Ukoichi ■It becomes R+3/R. Here, R13/R14 is the resistance R13 and R1
Represents the combined resistance when 4 are connected in parallel (the same applies below)
. As a result, the overall gain of the entire circuit is T in Figure 3.
The state of the area to the right of 2 is shown.

When the load 5 becomes a light load and the overall profit of the entire circuit increases, the output voltage of the operational amplifier oP1, that is, the voltage at the 0 point increases, and accordingly, the voltage Vo at the 0 point also increases.
When the voltage Vo at the point becomes equal to the voltage v8 at the 0 point, the voltage Vcs at the 0 point is Vcs=V − (1+ ”
)Vs ■ref R+, and the load current becomes T1 in Fig. 2 (A),
When Vc = Vc s, PNP transistor Q 1N
PN transistor Q2 is both turned on and resistors Rf3 and D
The points become equivalently connected.

At this time, the return wave of the operational amplifier OP1 increases, and the gain AV2 of the operational amplifier oP1 becomes, which is smaller than that in equation 0. Therefore, the overall gain of the entire circuit is increased to the left side of T2 in FIG. ! 7 (indicated by the dashed line). Therefore, the total gain does not become so high as to reach the disturbance range shown by diagonal lines in the figure, and as a result, it is possible to connect loads with impedances in a wide range, and stable operation is ensured.

FIG. 4 shows a circuit diagram of a second embodiment of the invention.

In this figure, only the main parts of the present invention are shown, and the same components as those in FIG.

In the same figure, an operational amplifier OP2, resistors R5, RG, R7, and R8 are provided in place of the resistors R1 and R2 in FIG.
The output of the operational amplifier OP is connected to the non-inverting input terminal of the operational amplifier OP2 via the resistor R7, and the reference voltage generated by the reference voltage generating circuit is divided by the resistors R5 and R6 and supplied to the inverting input terminal, and the output of the operational amplifier OP is It is fed back to the inverting input terminal via resistor R8.

In this embodiment, the gain of the operational amplifier OP1 during heavy load is the first
As in the case of the embodiment, the gain of the operational amplifier OP1 is determined by the resistors R13 and R14°Rfl, but when the load is light, the gain of the operational amplifier OP1 is determined by the resistors R5 to R8 and the operational amplifier OP2. With this configuration, the gain of the operational amplifier OP1 becomes A V at T1 in FIG. 2(B).
It is possible to make the slope steeper when transitioning from 1 to AV2.

Effects of the Invention As described above, according to the present invention, the present invention can be applied to DC-D
When applied to a C converter, even if the load connected to the output terminal becomes a light load and the load current decreases, the error amplifier circuit's gain ('/) is automatically switched to reduce the load at light loads. The total gain is lowered, and it is possible to prevent the disturbance of the gods that occurs when the total gain remains high181, and various devices connected as loads may malfunction due to this disturbance. It has features such as being able to prevent

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of the first embodiment of the present invention, FIG. 2 is a diagram showing the relationship between the load current and the output voltage and gain of the error amplification circuit, and FIGS. 3 and 7 are the load current and the overall FIG. 4 is a circuit diagram of the second embodiment of the present invention, and FIG. 5 is a diagram showing the relationship with gain.
The figure is a circuit system diagram of a conventional circuit, and FIG. 6 is an explanatory diagram of a pulse signal generated by a comparison operation between the output voltage of the triangular wave generating circuit and the error amplifying circuit. 1... Reference voltage generation circuit, 2... Voltage comparison circuit, 3
゜6... Buzz circuit, 4... Triangular wave generation circuit, 5
...Load, Ql...PNP transistor, Q2...
- NPN transistor, OPl, OF2... operational amplifier, R41, R73, R1, R2, R3, R5-R8° R11-R19... resistor. Patent applicant: Mitsumi Electric Co., Ltd.Also on page gqjL of Figure 2, Figure 5, Figure i6, page gqjL.

Claims (1)

[Claims] A reference voltage generation circuit that generates a reference voltage, a voltage detection circuit that detects a terminal voltage of a load, a first feedback loop that extends from the output side to the input side, and a switch circuit that connects the output side to the input side. an error amplification circuit that amplifies an error between the reference voltage and the detection voltage of the voltage detection circuit, and has a second feedback loop that reaches the input side via the voltage detection circuit, and the output voltage of the error amplification circuit is a predetermined value. When the voltage is below the level, the second feedback loop is disconnected by the switch circuit;
The error amplification circuit performs error amplification with a gain set by the first feedback loop, and when the output voltage of the error amplification circuit is equal to or higher than the predetermined level, the switch circuit amplifies the error with a gain set by the first feedback loop.
and the error amplification circuit connects the first and second feedback loops.
An automatic gain adjustment circuit characterized in that it is configured to perform error amplification with a gain set by a feedback loop.