JPH01143164A - Printed wiring board for surface mount - Google Patents

Printed wiring board for surface mount

Info

Publication number
JPH01143164A
JPH01143164A JP62300999A JP30099987A JPH01143164A JP H01143164 A JPH01143164 A JP H01143164A JP 62300999 A JP62300999 A JP 62300999A JP 30099987 A JP30099987 A JP 30099987A JP H01143164 A JPH01143164 A JP H01143164A
Authority
JP
Japan
Prior art keywords
pad
surface mount
pattern
printed wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62300999A
Other languages
Japanese (ja)
Inventor
Takahiro Yamashita
高広 山下
Hidehiko Murakami
秀彦 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP62300999A priority Critical patent/JPH01143164A/en
Publication of JPH01143164A publication Critical patent/JPH01143164A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Landscapes

  • Structure Of Printed Boards (AREA)
  • Combinations Of Printed Boards (AREA)
  • Multi-Conductor Connections (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To prevent tombstone phenomenon by connecting a pad to be connected with a power source pattern by a connecting pattern which is thinner than the width of this pad. CONSTITUTION:At least one pad, to be connected with a power source pattern, of a pair of pads facing each other is connected by means of a connecting pattern which is thinner than the width of this pad, so that heat quantity to escape from this pad to the connecting pattern at the time of soldering is restricted and that solder reflow time becomes uniform. Tombstone phenomenon in which a surface mounted part is pulled to stand by surface tension of solder can thus be prevented.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、プリント配線板に関し、特に表面実装部品を
塔載するためのパッドを有する表面実装用プリント配線
板に関するものであるヤ(従来の技術) 第2図に示すように、表面実装部品(cl)か搭載され
るプリント配線板には、前記(cl)の端子部をはんだ
付けするためのパッド(pi)(p2)が形成される。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a printed wiring board, and particularly to a printed wiring board for surface mounting having pads for mounting surface mount components (compared to conventional printed wiring boards). Technology) As shown in Figure 2, pads (pi) (p2) for soldering the terminal portions of the (cl) are formed on the printed wiring board on which the surface mount components (cl) are mounted. .

又、パッドとパッドを電気的に接続して、部品間の電気
信号を伝えるために形成されるのが信号パターン(sI
)(sZ)(s3)である。それに対して、部品に電[
′ilt圧を供給するために形成されるのか電源パター
ン(dl)(d2)である。−船釣に電源パターンを流
れる電流は、信号パターンを流れる電流の千倍程度にも
達する。そのため電源パターンの幅はできるだけ太くす
ることで電気的損失を小さくするように設計される。又
、信号パターンは高密度な配線を実現するために細くな
る傾向にある。従って、前記表面実装部品用のバ・アト
には。
Additionally, signal patterns (sI) are formed to electrically connect pads and transmit electrical signals between components.
)(sZ)(s3). On the other hand, parts are
The power supply patterns (dl) (d2) are formed to supply the 'ilt pressure. -The current that flows through the power supply pattern during boat fishing reaches about 1,000 times the current that flows through the signal pattern. Therefore, the width of the power supply pattern is designed to be as wide as possible to reduce electrical loss. Furthermore, signal patterns tend to become thinner in order to realize high-density wiring. Therefore, in the bar for the surface mount components.

第2図に示したように各種の太さのパターンか接続され
ることになる。
As shown in FIG. 2, patterns of various thicknesses are connected.

(本発明か解決しようとする問題点) ttS3図の(c)に二端子の表面実装部品の実装図を
示す。表面実装部品(cl)の端子(tl)(L2)は
、はんだ(hl)(hl)によってパッド(pl)(p
l)と接合され−Cいる。−船釣に表面実装部品(cl
)のはんだ付けは、ペースト状のはんだをパッド(pl
)(pl)上に塗布し、その上に表面実装部品(cl)
をのせ、赤外線ビーム等でパッドとはんだを加熱するこ
とによって、はんだをリフローさせ、表面実装部品の端
子(tl)(t2)とパッド(pl)(pl)を接合す
る方法を取っている。しかしながらこの方法では、第3
図(b)に示したように、パッド(pl)の接続パター
ンが電源パターンでありパッド(pl)の接続パターン
か信号パターンである場合には、パッドからta続パタ
ーンへ逃げる8暦がパッド(pl)よりパッド(pl)
の方か大きくなる。従ってパッドの温度り昇時間に差か
生じて、はんだ(hl)よりはんだ(hl)の方が先に
リフローすることになる。その結果第3図(、l)に示
した様に、はんだ(hl)の表面張力で表面実装部品か
引っ張られて立ってしまうツームストーン現象か起こり
問題となっていた。
(Problems to be Solved by the Invention) Figure ttS3 (c) shows a mounting diagram of a two-terminal surface mount component. The terminal (tl) (L2) of the surface mount component (cl) is connected to the pad (pl) (p
l) and -C. -Surface mount parts (cl) for boat fishing
), apply paste solder to the pad (pl
) (pl) and surface mount components (cl) on top of it.
A method is used in which the terminals (tl) (t2) of the surface mount component and the pads (pl) (pl) are bonded by reflowing the solder by heating the pad and solder with an infrared beam or the like. However, in this method, the third
As shown in figure (b), when the connection pattern of the pad (pl) is a power supply pattern and the connection pattern of the pad (pl) is a signal pattern, the 8 calendars that escape from the pad to the ta continuation pattern are the pad ( pad(pl) from pl)
It gets bigger. Therefore, there is a difference in the temperature rise time of the pad, and the solder (hl) reflows earlier than the solder (hl). As a result, as shown in FIG. 3 (1), a tombstone phenomenon occurred in which the surface mount components were pulled and stood up due to the surface tension of the solder (hl), which caused a problem.

(問題点を解決するための手段及び作用)以上の問題点
を解決するために本発明か採った手段は、互いに対向す
る一対のパッドの少なくとも−・方のパッドが電源用パ
ターンに接続されており、前記一対のパッドに表面実装
部品の二つの端子をはんだによって接続する表面実装用
プリント配線板において、前記TrL源用パターンに接
続されるべきパッドを、このパッドの幅よりも細い接続
パターンによって接続することによって、はんだ付は時
にパッドから接続パターンへ逃げる熱量を抑え、はんだ
リフローの時間を均一にして、ツームストーン現象を抑
えようというものである。
(Means and effects for solving the problems) The means taken by the present invention to solve the above problems is that at least one pad of a pair of pads facing each other is connected to a power supply pattern. In a surface mount printed wiring board in which two terminals of a surface mount component are connected to the pair of pads by solder, the pad to be connected to the TrL source pattern is connected by a connection pattern narrower than the width of the pad. By connecting, soldering is sometimes done to reduce the amount of heat escaping from the pad to the connection pattern, equalize the solder reflow time, and reduce tombstoning.

なお、前記表面実装部品用の一対のパッドは一般的に同
し面積を有しているか、[−述の接続パターンの種類に
関係なく1例えば一方のパッドかもう一方のバー)1−
の二倍以北もの面積を有しているような場合には、パッ
ド自体の温度1昇時間に差異か生じるため1本発明によ
ってもツームストーン現象か生じることかある。
It should be noted that the pair of pads for the surface mount component generally have the same area, or [- regardless of the type of connection pattern mentioned above, e.g. one pad or the other bar]1-
If the pad has an area more than twice as large as the pad itself, the tombstone phenomenon may occur even with the present invention because there will be a difference in the time it takes for the temperature of the pad itself to rise.

(χ雄側) 第4図(a)〜(c)に本発明の実施例を示す。いずれ
も、表面実装部品用パッドと電源パターンとの接続例で
あり、表面実装部品用パッドの幅よりも細い接続パター
ンにより接続されている。(a)はパッド(pl)の片
側で電源パターン(dl)と接続する場合を、(d)は
パッド(pl)か電源パターン(dl)によって囲まれ
る場合を、ヌ(C)はパッドの形状か大きくなって複数
の接続パターンを有する場合の実施例である。
(χ Male side) Examples of the present invention are shown in FIGS. 4(a) to 4(c). All of these are examples of connections between pads for surface mount components and power supply patterns, and are connected by connection patterns that are narrower than the width of the pads for surface mount components. (a) shows the case where the pad (pl) is connected to the power supply pattern (dl) on one side, (d) shows the case where it is surrounded by the pad (pl) or the power supply pattern (dl), and (C) shows the shape of the pad. This is an example in which the number of connection patterns becomes larger and has a plurality of connection patterns.

(発IJIの効果) 本発明の表面実装用プリント配線数は1表面実装部品の
実装時におきる表面実装部品用パッドから接続パターン
への熱の流れを抑え、はんだリフローの時間を均一にす
ることにより、ツームストーン現象を抑えることがてき
るものである。
(Effects of IJI generation) The number of printed wiring lines for surface mount of the present invention is reduced by suppressing the flow of heat from the pad for surface mount components to the connection pattern that occurs when mounting surface mount components, and by making the solder reflow time uniform. , which can suppress the tombstone phenomenon.

【図面の簡単な説明】[Brief explanation of the drawing]

第1 Theは本発明の代表的な実施例を示す部分平面
図2第2図は従来の表面実装用プリント配線板のパター
ン例を示す部分モ面図、第3図の(a)(b)、(c)
及び(d)のそれぞれは従来の表面実装部品の実装時に
おけるツームストーン現象を説明する部分平面]A及び
部分wtFli而図であ面。 また、第4図の(a)、(b)及び(C)のそれぞれは
本発明の他の実施例を示す部分平面図である。 符  号  の  説  明 cl〜c3・・・表面実装部品、p1〜p1・−・表面
実装部品用パッド、S1〜S3・・・信号パターン、 
dl〜d 2−・・電源パターン、hl〜h2・−71
を源接続用スルーホール。
1. The is a partial plan view showing a typical embodiment of the present invention. 2. FIG. 2 is a partial plan view showing an example of a pattern of a conventional printed wiring board for surface mounting. ,(c)
and (d) are partial planes A and WtFli diagrams respectively explaining the tombstone phenomenon during mounting of conventional surface mount components. 4A, 4B, and 4C are partial plan views showing other embodiments of the present invention. Explanation of symbols cl to c3...Surface mount components, p1 to p1...Pads for surface mount components, S1 to S3...Signal patterns,
dl~d2-...Power supply pattern, hl~h2・-71
Through-hole for source connection.

Claims (1)

【特許請求の範囲】[Claims]  互いに対向する一対のパッドの少なくとも一方のパッ
ドが電源用パターンに接続されており、前記一対のパッ
ドに表面実装部品の二つの端子をはんだによって接続す
る表面実装用プリント配線板において、前記電源用パタ
ーンに接続されるべきパッドを、このパッドの幅よりも
細い接続パターンによって接続したことを特徴とする表
面実装用プリント配線板。
In a surface mounting printed wiring board in which at least one pad of a pair of pads facing each other is connected to a power supply pattern, and two terminals of a surface mount component are connected to the pair of pads by solder, the power supply pattern A printed wiring board for surface mounting, characterized in that a pad to be connected to the pad is connected by a connection pattern narrower than the width of the pad.
JP62300999A 1987-11-27 1987-11-27 Printed wiring board for surface mount Pending JPH01143164A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62300999A JPH01143164A (en) 1987-11-27 1987-11-27 Printed wiring board for surface mount

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62300999A JPH01143164A (en) 1987-11-27 1987-11-27 Printed wiring board for surface mount

Publications (1)

Publication Number Publication Date
JPH01143164A true JPH01143164A (en) 1989-06-05

Family

ID=17891609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62300999A Pending JPH01143164A (en) 1987-11-27 1987-11-27 Printed wiring board for surface mount

Country Status (1)

Country Link
JP (1) JPH01143164A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05243714A (en) * 1992-03-02 1993-09-21 Casio Comput Co Ltd Film wiring board and its manufacture
WO1998033365A1 (en) * 1997-01-28 1998-07-30 Telefonaktiebolaget Lm Ericsson (Publ) A circuit board assembly having surface-mount radio frequency components
WO1999059387A1 (en) * 1998-05-08 1999-11-18 Nokia Networks Oy A heating method for a printed circuit board and a printed circuit board comprising a heating element
JP2013074156A (en) * 2011-09-28 2013-04-22 Denso Corp Electronic device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5858379B2 (en) * 1975-07-14 1983-12-24 旭化成株式会社 Flame retardant polyester composition
JPS6146766B2 (en) * 1981-12-28 1986-10-16 Komatsu Mfg Co Ltd

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5858379B2 (en) * 1975-07-14 1983-12-24 旭化成株式会社 Flame retardant polyester composition
JPS6146766B2 (en) * 1981-12-28 1986-10-16 Komatsu Mfg Co Ltd

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05243714A (en) * 1992-03-02 1993-09-21 Casio Comput Co Ltd Film wiring board and its manufacture
WO1998033365A1 (en) * 1997-01-28 1998-07-30 Telefonaktiebolaget Lm Ericsson (Publ) A circuit board assembly having surface-mount radio frequency components
WO1999059387A1 (en) * 1998-05-08 1999-11-18 Nokia Networks Oy A heating method for a printed circuit board and a printed circuit board comprising a heating element
JP2013074156A (en) * 2011-09-28 2013-04-22 Denso Corp Electronic device

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