JPH01135231A - Multi-channel a/d converter - Google Patents

Abstract

PURPOSE:To turn on a channel selecting switch at the time or inspecting a multiplexer characteristic and to reduce the whole number of terminals by using instead an analog input terminal as a terminal for inspection without providing a terminal for the inspection of a multi-channel A/D converter as an exclusive external terminal. CONSTITUTION:A multiplexer MPX of a multi-channel A/D converter and an A/D converting part ADC are formed at one integrated circuit IC and analog input terminals CH0, CH1, CH3... are made into an external terminal. An OR gate OR to turn ON a channel selecting switch BW0 when a inspection mode A3 is 1 is added to the A/D converter, addresses A0-A2 for switching a channel and an address A3 for inspection are inputted from the terminals CH0, CH1, CH3... in parallel and the inputted address is decoded. When the inspection mode is 1, the output of the gate OR is made into 1 regardless of a control signal CTL0, the analog input terminal CH0 is used as the terminal for inspection and the external terminal of the IC is reduced.

Description

[Detailed Description of the Invention] [Summary] Multiplexer characteristics of a multi-channel A/D converter can be measured using only an analog input terminal, thereby eliminating the need for a dedicated testing terminal.

[Industrial application field]

The present invention relates to a multi-channel A/D converter equipped with a multiplexer capable of selecting analog inputs.

[Conventional technology]

There is only one A/D converter, and the multi-channel A is configured to selectively connect analog signals input there.
/D converters are often used for control using microcomputers and the like.

Generally, input channels to a multi-channel A/D converter are switched by inputting a coded channel switching signal from a microcomputer to a multiplexer and turning on one of the corresponding channel selection switches.

In addition, in such a multi-channel A/D converter, once the A/'D conversion accuracy of one channel is measured, the conversion accuracy of the remaining channels can be determined by measuring only the characteristics of the multiplexer (for example, on-resistance). You can guess whether it is good or bad.

Therefore, in the past, as shown in Fig. 3, a test terminal was taken out from the multiplexer Mpx, and an arbitrary channel selection switch 5W was used.
CI, SWl, ...... are turned on, test current i is passed from the corresponding analog input terminals CHO, CH1, ... to the test terminal, and the voltage drop that occurs between the terminals is By measuring, the channel selection switch SW
The on-resistance of o, SW+, . . . is measured.

- As an example, use a measuring current i of 5 μA when the permissible on-resistance is at most 20 Ω.

The A/D converter ADC has a comparator CMP at its input stage, and its reference voltage REF is sequentially switched by an internal D/A converter (not shown). This A/D converter ADC and multiplexer MPX are formed into one integrated circuit IC, and have analog input terminals CHO and CHI.

. . . and inspection terminals are external terminals.

[Problem that the invention seeks to solve]

The above-mentioned test terminals are used exclusively for testing and are not used at all during normal operation. Therefore, for this purpose, the external terminal of the IC is
Occupying one terminal is contrary to the effective use of external terminals, and also increases the cost of packages, etc.

The present invention eliminates the need for a dedicated test terminal by substituting one of the analog input terminals for the test terminal.

[Means for solving problems]

FIG. 1 is a diagram showing the basic structure of the present invention, and the symbols of each part are the same as in FIG. 3. In the present invention, the test terminal of the multiplexer MPX is not provided as a dedicated external terminal. Instead, the channel selection switch SWo is turned on when testing the multiplexer characteristics so that one of the analog input terminals, for example CHO, can also be used as a test terminal.

[Effect]

In FIG. 1, when the channel selection switch SW2 is turned on, a path CH2=S W 2 →S W o −+CHO is formed, and the test current i flows. Since this current i flows through the two switches SWO and SW2, the on-resistances of both switches are added, but if half of this is regarded as the on-resistance of one switch, there is no problem in determining the quality. If switch SW+ is turned on instead of switch SW2, CH1→
Current i flows along the path S W + −S W o →CHO, and similar measurements can be performed.

Switch S W o , S W + , ...
The on/off control of . can be performed using the control signal CTL.

〔Example〕

FIG. 2 is a circuit diagram showing one embodiment of the present invention, showing a part of the multiplexer MPX. This example shows an 8-channel multiplexer, with a 3-bit address A
By decoding o=A2, only one of the eight control signals CTLa=CTLt can be set to 1. Channel selection switch SWo, SW+,・
... is the corresponding control signal CTL o, C
It turns on when TL +, . . . becomes 1.

In this example, for such a boat fishing configuration, the switch SWo
An OR gate is added to turn on during testing, and this is controlled by the 4th bit address A3.

In this embodiment, the address A a = A 2 for channel switching and the address A 3 for testing are obtained by decoding channel switching signals input in parallel from several control terminals.

Here, if the number of channels being used has enough margin for the bit length of the switching signal, adding address A3 will not increase the number of control terminals, so deleting the test terminal will reduce the overall terminal The number can be reduced and downsizing can be achieved.

Also, there are many channels in use, and address A3
If the bit length of the channel switching signal increases by adding , it is necessary to increase the number of control terminals.
As the number of control terminals increases, the number of channel switching signals increases, the number of channels can be increased, and these terminals can be used effectively.

When the address A3 is 1 (inspection mode), the OR gate OR is the control signal CTL.

(The output is set to 1. Therefore, the switch SWa is always on during testing, allowing the analog input terminal CHO to be used as a testing terminal.

As another example, if the channel switching signal is serially input from the control terminal, the number of channel switching signals can be increased without increasing the number of control terminals, so the total number of terminals can be reduced. This allows for further downsizing.

〔Effect of the invention〕

As described above, according to the present invention, multi-channel A/D
Since the multiplexer characteristics of the converter can be measured using only the analog input terminals, there is no need to provide dedicated test terminals, and the IC package can be made smaller.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a circuit diagram of a main part showing an embodiment of the present invention, and FIG. 3 is a block diagram of a conventional multi-channel A/D converter. Applicant Fujitsu Ten Ltd. Representative Patent Attorney Minoru Aoyagi

Claims (1)

[Claims] A multi-channel A/D converter equipped with a multiplexer that selects one from multiple analog inputs and uses it as the A/D conversion input.
In the D converter, in the test mode, a multiplexer configuration is used that can turn on a specific channel selection switch and any channel selection switch at the same time, so that a test current can flow between the two analog input terminals connected by both switches. A multi-channel A/D converter characterized by: