JPH01135105A - Patch antenna - Google Patents

Patch antenna

Info

Publication number
JPH01135105A
JPH01135105A JP29184987A JP29184987A JPH01135105A JP H01135105 A JPH01135105 A JP H01135105A JP 29184987 A JP29184987 A JP 29184987A JP 29184987 A JP29184987 A JP 29184987A JP H01135105 A JPH01135105 A JP H01135105A
Authority
JP
Japan
Prior art keywords
dielectric
patch
base
dielectric substrate
space
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29184987A
Other languages
Japanese (ja)
Inventor
Kenji Omiya
健司 大宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP29184987A priority Critical patent/JPH01135105A/en
Publication of JPH01135105A publication Critical patent/JPH01135105A/en
Pending legal-status Critical Current

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  • Waveguide Aerials (AREA)

Abstract

PURPOSE:To attain light weight by forming a space between a dielectric base with a patch formed thereupon and a support base and fixing the dielectric base to the support base. CONSTITUTION:The dielectric base 4 formed with a strip line 2 between the patch 1 and a feeder 3 and the patch 1 made of a conductor are supported to the support base 5 forming a space with the support base being 1 ground conductor. The space is formed between the dielectric base 4 and the support base 5 so as to make the equivalent dielectric constant nearly equal to the dielectric constant of a conventional expensive dielectric base even when the dielectric base 4 is made of an inexpensive material whose dielectric constant is comparatively high and to make the dielectric base 4 thin. Thus, the economical configuration with a light weight is obtained.

Description

【発明の詳細な説明】 〔概要〕 マイクロ波帯用のマイクロストリップ型のパッチアンテ
ナに関し、 軽量化並びに経済化を図ることを目的とし、マイクロス
トリップ型のパッチアンテナに於いて、導体からなるパ
ッチと、該パッチと給電部との間のストリップラインと
を形成した誘電体基板を、接地導体となる支持基板との
間に空間が形成されるようにしてこの支持基板に支持し
て構成した。
[Detailed Description of the Invention] [Summary] Regarding microstrip type patch antennas for microwave bands, with the aim of reducing weight and making them more economical, we have developed a microstrip type patch antenna that uses a conductor patch and A dielectric substrate, on which a strip line between the patch and the power feeding section is formed, is supported by the support substrate, which serves as a ground conductor, such that a space is formed between the dielectric substrate and the support substrate.

〔産業上の利用分野〕[Industrial application field]

本発明は、マイクロ波帯用のマイクロストリップ型のパ
ッチアンテナに関するものである。
The present invention relates to a microstrip type patch antenna for microwave bands.

単一或いは複数のパッチを誘電体基板上に形成したパッ
チアンテナは、アレイアンテナやマイクロ波帯の移動体
通信用等のアンテナとして使用されている。
Patch antennas, in which a single patch or a plurality of patches are formed on a dielectric substrate, are used as array antennas or antennas for mobile communication in the microwave band.

〔従来の技術〕[Conventional technology]

従来のパッチアンテナは、例えば、第5図の断面図に示
すように、誘電体基板22上に一辺がほぼλ/2の正方
形の導体パターンからなるパッチ21を形成し、接地導
体となる支持基板23の凹部に固定したものである。こ
のパッチ21は、所望のアンテナ利得に対応して1個又
は複数個形成されている。
In the conventional patch antenna, for example, as shown in the cross-sectional view of FIG. 5, a patch 21 consisting of a square conductor pattern of approximately λ/2 on a side is formed on a dielectric substrate 22, and a support substrate that serves as a ground conductor is formed on a dielectric substrate 22. It is fixed in the recessed part of 23. One or more patches 21 are formed depending on the desired antenna gain.

誘電体基板22は、誘電率及び誘電正接が小さい材料に
より構成されるもので、例えば、ガラスクロスと四弗化
エチレン樹脂とを主基材としたものが使用されている。
The dielectric substrate 22 is made of a material having a small dielectric constant and a small dielectric loss tangent, and for example, a material whose main base materials are glass cloth and tetrafluoroethylene resin is used.

このような誘電体基板22の誘電率はほぼ2.6であり
、又誘電正接(tan δ)はほぼ2X10−3である
。又厚さは2.5〜3.5mm程度である。
The dielectric constant of such a dielectric substrate 22 is approximately 2.6, and the dielectric loss tangent (tan δ) is approximately 2×10 −3 . Further, the thickness is about 2.5 to 3.5 mm.

又誘電体基板22上のパッチ21は、プリント基板の技
術によって形成することができるものであり、厚さ数1
0μmの銅等の導体膜をエツチングして所望のパターン
とすることができる。このパッチ21の一辺のほぼ中央
部分に、例えば、同軸モードで給電される。又パッチ2
1の形状は円形とすることも可能である。
Further, the patch 21 on the dielectric substrate 22 can be formed by printed circuit board technology, and has a thickness of several 1
A 0 μm conductive film such as copper can be etched into a desired pattern. Power is supplied to approximately the center of one side of this patch 21, for example, in coaxial mode. Also patch 2
The shape of 1 can also be circular.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来のパッチアンテナに於いては、放射効率を高くする
為に、比較的厚く、低損失で且つ低誘電率の誘電体基板
22を使用するものであった。従って、軽量化が容易で
ない欠点があり、又低損失且つ低誘電率の誘電体基板は
、通常のプリント基板に比較して非常に高価であり、従
って、パッチアンテナが高価となる欠点があった。
In conventional patch antennas, in order to increase radiation efficiency, a relatively thick dielectric substrate 22 with low loss and low dielectric constant is used. Therefore, it has the disadvantage that it is not easy to reduce the weight, and the dielectric substrate with low loss and low dielectric constant is very expensive compared to a normal printed circuit board, so there is a disadvantage that the patch antenna is expensive. .

本発明は、軽量化並びに経済化を図ることを目的とする
ものである。
The present invention aims to achieve weight reduction and economicalization.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のパッチアンテナは、比較的誘電率が大きい誘電
体基板を使用可能としたものであり、第1図を参照して
説明する。
The patch antenna of the present invention allows the use of a dielectric substrate having a relatively large dielectric constant, and will be described with reference to FIG.

導体からなるパッチ1と、このパッチ1と給電部3との
間のストリップライン2とを形成した誘電体基板4を、
接地導体となる支持基板5との間に空間が形成されるよ
うにして該支持基板5に支持したものである。
A dielectric substrate 4 on which a patch 1 made of a conductor and a strip line 2 between the patch 1 and the power supply section 3 are formed,
It is supported on the support substrate 5 so that a space is formed between the support substrate 5 and the ground conductor.

〔作用〕[Effect]

誘電体基板4と支持基板5との間に空間を形成したこと
により、誘電率が比較的高く、廉価な材料から誘電体基
板4を構成しても、等測的な誘電率を従来の高価な誘電
体基板の誘電率とほぼ同しくすることができ、且つ誘電
体基板4を薄くすることができる。従って、軽量且つ経
済的な構成となる。
By forming a space between the dielectric substrate 4 and the support substrate 5, even if the dielectric substrate 4 is made of an inexpensive material with a relatively high dielectric constant, it is possible to maintain an isometric dielectric constant compared to a conventional expensive material. The dielectric constant can be made almost the same as that of a typical dielectric substrate, and the dielectric substrate 4 can be made thinner. Therefore, the structure is lightweight and economical.

〔実施例〕〔Example〕

以下図面を参照して本発明の実施例について詳細に説明
する。
Embodiments of the present invention will be described in detail below with reference to the drawings.

第1図は本発明の一実施例の平面図、第2図はその断面
図である。この実施例は1個のパッチ1を設けた場合を
示し、1辺がほぼλ/2の正方形のパッチ1と、そのパ
ッチ1の1辺のほぼ中央部に接続したストリップライン
2とを誘電体基板4上に形成し、その誘電体基板4を支
持基板5の支持部8に載置して固定し、第1図に於ける
給電部3を通りストリップライン2に沿って断面とした
第2図に示すように、誘電体基板4と支持基板5との間
に空間6を形成している。
FIG. 1 is a plan view of an embodiment of the present invention, and FIG. 2 is a sectional view thereof. This example shows a case where one patch 1 is provided, and a square patch 1 with one side of approximately λ/2 and a strip line 2 connected to the approximately center of one side of the patch 1 are connected to a dielectric material. A second dielectric substrate 4 is formed on the substrate 4, and the dielectric substrate 4 is placed and fixed on the support portion 8 of the support substrate 5, and the cross section is taken along the strip line 2 passing through the power supply portion 3 in FIG. As shown in the figure, a space 6 is formed between the dielectric substrate 4 and the support substrate 5.

ストリップライン2の一部の給電部3に、同軸の中心導
体7が接続されており、この給電部3は支持基板5の一
部により支持されているから、裏面に接地導体が存在す
ることになるが、ストリップライン2の他の部分は、そ
の裏面が空間6であるから、インピーダンスが高くなっ
ており、給電部3からパッチ1に対する整合回路を構成
することができる。
A coaxial center conductor 7 is connected to a part of the power supply part 3 of the strip line 2, and this power supply part 3 is supported by a part of the support board 5, so there is a ground conductor on the back side. However, since the back surface of the strip line 2 is the space 6, the impedance of the other portion of the strip line 2 is high, and a matching circuit from the power supply section 3 to the patch 1 can be formed.

誘電体基板4として、誘電率が4.5で、誘電正接が2
X10−”のガラスエポキシ樹脂を用いた場合、厚さを
0.8〜1mmとし、又空間6を1〜3mmとして、誘
電体基板4と空間6とを含む等価誘電率が、従来例に於
ける誘電体基板22の誘電率と同等とするものである。
The dielectric substrate 4 has a dielectric constant of 4.5 and a dielectric loss tangent of 2.
When using a glass epoxy resin with a diameter of X10-", the thickness is set to 0.8 to 1 mm, and the space 6 is set to 1 to 3 mm, and the equivalent dielectric constant including the dielectric substrate 4 and the space 6 is The dielectric constant of the dielectric substrate 22 is the same as that of the dielectric substrate 22.

従って、薄い誘電体基板4により構成することができる
から、軽量化を図ることができる。
Therefore, since it can be constructed using a thin dielectric substrate 4, it is possible to reduce the weight.

又誘電体基板4としては、BTレジン(ビスマレイミド
とトリアジンとを基本成分とした高耐熱性熱硬化性樹脂
で、誘電率は約3.6、誘電正接は約4.5 X 10
−3)等を用いることも可能である。
The dielectric substrate 4 is made of BT resin (a highly heat-resistant thermosetting resin whose basic components are bismaleimide and triazine, with a dielectric constant of about 3.6 and a dielectric loss tangent of about 4.5 x 10
-3) etc. can also be used.

その場合も、誘電体基板4の厚さを1mm程度とするこ
とにより、軽量化を図ることができる。
In that case as well, weight reduction can be achieved by setting the thickness of the dielectric substrate 4 to about 1 mm.

第3図は本発明の他の実施例の平面図、第4図はその断
面図であり、4個のパッチを設けた場合を示す。誘電体
基板14上に4個のパッチlla〜lidと、給電部1
3a、13bに接続されたストリップライン12a〜1
2dと、パッチ11a〜lid間を接続するストリップ
ライン18a〜18dとが形成されている。
FIG. 3 is a plan view of another embodiment of the present invention, and FIG. 4 is a sectional view thereof, showing a case in which four patches are provided. Four patches lla to lid are placed on the dielectric substrate 14 and the power supply section 1
Strip lines 12a to 1 connected to 3a and 13b
2d, and strip lines 18a to 18d connecting the patches 11a to lid.

各パッチlla〜lidは、1辺がほぼλ/2の正方形
であり、ストリップライン18a〜18dの長さはλ/
2であって、各ストリップライン12a〜l 2d、1
8a〜I 8dは、パソチェ1a〜lidの各辺のほぼ
中央部に接続されるものである。なお、インピーダンス
整合の関係でパッチlla〜lidの中央部に近い位置
に給電するように構成することもできる。
Each patch lla to lid is a square with one side approximately λ/2, and the length of the strip lines 18a to 18d is λ/2.
2, each strip line 12a-l 2d, 1
8a to I8d are connected to approximately the center of each side of the pasoche 1a to lid. Note that it is also possible to configure the power supply to be supplied to a position close to the center of the patches lla to lid due to impedance matching.

この誘電体基板14は、接地導体となる支持基板15の
支持部19上に載置されて固定され、第3図の給電部1
3aとストリップライン18a。
This dielectric substrate 14 is placed and fixed on a support portion 19 of a support substrate 15 that serves as a ground conductor, and is fixed to the power supply portion 1 of FIG.
3a and strip line 18a.

18d等を通る断面を示す第4図のように、誘電体基板
14と支持基板15との間に空間16が形成される。こ
の空間16は、パッチIla〜11dと、ストリップラ
イン12a〜12dの給電部13a、13bを除く部分
と、ストリップライン18a〜18dとの裏面に形成さ
れ、給電部13a、13bとパッチlla、llc、l
idとの間のストリップライン12a〜12dのインピ
ーダンスが大きくなるから、その部分を給電部13a、
13bとパッチとの間の整合回路とするものである。
A space 16 is formed between the dielectric substrate 14 and the support substrate 15, as shown in FIG. 4, which shows a cross section through 18d and the like. This space 16 is formed on the back surface of the patches Ila to 11d, the parts of the strip lines 12a to 12d excluding the power feeding parts 13a and 13b, and the strip lines 18a to 18d, and l
Since the impedance of the strip lines 12a to 12d between the id and the id becomes large, that portion is connected to the power feeding section 13a,
13b and the patch.

又給電部13a、13bには、それぞれ同軸の中心導体
17が接続され、同軸モードで給電されることになる。
Further, a coaxial center conductor 17 is connected to each of the power supply sections 13a and 13b, and power is supplied in a coaxial mode.

この場合、給電部13a、13bの何れか一方を垂直偏
波用、他方を水平偏波用として、何れか一方の偏波を送
信、他方の偏波を受信に使用することにより、数GHz
帯に於ける送受信用パッチアンテナを構成することがで
きる。
In this case, one of the feeders 13a and 13b is used for vertically polarized waves and the other is used for horizontally polarized waves, and by using either one of the polarized waves for transmission and the other polarized wave for reception, several GHz
It is possible to configure a patch antenna for transmitting and receiving in the band.

例えば、給電点13aから垂直偏波で給電すると、スト
リップライン12a、12bからなる整合回路を介して
パッチIla、llcに給電され、それぞれλ/2の長
さのストリップライン18b、18cを介してパッチl
lb、lldに給電されて、パッチIla〜lidから
垂直偏波が放射される。同様に、給電点13bから水平
偏波で給電すると、ストリップライン12c、12dか
らなる整合回路を介してパッチllc、lidに給電さ
れ、それぞれλ/2の長さのストリップライン18a、
18dを介してパッチIla、11bに給電されて、パ
ッチlla〜lldがら水平偏波が放射される。このパ
ッチIla〜lidの数は、所望のアンテナ利得に対応
して更に増加することも勿論可能である。
For example, when vertically polarized power is fed from the feeding point 13a, the power is fed to the patches Ila and llc via a matching circuit made up of strip lines 12a and 12b, and then via the strip lines 18b and 18c, each having a length of λ/2, to the patches Ila and llc. l
lb and lld, and vertically polarized waves are radiated from patches Ila to lid. Similarly, when horizontally polarized power is supplied from the feed point 13b, the power is supplied to the patches llc and lid through a matching circuit consisting of strip lines 12c and 12d, and the strip lines 18a and 18a each having a length of λ/2,
Power is supplied to patches Ila and 11b via 18d, and horizontally polarized waves are radiated from patches Ila to Ild. Of course, the number of patches Ila to lid can be further increased depending on the desired antenna gain.

この実施例に於いても、誘電体基板14を、比較的誘電
率の大きく且つ廉価なエポキシ樹脂やBTレジンを用い
て構成し、且つその厚さを薄くすることにより、空間1
6を含む等価誘電率を所定の値となるようすることがで
きるから、軽量化を図ることができる。
In this embodiment as well, the dielectric substrate 14 is made of epoxy resin or BT resin, which has a relatively large dielectric constant and is inexpensive, and is made thinner, so that the space 1
Since the equivalent dielectric constant including 6 can be set to a predetermined value, weight reduction can be achieved.

〔発明の効果〕〔Effect of the invention〕

以上説明しように、本発明は、パッチ1を形成した誘電
体基板4と支持基板5との間に空間6を形成して、誘電
体基板4を支持基板5に固定したものであり、誘電体基
板4を比較的誘電率が大きく廉価な材料から構成するこ
とができると共に、厚さを従来例に比較して薄くするこ
とができるから、軽量化を図ることができると共に、廉
価な誘電体基板4を用いることにより、経済化を図るこ
とができる利点がある。
As explained above, in the present invention, a space 6 is formed between the dielectric substrate 4 on which the patch 1 is formed and the support substrate 5, and the dielectric substrate 4 is fixed to the support substrate 5. Since the substrate 4 can be made of an inexpensive material with a relatively large dielectric constant and can be made thinner than conventional examples, it is possible to reduce the weight and to create an inexpensive dielectric substrate. 4 has the advantage of being economical.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の平面図、第2図は本発明の
一実施例の断面図、第3図は本発明の他の実施例の平面
図、第4図は本発明の他の実施例の断面図、第5図は従
来例の断面図である。 1はパッチ、2はストリップライン、3は給電部、4は
誘電体基板、5は支持基板、6は空間、11a〜11d
はパッチ、12a 〜12d、18a〜18dはストリ
ップライン、13a、13bは給電部、14は誘電体基
板、15は支持基板、16は空間である。
FIG. 1 is a plan view of one embodiment of the present invention, FIG. 2 is a sectional view of one embodiment of the present invention, FIG. 3 is a plan view of another embodiment of the present invention, and FIG. 4 is a plan view of another embodiment of the present invention. A sectional view of another embodiment, and FIG. 5 is a sectional view of a conventional example. 1 is a patch, 2 is a strip line, 3 is a power supply section, 4 is a dielectric substrate, 5 is a support substrate, 6 is a space, 11a to 11d
12a to 12d, 18a to 18d are strip lines, 13a and 13b are power feeding sections, 14 is a dielectric substrate, 15 is a support substrate, and 16 is a space.

Claims (1)

【特許請求の範囲】  マイクロストリップ型のパッチアンテナに於いて、 導体からなるパッチ(1)と、該パッチ(1)と給電部
(3)との間のストリップライン(2)とを形成した誘
電体基板(4)を、接地導体となる支持基板(5)との
間に空間が形成されるようにして該支持基板(4)に支
持したことを特徴とするパッチアンテナ。
[Claims] In a microstrip type patch antenna, a dielectric patch (1) formed of a conductor and a strip line (2) between the patch (1) and a power feeding section (3) are provided. 1. A patch antenna characterized in that a body substrate (4) is supported on a support substrate (5) serving as a ground conductor such that a space is formed between the support substrate (5) and the support substrate (5).
JP29184987A 1987-11-20 1987-11-20 Patch antenna Pending JPH01135105A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29184987A JPH01135105A (en) 1987-11-20 1987-11-20 Patch antenna

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29184987A JPH01135105A (en) 1987-11-20 1987-11-20 Patch antenna

Publications (1)

Publication Number Publication Date
JPH01135105A true JPH01135105A (en) 1989-05-26

Family

ID=17774214

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29184987A Pending JPH01135105A (en) 1987-11-20 1987-11-20 Patch antenna

Country Status (1)

Country Link
JP (1) JPH01135105A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006229871A (en) * 2005-02-21 2006-08-31 Mitsubishi Electric Corp Antenna device
JP2010016789A (en) * 2008-07-07 2010-01-21 Internatl Business Mach Corp <Ibm> Radio-frequency integrated circuit chip package having n-integrated aperture coupled patch antenna, and method of manufacturing the same
EP2274733A1 (en) * 2008-04-14 2011-01-19 International Business Machines Corporation Radio frequency (rf) integrated circuit (ic) packages with integrated aperture-coupled patch antenna(s) in ring and/or offset cavities
JP2011519242A (en) * 2008-04-30 2011-06-30 トップコン ジーピーエス,エルエルシー Wideband micropatch antenna system with reduced sensitivity to multipath reception

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62203404A (en) * 1986-03-04 1987-09-08 Nippon Hoso Kyokai <Nhk> Microstrip antenna

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62203404A (en) * 1986-03-04 1987-09-08 Nippon Hoso Kyokai <Nhk> Microstrip antenna

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006229871A (en) * 2005-02-21 2006-08-31 Mitsubishi Electric Corp Antenna device
JP4541922B2 (en) * 2005-02-21 2010-09-08 三菱電機株式会社 Antenna device
EP2274733A1 (en) * 2008-04-14 2011-01-19 International Business Machines Corporation Radio frequency (rf) integrated circuit (ic) packages with integrated aperture-coupled patch antenna(s) in ring and/or offset cavities
JP2011519517A (en) * 2008-04-14 2011-07-07 インターナショナル・ビジネス・マシーンズ・コーポレーション Radio frequency (RF) integrated circuit (IC) package with integrated aperture coupled patch antenna in ring cavity and / or offset cavity
EP2274733A4 (en) * 2008-04-14 2014-06-11 Ibm Radio frequency (rf) integrated circuit (ic) packages with integrated aperture-coupled patch antenna(s) in ring and/or offset cavities
TWI497828B (en) * 2008-04-14 2015-08-21 Ibm Radio frequency (rf) integrated circuit (ic) packages with integrated aperture-coupled patch antenna(s) in ring and/or offset cavities
JP2011519242A (en) * 2008-04-30 2011-06-30 トップコン ジーピーエス,エルエルシー Wideband micropatch antenna system with reduced sensitivity to multipath reception
JP2010016789A (en) * 2008-07-07 2010-01-21 Internatl Business Mach Corp <Ibm> Radio-frequency integrated circuit chip package having n-integrated aperture coupled patch antenna, and method of manufacturing the same
TWI506863B (en) * 2008-07-07 2015-11-01 Ibm Radio frequency (rf) integrated circuit (ic) packages having characteristics suitable for mass production

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