JPH01133569A - Power converter - Google Patents

Abstract

PURPOSE:To inhibit the lowering of output voltage by controlling an inverter and the ON-OFF timing of a frequency conversion circuit by output voltage from the frequency conversion circuit, the polarity of currents and the magnitude of output currents. CONSTITUTION:A power converter is composed of a DC power 1, an inverter 2, a transformer 3, a frequency conversion circuit 4, and a filter 5, and has a current detector 7 and a control circuit 100. The control circuit 1000 has a voltage width decision circuit 1050, a short circuit preventive period generating circuit 1040, a polarity-signal generating circuit 1030, first - second control- signal generating circuits 1010-1020, a voltage-polarity decision circuit 1060 and a current-polarity discrimination circuit 1070. Since output voltage is brought to zero during the commutation period of the frequency conversion circuit 4, the ON timings of switching elements 41-44 for said conversion circuit 4 are conformed to the starting time during the short-circuit preventive period of the inverter 2 during a period when the output voltage and the polarity of output currents coincide. Accordingly, since both periods are overlapped, unnecessary voltage is not output as backward voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power conversion device, and particularly to a power conversion device equipped with a frequency conversion device that directly converts a high frequency into a potential frequency.

[Conventional technology]

2. Description of the Related Art In power converters equipped with inverters that generate alternating current from direct current, attempts have been made to increase the frequency in order to make them smaller and to improve their performance.

After passing the high frequency voltage generated by the inverter through the transformer,
For example, a power conversion device that is compact and has high performance by converting low frequency voltage with a frequency conversion circuit is disclosed in Japanese Patent Application Laid-open No. 6
No. 1-236371 and Japanese Patent Application Laid-open No. 61-293170.

FIG. 1 shows an example of a power conversion device according to the prior art.

In Fig. 1, 1 is a DC power supply, 2 is an inverter, and is a gate turn-off thyristor (hereinafter referred to as GTo).
21, 22, 23.24 and diodes 25, 26,
27.28 included.

3 is a transformer, 4 is a frequency conversion circuit, and GT○41.
Bidirectional switch circuit 401 with 42 and GTO4
3 and 44, with switch circuits 401 and 402 having center tap connections. 15 and 16 are a reactor and a capacitor of the filter 5 for improving the waveform of the output voltage of the frequency conversion circuit 4, and 7 is a current detector. 100 is a control circuit;
Control signal forming circuits 101 and 102 that form control signals applied to GT○21, 22.23.24 of inverter 2 and GT○41, 42, 43°44 of frequency conversion circuit 4, and output voltage of inverter 2 a polarity signal forming circuit 103 that forms a polarity signal, a voltage width determining circuit 1o5 that determines the time width of the output voltage of the inverter 2, a short-circuit prevention period generation circuit 104 that generates a short-circuit prevention period signal of the inverter 2, and a frequency conversion circuit It includes a voltage polarity determination circuit 106 that determines the polarity of the output voltage of the circuit 4, and a current polarity determination circuit 107 that determines the polarity of the output current of the frequency conversion circuit 4.

The operation of the above conventional device will be described with reference to FIG. The GT○21, 22, 23°24 of the inverter 2 are turned on and off so as to output the voltage determined by the voltage width determining circuit 105, but during the short-circuit prevention period t1 to t2 to prevent short-circuiting of the DC power supply 1. and t4 to t6 are provided. On the other hand, the frequency conversion circuit 4 includes a polarity signal forming circuit 103 that forms a polarity signal of the output voltage of the inverter 2, a voltage polarity determining circuit 106 and a current polarity determining circuit that form polarity signals of the output voltage and current of the frequency conversion circuit 4, respectively. A switching element that becomes conductive is selected according to the output of the inverter 107, and the high frequency voltage generated by the inverter 2 is converted into a low frequency voltage.

[Problem to be solved by the invention]

'In the above-mentioned prior art, the start time of the commutation operation for switching the switching elements of the frequency conversion circuit is aligned with the end time t2 of the short-circuit prevention period of the inverter, as shown in FIG. However, during the short-circuit prevention period t1 to t2, a current path is formed in the inverter from the diode transformer to the diode to the DC power supply, so a voltage appears at the output of the inverter, and this is used as an unnecessary reverse voltage in the frequency conversion circuit. Appears in the output. Therefore, the output of the frequency conversion circuit only obtains a voltage obtained by subtracting the commutation period t2-t8 and the short-circuit prevention period tz-t2 from the output period t2-t4 in which voltage should normally be output, so the power conversion There was a problem that the output voltage of the device decreased.

In addition, such commutation operation is possible during the period when the polarity of the output voltage and the polarity of the current flowing through the reactor 5 match, but commutation operation is not possible during the period when the polarity of the output voltage and the reactor current are different. There was a problem in that a shutoff operation had to be performed.

An object of the present invention is to cause a frequency conversion circuit to perform a commutation operation using an inverter voltage during the entire period of one cycle of the output voltage, and to perform a switching operation to start commutation at the start of a short-circuit prevention period of the inverter. Therefore, it is an object of the present invention to provide a power conversion device that prevents the voltage generated during the short circuit prevention period from being transferred to the output of the frequency conversion circuit and suppresses a drop in the output voltage.

[Means to solve the problem]

The object of the present invention is achieved by providing a control circuit that controls the on-timing and off-timing of the switching elements of the inverter and the frequency conversion circuit according to the polarity of the output voltage, the polarity of the output current, and the magnitude of the output current of the frequency conversion circuit. be done.

[Effect]

During the commutation period of the frequency conversion circuit, the output voltage is zero, so during the period when the output voltage and output current have the same polarity, the on-timing of the switching element of the frequency conversion circuit should be adjusted to the start of the short-circuit prevention period of the inverter. . As a result, the short-circuit prevention period and commutation period overlap, so
Unnecessary voltage generated during the short circuit prevention period is no longer output as a reverse voltage, and a drop in output voltage is suppressed. During the period in which the output voltage and the output current have different polarities, unnecessary voltage generated during the short-circuit prevention period is no longer output as a reverse voltage, so it is possible to suppress a decrease in the output voltage due to this.

〔Example〕

A first embodiment of the invention will be described with reference to FIG.

The same numbers are used for the same parts as those used in the prior art power converter shown in FIG. 1, and a description of the same parts will be omitted.

The control circuit 1000 in the first embodiment of the device of the present invention includes:
Voltage width determination circuit 1050. Short circuit prevention period generation circuit 104
0. Polarity signal generation circuit 1030. First and second control signal generation circuits 1010.1 (120, voltage polarity determination circuit 10'60, including current polarity determination port g1070. Voltage width determination circuit 1 that determines the time width of the output voltage of inverter 2
050 is a sine wave generator 1051.050, as shown in FIG. 4(a). Sawtooth wave generation circuit 1052. Rectifier circuit 10
53 and a comparator 1054. Sine wave generator 105
The sine wave signal generated from 1053 is rectified through a rectifier circuit 1053. The rectified signal from the rectifier circuit 1053 is sent to comparator 1.
054 is applied to the negative input of the comparator 1054, and a sawtooth wave signal from the sawtooth wave generation circuit 1052 is applied to the positive input of the comparator 1054. Comparator 1054 compares the rectified sine wave signal and the sawtooth wave signal to generate an output voltage width determination signal that determines the time width of the output voltage of inverter 2 .

A short-circuit prevention period generation circuit 1040 that generates a short-circuit prevention period signal for the inverter 2 includes an OR circuit 1041 and a monomulti 1042, as shown in FIG. 4(b).

The OR circuit 1041 receives respective signals from a polarity signal forming circuit 1030 that forms a polarity signal of the output voltage of the inverter 2 and a voltage width determining circuit 1050, and the logical sum signal triggers the monomulti 1042.
generates a short circuit prevention period signal having a predetermined time width.

First control signal generation circuit 1010 that applies control signals to the gates of GT○21, 22, 23.24 of inverter 2
As shown in the fourth [(C), the pulse distributor 10
11. Flip-flop 1012, buffer circuit 101
3, 1014, and AND circuits 1015, 1016,
1017°1o18 and a frequency dividing circuit 1019. The pulse distributor 1011 receives the short-circuit prevention period signal from the short-circuit prevention period generation circuit 1040 and sends the short-circuit prevention period signal to the buffer circuit 1013 .

This signal is passed through 1014 to AND circuit 1015°101
6.Distribute to one input of 1017.1018. The flip-flop 1o12 receives the polarity signal from the polarity signal forming circuit 1030 at the data input via the frequency dividing circuit 1019, and receives the voltage width determination signal from the voltage width determination circuit 1050 at the clock input. flip flop 1012
The output signals of are applied to the other inputs of AND circuits 1017 and 1018, respectively, and the polarity signal forming circuit 10
30 polarity signals pass through the frequency divider circuit 1019 and are sent to the AND circuit 1.
015.1016 (7) Reel to which the other side is applied. AN
D circuit 1015, 1016° 1017.1018 is GT
A control signal is applied to the gates of O21, 22, 23°24.

As shown in FIG. 4(d), the voltage polarity determining circuit 1060 that determines the polarity of the output voltage of the frequency conversion circuit 4 is configured as follows.
Includes a comparator 1061. The positive input of comparator 1061 receives a voltage width determination signal from the voltage width determination circuit, compares this determination signal with ground potential, and generates a voltage polarity determination signal.

As shown in FIG. 4(e), the current polarity determination circuit 107o that determines the polarity of the output current of the frequency conversion circuit 4
Includes a comparator 1071. The positive input of comparator 1071 receives a current detection signal from current detector 7, compares this detection signal with ground potential, and generates a current polarity determination signal. The current detector 7 includes a current transformer (CT) in the present invention.

GTO41, 42 of frequency conversion circuit 4, and GT○4
The second control signal generation circuit 1020 that applies a control signal to the gate of 3.44 is as shown in FIG.
AND circuit 1021, 1022゜1023.1024,
1025, 1026, 1027° 1028 and OR circuits 1121, 1122° 1123, 1124. A
The first input from the ND circuit 1021 to the AND circuit 1028 receives a polarity signal from a polarity signal generation circuit (including an oscillation circuit) 1030 that generates a polarity signal of the output voltage of the frequency conversion circuit 4, and receives a polarity signal from each AND circuit. The second input receives a voltage polarity determination signal from the voltage polarity determination circuit 1060, and the third input of each AND circuit receives a current polarity determination signal from the current polarity determination circuit. OR circuit 1
121 is AND circuit 1021 and AND circuit 1o22
It receives an AND signal from and applies a control signal to the GTO 41. ○R circuit 1122 is AND circuit 1o23 and AN
It receives an AND signal from the D circuit 1024 and applies a control signal to the GTO 42. OR circuit 1123 is AND circuit 102
GT receives an AND signal from 5 and AND circuit 1o26.
Apply a control signal to O43. OR circuit 1124 is AN
It receives AND signals from the D circuit 1o27 and the AND circuit 1028 and applies a control signal to the GTO 44.

The operation of the first embodiment of the invention will be described with reference to FIG. The frequency conversion circuit 4 selects a switching element to conduct according to the polarity signal of the output voltage of the inverter 2, the polarity signal of the output voltage of the frequency conversion circuit 4, and the polarity signal of the output current, and prevents short circuits at the start of commutation operation. Control is performed to match the start time t1 of the period. As a result, the short circuit prevention period t1 to t2 overlaps at least a part of the commutation period t1 to t3, so the short circuit prevention period t1 to t
2, the voltage output to the inverter 2 will no longer cause unnecessary reverse voltage to appear at the output of the frequency conversion circuit 4. Therefore, the output voltage of the frequency conversion circuit 4 can be reduced only during the period t2 to t3, which is the difference between the diversion period and the short-circuit prevention period, so that the output voltage of the power conversion device is suppressed from decreasing.

A second embodiment is shown in FIG. 3 with an absolute value circuit 1080 shown in dotted lines, and its operation will be described with reference to FIG. The difference from the first embodiment is that an absolute value circuit 1080 is provided to control the length of the short circuit prevention period of the inverter 2 to be proportional to the absolute value of the output current of the frequency conversion circuit 4. Absolute value circuit 1080 includes a rectifier circuit. Since the commutation period of the frequency conversion circuit 4 is approximately proportional to the absolute value of the output current of the frequency conversion circuit 4, by controlling the length of the short circuit prevention period so that it is proportional to the absolute value of the output current, the short circuit prevention period can be reduced. It becomes possible to overlap the commutation period between periods t1 and t2. As a result, the frequency conversion circuit 4. 1 Voltage is now output during the period t2 to t4 when voltage should normally be output, reducing the voltage generated during the short circuit prevention period and the drop in the output voltage of the power converter due to no output voltage during the commutation period to zero. be able to. FIG. 7 shows a third embodiment of the device according to the invention. The third embodiment replaces the frequency conversion circuit 4 of the first and second embodiments with four switching circuits 401°40
2, 403 and 404, and these switching circuits are bridge-connected. The third embodiment has the same operation as the first and second embodiments, and has the same effects as the first and second embodiments.

In the above embodiment, GTO21 is used as a switching element.
,22,23,24 and GTO41゜42.43,44
, 45, 46, 47, and 48 were used, but other self-extinguishing devices with blocking capability, such as transistors and MOSFETs, can also be used. In addition, the frequency conversion circuit 4
GTO41, 42, 43, 4 as a switching element
4, 45°, 46, 47, and 48 can also be replaced with elements such as thyristors that do not have a blocking ability. moreover,
Although this embodiment describes the case of a single-phase circuit, it is also possible to apply it to a three-phase circuit or other polyphase circuits.

A fourth embodiment of the present invention is shown in FIG. 8, and the circuit operation thereof will be schematically described with reference to FIG. The inverter 2 forms an alternating current voltage e1 shown by a solid line that is pulse width modulated so as to have a positive arc wave shape eout shown by a dotted line in FIG. 9(a), and a voltage e2 is generated in the secondary winding of the transformer 3. be done. The frequency conversion circuit 4 converts the AC voltage e2 shown in FIG.
In order to form an output voltage eouL shown by a dotted line from The output voltage e of the frequency conversion circuit shown in (c) is formed. A filter 5 comprising a reactor 15 and a capacitor 16 generates a positive arc waveform output voltage eouc from the output voltage eL.

Details of the operations of the inverter 2 and the frequency conversion circuit 4 will be described. The output of the frequency conversion circuit 4 is connected to a load via a waveform improving filter 5 composed of a reactor 15 and a capacitor 16. The phase of the current i flowing through the reactor 15 with respect to the output voltage eout differs depending on the size of the load and the load power factor. Therefore, during one cycle of the output voltage Bout, there are periods in which the output voltage eout and the current i have the same polarity and periods in which they have different polarities. Figure 1o shows the inverter 2 and the frequency conversion circuit 4 during a period when the output voltage eout and current iL have the same polarity and a period when they have different polarity.
shows the operation. The operation during the period when the output voltage eout and the current iL have the same polarity will be described. The period t4x to ta2 is
The width of the pulse required for the output of the frequency conversion circuit 4 to obtain the output voltage eout during this period is shown. time t
At ao, the switching element 24 of the inverter 2 is turned off. At this time, switching element 43 of 1 frequency conversion circuit 4
A signal is applied to turn on. At time tao, the current iL is positive, so the element 41 is on, and the transformer 2
This is because current flows in the direction from point 0 to point D in the next winding.

Current flows in the primary winding of the transformer from point A to point B. Therefore, in the inverter 2, the elements 22 and 2
A current flows in the power supply 1 with the opposite polarity through the diodes 26 and 27 connected in parallel with the polarity opposite to that of the transformer 3, and the voltage with the polarity shown in Fig. 10(a) is applied to the primary winding of the transformer. applied. Since a signal is applied to turn on element 43, a short circuit is formed on the secondary side of the transformer via elements 43 and 41, and this short circuit includes approximately the voltage of power supply 1 and the leakage inductance of transformer 3. A short-circuit current increases at a rate of change determined by the value of , and a commutation operation from element 41 to element 43 begins. At this time, the voltage e becomes O because the secondary circuit of the transformer is in a short-circuited state.

The element 23 is turned on at time tax. Element 4 at time 41
1 becomes O, the commutation operation from the element 41 to the element 43 is completed, and the voltage shown in FIG. 10(d) is output as the output voltage eL. Next, element 22 is turned off at time 42. At this time, the current flows in the direction from point 0 to point E in the secondary winding of the transformer, so current flows in the direction from point B to point A in the primary winding of the transformer. In inverter 2, element 2
Diode 25 and element 2 connected in parallel with 1 with opposite polarity
Since current flows through 3, the voltage of the primary winding of the transformer becomes 0, and the output voltage e also becomes 0. Next time t'4
Although the element 21 is turned on at Z, the polarity of the current does not change, so the same operation as that from t42 to t'42 is performed for 5 hours.

At time t5o, element 23 of inverter 2 is turned off, and a signal for turning on element 41 of frequency conversion circuit 4 is applied. Since a current with a polarity opposite to that at time t4o is flowing through the primary winding of the transformer, a positive voltage is applied from the inverter 2 to the transformer 3. This voltage causes the element 43 to turn to the element 41.
The commutation operation starts. Commutation is completed at time t5x. Therefore, as shown in FIG. 10(d), the time t61
The output voltage eL is generated during the time from tetz to the time tetz when the element 21 is turned off. Thereafter, similar operations are performed.

The time required for the commutation operation from element 41 to element 43 and from element 43 to element 41 is determined by the voltage value of power supply 1, the leakage inductance of transformer 3, and the value of current iL at that time. Period t 40'' t 41 and time tso-t
In addition to determining δ1 with these values, the original output voltage +3
Time t4x when L should be output and time t before tax
Inverter 2 and frequency conversion circuit 4 from 40 and tso
By operating at the above timing, an output voltage that is not affected by the commutation operation can be obtained.

The operation during a period in which the output voltage eout and the current i have different polarities will be described. During this period, if the inverter 2 and the frequency conversion circuit 4 are operated at the timing described above, the switching operation of the switching element of the conversion circuit 4 cannot be performed using the voltage e1 applied to the transformer 3.

The period t1x to t12 is the output voltage e during this period. The width of the voltage pulse required at the output of the frequency conversion circuit 4 to obtain ut is shown. At time trt, element 21.24 is on and voltage e1 is a positive voltage as shown. Current iL
Since is negative, current flows in the secondary winding of the transformer from point D to point 0 via element 42. A signal is applied to turn on element 44 at time t12. In the inverter, since the elements 21 and 24 are in the on state, a voltage of the same polarity as in the period 111 to txz continues to be generated regardless of the current polarity. In the frequency conversion circuit 4, since the element 44 is turned on, a short circuit current flows through the elements 42 and 44 due to the voltage e1.
Time txa when the commutation operation starts and the current of the element 42 becomes O
The commutation operation is completed. At time ti3, current flows in the secondary winding of the transformer from point E to point 0 via element 44, and current flows in the primary winding of the transformer from point A to point B. . In the inverter 2, current flows through the diode 26 and the element 24, which are connected in parallel with the element 22 with opposite polarity, so the voltage e1 becomes 0 after time txs, and the voltage e becomes 0 after time t12 as shown in the figure. Become. time t'
At 13, the element 22 is turned on, but the state of the voltage e remains unchanged.

The switching operation of the switching element is performed by applying a voltage e to the transformer 3.
1 cannot be used.

During the period tzt to t12, the output voltage e out during this period
The width of the voltage pulse required at the output of the frequency conversion path 4 in order to obtain . At time t11, element 21 is on and elements 22, 23, and 24 are off. At this time, since the current i is negative, a current flows in the secondary winding of the transformer from point D to point 0 via element 42. For this reason, inverter 2.

Since current flows through the power supply 1 and the diodes 25, 28 connected in parallel with opposite polarities to the elements 21 and 24, a voltage having the polarity shown in FIG. 10(a) is generated. This state does not change even if the element 24 is turned on at time 1/, □. A signal is then applied to turn on element 44 at time tzz. Inverter 2 includes elements 21 and 24
is in the on state, the period 111-t regardless of the current polarity
A voltage with the same polarity as xz continues to be generated. In the frequency conversion circuit 4, since the element 44 is turned on, a short circuit current flows through the elements 42 and 44 due to the voltage e1, commutation operation starts, and the commutation operation starts at a time tza when the current of the element 42 becomes O. is completed. At time point 13, current flows through the secondary winding of the transformer from point E to point 0 via element 44, and current flows through the primary winding from point A to point B. Inverter 2
Since current flows through the diode 26 connected in parallel with the element 22 with opposite polarity, the voltage e1 becomes 0 after time t13, and the output voltage eL becomes 0 after time t1z as shown. Although the element 22 is turned on at time tta, there is no change in the state of the voltage 8L.

When element 24 turns off at time 21, a current flows in inverter 2 through the power supply 1 and diodes connected in parallel with elements 22 and 23 with opposite polarities. Therefore, the voltage with the polarity shown in FIG. 10(a) is applied to the transformer 3, and the voltage shown in FIG. 23 is turned on, there is no change in the state of the voltage eL.

A signal is applied to turn on element 42 at time tzz, and commutation operation from element 44 to element 42 is initiated. The operation at this time is similar to the commutation operation from element 42 to element 44 at time tri.

The time required for commutation operation from element 42 to element 44 and from element 44 to element 42 depends on the voltage value of power supply 1 and the leakage of transformer 3, as in the case of the period when the output voltage eauL and the current iL have the same polarity. It is determined by the value of inductance and voltage e at that time. Period t1z~L13 and period tzz~t
The output voltage eout and the output current are determined by operating the inverter 2 and the frequency conversion circuit 4 at the above-mentioned timing to obtain the period during which the voltage et is to be output, while za is determined by the values of the power supply voltage, leakage inductance, and voltage em. Commutation operation is possible even during periods when the polarity of ib is different,
Moreover, an unaffected output voltage is generated due to the commutation operation.

A control circuit 1000 in a fourth embodiment of the device of the present invention is shown in FIG.

FIG. 12 is a waveform diagram for explaining the operation of the embodiment shown in FIG. 11. In FIG. 11, 1101 is a polarity detection circuit, 1102 is a polarity level detection circuit, and 1103 is a polarity detection circuit.
110 is a phase control circuit, 1104 is a drive signal forming circuit, and 110 is a phase control circuit;
5 is an adder/subtractor, 110G and 1107 are amplifiers. The pattern of the output voltage and the output voltage eout are compared to form an error voltage ◯ and an error voltage Δe' whose polarity is changed.

From the voltage pattern, the polarity of the voltage to be output to voltage e is
It is formed by a polarity detector 1101. The polarity and level are detected by the polarity level detector 1102 from the detected value of the current iL. High frequency triangular wave eT and current i for comparison
From L, the phase control circuit 1103 forms e' and e'''T whose phases are changed in the leading and retarding directions by an amount corresponding to the value of the current i.The waveform at this time is shown in FIG.
Shown in a). An enlarged view is shown in FIG. 12(b).

The drive signal forming circuit 1104 has a triangle e'7. a' O, ao, a' o and 'o@bo1b'o at the intersection of the signals of 〇 and Δe' to eT and e'T and the error voltage
form a signal indicating the Furthermore, using the voltage and current polarity signals described above, signals for driving the switching elements of the inverter 2 and the frequency conversion circuit 4 are selected from these signals and driven as detailed in FIG. 10. The level signal of the polarity/level detection circuit 1102 is applied to the bipolar switching elements of the element 42 and the element 41 during the period when the polarity of the current iL changes, such as the period from time tzx to t4o shown in FIG. It is used to do.

Control circuit 1 in the fourth embodiment of the power conversion device of the present invention
000, the polarity detection circuit 1101 is configured as shown in FIG.
As shown in a), it includes a comparator 1111 whose positive input receives the output voltage pattern and compares the voltage pattern with ground potential to generate a polarity detection signal. The polarity/level detection circuit 1102 includes a comparator 1112 and a current detector 7, as shown in FIG. 13(b).
It receives a detection signal i from the circuit, compares this detection signal with ground potential, and generates a polarity/level signal.

As shown in FIG. 13(C), the phase control circuit 1103 includes a rectifier circuit 1113. Amplifier 1123° Adder 11
33. It includes a subtracter 1143. Rectifier circuit 1113 receives detection signal iL from current detector 7 and rectifies this detection signal, and amplifier 1123 amplifies this rectified signal to a predetermined value. Adder 1133 and subtracter 1143 receive the amplified signal from amplifier 1123 at one input and the triangular wave signal eT at the other input. Adder 1133 adds the signal from amplifier 1123 to triangular wave signal eT to generate an advanced triangular wave signal e' having a predetermined advanced phase. A subtracter 1143 subtracts the triangular wave signal eT from the signal of the amplifier 1123 to obtain a delayed triangular wave signal e'T having a predetermined delayed phase.
occurs.

The parking signal generation circuit 1104 includes a first control signal generation circuit 1204 that generates a control signal to be applied to the inverter 2 and a frequency converter 4, as shown in FIG. 13(d).
The first control signal generation circuit 1204 includes a second control signal generation circuit 1704 that generates a control signal to be applied to the inverter 2. The first control signal generation circuit 1204 generates a control signal to be applied to the switching element 21 of the inverter 2. unit 1304; a second unit that generates a control signal to be applied to the switching element 22;
Inverter control unit 1404. switching element 2
a third inverter control unit 1504 . It includes a fourth inverter control unit 16o4 that generates a control signal to be applied to the switching element 24.

The second control signal generation circuit 1704 is connected to the first converter control unit 1804, the second converter control unit 19o4, and the third converter control unit 20.
Including 04.

The first inverter control unit 1304 controls the first inverter control unit, the second inverter control unit 1304, and the second inverter control unit 1304. Third. a fourth comparator; Second. 3rd゜4th AND
circuit, first and second OR circuits, and a flip-flop. Second inverter control unit 1404. Third inverter control unit 1504. Fourth inverter control unit 1604.

and the first converter control unit 1804 and the second
Converter control unit 19o4 also includes all of the same circuit elements as first inverter control unit 1304. Third
The converter control unit 2004 is the second control signal generating circuit 1o20 of the control circuit in the first embodiment of the present invention.
contains the same circuit elements as .

The operation of the rotation signal generation circuit 1104 will be described.

In the first inverter control unit 1304, the first comparator receives the delayed triangular wave signal e' from the phase control circuit 1103.
T and the error voltage Δe from the amplifier 1106 are received to detect the crossing point b'o. The third comparator compares the reverse polarity error signal 'e from the amplifier 1107 with the triangular wave signal 0 from the phase control circuit 1103 to detect the crossing point bl.

In the second inverter control unit 1404, the first comparator compares the opposite polarity error voltage Δe' from the amplifier 1107 with the delayed triangular wave signal e'T from the phase control circuit 1103 to detect the crossing point b't. The third comparator receives the triangular wave signal eT from the phase control circuit 1103 and the amplifier 1106.
The error voltage Δe is compared with the error voltage Δe to find the crossing point. Detect.

In the third inverter control unit 1504, the first comparator compares the triangular wave signal eT from the phase control circuit 1103 and the opposite polarity error voltage Δe' from the amplifier 1107 and determines the crossing point a. Detect. The third comparator compares the error voltage Δe from the amplifier 1106 with the leading triangular wave signal e'T from the phase control circuit 1103, and detects the crossing point a'1.

In the fourth inverter control unit 1604.

The first comparator compares the error voltage Δe from the amplifier 1106 and the triangular wave signal eT from the phase control circuit 1103, and detects the crossing point a1. The third ratio throttle is a phase control circuit 11o3
The leading triangular wave signal e'T is compared with the opposite polarity error voltage Δe' from the amplifier 11o7 to detect the crossing point a'o.

In the first converter control unit 1804, the first comparator compares the error voltage Δe from the amplifier 1106 with the leading triangular wave signal e'T from the phase control circuit 1103 to detect the crossing point a/min. The third comparator is the phase control circuit 1
The leading triangular wave signal e'T from the amplifier 1103 is compared with the opposite polarity error voltage Δe' from the amplifier 1107 to detect the crossing point a'o.

In the second converter control unit 1904, the first comparator receives the leading triangular signal 8'T from the phase control circuit 1103.
and the error voltage Δe from the amplifier 11o6 are compared to find the point of intersection. Detect. The third comparator compares the reverse polarity error voltage Δe' from the amplifier 1107 with the leading triangular wave signal e'T from the phase control circuit 1103, and detects the crossing point b1.

Output voltage e. If ut is positive, the switching element 21 of the inverter 2 is crossed at the time b#. to bl, the switching element 22 is turned on from the crossing point b'z to bo, the switching element 23 is turned on from the crossing point ao to a'l, and the switching element 24 is turned on from the crossing point a1 to a'o. , an operation as shown in FIG. 10(b) is obtained.

For this purpose, the intersection point b ′ O, b′ g a
o.

Inverter control unit 1304, 1404゜1 at at
504.1604 flip-flops are set and crossing time b1. bo, a' 1. Each flip-flop is reset at a'o.

When the output voltage 8out is negative, the polarities of the error voltages Δe and Δe' are reversed, so each flip-flop is set or reset by exchanging these relationships.

In FIG. 10(c), the switching elements 41, 42, 43, 44 of the frequency conversion circuit 4 output voltage e Out
When the output current i and the output current i have the same polarity, the crossing point a'1.
It is turned on by setting and resetting the flip-flop of the first converter control unit 1804 at a'o. Switching elements 41.42', 43.4
4 is when the output voltage eout and the output current iL have different polarities,
It is turned on by setting and resetting the flip-flop of the second converter control unit 1904 at the crossing point b o e b 1 .

〔Effect of the invention〕

According to the present invention, unnecessary voltage generated during the short-circuit prevention period of the inverter can be prevented from appearing as a reverse voltage in the output of the frequency conversion circuit, and therefore, there is an effect of suppressing a drop in the output voltage.

[Brief explanation of the drawing]

Figure 1 is a diagram showing the circuit configuration of a conventional power conversion device, Figure 2 is a diagram showing the circuit configuration of a conventional power conversion device.
The figures show waveforms of main circuits useful for the operation of the power converter shown in Fig. 1, Fig. 3 shows the circuit configuration of the power converter according to the first embodiment of the present invention, and Fig. FIG. 5 is a diagram showing the configuration of each block of the control circuit in FIG. 1, FIG. 5 is a diagram showing waveforms of main circuits useful for the operation of the power conversion device in FIG. 7 is a diagram showing the configuration of the frequency conversion circuit of the power conversion device according to the third embodiment of the present invention, and FIG. 8 is a diagram showing the waveforms of the main circuits useful for the operation of the power conversion device. A diagram showing the configuration of the power conversion device according to the fourth embodiment, FIG. 9 is a diagram showing useful waveforms for explaining the outline of the operation of the device in FIG. 8, and FIG. 10 is a diagram showing the waveform of the device in FIG. 8. 11 is a diagram showing the configuration of the control circuit of the power converter shown in FIG. 8, and FIG. 12 is a diagram showing the operation of the control circuit shown in FIG. 11. FIG. 13 is a diagram showing the configuration of each block of the control circuit of FIG. 11. DESCRIPTION OF SYMBOLS 1... DC power supply, 2... Inverter, 3... Transformer, 4... Frequency conversion circuit, 5... Filter, 7...
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Claims (1)

[Claims] 1. An inverter that converts direct current to alternating current, a transformer connected to the output of the inverter and having an output terminal and a neutral terminal, connected in series between the output terminals of the transformer. A power conversion device including a switch and configured to output from between a connection point between a neutral point terminal of the transformer and the switch, or between a connection point between the switches provided in two circuits. A power conversion device comprising: a control circuit that controls the inverter and the switch according to an output voltage of an inverter, a polarity of the output voltage of the switch, and a polarity and magnitude of an output current of the switch. 2. A frequency conversion circuit having an inverter that converts direct current to alternating current, a transformer connected to the output of the inverter, a bidirectional switch connected to the secondary side of the transformer by a bridge connection or a center tap, and a short circuit in the power supply. and a control circuit that controls the commutation start phase of the bidirectional switch so that a short-circuit prevention period of the inverter to prevent the inverter and a commutation period in which commutation is performed between the bidirectional switches at least partially overlap. conversion device. 3. An inverter for converting direct current to alternating current, a transformer connected to the output of the inverter, a frequency conversion circuit having a bidirectional switch having a bridge connection or a center tap connection on the secondary side of the transformer, and a frequency conversion circuit for inverter operation. A power conversion device comprising: a control circuit that controls a bidirectional switch of the frequency conversion circuit so that unnecessary voltage that is generated accordingly does not appear on the output side. 4. The power converter according to claim 3, wherein the control circuit controls the short-circuit prevention period of the inverter according to the magnitude of the output current of the frequency conversion circuit. 5. A DC power supply that provides a predetermined DC voltage, a plurality of switching elements that convert the DC voltage of the DC power supply into a predetermined high-frequency AC voltage, and have a bridge connection, and diodes connected in parallel with these switching elements. a transformer having a primary winding to which a high-frequency AC voltage generated from the inverter is applied and a secondary winding that generates a predetermined high-voltage high-frequency voltage; a frequency converter that includes a plurality of switching element pairs connected in antiparallel and converts a high frequency high voltage generated from a secondary winding of the transformer into a predetermined low frequency high voltage; a filter that converts the low frequency high voltage of the converter into a predetermined sine wave voltage and includes a reactor and a capacitor; a detector that detects at least the current flowing through the filter; and a detector that detects the inverter in response to a detection signal from the detector. a control circuit that provides the inverter and the frequency conversion circuit with a control signal that determines the commutation point of the frequency converter in synchronization with the start point of the short-circuit prevention period of the power converter. 6. The power conversion device according to claim 5, wherein the control circuit further includes an absolute value circuit that controls the length of the short circuit prevention period of the inverter to be proportional to the absolute value of the output current of the frequency conversion circuit. Power converter. 7. The power conversion device according to claim 5, wherein the frequency conversion circuit includes a pair of switching elements connected in antiparallel, and includes first, second, third, and fourth switching circuits that are bridge-connected to each other. Power conversion equipment including. 8. The power converter according to claim 5, wherein the detector detects a current flowing through a reactor of the filter and a voltage generated in a capacitor of the filter. 9. The power conversion device according to claim 8, wherein the control circuit includes: an error voltage generation circuit that compares the detected voltage from the detector with an output voltage pattern and generates first and second error voltages; a phase control circuit that generates first, second, and third triangular wave signals having predetermined phases according to a detected current from the detector; and a polarity detection circuit that detects the polarity of the detected voltage from the output voltage pattern. , a polarity/level detection circuit that detects the polarity and level of the detection current from the detection current of the detector, and first and second error voltages from the error voltage generation circuit and first and first error voltages from the phase control circuit. 2. A drive for detecting the point of intersection with the third triangular wave signal and applying a control signal to the switching elements of the inverter and the frequency conversion circuit according to the detection signals from the polarity detection circuit and the polarity/level detection circuit. A power conversion device including a signal generation circuit.