JPH01133472A - High voltage stabilized power source - Google Patents
High voltage stabilized power sourceInfo
- Publication number
- JPH01133472A JPH01133472A JP29051987A JP29051987A JPH01133472A JP H01133472 A JPH01133472 A JP H01133472A JP 29051987 A JP29051987 A JP 29051987A JP 29051987 A JP29051987 A JP 29051987A JP H01133472 A JPH01133472 A JP H01133472A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- output
- high voltage
- transistor
- stabilized power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004804 winding Methods 0.000 claims abstract description 22
- 238000000034 method Methods 0.000 claims 1
- 230000003321 amplification Effects 0.000 description 5
- 238000003199 nucleic acid amplification method Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000087 stabilizing effect Effects 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
Landscapes
- Details Of Television Scanning (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の目的〕
(産業上の利用分野)
本発明は、高圧電源に倒し、特にその高圧安定化回路に
関するものである。DETAILED DESCRIPTION OF THE INVENTION OBJECTS OF THE INVENTION (Field of Industrial Application) The present invention relates to high voltage power supplies, and more particularly to high voltage stabilizing circuits thereof.
(従来の技術)
高圧を安定化させるための従来技術の回路構成を第2図
にて説明する。(Prior Art) A conventional circuit configuration for stabilizing high voltage will be explained with reference to FIG. 2.
第2図においてまず高圧を発生させるためのフライバッ
クトランス(以下FBTと称す)■の一次側へ、−次側
電流をオン−オフさせるためのスイッチングトランジス
タ(以下stと称す)■が1次側巻線の片方とアース間
に接続され、−次側巻線のもう片方には駆動電源(十B
)が接続されており、st■をオン−オフさせることに
より5t(3の(TH: Stがオン−オフする一周期
の時間、Tr : stのオフ時間)の電圧が発生し、
これを必要とする出力電圧となるよう2次巻線数を1次
巻線数に対して出力電圧/Vcp倍とすることにより高
圧を得。In Figure 2, first, a flyback transformer (hereinafter referred to as FBT) for generating high voltage is connected to the primary side, and a switching transistor (hereinafter referred to as ST) to turn on/off the -side current is connected to the primary side. It is connected between one side of the winding and ground, and the drive power supply (10B) is connected to the other side of the negative winding.
) is connected, and by turning st■ on and off, a voltage of 5t (3 (TH: time of one cycle when St turns on and off, Tr: off time of st) is generated,
A high voltage is obtained by setting the number of secondary windings to be the number of primary windings multiplied by the output voltage/Vcp so as to obtain the required output voltage.
さらにダイオード■にて整流することにより高圧直流電
圧が得られ、その高圧出力は陰極線管その他の負荷が接
続され、この負荷が変動すると高圧出力電圧も変動し負
荷に対して常に一定の電圧を供給出来なくなるため、高
圧出力電圧の変動を検出し、これを増幅して(十B)電
圧を可変することにより高圧出力電圧を一定にしようと
するものである。まず高圧出力電圧を差動増幅器(至)
の入力電圧に適する値まで低くするため、高圧出力とア
ース間に2個の分圧抵抗器を直列に接続し高圧側分圧抵
抗器■とアース側分圧抵抗器■の比を決定し、アースと
アース側分圧抵抗器0間に発生する電圧を、高圧変動の
検出電圧として誤差増幅器(へ)の負極増幅入力端子■
へ入力され正極増幅入力端子(へ)は基準電圧(以下v
Fと称す)■を入力しておく、さらに差動増幅器に)の
出力(10)は(十B)電圧制御Tr(11)のベース
へ接続されており、エミッタはFBT■の(+B)r入
力端子へ接続されコレクタは(十B)電圧よりも制御に
必要な電圧分高い電圧(Vcc)が入力されている。以
下に従来例の動作について説明する。Furthermore, a high-voltage DC voltage is obtained by rectifying it with a diode.The high-voltage output is connected to a cathode ray tube or other load, and when this load fluctuates, the high-voltage output voltage also fluctuates, so that a constant voltage is always supplied to the load. Therefore, an attempt is made to make the high-voltage output voltage constant by detecting fluctuations in the high-voltage output voltage and amplifying the fluctuations (10B) to vary the voltage. First, the high voltage output voltage is converted to a differential amplifier (to)
In order to lower the input voltage to a value suitable for the input voltage, connect two voltage dividing resistors in series between the high voltage output and the ground, determine the ratio of the high voltage side voltage dividing resistor ■ and the earth side voltage dividing resistor ■, The voltage generated between the ground and the ground-side voltage dividing resistor 0 is used as the detection voltage for high voltage fluctuations at the negative amplification input terminal of the error amplifier (to).
The positive amplification input terminal (to) is input to the reference voltage (hereinafter v
The output (10) of (10B) is connected to the base of (11B) voltage control transistor (11), and the emitter is connected to (+B)r of FBT■. A voltage (Vcc) higher than the (10B) voltage by the voltage required for control is input to the collector connected to the input terminal. The operation of the conventional example will be explained below.
高圧出力電圧が設定基準値よりも低くなった場合はアー
ス側分圧抵抗器0に発生する電圧が低くなり、この電圧
は誤差増幅器に)の負極増幅入力端子■へ入力され誤差
増幅器(イ)の正極増幅入力端子■のVF■と比較され
る。この場合はVF■に対して負極増幅入力電圧が低い
ため誤差増幅器(へ)の出力電圧(10)は高くなり(
十B)制御Tr(11)のベース電圧も高くなりこれに
伴いエミッタ電圧も高くなりFBT■に加わる(十B)
電圧が高くなるとst■のコレクタに発生する電圧(v
cp)も高くなり高圧出力電圧も高められ出力電圧を一
定に保とうとする。高圧出力電圧が基準値よりも高い場
合はこれと逆の動作をし、出力電圧を一定に保とうとす
る。When the high voltage output voltage becomes lower than the set reference value, the voltage generated at the ground side voltage dividing resistor 0 becomes low, and this voltage is input to the negative amplification input terminal ■ of the error amplifier (A). It is compared with VF■ of the positive amplification input terminal ■. In this case, since the negative amplification input voltage is low with respect to VF■, the output voltage (10) of the error amplifier (to) becomes high (
10B) The base voltage of the control Tr (11) also increases, and the emitter voltage also increases, which is applied to the FBT ■ (10B)
When the voltage increases, the voltage (v
cp) increases, the high-voltage output voltage also increases, and an attempt is made to keep the output voltage constant. When the high-voltage output voltage is higher than the reference value, it operates in the opposite way and tries to keep the output voltage constant.
しかし前述した従来技術の構成及び動作にて理想動作を
した場合でも不具合いが発生しておりこれについて第3
図を用いて説明する。However, even when ideal operation is achieved with the configuration and operation of the prior art described above, problems still occur, and this will be discussed in the third section.
This will be explained using figures.
第3図(a)においてまずst■はスイッチング動作を
しておりオン時間(21)にてFBT■の一次巻線に蓄
えたエネルギーをオフ時間(22)にてvCP(23)
として発生しこのvCPはst■のオン時間(21)に
FBT■に加わる(十B)電圧に比例する。In Fig. 3(a), st■ is in a switching operation, and the energy stored in the primary winding of FBT■ during the on time (21) is transferred to vCP (23) during the off time (22).
This vCP is proportional to the voltage (10B) applied to FBT■ during the on-time (21) of st■.
すなわち高圧出力に第3図(b)のようにst■がオン
の時間パルス状の負荷(23)が加わった場合そのst
■がオン時間(21)は徐々に一圧出力(24)は低下
する。この時FBT■の(十B)入力電圧は高められて
いるので次にst■がオフ状態(25)になった時は高
圧出力電圧は高くなっているが負荷(23)はゼロであ
る。In other words, when a pulse-like load (23) is applied to the high voltage output during the time when st is on as shown in Fig. 3(b), the st
During the ON time (21), the single pressure output (24) gradually decreases. At this time, the input voltage (10B) of FBT (1) has been increased, so the next time st (2) turns off (25), the high output voltage is high but the load (23) is zero.
(発明が解決しようとする問題点)
従来技術の高圧安定回路は5tciりがオンの時間は高
圧出力電圧の制御を行なうことは出来ずさらに次のオフ
の時高圧出力電圧を補正するのでかならずオン−オフの
時間以上の遅れを伴っている。このため常に一定電圧の
高圧出力電圧を得ることが出来ず負荷変動に対して常に
時間遅れを発生している。(Problems to be Solved by the Invention) The high voltage stabilizing circuit of the prior art cannot control the high voltage output voltage while the 5tci is on, and further corrects the high voltage output voltage when the 5tci is turned off, so it is always on. - Involves a delay longer than the off time. For this reason, it is not possible to always obtain a constant high voltage output voltage, and a time delay always occurs in response to load fluctuations.
これは、たとえばCRTモニタにおいては画面の曲り及
び歪を発生し高品位の画像が得られない。For example, in a CRT monitor, this causes screen curvature and distortion, making it impossible to obtain high-quality images.
本発明は上述した問題点を解決するためになされたもの
であり、常に一定の高圧出力電圧を得ることが可能な高
圧安定化電源を提供することを目的とする。The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a high-voltage stabilized power supply that can always obtain a constant high-voltage output voltage.
(問題点を解決するための手段)
本発明はフライバックトランスを用いて一次側巻線に流
れる電流をスイッチングし二次側巻線にて一次側巻線に
発生する電圧を昇圧して高圧電圧を発生させる方式の高
圧安定化電源において、二次側巻線の低圧側に高圧制御
用のトランジスタを配置し、前記トランジスタのベース
へ同一電圧を誤差増幅器にて印加することにより、常に
一定の高圧出力電圧を得ることが可能な高圧安定化電源
を得ることができる。(Means for Solving the Problems) The present invention uses a flyback transformer to switch the current flowing through the primary winding, and the secondary winding boosts the voltage generated in the primary winding to create a high voltage voltage. In a high-voltage stabilized power supply that generates a constant high voltage, a transistor for high-voltage control is placed on the low-voltage side of the secondary winding, and the same voltage is applied to the base of the transistor using an error amplifier. A high-voltage stabilized power supply capable of obtaining an output voltage can be obtained.
(作 用)
本発明はフライバックトランスの2次巻線のアース側電
位を同一電圧可変することにより、高圧出力電圧をスイ
ッチングトランジスタのオン−オフ時間に関係なく常に
一定電圧に保つため、フライバックトランスの低圧側端
子に制御用トランジスタを配置し、そのベースに高圧出
力電圧と同一電圧で制御する増幅器と接続することによ
り負荷変動に対して常に一定電圧の高出力を得ることが
できる。(Function) The present invention varies the ground side potential of the secondary winding of the flyback transformer by the same voltage to maintain the high voltage output voltage at a constant voltage regardless of the on-off time of the switching transistor. By arranging a control transistor at the low-voltage side terminal of the transformer and connecting its base to an amplifier that is controlled at the same voltage as the high-voltage output voltage, it is possible to always obtain a high output with a constant voltage despite load fluctuations.
(実 施 例) 次に本発明による一実施例を第1図に示し説明する。(Example) Next, an embodiment according to the present invention is shown in FIG. 1 and will be described.
第1図においてまずFBT■の一次側巻線の片方へ十B
電圧を供給しもう片方へst■をアース間に接続する0
次にFBT■の二次巻線の高圧出力側は整流用ダイオー
ド■を接続し直流を得て負荷へ供給される1次にこの出
力端子とアース間に分圧抵抗■、0を直列に接続しアー
ス側分圧抵抗器■の両端の出力電圧を検出電圧とし、こ
れは誤差増幅器(16)の負極入力端子(17)へ接続
し、正極入力端子(18)は基準電圧V、(19)にて
固定する。さらにFBT■の二次巻線の低圧側は高圧制
御用トランジスタ(19)のエミッタを接続しコレクタ
には、高圧電圧変動の最大値以上の電圧を印加する。ベ
ースは先の誤差増幅器(16)の出力端子が接続されて
いる。In Figure 1, first connect 10B to one side of the primary winding of FBT■.
Supply voltage and connect st■ to the other side between ground 0
Next, a rectifier diode ■ is connected to the high voltage output side of the secondary winding of the FBT ■ to obtain direct current, which is supplied to the load. A voltage dividing resistor ■, 0 is connected in series between this output terminal and ground for the primary The output voltage at both ends of the ground side voltage dividing resistor (■) is used as the detection voltage, which is connected to the negative input terminal (17) of the error amplifier (16), and the positive input terminal (18) is connected to the reference voltage V, (19) Fix it with. Further, the low voltage side of the secondary winding of FBT (2) is connected to the emitter of a high voltage control transistor (19), and a voltage higher than the maximum value of the high voltage fluctuation is applied to the collector. The base is connected to the output terminal of the error amplifier (16).
本発明による作用は高圧出力電圧が低下した場合、その
低下分に比例した電圧がアース側分圧抵抗器0に発生し
その電圧が誤差増幅器(16)へ入力され誤差増幅器(
16)の出力は(基準電圧V、(19) −入力電圧(
17)) X増幅度となり、この場合出力は高くなり高
圧制御用トランジスタ(19)のベースへ入力されこの
分FBT■の2次巻線の低圧側の電位を高くするため高
圧出力電圧も高くなり誤差増幅器(16)の入力電圧と
基準電圧V、(19)が等しくなるまで補正しようとす
る。The effect of the present invention is that when the high voltage output voltage decreases, a voltage proportional to the decrease is generated in the earth side voltage dividing resistor 0, and that voltage is input to the error amplifier (16).
The output of 16) is (reference voltage V, (19) - input voltage (
17)) In this case, the output becomes high and is input to the base of the high-voltage control transistor (19), which increases the potential on the low-voltage side of the secondary winding of FBT■, so the high-voltage output voltage also increases. Correction is attempted until the input voltage of the error amplifier (16) and the reference voltage V, (19) become equal.
以上の作用によりst■のスイッチングとは無関係に高
圧電圧出力を一定に保つことが出来負荷変動に対しても
リアルタイムな補正が出来従来の安定化回路は理想より
かけはなれていたのに対し本発明の安定化回路によれば
理想的な高圧安定電源が得られる。又制御トランジスタ
の消費電力についても従来技術はFBTの一次側を制御
しているため一次側二次側の結合ロスが有るためその分
余分に電力を必要としていたが本発明によれは結合ロス
はゼロであり消費電力も少なくてもよい。Due to the above-mentioned action, the high voltage output can be kept constant regardless of the switching of st■, and real-time correction can be made even for load fluctuations.While conventional stabilizing circuits were far from ideal, the present invention According to the stabilization circuit, an ideal high voltage stable power source can be obtained. Regarding the power consumption of the control transistor, the conventional technology controls the primary side of the FBT, so there is coupling loss between the primary and secondary sides, which requires extra power, but with the present invention, the coupling loss is reduced. Since it is zero, power consumption may also be small.
本発明によれば負荷変動の時間的変化に対しても常に一
定電圧の出力を得ることが出来スイッチングトランジス
タの動作状態に無関係に高安定化された高圧出力電圧を
得ることが出来る。According to the present invention, it is possible to always obtain a constant voltage output even when the load changes over time, and it is possible to obtain a highly stabilized high output voltage regardless of the operating state of the switching transistor.
第1図は本発明の一実施例を示す高圧安定化電源の回路
図、第2図は従来の高圧安定化電源を示す回路図、第3
図(a)及び(b)は従来の高圧安定化電源の問題点を
説明するための波形図である。
代理人 弁理士 則 近 憲 佑
同 竹 花 喜久男Figure 1 is a circuit diagram of a high-voltage stabilized power supply showing an embodiment of the present invention, Figure 2 is a circuit diagram of a conventional high-voltage stabilized power supply, and Figure 3 is a circuit diagram of a conventional high-voltage stabilized power supply.
Figures (a) and (b) are waveform diagrams for explaining problems with conventional high-voltage stabilized power supplies. Agent Patent Attorney Nori Chika Yudo Kikuo Takehana
Claims (1)
電流をスイッチングし二次側巻線にて一次側巻線に発生
する電圧を昇圧して高圧電圧を発生させる方式の高圧安
定化電源において、二次側巻線の低圧側に高圧制御用の
トランジスタを配置し、前記トランジスタのベースへ同
一電圧を誤差増幅器にて印加することを特徴とする高圧
安定化電源。 2)前記トランジスタのベースには高圧変動とは逆位相
で同一電圧を誤差増幅器にて印加することを特徴とする
特許請求の範囲第1項記載の高圧安定化電源。[Claims] 1) A method of switching the current flowing through the primary winding using a flyback transformer and boosting the voltage generated in the primary winding with the secondary winding to generate high voltage. A high-voltage stabilized power supply, characterized in that a transistor for high-voltage control is arranged on the low-voltage side of a secondary winding, and the same voltage is applied to the base of the transistor by an error amplifier. 2) The high voltage stabilized power supply according to claim 1, wherein the same voltage is applied to the base of the transistor by an error amplifier in an opposite phase to the high voltage fluctuation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29051987A JPH01133472A (en) | 1987-11-19 | 1987-11-19 | High voltage stabilized power source |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29051987A JPH01133472A (en) | 1987-11-19 | 1987-11-19 | High voltage stabilized power source |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01133472A true JPH01133472A (en) | 1989-05-25 |
Family
ID=17757075
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29051987A Pending JPH01133472A (en) | 1987-11-19 | 1987-11-19 | High voltage stabilized power source |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01133472A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5828790A (en) * | 1981-08-14 | 1983-02-19 | ヤマハ株式会社 | Electronic musical instrument |
JPS62136968A (en) * | 1985-12-11 | 1987-06-19 | Hitachi Ltd | High voltage circuit |
-
1987
- 1987-11-19 JP JP29051987A patent/JPH01133472A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5828790A (en) * | 1981-08-14 | 1983-02-19 | ヤマハ株式会社 | Electronic musical instrument |
JPS62136968A (en) * | 1985-12-11 | 1987-06-19 | Hitachi Ltd | High voltage circuit |
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