JPH01132137A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a highly reliable semiconductor device by electrically connecting the drain region of an N-channel transistor and the power supply potential with a high heat-resistant wiring material, thereby preventing the thermally destruction of the wiring material providing the electrical connection of the drain region of the N-channel transistor and the power supply potential. CONSTITUTION:In a semiconductor device having an N-channel transistor wherein a drain region 2a is connected to the power supply potential and its conduction is controlled by a input signal supplied to a gate 5a, the drain region 2a of the N-channel transistor and the power supply potential are electrically connected by a high heat-resistant wiring material 14. For instance, the high heat-resistant wiring material 14 is of polycrystalline silicon or polycrystalline silicide. Accordingly, even if a surge voltage generated externally of a semiconductor device is added to the power supply potential and applied to an N<+> type drain region 2a through a high heat-resistant wiring material 14 to cause breakdown and heat-generation in the connecting portion of the drain region 2a and the highly heat-resistance wiring material 14, the thermal destruction of the wiring material 14 is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a wiring structure in a semiconductor device.

[Conventional technology]

FIG. 2 is a circuit diagram showing a conventional CMO8 semiconductor device. In the figure, Q and Q2 are N-channel transistors, and these N-channel transistors Q1. Q
2 are connected in series and have a power supply potential V. C and ground potential GND
inserted in between.

Further, the gates of the N-channel transistors Q and Q2 are configured to receive a first input signal S1 and a second input signal @S2, respectively.

Then, an output signal S is output from a node N between N-channel transistors Q1 and Q02. , □ are taken out.

Next, the operation of the semiconductor device configured as described above will be explained. First, the first and second input signals S, S
The case where both 2 are "shi" will be explained. In this case, “L” is applied to the gates of N-channel transistors Q and Q2.
is applied, both N-channel transistors Q and Q2 are cut off, and the output signal S. U□ has high impedance.

Next, the case where the first and second input signals S1.82 are "L" and "H", respectively, will be explained. In this case, "L" is applied to the gate of N-channel transistor RO 1, so this N-channel transistor RO 1 is cut off, and "H" is applied to the gate of N-channel transistor RO 2. As a result, this N-channel transistor RO2 becomes conductive. Therefore, the output signal 5
oU1 becomes "shi".

Next, the first and second input signals S1. The case where S2 is "HPI" and "L" respectively will be explained. In this case, "H1" is connected to the gate of N-channel transistor R1.
1 is applied, this N-channel transistor RO1 is applied.
becomes conductive, and - side, N-channel transistor RO 2 becomes conductive.
Since "SHI" is applied to the gate of N-channel transistor R2, this N-channel transistor R2 is in a cut-off state. Therefore, the output signal 5oU1 becomes H+1.

Note that the first and second input signals S1. Both S2 “
H'' is prohibited from being input to this semiconductor device, and the explanation will be omitted here.

As described above, the first and second input signals S1. The relationship between S2 and the output signal S is summarized as shown in Table 1.

Table 1 FIG. 3 is a sectional view of the device showing the main parts of the circuit shown in FIG. 2. In the figure, reference numeral 1 denotes a P-type semiconductor substrate (hereinafter referred to as "P-type substrate"), and an n+ type drain region 2a of an N-channel transistor RO 1 and an n
A + type source region 3a, an n+ type drain region 2b and an n type source region 3a of the N channel transistor 2 are formed in this order at regular intervals.

In addition, P type substrate 1. An insulating film 4 is formed on the drain regions 2a, 2b and the source regions 3a, 3b, and an inner region of each insulating film 4 corresponding to a region sandwiched between the drain regions 2a, 2b and the source regions wi3a, 3b is formed. Gate regions 5a and 5b are formed. Further, contact holes 6 to 9 are formed in the insulating film 4, and the first A! Wiring 10
is connected to the drain region 2a through the contact hole 6, the second AI wiring 11 is connected to each of the source region 3a and the drain region 2b through the contact hole 7.8, and the third AI wiring 12 is connected to the source region 3a and the drain region 2b through the contact hole 9. and is connected to the source region 3b. Then, an interlayer insulating layer 13 is formed on the first to third AI wirings 10 to 12 and the insulating layer 4. In addition, 1st A! The wiring 10 is supplied with the power supply potential vcc, and the third AI wiring 12
is supplied with the ground potential GND.

[Problem that the invention seeks to solve]

A conventional semiconductor device is configured as described above, and the surge voltage generated outside the semiconductor device is connected to the power supply potential ■c.
When entering c, the surge voltage further increases to the 1st/l wiring 1
0 to the n+ type drain region 2a. At this time, breakdown occurs at the junction between the n+ type drain region 2a and the first AI wiring 10, and the breakdown generates heat in the junction. There was a problem in that the temperature of the connecting beam and the joint portion exceeded the heat resistance limit of the first AJ wiring 10, and the first AI wiring 10 was thermally destroyed.

This invention was made in order to solve the above-mentioned problems, and it prevents thermal damage to the wiring material that electrically connects the drain region of an N-channel transistor to the power supply potential, thereby improving the reliability of semiconductors. The purpose is to obtain equipment.

[Means for solving problems]

The present invention provides a semiconductor device having an N-channel transistor whose drain region is connected to a power supply potential and whose conduction is controlled by an input signal applied to the gate.
The drain region of the channel transistor and the power supply potential are electrically connected by a highly heat-resistant wiring material.

[Effect]

According to the semiconductor device of the present invention, since a highly heat-resistant wiring material is used as the wiring material for connecting the drain region and the power supply potential, a surge voltage generated externally is transmitted to the semiconductor device through the wiring material. By flowing into the drain region, even if heat generation occurs due to breakdown at the joint between the wiring material and the drain region, thermal destruction of the wiring material can be prevented.

〔Example〕

FIG. 1 is a sectional view of a semiconductor device which is an embodiment of the present invention. In the figure, the difference between this semiconductor device and the conventional example is that the power supply potential ■ and the drain regions 2a and C are electrically connected by a highly heat-resistant wiring material 14 such as polysilicon or silicide instead of the first Aj wiring 10. This is what is happening. Note that since the operation of the semiconductor device is the same as the conventional one, a description of the operation will be omitted here.

According to this semiconductor device, the electrical connection between the power supply potential vcc and the drain region 2a is made by the highly heat-resistant wiring material 14, so that the surge voltage generated outside the semiconductor device is at the power supply potential (2). C, and further passes through the highly heat-resistant wiring material 14 to the n+ type drain region 2a1. : Even if breakdown occurs at the joint between the drain region 2a and the highly heat-resistant wiring material 14 and the joint generates heat, the wiring material 14 is prevented from being thermally destroyed. Furthermore, since polysilicon, silicide, or the like is used as the highly heat-resistant wiring material 14, a sufficiently high operating speed can be maintained compared to the case where AI is used as the wiring material.

〔Effect of the invention〕

As described above, according to the present invention, the drain region of an N-channel transistor and the power supply potential are electrically connected by a highly heat-resistant wiring material, so the wiring electrically connects the drain region and the power supply potential. The heat resistance of the material is improved, thermal damage to the wiring material can be prevented, and a highly reliable semiconductor device can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a conventional semiconductor device, and FIG. 3 is a sectional view of a conventional semiconductor device. In the figure, 2a is a drain region, 14 is a highly heat-resistant wiring material, and Q2 is an N-channel transistor. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent: Masuo Oiwa 1st Figure 2a-1-Dosiin Ryohana 14--, It Heat Resistant Distribution Company No. 21 Q2--N Arrogant Tranzosta

Claims (3)

[Claims] (1) In a semiconductor device having an N-channel transistor whose drain region is connected to a power supply potential and whose conduction is controlled by an input signal applied to a gate, the drain region of the N-channel transistor and the power supply potential are connected to each other with high heat resistance. A semiconductor device characterized in that it is electrically connected by a wiring material. (2) The semiconductor device according to claim 1, wherein the highly heat-resistant wiring material is polycrystalline silicon. (3) The semiconductor device according to claim 1, wherein the highly heat-resistant wiring material is polycrystalline silicide.