JPH01131192U - - Google Patents
Info
- Publication number
- JPH01131192U JPH01131192U JP2777588U JP2777588U JPH01131192U JP H01131192 U JPH01131192 U JP H01131192U JP 2777588 U JP2777588 U JP 2777588U JP 2777588 U JP2777588 U JP 2777588U JP H01131192 U JPH01131192 U JP H01131192U
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- register
- memory
- timer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Emergency Alarm Devices (AREA)
- Electric Clocks (AREA)
- Measurement Of Predetermined Time Intervals (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2777588U JPH01131192U (it) | 1988-03-02 | 1988-03-02 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2777588U JPH01131192U (it) | 1988-03-02 | 1988-03-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01131192U true JPH01131192U (it) | 1989-09-06 |
Family
ID=31250564
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2777588U Pending JPH01131192U (it) | 1988-03-02 | 1988-03-02 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01131192U (it) |
-
1988
- 1988-03-02 JP JP2777588U patent/JPH01131192U/ja active Pending
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