JPH01129345A - Multi-processor system - Google Patents

Abstract

PURPOSE:To cause the processing speed of a control system to be the high speed and to improve processing efficiency by eliminating necessity to prohibit the access of a shared memory with the other control system when the processing is stopped since it is allocated to the processing by other interruption while one control system accesses the shared memory. CONSTITUTION:Data control in a ring buffer in the shared memory is executed only by a read pointer and a write pointer, which are provided in the shared memory. Then, concerning the read pointer, the update of the value of the data is executed only by a read side control system and concerning the write pointer, it is executed only by a write side control system. According to the relation between the values of the read pointer and the write pointer, the presence and absence of the space of the buffer and the presence and absence of the data are known and when there is the space of the buffer, or, when there is reading data, an access is executed to an area which is determined in correspondence to the size relation between the values of the read pointer and the write pointer. Thus, the processing is eliminated to prohibit the access to the shared memory to one control system when the other control system starts the access to the shared memory until the access is ended.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a multiprocessor system, and more particularly to a multiprocessor system with improved control over shared memory access.

(Prior art) In multiple independent control systems using processors,
There is a multiprocessor system in which a shared memory is provided and information is sent and received to and from a partner control system via this shared memory. In such a system, the processing related to the exchange of information between two or more independent control systems via a shared memory generally involves the processing of writing the above information into the shared memory in the control system on the receiving side, and the processing of writing the information to the shared memory in the control system on the receiving side. The receiving process is divided into the reading process of the same information from the shared memory in the control system on the receiving side. In addition, in the shared memory, the information (data) to be exchanged is stored in a limited area within the shared memory, and in order to maintain consistency in the exchange of the same information, the number of information in the storage area for this information, the free space of the storage area, etc. It is managed using various management data, such as an area, a pointer indicating the write location for the next write process (hereinafter referred to as write pointer W), or a pointer indicating the read location for the next read process (hereinafter referred to as read pointer R). That's what I do.

On the other hand, in a multiprocessor system, multiple control systems operate independently of each other, so while one control system is accessing the same shared memory (writing or reading information), other control systems may It is unavoidable that the control system of two systems accesses the same shared memory. For example, assume that shared memory information is managed by a read pointer R and a write pointer W, and now, after a control system has written certain information to the shared memory, it attempts to update the write pointer and the shared memory When the updated value of the write pointer W is about to be written to the memory location of the write pointer W in the controller, another reading-side control system performs a read access to the same memory location to refer to the value of the write pointer W. Suppose that a situation like this occurs. When such a situation occurs where reading and writing are performed simultaneously, the state becomes unstable, the updated value of the write pointer W is not stored correctly, and the value read at this point is also not the correct value. Therefore, if such a situation occurs, the subsequent management of information in the shared memory will not be performed correctly. Generally, such a phenomenon is called memory contention between shared memories, and in order to avoid this memory contention, shared memory exclusion methods such as a mask slave method or an access control method have conventionally been employed.

Here, the mask-slave method refers to one of the multiple control systems as a mask and the others as slaves, and the mask side always has access rights to the shared memory, and the slave side queries the mask for access. This method is based on the results.

Therefore, according to this method, it is possible to prevent both control systems from accessing the same memory at the same time.

In addition, the access controller method is a method that does not establish a master-slave relationship between two control systems and does not give them superiority in access rights.When multiple control systems request shared memory access almost simultaneously, the request In this method, the access right to the same memory is granted to the earlier requester, and after the same access is completed, the access right is granted to the control system that made the request later. Therefore, the control system whose access request is delayed is made to wait until the end of the read or write cycle whose request was earlier.

The mask/slave method and access controller method described above will not be explained in detail here, but they are both configured and controlled by hardware, and as a result,
Although shared memory exclusive processing can be performed, even if these methods are used, loss of consistency of information in the shared memory cannot be avoided. An example will be explained. Generally, in a series of processes, the waiting state of information that is in a waiting state is managed using a ring buffer method. The most common method, cycle check (C/
C) Management of information (data) using a ring buffer method using bits will be described. Here, a ring buffer is a finite area that stores data, and it is managed by connecting the beginning and end of that area, and when it reaches the end, it returns to the beginning, and so on in an endless manner. It is what you use. That is, in the data write process, after writing to the last area of an area, the next write is performed to the first area of the same area. The same applies to reading data. Further, read/write of data in the ring buffer is managed by a read pointer W, a write pointer R, and a cycle check bit. The write pointer points to a writable area in the ring buffer, and its value is updated after data is written to that area. The read pointer points to an area in the ring buffer where data to be read is stored, and its value is updated after the data is read. Here, the cycle check (C/C) bit has values of "0" and "1", and its value is referenced or written in read processing and write processing.

That is, the cycle check bit is rewritten and referenced according to the following rules to manage data in the ring buffer.

First, in read processing, data is read,
When updating the read pointer, "0" is written to the C/C bit when the read pointer is updated from the end of the buffer to the beginning.

Also, in write processing, data is written,
When updating the write pointer, "1" is written to the C/C bit when the write pointer is updated from the end of the buffer to the value at the beginning.

Information in the buffer is managed as follows using the above C/C bit value, read pointer, and write pointer. Here, a state in which there is no data in the buffer is defined as rc/c bit-0 and R-W (read pointer and write pointer values are equal). Further, the state in which the buffer is full with data is given as rc/c bit-1 and R-W-0.

FIG. 5 shows the concept of a ring buffer using C/C bits. In this figure, the size of the ring buffer is M+1 from pointer 0 to pointer M equivalent.
It is shown as having an area of In the initial value, the read pointer, write pointer, and C/C bit each have Ro and W indicating the beginning. and c/c
A value of -0 is given. The processing procedure on the read processing side using these is as shown in the flowchart of FIG. 6(a), and the processing procedure on the write processing side is as shown in the flowchart of FIG. 6(b). Now, in the initial state, for example, a control system that is about to perform a read process uses the same read pointer, write pointer, and C/
When examining the C bit (sl.

S2) If it is R-W-c/e-0, it is determined that there is no data to be read, and data reading is not performed.

Furthermore, when the control system that performs write processing checks the read and write pointers and C/C bits in the same way as the read processing side in order to write data when executing this processing (s 11. s 12), R-W , c/c-〇, it is determined that there is an empty area in the buffer (data can be written), and the data is written to the area of the ring buffer pointed to by the write pointer W (513), and then, Update the same light pointer. This means that the value of the write pointer W in sl4 is the maximum value WM
Check whether it has reached or not, and if it is not equal, sl
5, W is incremented to update this value, and in step 814, if the maximum value WM has been reached, W is set to 0 and the write pointer is updated (s 1B). Therefore, on the write processing side, data cannot be written (R-W and c/c =
Until 1) is encountered, data can be written to the area pointed to by the write pointer and the write pointer can be updated. Then, when the write pointer reaches WM (value indicating the end of the area) (s 14) and is updated from WM to Wo (value indicating the beginning of the area) (s 1B),
Write the value "1" to the c/c bit (s17). On the other hand, when the read processing is rR-W and not c/c-0 (sl.

s2), data is read from the area pointed to by the read pointer R (s3). Each time this data is read, the value of the read pointer reaches the maximum value R.

While checking whether the read pointer R has been reached (s4),
is incremented and updated (s5), but when the value of the read pointer reaches the maximum value RM, RM is changed to the leading value R.
8 (s6), and further sets the c/e bit to "0" (S7).

In this way, in a ring buffer using e/c bits, the values of read pointer R1 and write pointer W are compared, and when they are equal (wNmRN), the e/c bits are referenced and e/e -1. If so, writing is disabled, and in other cases, data can be written to the area pointed to by the write pointer. However, by applying such an access control method, data in shared memory can be
In a system managed by a ring buffer using the /C bit, data integrity may be lost as described below. This poses a major problem when specific information is sent and received in one direction from one control system to another. Note that the read pointer and write pointer each point to the maximum value of the buffer, and the C/
The case where the C bit is rOJ will be described.

That is, in this state, RM-WM.

Since it is c/c-0, it means that there is no data in the buffer. In this state, if the write process is started in the write side control system, the write process will be started in the 6th control system.
Write processing is executed as shown by ■→■→■ in the figure. Assume that while this process is being executed, there is an interruption of a process other than the write process that has a higher priority level than the write process in the write side control, and the write process is interrupted and executed. Assume that this point is exactly at point A in the write processing flow. As a result, the write processing flow is interrupted at point A, but if read processing is started in the read-side control system during this interruption, the read, write pointer, and C/C Each of the bits is R-RM, W-0,
Since it is c/c -o, the read process can be performed by executing ■゛-■'. If processing is performed up to the start point, at this point the read, write pointer, and c/c bits are R-0, W-WM, and C/, respectively.
The result is C-0, and the reading ends. If the write process is restarted from point A at this point, the write process will start executing the process of setting c/e to "1". Therefore, the states of the read and write pointers and the C/C bit become R-W-0, c/c-1 at the end of the process after write process A. According to the previous rule, rR-W-0,c/c-IJ means that the data is full, but since reading has finished, there is actually no data in the buffer. I haven't. Therefore, under this situation, writing becomes impossible. This updates either the read pointer or the write pointer in one control system, and
This phenomenon occurs when an interrupt from another control system occurs during a series of processing to rewrite the /C bit.

Therefore, in order to avoid such a phenomenon, when one of the control systems is executing the above series of pointer and C/C bit rewriting processing, the other control system must prohibit access to the shared memory. I had to let it happen.

(Problems to be solved by the invention) -As mentioned above, in a multiprocessor system,
In a system that applies an access control method to shared memory access and manages shared memory data using a ring buffer using C/C bits,
Compare the values of read pointer R1 and write pointer W, and when they are equal (WN - RN), refer to the c/c bits, and if c/c -1, write is not possible, otherwise write pointer It is possible to write data to the area pointed to by . The C/C bit is set to ``0'' when the read pointer is updated from the end of the buffer to the beginning, and set to ``1'' when the write pointer is updated from the end of the buffer to the beginning. There is. Therefore, if, for example, during a write process, the process moves to another process due to an interrupt, and a read is performed in the other control system during that time, the value of the read pointer will change, so the value of the read pointer and write pointer in one control system will change. If this is interrupted in the middle of the process of updating the C/C bit and rewriting the C/C bit, if another control system accesses the ring buffer during this time, in the worst case, subsequent access to the shared memory will be interrupted. There is a danger that things will go wrong. Therefore, while one control system is accessing the shared memory, other control systems are prohibited from accessing the shared memory, but that control system shifts to processing for interrupts higher than the shared memory access. , even though no shared memory is accessed at all.
Since other control systems cannot access the shared memory, they have to keep waiting, which has the disadvantage of slowing down the processing speed of the system and reducing processing efficiency.

Therefore, an object of the present invention is to prevent a shared memory access by a multiprocessor from occurring when one control system is accessing the shared memory and its processing is redirected to processing by another interrupt and interrupted. To provide a multiprocessor system that eliminates the need for the control system to prohibit access to shared memory, thereby increasing the processing speed of the control system and improving processing efficiency. be.

[Structure of the invention]

(Means for Solving the Problems) That is, in order to achieve the above object, the present invention is configured as follows. That is, a plurality of independent control systems, a common storage means that is used as a ring buffer with a predetermined capacity and can read and write information from the control system, and a plurality of storage devices in the same storage area within the storage means. In a multiprocessor system, the multiprocessor system includes an arbitration unit that arbitrates to prevent simultaneous access by control systems, wherein the storage unit is provided with an area for storing a write pointer and a read pointer of the ring buffer, and each control system has an area for storing a write pointer and a read pointer of the ring buffer; When writing information to the ring buffer of the means, the value W of the write pointer and the value R of the read pointer are read from the storage means, and these are r(W<R) and at least (W-R-1)J or r. (W≧R) and (R-0) and (W-pointer maximum value)", the write information is written to the area in the ring buffer indicated by the write pointer, and the value W of this write pointer is When reading information from within the ring buffer, the values of W and R are read from the storage means, and when they satisfy the condition R≠W, the read pointer is updated to a value corresponding to the next write position. The structure has an added function of reading the storage information of the corresponding area of the ring buffer shown and updating the read pointer to a value corresponding to the next read position.

(Function) In such a configuration, information in the ring buffer in the shared storage means is managed only by the read pointer and write pointer provided in the storage means, and their values are updated by reading the read pointer. This is performed only by the processing side control system, and the write pointer is performed only by the write processing side control system. Then, based on the relationship between the values of the read pointer and write pointer, it is possible to determine whether there is enough buffer space or whether there is data. access to the area determined by In this way, the buffer capacity and the presence or absence of data are known according to the relationship between the values of the read pointer and write pointer, and the read/write is controlled, and the read pointer is updated by the read processing system.
Since the write pointer is updated by the writing processing system, confusion will occur if one control system accesses (reads or writes) the storage means between the accesses (writes or reads) of one control system. , so that
When one control system starts accessing the storage means, the process of prohibiting the other control system from accessing the storage means until the access is completed becomes unnecessary, and this makes it possible for multiple control systems to It has become possible to access the storage means at regular intervals without conflict, and it is no longer necessary to wait until the control system that has gained access rights has completely finished accessing the storage means, as in the past. This has the advantage that it is possible to avoid such situations where the system cannot be used, to improve the execution speed of the system, and to greatly improve the efficiency of each control system.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

This device uses a ring buffer management method that replaces the ring buffer method using cycle check bits.The shared memory is equipped with a ring buffer, a write pointer, and a read pointer, and the write pointer is data that manages information in the ring buffer. The value W of the write pointer for the read pointer is updated only in the write side control system, and
A feature is that the value R of the read pointer is updated only by the control system on the read side. In write processing on the ring buffer, a rule is established that allows data to be written up to two areas before the area pointed to by the read pointer. That is, the conditions for not permitting writing are determined as, for example, when rW<R, W-(R-1)J, and [When W>=R, R=0, W-WMJ. When such conditions are not met, the write process enables data to be written to the area pointed to by the write pointer, and updates the write pointer after the write is executed. Further, in read processing, when R-W, it is defined that there is no data, and reading is not possible under this condition. Therefore, in read processing, data can be read from the area pointed to by the read pointer under conditions other than those described above. In read processing, the read pointer is updated after data is read.

The details will be explained below. FIG. 1 is a block diagram showing one embodiment of the present invention. In this figure, two mutually independent control systems CCI, CC2 and these control systems CCL, C
C2 to the respective data buses B1. Shared memory COM accessed via B2, control system CCI,
A shared memory arbitration device C0NT that controls so that there is no conflict when CC2 accesses the shared memory COH, a control system CCI, signal lines R1 and R2 that transmit signals for CC2's access to the shared memory COH to the shared memory arbitration device C0NT, A signal line w1. which transmits a standby signal to one of the control systems when simultaneous access to the shared memory COM occurs. W2, and a signal line C1 that transmits a control signal to the shared memory COH in order to enable access to either control system that can access the shared memory COH.

Figure 2 shows the control system CCI installed in the shared memo 900M.
, indicates a buffer for data transmitted to and from CC2. This buffer has an area size of 0 to M.
+1 is secured, the beginning is BUFTOP, the end is B
It shall be indicated by UPEND. Also, RE is used as an area for storing the values of read pointer and write pointer for managing data in this buffer.
DPNT and WITPNT are provided. Also, REDP
Here, the size of each area of NT and νITPNT is, for example, 1 byte.

Below, the buffers (BUETOP-BUFEND, REDPNT) in the shared memory 900M are sent from one control system CC2.
, νITPNT) to the control system CC1 will be explained in detail.

FIG. 3 is a control flow of data write processing in the control system. In FIG. 3, the values of the read pointer and write pointer are R,! =W, and WM is a flow when the write pointer points to the end position BUPEND of the shared memory COH. In this figure as well, similarly to FIG. 3, the write processing flow of the control system CC2 for the read pointer and write pointer will first be explained using FIG. In the control system CC2, when data to be transferred to the shared memory COH occurs, the control system CG2 activates its own software, the shared memory write processing module.

In this write processing module, first, in order to check whether data can be written to the shared memory COH, the access arbitration device C0NT is sent to read the values of the read pointer and write pointer of the buffer in the coexistence memory 900M from REDPNT and νITPNT. A shared memory access request signal is sent via signal line R2.

Upon receiving the shared memory access request signal from the control system CC2, the access arbitration device C0NT checks whether the other control system CCI is accessing the shared memory CON. As a result, if the other control system CC1 is not accessing the shared memory COM, the access arbitration device C0NT sends a control signal to the signal line C1 to enable the control system CC2 to access the shared memory COH via the data buffer B2. Send via.

Furthermore, if the control system CC1 is accessing the shared memory COM, the access arbitration device C0NT
A wait control signal is sent to the control system CC2 via the signal line W2 in order to make the control system CC2 wait for the write process until the read cycle or write cycle for the shared memory COH ends. The control system CC2 receiving this weight control signal performs R in data write processing.
Execution of the EDPNT or WITPNT read processing routine is stopped. When the read cycle or write cycle for the shared memory COH of the control system CCI ends, the access arbitration device C0NT sends a wait release control signal to the control system CC2 via the signal line W2 in order to release the above-mentioned wait. At the same time, a control signal is sent to the shared memory COM via the signal line C1 so that the control system CC2 can access the shared memory COH via the data buffer B2. Upon receiving this wait release control signal, the control system CC2
resumes execution from the routine that had stopped execution.

The access arbitration device C0NT is a device that arbitrates accesses to the shared memory COM between the control systems CCI and CC2 to avoid contention, and is a component that plays an important role in the present invention, but this access arbitration device itself is conventional. It is widely used. In the following explanation, when both the control system CCI and the control system CC2 access the memory Cf)M, the access arbitration device C0NT always functions, and the access conflict between the control systems CCI and CC2 to the shared memory COH is prevented. The access arbitration device C in each process is arbitrated so that there is no
A description of the action of 0NT will be omitted.

The control system CC2 reads the read pointer and write pointer values from the shared memory COM REDPNT and ITPNT from the access arbitration device C0NT, respectively, and compares the two values (step 541). Assume that as a result of the comparison, W≧R. Next, the control system CC2 checks the value of the read pointer (step 542). Assume now that the value of the read pointer is rOJ. At this time, the control system CC2 checks the value of the write pointer (step 54).
3). As a result, when the write pointer points to the end of the buffer, it is determined that the buffer is full of data, the control system CC2 gives up writing data, and ends this write process. Write processing and exit. If the pointer does not point to the end of the buffer, control system CC2
writes data from the i BUPTOP area of the buffer to the area indicated by adding the value of the write pointer (step 544). After that, the control system CC2 writes a value obtained by incrementing (+1) the value of the write pointer to the WITPNT area in order to update the value of the write pointer. Further, in step s42, when checking the value of the read pointer, if the value of the read pointer is R>0, the control system CC2 writes data to the area indicated by the value of the write pointer counting from BUPTOP (step 546). Next, check whether the value of the write pointer points to the end of the buffer (step 547).
. As a result, if the value of the write pointer points to the end of the buffer, the value of the write pointer is set to "0".
(step 848). Furthermore, if the value of the write pointer does not point to the end of the buffer, the value of the write pointer is incremented (step 549). In this way, the value of the updated write pointer is WITP
Written to the NT area.

Next, a case where the read pointer and write pointer are compared in step s41 and the values of both are W<R will be described. In this case, the control system CC2 next checks whether the write pointer is pointing to an area 1 area before the read pointer (step 550).
. At this time, if it is W-(R-1), the control system CC2 determines that the buffer is full, knows that data cannot be written, and ends the write process. Also, when W≠(R-1), the control system CC2 is BUPT
Data is written from OP to the area indicated by the value of the write pointer (step 551). Next, increment the current light pointer value to update the light pointer,
Write to WITPNT (step 552).

The control system CC2 ends with the above processing.

As described above, the control system CC2 performs data write processing to the shared memory COM only to update the value of the write pointer among the read pointer and write pointer, which are the management data of the shared memory buffer. Then, if the end of the buffer is written, the update is performed at the beginning of the buffer, otherwise the update is performed with an incremented value. Then, it is checked whether the write pointer points to the area one area before the read pointer, and W-(
R-1), it is determined that the buffer is full, the write process is ended without writing data, and W≠(
R-1), the control is to write data to the area counted from BUPTOP and indicated by the value of the write pointer.

Next, in order to check whether there is a pig from the shared memory COM in the control system, the area R that stores the read pointer and write pointer in the shared memory CON
The values are read from EDPNT and WITPNT and compared (step 561). If the read pointer and write pointer values are equal (R-W
), the control system CCI determines that there is no data in the buffer and ends the read process. Also, when RAW,
The control system CCI checks the magnitude of the read pointer and write pointer values (step 562).

Now, assuming that the magnitude relationship between the read pointer and write pointer values is RAW, the control system CCI reads data from the area pointed to by the value of the read pointer plus the clavicle, starting from the buffer head position (BtlPTOP) (
step 563). Thereafter, in order to update the value of the read pointer, 1 is added to the current value and the value is written in the REDPNT area. Also, if it is RAW, the control system CCI learns the area pointed to by the read pointer from the buffer head position (BUFTOP) plus the clavicle of the read pointer, and reads data from this area (step 585). Then, in order to update the read pointer, it is checked whether the value of the read pointer points to the end of the buffer (step 866).

As a result, if it points to the end (if R = RM)
In order to return the read pointer to the beginning of the buffer, the control system CCI writes "0" to REDPNT.

Furthermore, if it does not point to the end (R≠RM), the control system CCI increments the value of the current read pointer and writes that value to REDPNT. Control system CC
I completes the reading of data from the shared memory through the above processing.

As described above, in the process of reading data from the shared memory in the control system CC1, control is performed so that only the value of the read pointer is updated every time the data is read. Then, if the end of the buffer is read, the update is performed at the beginning of the buffer, and in other cases, the update is performed with an incremented value. When reading data, the value W of the write pointer and the value R of the read pointer are compared, and W-H
When , it is determined that there is no data in the buffer, when W≠R, the magnitude of W and R is compared, when W<H, data is read from the area obtained from the value of R, and when W>H, the buffer is Control is performed so that the data obtained from the area indicated by the value of the read pointer R plus the clavicle is read from the beginning.

As detailed above, the data in the ring buffer in the shared memory is managed only by the read pointer and write pointer provided in the shared memory, and their values are updated only by the read-side control system. ,
The write pointer should be handled only by the write-side control system, and the relationship between the read pointer and write pointer values should be used to determine whether there is buffer space or data. By making accesses to an area determined by the size relationship between the read pointer and write pointer values, one control system accesses the shared memory between the other control system accesses. This eliminates the need to prevent other control systems from accessing the shared memory when one control system starts accessing the shared memory until it finishes. , it is now possible for multiple control systems to access the shared memory at certain intervals within the range where accesses to the shared memory do not conflict. This makes it possible to avoid the situation where you have to wait until the complete completion of the system, improve the execution speed of the system, and greatly improve the efficiency of each control system. You can get the advantage of doing so.

〔Effect of the invention〕

As detailed above, according to the present invention, in shared memory access by multiprocessors, when one control system is accessing the shared memory, its processing is diverted to processing by another interrupt and interrupted. , we have developed a multiprocessor system that eliminates the need to prohibit other control systems from accessing shared memory, thereby increasing the processing speed of the control system and improving processing efficiency. can be provided.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a control system CCI provided in a shared memory. FIG. 3 is a flowchart showing the write processing procedure in the device of the present invention; FIG. 4 is a flowchart showing the read processing procedure in the device of the present invention; Figure 5 is a diagram to explain the conventional ring buffer and its management method.
FIG. 6 is a flowchart showing the management method. CCI, CC2...control system, Bl, B2
...data bus, COM...both memory, C0NT
...Shared memory arbitration device, R1, R2, vL, W2
．． C1-signal line. Applicant's agent Patent attorney Takehiko Suzue Figure 1 REDPNT Ro=Nini=2] 1 Nodeito WITPN
T mouth ==ii Byte Figure 2 [Light late] [Leet °me, i) [Lead, part] (a) Part 6 [Phyto processing]

Claims (1)

[Claims] A plurality of independent control systems, a common storage means that is used as a ring buffer with a predetermined capacity and can read and write information from the control system, and a plurality of control systems in the same storage area within the storage means. In a multiprocessor system, the storage means is provided with an area for storing a write pointer and a read pointer of the ring buffer, and each control system has an area for storing a write pointer and a read pointer of the ring buffer. When writing information to the ring buffer, the value W of the write pointer and the value R of the read pointer are read from the storage means, and if these are "(W<R) and at least (W=R-1)" or "(W ≧R) and (R=0) and (W=maximum pointer value), write the write information to the area in the ring buffer indicated by the write pointer, and set the value W of this write pointer to the next When reading information from within the ring buffer, the values of W and R are read from the storage means, and when they satisfy the condition R≠W, the ring indicated by the read pointer 1. A multiprocessor system comprising: a function of reading storage information in a corresponding area of a buffer; and updating the read pointer to a value corresponding to the next read position.