JPH01127097U - - Google Patents
Info
- Publication number
- JPH01127097U JPH01127097U JP2336088U JP2336088U JPH01127097U JP H01127097 U JPH01127097 U JP H01127097U JP 2336088 U JP2336088 U JP 2336088U JP 2336088 U JP2336088 U JP 2336088U JP H01127097 U JPH01127097 U JP H01127097U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- alarm signal
- signal
- output
- alarm
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Description
第１図は本考案のアラーム信号送受回路の一実
施例の構成を示すブロツク図、第２図は従来のア
ラーム信号の送受を説明する図である。
図において、１はアラーム信号回路、２は信号
レベル検出回路、１０はアラーム信号出力回路、
１１は出力トランジスタ、２０はアラーム信号受
信回路、Ｐはアラーム信号回路の出力端子、Ｑは
アラーム信号受信回路の入力端子、Ｒ，ＲＯは抵
抗を示す。
FIG. 1 is a block diagram showing the configuration of an embodiment of the alarm signal transmitting/receiving circuit of the present invention, and FIG. 2 is a diagram illustrating conventional alarm signal transmitting/receiving. In the figure, 1 is an alarm signal circuit, 2 is a signal level detection circuit, 10 is an alarm signal output circuit,
11 is an output transistor, 20 is an alarm signal receiving circuit, P is an output terminal of the alarm signal circuit, Q is an input terminal of the alarm signal receiving circuit, and R and RO are resistances.
Claims (1)
子Ｐに接続するオープンコレクタ形式でアラーム
信号を出力するアラーム信号回路１と、該アラー
ム信号回路１の前記出力端子Ｐとアース間に所定
の抵抗ＲＯを接続してなるアラーム信号出力回路
１０と、前記アラーム信号出力回路１０の出力に
接続されるアラーム信号受信回路２０の入力端子
Ｑと電源供給線間に接続された電源接続抵抗Ｒと
、該入力端子Ｑに入力する信号の電圧レベルを検
出する信号レベル検出回路２とを有するアラーム
信号受信回路２０とを備えてなることを特徴とす
るアラーム信号送受回路。 An alarm signal circuit 1 that outputs an alarm signal in an open collector format in which the collector of an output transistor 11 is connected to a signal output terminal P, and a predetermined resistor RO is connected between the output terminal P of the alarm signal circuit 1 and ground. an alarm signal output circuit 10, a power supply connection resistor R connected between the input terminal Q of the alarm signal reception circuit 20 connected to the output of the alarm signal output circuit 10 and the power supply line; An alarm signal transmitting/receiving circuit comprising: a signal level detection circuit 2 for detecting the voltage level of a signal; and an alarm signal receiving circuit 20 having a signal level detection circuit 2 for detecting the voltage level of a signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2336088U JPH01127097U (en) | 1988-02-23 | 1988-02-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2336088U JPH01127097U (en) | 1988-02-23 | 1988-02-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01127097U true JPH01127097U (en) | 1989-08-30 |
Family
ID=31242278
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2336088U Pending JPH01127097U (en) | 1988-02-23 | 1988-02-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01127097U (en) |
-
1988
- 1988-02-23 JP JP2336088U patent/JPH01127097U/ja active Pending