JPH01126778A - Picture information processor - Google Patents

Abstract

PURPOSE:To prevent a picture quality from deteriorating by re-quantizing binarized data, in which a picture concentration is held, to multi-value picture data, and adding a picture editing processing such as a variable power processing to them. CONSTITUTION:A binarizing means 14 forms a binarized data so that the concentration may be preserved from the multi-value picture data. A storing means 15 stores the output of the binarizing means 14. Re-quantizing means 18 forms the multi-value picture data so that the concentration may be reproduced from the binarized data of the above-mentioned storing means 15. Further, variable power means 19 and 20 carry out the enlarging or reducing processing of the picture for the multi-value picture data which are then outputs of the above- mentioned re-quantizing means 18. Switching means 13 and 16 switch the input to the binarizing means 14 to multi-value picture data 100 from the outside or an output 104 from the said variable power means 19 and 20 according to the presence and absence of a variable power requirement.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an image information processing device, and in particular, to an image information processing device that performs affine transformation processing, etc., without impairing the image quality of binarized image data while preserving the density of multivalued image data. The present invention relates to an image information processing device that can perform the following operations.

[Prior Art] This type of device reads a document image etc. using an image sensor such as a CCD, converts it into multivalued image data with 256 gradations using an 8-bit A/D converter, and further performs processes such as dither conversion. Dot O while preserving image density using binarization circuit
The N10FF signal is converted into binary image data and stored in the image memory. When outputting to a printer, binary image data is read out from the image memory, and a grayscale image is reproduced based on the dot density of the dot ON10FF signal. In this case, there is often a need to enlarge or reduce the image and reproduce it. However, conventionally, the image has been reduced by thinning out the bits of the binarized data read from the image memory, or the image has been enlarged by reading the same bit twice.

For this reason, when reducing the image, by thinning out the density, the actual number of gradations is reduced, the image density becomes coarse, and false contours also occur. Furthermore, when enlarging an image, the dots become large and the image quality deteriorates, such as the roughness of the image becomes noticeable. Although there is a method in which the host computer retransmits multivalued image data that has been subjected to scaling processing in advance, it is not appropriate to impose a burden on the host computer.

[Problems to be Solved by the Invention] The present invention eliminates the above-mentioned drawbacks of the prior art, and its purpose is to perform binarization while preserving the density of multivalued image data with a small amount of memory. An object of the present invention is to provide an image information processing device that can perform affine transformation processing and the like without impairing the image quality of image data.

[Means for Solving the Problems] In order to achieve the above object, the image information processing device of the present invention performs binarization to form binarized data from multivalued image data by preserving its density. storage means for storing the binarized data output from the binarization means; and quantization means for reproducing the density from the binarized data in the storage means to form multivalued image data; A scaling means for enlarging or reducing the image on the multivalued image data output from the quantization means; The general idea is to provide a switching means for switching to multivalued image data.

Preferably, one aspect of the binarization means is to form binarized data from the multivalued image data by an error diffusion method so as to preserve the density thereof.

[Operation] In this configuration, the binarization means forms binarized data from the multivalued image data in a manner that preserves its density. Preferably, the binarization means forms binarized data from the multivalued image data by an error diffusion method so as to preserve the density thereof.

The storage means stores the binarized data output from the binarization means. The quantization means reproduces the density from the binarized data in the storage means to form multivalued image data.

The scaling means performs image enlargement or reduction processing on the multivalued image data output from the quantization means. The switching means switches the manual input to the binarizing means to the multivalued image data from the outside or the multivalued image data output from the scaling means, depending on the presence or absence of a scaling request.

[Description of Embodiments] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of an image information processing apparatus according to an embodiment. In the figure, 10 is an input sensor including a photoelectric conversion element such as a CCD, which scans and reads an original image. 1
Reference numeral 1 denotes an A/D converter, which converts an analog image signal read by a CCD into digital image data of, for example, 8 bits (256 gradations). Reference numeral 12 denotes a correction circuit that performs shading correction for unevenness in sensitivity of the CCD sensor, unevenness in illuminance of the illumination light source, etc. 13 and 16 are switches for switching the flow of image data. Reference numeral 14 denotes a binarization circuit which binarizes the multivalued image data using an error diffusion method. Reference numeral 15 denotes an image memory capable of storing binarized data for one page of the original. Incidentally, the image memory 15 actually has a memory capacity for two pages of the original, and can read and rewrite the binarized data at the same time.

Reference numeral 17 is a binary printer which forms a grayscale image using 0N10FF of printing dots. Reference numeral 21 denotes a controller which controls switching of switches 13 and 16 in response to an external command as to whether or not to perform image scaling processing. That is, when normal printing is performed and no scaling processing is performed, the switch 13 is connected to the terminal sl side, and the switch 16 is connected to the terminal 83 side. Further, when performing magnification processing, the switch 13 is connected to the terminal s2 side, and the switch 16 is connected to the terminal S4 side. A requantizer 18 requantizes the binary data into multivalued image data. Reference numeral 19 denotes a scaling circuit, which performs image enlargement or reduction processing on the multivalued image data output from the requantizer 18.

Reference numeral 2o denotes a magnification setting device, which sets a magnification ratio (2x, 1/2, etc.) for the magnification changing circuit 19.

With this configuration, the scaling process of the embodiment reads the binarized data from the image memory 5, inputs the binarized data to the requantizer 18 via the terminal S4 of the switch 16, and converts the multivalued image data. Restore.

The scaling circuit 19 performs scaling processing on the multivalued image data according to the setting value of the scaling factor setter 2o. The multivalued image data subjected to scaling processing is converted into two by the binarization circuit 14 via the terminal s2 of the switch 13.
The image is converted into a value and stored in the image memory 15. Therefore, an image that has been subjected to processing such as scaling can be easily formed without bothering an external host computer or the like.

FIG. 2 is a block diagram showing details of the requantizer 18 of the embodiment. In the figure, binarized data read from the image memory 15 is shifted into line buffers 20 to 22 through a terminal 102. This binarized data is processed using the error diffusion method (Figure 7), which will be described later, using the read multivalued image data.
The image is binarized and stored in the image memory 15. The line buffers 20 to 22 are, for example, FIFO (
It consists of a dual-port SRAM of the First In First Out) type. line buffer 20
~22 stores the bit data for three lines of the image, and at the timing of the next one pixel clock, the line buffer 20
The output of line buffer 21 enters latch 23a, the output of line buffer 21 enters latch 23d, and the output of line buffer 22 enters latch 23g.

Furthermore, at the timing of the next one pixel clock, the latch 23a
, 23d, and 23g are connected to latches 23b and 23e, respectively.
, 23h. Furthermore, at the timing of the next one pixel clock, the outputs of latches 23b, 23e, and 23h are latched by latches 23c, 23f, and 23i, respectively. In this way, at a certain timing, the latches 23a to 23i have 3
The binarized data of the X3 pixel matrix is input to the adder 24.
calculates the sum by adding the logic "t" level bits in the matrix. As a result, the density of one block is 10
Although not shown, the re-quantizer 18 is, for example, 255 levels (0 to 9).
The multivalued image data is requantized by multiplying by gradation/9. In this way, multivalued image data for one pixel was reproduced from binary image data for 3×3 bits. This has a meaning similar to the average value of the density stored in the 3×3 bit area, and is not a strict reproduction of the original multivalued image data. At the timing of the next 1 pixel clock, the latch 23a
The contents of .about.23i are shifted to the right by 1 bit and the multivalued image data of the next pixel is requantized. In this way, multivalued image data is formed while the density of the binarized data is preserved.

FIG. 3 is a block diagram of the variable magnification circuit 19 according to the embodiment. In the figure, requantized multivalued image data is input from a terminal 103. The line memory is 2, 31a and 31b.
Two are prepared, and while one is writing requantized data, the requantized data that has already been written is read from the other. For example, in a certain phase, the requantized data input to the terminal 103 is transferred to the selector 30.
is written into the line memory 31a.

On the other hand, the requantized data read from the line memory 31b passes through the selector 32 and is input to the binarization circuit 14. In the next phase, the line memory 31a is read,
The line memory 31b is written. HSYNC is a synchronization signal for each line of image data, and is used to switch the selection of selectors 30 and 32. A clock generator 33 generates various timing clocks. Clock signal φ. is a basic pixel clock signal, which is used as a clock signal for writing data to the line memories 31a and 31b. Clock signal φ1 is a clock signal for reading data from line memories 31a and 31b. The clock signal φ2 is a clock signal for writing data into the image memory 15. The clock signal H1 is a line advance clock signal for the image memory 15, and the frequencies of these various clock signals are manipulated to perform image scaling processing.

FIG. 4(A) shows a 50% image obtained by the variable magnification circuit 19 of the embodiment.
It is a timing chart at the time of reduction.

In the figure, the frequency ratio is φ1=2φ. The requantized image data is read out from the line memory using the clock signal φ1, and φ2=φ. By writing into the image memory 15 using the clock signal φ2, the requantized image data is thinned out in the main scanning direction, and image reduction is performed. Also, H, = 1/
2 By performing line advance in the image memory 15 using the Hsync clock signal, requantized image data is written in the same line in the image memory 15, and the previously written data is spaced in the sub-scanning direction. drawn,
Image reduction is performed.

FIG. 4(B) shows an image 200 produced by the variable magnification circuit 19 of the embodiment.
It is a timing chart at the time of % enlargement.

In the figure, φ1-φ. The image data read out using the clock signal φ1 is φ2 to 2φ. The data is written into the image memory 15 using the clock signal φ2.

As a result, the same data is written twice and enlarged in the main scanning direction. Further, by advancing the line of the image memory 15 using the clock signal H1 of H1=2Hsync, expansion in the sub-scanning direction is performed. When enlarging or reducing other magnifications, a binary rate multiplier, digital differential analyzer (DDA), etc. is used to generate a clock signal φ1. By giving H1,
Any magnification is possible.

FIGS. 5A to 5C are diagrams schematically showing modes of magnification change in the main scanning direction. FIG. 5A shows the image at the same magnification, and the requantized image data is written into the line memory 31a or 31b and the image memory 15 at the same rate. Figure 5 (B
) is the time of 50% reduction, and the requantized image data is thinned out when it is written into the image memory 15 from the line memory 31a or 31b. FIG. 5(C) shows the state at 200% enlargement, and the requantized image data is stored in the line memory 31a or 3.
When writing from 1b to the image memory 15, it is written twice.

FIGS. 6A to 6C are diagrams schematically showing modes of magnification change in the sub-scanning direction. FIG. 6(A) shows the image at the same magnification, and one line data is directly written as line data in the image memory 15. Figure 6 (B) shows 50% reduction and 1
The line data is thinned out and written to the image memory 15.

FIG. 6C shows 200% enlargement, and one line of data is written to the image memory 15 in duplicate.

FIG. 7 is a block diagram of the binarization circuit 14 using the error diffusion method according to the embodiment. Multivalued image data XIJ from the correction circuit 12 or the scaling circuit 19 is input to the terminal 100 .

Reference numeral 60 denotes an error buffer memory, which stores the density error εth diffused up to a certain point in time for each pixel. The group of errors 61J to be used in the error buffer memory 60 is manually generated as multi-value image data XIJ by moving the corresponding window 60 by 8 as the Xth number of multi-value image data advances.
follow. A weighting coefficient circuit 61 multiplies the effective error εIJ in the error buffer memory 60 by a predetermined weighting coefficient α by 1 to form a standardized correction value.

FIG. 8 shows the arrangement of the weighting coefficients αkl of the embodiment. If the pixel position in the error buffer memory 60 of the multivalued image data XIJ is set to 66, this position is simultaneously corresponds to the position of

The adder 62 adds the standardized correction value to the manually generated multivalued image data XIJ to form correction data x'.

The above processing is expressed by the following equation.

Σα to 18εInk J+1 Next, the correction data
For example, 128 gradations), the binarization circuit 63
'If IJ≧T4, logic as output data YIJ'
1" level (equivalent to 255 gradations) and outputs X'
If IJ≧T4, a logical °゛0'' level (corresponding to 0 gradation) is output as output data YIJ. In this way, the multi-level correction data X' 1j is binarized. Binarized data YIJ is output to the output buffer. The timing is adjusted at 65 and written to the image memory 15. 64 is an arithmetic unit, and output data YIJ (corresponds to 0 = 0 gradation or 1 = 255 gradation)
By subtracting the correction data X'IJ from
Record at pixel position 66 of 0. By sequentially repeating this operation by advancing the input multivalued image data XIJ pixel by pixel, the binarization process using the error diffusion method is executed.

[Other Embodiments FIG. 9 is a block diagram of an image information processing apparatus according to another embodiment. This embodiment relates to the fact that an image information processing apparatus equivalent to that shown in FIG. 1 can be constructed even by using a general-purpose processor. In the figure, multivalued image data read by an input sensor 91 is binarized by a binarization circuit 14,
Data human interface (I/F) 92, internal bus 9
9 to the image memory 93. Normally, this kind of image data transfer is done using direct memory access (D
This is done using the MA transfer) function. The CPU 90 performs requantization operations on the binarized data in the image memory 93, enlargement or reduction operations on the requantized data, binarization operations on the enlarged or reduced requantization data, etc., and converts the resulting binary data into is written into the image memory 94. Then, the binary data read from the image memory 94 passes through a data output interface 96 and is output to a binary printer 95. Alternatively, the binarized data in the image memory 93 or 94 can be exchanged with an external memory such as a magnetic disk 98 via the data output interface 97.

Incidentally, in the above-described embodiment, the image scaling process was described, but the present invention is not limited to this. It is also possible to perform affine transformation processing including movement, rotation, etc. In addition, for example, after requantizing the initial binary data into multivalued image data, density conversion processing is performed on the multivalued image data. Similarly to the scaling processing described above, editing processing can be performed freely while maintaining the image quality.

[Effects of the Invention] As described above, according to the present invention, two images that preserve image density can be obtained.
Since the quantized data is requantized into multi-valued image data and image editing processing such as scaling processing is added thereto, there is less deterioration in image quality and less memory is required.

Furthermore, it does not cause any trouble to external host computers or the like.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram of an image information processing device according to an embodiment, FIG. 2 is a block diagram showing details of a requantizer 18 according to an embodiment, and FIG. 3 is a block configuration diagram of a variable magnification circuit 19 according to an embodiment. Figures 4(A) and 4(B) are timing charts of scaling processing by the scaling circuit 19 of the embodiment, and FIGS. 5(A) to (C)
6(A) to (C) are diagrams schematically representing the mode of magnification change in the main scanning direction. FIG. 7 is a diagram schematically representing the mode of magnification variation in the sub-scanning direction. FIG. 8 is a block diagram of the binarization circuit 14 according to the present invention. FIG. 8 is a diagram showing the arrangement of weighting coefficients αkl of the embodiment. FIG. 9 is a block diagram of the image information processing apparatus of another embodiment. In the figure, 10...human power sensor, 11...A/D converter, 12...correction circuit, 13 and 16...switch,
14... Binarization circuit, 15... Image memory, 17.
...Binary printer, 18...Requantizer, 19...
A variable magnification circuit, 20...a magnification setting device, and 21...a controller.

Claims (2)

[Claims] (1) Binarization means for forming binarized data from multivalued image data by preserving its density; storage means for storing the binarized data output from said binarization means; and said storage means. quantization means for forming multivalued image data by reproducing the density from the binary data of the quantization means; and a scaling device for performing image enlargement or reduction processing on the multivalued image data output from the quantization means. An image information processing apparatus characterized by comprising: means for converting an image into a binary image; and a switching means for switching input to the binarizing means to external multivalued image data or multivalued image data output from the scaling means. (2) The image information processing apparatus according to claim 1, wherein the binarization means forms binarized data from the multivalued image data by an error diffusion method so as to preserve the density thereof. .