JPH0112452Y2 - - Google Patents

Description

[Detailed description of the invention] This invention is a facsimile image signal transmission method that compresses the image signal required for transmission by transmitting only a signal that skips continuous white lines during continuous transmission of all line information of the image signal. It is related to circuits.

Examples of conventional facsimile transmission data in which image signals on scanning lines of a document are compressed and transmitted are shown in FIGS. 1a and 1b.

In other words, as shown in the conventional method shown in Figure a, one line is divided into n blocks in order to compress and transmit the white portion of the original. In the first block code BLC, a block identification area, that is, an information part, consisting of n bits No. 0 to No. (n-1) is provided corresponding to the n blocks divided above, and the pixels in each block are It is determined whether all the bits shown are white bits only or black bits are included. For example, if the bits showing the pixels in the block are all white, it is set as "1", and when it contains at least one black bit, it is set as "1". A "0" is written in the relevant bit position of the information section, and an information section is provided following the information section in which image information PIX relating only to blocks containing black bits is sequentially arranged. By doing this, a line in which all blocks in one line are all white bits can be expressed only by the block code BLC, so that the information in the white area can be effectively compressed.

The next figure b shows a case in which a line of all white bits (referred to as a white line) is continuous in the conventional method, followed by a line containing black bits. The number of BLCs containing the white lines is the same as the number of white lines, that is, three lines are lined up.

The inventor of the present invention considered that when there are many consecutive all-white lines like this, the number of BLCs can be replaced by bit representation, that is, the number of white lines can be skipped to further reduce the number of lines. .

An object of the present invention is to provide a facsimile image signal transmission circuit that performs white line skipping and compression for a plurality of lines during continuous transmission of white line information of an image signal.

In order to achieve the above object, the facsimile image signal transmission circuit of the present invention divides a predetermined area made up of a predetermined number of lines into a plurality of blocks for each line, so that all bits in each block representing image information are white bits. Construct block identification information for displaying and identifying whether a block contains only black bits or one or more black bits using a bit map arranged in correspondence with each block, and determine whether or not each block contains black bits. In a facsimile image signal transmission circuit that transmits image information of a block including the black bits for each predetermined area, line identification information bits relating to all bits indicating image information within the line are provided for the intra-line block identification information. , for the line identification information bits, a means is provided to create line information indicating whether all the image signal information in the line is white, and when the line is white, the line identification information is replaced with the block identification information of the line. This method is characterized in that image information of a plurality of lines is transmitted by the block identification information related to the line next to the line.

The principle and embodiments of the present invention will be explained in detail below.

FIGS. 2a and 2b are explanatory diagrams of the principle of the present invention. As shown in figure a, there is 1 in the block code BLC.
An information section is provided to indicate whether or not a line has only white bits, followed by an information section consisting of No. 0 to No. (n-1). When the information contains at least one black bit, write “0” in the relevant bit position of the information field. When “0” is written, the black bit is included following the information field as shown in the figure. An information section is provided in which image information PIX related only to the block is sequentially arranged.

In this way, the conventional block code in Figure 1a
An information section indicating whether or not the bits in one line are completely white is added before the information section of No. 0 to No. (n-1) in the BLC, and the line has a block containing black bits. When the information part is set to "0", the information part as the block identification information of the line is set to BLC.
On the other hand, if the line concerned is a white line, block identification information relating to the line next to the line concerned is provided in the information section following the information section in which "1" is written. be.

The next figure b shows an example of four consecutive white lines. "1" in the information section in the first BLC indicates that the first line is a white line, and the information section in the same BLC is block identification information related to the second line, and the information section in the second BLC indicates that the first line is a white line. The "1" in the information section indicates that the third line is a white line, and the information section within the same BLC indicates block identification information related to the fourth line. Therefore, if the next line is also white, the information indicates two consecutive white lines in one block code area BLC.

In this case, using one BLC, the number of skipped white lines is limited to two lines due to the relationship between the time to write and send the image signal to the memory and the recording time on the receiving side. If it can be done quickly, the number of consecutive white lines may be used as the information part. Then, to indicate that the 5th line is not a white line, write “0” in the information section of the 3rd BLC, and
No. 0 to No. (n-1) of the information department within BLC.
Enter identification information to determine whether each block of the line contains black bits. After that, an area section is provided in which image information PIX of blocks including black bits are sequentially arranged.

As exemplified above, when white lines are continuous, they are represented as white skip information of at least two lines each in the information part and the information part.
This can be reduced by half compared to Figure b.

FIG. 3 is an explanatory diagram of an embodiment of the present invention that realizes the above-mentioned principle.

In the figure, the charge-coupled device CCD 11 sets the image signal for one line on the scanning line of the original to, for example, 32 blocks per line and 64 bits per block, and stores the image signal in the screen memory MEM 12 at addresses _A0 to _A10 from the counter 13. Writing and sending are performed. This control is performed by a control device 14 such as a microprocessor, and each control signal for image signal writing PIXW, image signal sending PIXS, and block start (BL0 to BL31) is applied to the counter 13.

In addition, the image signal for one line outputted from the CCD 11 is branched to the all-white line detection circuit 1.
5 and detects the information section shown in FIG. The BLC consisting of the information part and the information part shown in b is edited, recorded in the shift register 17, and outputted to the changeover switch 18.

When the image signal of one scanning line includes black bits, it is input to the block-by-block all-white detection circuit 16, and the block skip (BLSK0 to BLSK31) signals of the information section shown in FIG. 2a and b are sent to the control device. 1
4, edit it in the same way, record it in the shift register 17, and output it to the changeover switch 18. In this way, the information section related to the present invention recorded in the shift register 17 is set at the sending timing.
Receiving ST, image signal sending from control device 14 PIXS
The signal is sent to the counter 13, the changeover switch 18 is switched at a predetermined address, and the signal is combined with the contents of the memory MEM12 to be sent data.

In the above embodiment, a two-line white skip was illustrated for simplicity, but it is also possible to realize two or more white line skips by speeding up the above-mentioned time or by providing a buffer or the like. .

As explained above, according to the present invention, in addition to the conventional white block skip, information on whether one line is white or not is transmitted, and when transmitting the white line information, white line skip of multiple lines is performed. This is how it was done. As a result, it is possible to skip at least two lines with just one BLC, so in the case of originals with many white backgrounds, it is possible to significantly compress the facsimile transmission data compared to the conventional case of only white block skipping.

[Brief explanation of drawings]

1A and 1B are schematic explanatory diagrams of a conventional example, FIGS. 2A and 2B are explanatory diagrams of the principle of the present invention, and FIG. 3 is an explanatory diagram of an embodiment realizing the present invention. In the figure, 11 is a charge A coupling element CCD, 12 a memory MEM, 13 a counter, 14 a control device, 1
5 is an all-white line detection circuit, 16 is an all-white detection circuit for each block, 17 is a shift register, and 18 is a changeover switch.

Claims (1)

[Scope of utility model registration request] A predetermined area made up of a predetermined number of lines is divided into a plurality of blocks for each line, and all bits in each block indicating image information are either only white bits or only one bit.
Construct block identification information for displaying and identifying whether a block contains black bits using a bitmap arranged in a block-corresponding manner, and determine whether or not each block contains black bits. In a facsimile image signal transmission circuit that transmits image information of a block included in each predetermined area, line identification information bits relating to all bits indicating image information within the line are provided for the intra-line block identification information, and the line identification information is For information bits, a means is provided to create line information indicating whether or not the image signal information in the line is all white, and when a white line is created, the line identification information instead of the block identification information of the line and the line identification information of the line are provided. A facsimile image signal transmission circuit characterized in that image information of a plurality of lines is transmitted based on block identification information related to the next line.