JPH01117776U - - Google Patents

Info

Publication number
JPH01117776U
JPH01117776U JP769888U JP769888U JPH01117776U JP H01117776 U JPH01117776 U JP H01117776U JP 769888 U JP769888 U JP 769888U JP 769888 U JP769888 U JP 769888U JP H01117776 U JPH01117776 U JP H01117776U
Authority
JP
Japan
Prior art keywords
clip
measuring electrode
flat
signal pins
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP769888U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP769888U priority Critical patent/JPH01117776U/ja
Publication of JPH01117776U publication Critical patent/JPH01117776U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
  • Tests Of Electronic Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案を適用して構成される平面実装
形IC用クリツプをプリント配線板上に実装され
たICに装着した状態を示す側面図、第2図はそ
の正面図、第3図は同平面実装形IC用クリツプ
の一部破断斜視図、第4図は従来のIC用クリツ
プの説明図、第5図は平面実装形ICの斜視図で
ある。 2…平面実装形IC、4…IC本体、6…信号
ピン、10…プリント配線板、14…平面実装形
IC用クリツプ、16…クリツプ本体、18,2
0…レバー、26,28…測定用電極。
Figure 1 is a side view showing a flat mount IC clip constructed by applying the present invention attached to an IC mounted on a printed wiring board, Figure 2 is its front view, and Figure 3 is FIG. 4 is an explanatory diagram of a conventional IC clip, and FIG. 5 is a perspective view of a plane mount IC. 2...Flat mount IC, 4...IC body, 6...Signal pin, 10...Printed wiring board, 14...Clip for plane mount IC, 16...Clip body, 18, 2
0...Lever, 26, 28...Measurement electrode.

Claims (1)

【実用新案登録請求の範囲】 複数の信号ピンがIC本体から平面的に突出し
てなる平面実装形IC用のクリツプであつて、 前記IC本体を挟持する手段と前記信号ピンに
対応して配列される測定用電極とを別個に設け、 前記IC本体を挟持したときに前記測定用電極
が前記信号ピンに当接するように構成したことを
特徴とする平面実装形IC用クリツプ。
[Claims for Utility Model Registration] A clip for a flat mount IC in which a plurality of signal pins protrude planarly from an IC body, the clip being arranged in correspondence with means for holding the IC body and the signal pins. 1. A clip for a flat-mounted IC, characterized in that a measuring electrode is provided separately, and the measuring electrode is configured to come into contact with the signal pin when the IC body is held.
JP769888U 1988-01-26 1988-01-26 Pending JPH01117776U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP769888U JPH01117776U (en) 1988-01-26 1988-01-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP769888U JPH01117776U (en) 1988-01-26 1988-01-26

Publications (1)

Publication Number Publication Date
JPH01117776U true JPH01117776U (en) 1989-08-09

Family

ID=31212928

Family Applications (1)

Application Number Title Priority Date Filing Date
JP769888U Pending JPH01117776U (en) 1988-01-26 1988-01-26

Country Status (1)

Country Link
JP (1) JPH01117776U (en)

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