JPH01117652A - Booster circuit - Google Patents

Abstract

PURPOSE:To facilitate designing of an electronic circuit, by providing an output terminal at the joint of first and second capacitor circuits in a booster circuit. CONSTITUTION:A booster circuit comprises switches SW1, SW4 connected in series between terminals 3, 5, a first capacitor circuit 1 comprising a capacitor C1, switches SW3, SW2 having opposite ends connected in series and arranged in parallel with the capacitor circuit 1, capacitors C2-C4 connected in series and having one ends connected to the terminal 5 and the other ends connected to the joint of the switches SW3, SW2 and a second capacitor circuit 2 having terminals 6, 7 connected respectively to respective joints. When power is charged, the switches SW1, SW2, SW4 are turned ON while the switch SW3 is turned OFF so as to charge the capacitors C1-C4 with voltage V. When power is discharged, the switches SW1, SW2, SW4 are turned OFF while the switch SW3 is turned ON and various voltages are taken out as outputs between the terminals 5-7.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a booster circuit, and particularly to an external pressure circuit configured with a switch and a capacitor.

[Conventional technology]

Conventionally, this type of booster circuit has four switches of 8W!, as shown in FIG. ~SW4 and each capacitor C1
, C2, the first and second capacitor circuits 1.2a
It consists of

In FIG. 3, switches SW1. SW2. With SW4 closed and SW3 disconnected, a power supply of voltage 2 is applied between terminals 3 and 4 to charge capacitors C and C2.

In this case, voltage ■ is generated between terminals 5 and 4.

Next K, switch 8W1. SW2. When SW4 is turned off and switch SW3 is connected, a capacitor C is connected between terminals 5 and 4.
, and the charge of voltage V charged on 02 is superimposed, and the voltage ■
This means that a voltage twice as high as that is generated and boosted.

By cascading this circuit in two and three stages, terminals 1 and 2
A voltage that is an integral multiple of the voltage applied during that time can be extracted.

[Problem that the invention seeks to solve]

The conventional booster circuit described above is designed to boost the applied voltage by an integral multiple.

On the other hand, in recent years, in order to improve the accuracy of circuit operation, there are many cases where multiple power supply systems are required, or where a voltage other than an integral multiple of the applied voltage is required, and conventional booster circuits have the disadvantage of not being able to meet these demands. .

An object of the present invention is to provide a booster circuit that can generate voltages other than integral multiples from one applied voltage.

[Means for solving problems]

The external pressure circuit of the present invention includes a first capacitor circuit and a second capacitor circuit that are charged in parallel by the same power source, and when discharging, a switch is switched between the terminal voltage of the first capacitor circuit and the second capacitor circuit. In a booster circuit that superimposes and outputs terminal voltages of capacitor circuits, at least one of the first and second capacitor circuits is connected to at least two capacitors connected in series, and is provided at a connection node of the capacitors. It has an output terminal.

〔Example〕

Next, one embodiment of the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention.

As shown in FIG. 1, switches SW1 and SW4 are connected in series between terminals 3 and 5, and a capacitor C1 has one end connected to the connection node of switches SW and SW4 and the other end connected to terminal 4. a first capacitor circuit 1 consisting of a first capacitor circuit 1, switches SW3 and SW connected in series, both ends of which are connected in parallel to the capacitor circuit 1; one end connected to the terminal 5 and the other end of the switches 8W3 and SW2. a second capacitor circuit 2 comprising series-connected capacitors C2, C3, C4 connected to the connection nodes and terminals 6 and 7 connected to the connection nodes of capacitors C2 and 03 and capacitors C3 and 04, respectively; have.

In FIG. 1, switch SWl is used during charging.

When SW, , SW4 are connected, switch SW3 is turned off, and a voltage V is supplied between terminals 3 and 4, capacitor C
凰~C4 is charged and the voltage between terminals 5 and 4 becomes ■.

Next, during discharging, switch SW1. When SWz and SW4 are disconnected and switch SW3 is connected, capacitor c,
, c, , c, , cl are connected in series in this order.
The voltage between terminals 5 and 4 will be 2v.

Therefore, different voltages can be extracted between the terminals 6 or 7 of the capacitor circuit 2 and the terminal 4, or between the terminals 6 and 7.

FIG. 2 is an equivalent circuit diagram of the embodiment shown in FIG. 1 during discharging.

Now, in Figure 2, capacitor C! +C3+C4v
Set the capacitance of C1 to C2=1μF, C3=2μF, C4=5
μ'' *Ct = 2 p F', and the voltage v'tei
tv, and the voltage between the terminals of each capacitor is ■2. V3. v
4. When V1 is given, the equations (1) and (2) are shown.

2V=V2+V3+V4+V1=22 ---"(1
)=2:5:10:5 ・・・・・・・・・・・・(2
) Therefore, from equations (1) and (2), the voltage between terminals 6 and 4 is 20V, and the voltage between terminals 7 and 4 is 15V, which can be boosted. Further, 5V can also be taken out as the voltage between terminals 6 and 7.

By arbitrarily setting the number and capacitance of capacitors connected in series in this manner, power supplies of various voltages can be created from one type of power supply voltage.

Furthermore, if applied to circuits that do not require drive capability or circuits that operate at high frequencies, it is easy to incorporate them into semiconductor integrated circuits. That is, bipolar or M
An OS transistor may be used, and a junction capacitance or an MO8 capacitor may be used as the capacitor.

In this way, when used in semiconductor integrated circuits, it is not only possible to generate voltages other than integral multiples of the applied power supply voltage, but also to synchronize the timing of one circuit operation by turning on and off transistor switches using software. Multiple types of power sources can also be generated.

Furthermore, by varying the applied voltage according to the timing in the test circuit, it becomes possible to check the voltage characteristics, and it can be used as a verification circuit.

Furthermore, by cascading multiple stages of this circuit, a wider range of voltages can be generated.

In the description of this embodiment, the capacitor circuit 1 has one capacitor, but the capacitor circuit 1 may have a plurality of capacitors and terminals may be provided at their connection nodes.

〔Effect of the invention〕

As explained above, the present invention has the advantage that it is possible to boost the voltage from one power supply voltage to an arbitrary voltage, thereby facilitating electronic circuit design. In addition, by incorporating it into a semiconductor integrated circuit, it is possible to generate a voltage that matches the circuit operation of the load, which has the effect of being widely applicable to electronic circuits in which it is desired to vary the applied voltage depending on the timing.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is an equivalent circuit diagram of the embodiment of FIG. 1 during discharging, and FIG. 3 is a circuit diagram of an example of a conventional booster circuit. 1.2.2a... Capacitor circuit, 3-7... Terminal, C1-C4... Capacitor-i, sW1-SW4...
·switch. Agent Patent Attorney Uchihara Oto1,? KO] de L s large scale each, J ~ 7 edge 1 figure 1 Z again

Claims (1)

[Claims] A first capacitor circuit and a second capacitor circuit are charged in parallel by the same power source, and when discharging, the terminal voltage of the first capacitor circuit and the terminal voltage of the second capacitor circuit are superimposed by switching a switch. In the step-up circuit, the first and second capacitor circuits include at least two capacitors, at least one of which is connected in series, and an output terminal provided at a connection node of the capacitors. Features a booster circuit.