JPH01117477A - Still video camera - Google Patents

Abstract

PURPOSE:To attain highly efficient pickup of a still picture and to save power by clearing an undesired electric charge of an image pickup means attended with the operation of a release operation member, starting a new still picture storage and starting flashing attended with the end of the clearing. CONSTITUTION:The undesired electric charge of an image pickup means 2 is cleared attended with the operation of a release operation member and a new still picture storage is started. Then flashing is started by a flashing device attended with the end of clearing and a recording gate means 22 is made conductive for a prescribed time only after the end of flashing and a picture signal of the image pickup means 2 is read to record a still picture on a recording means 14. After the release operation member is operated, still picture is formed in the image pickup means 2 quickly and the lighting by the flashing device is executed in a very short time and shutter chance is not lost. Thus, the still picture recording with high picture quality is attained while offering power saving.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a still video camera that records still image signals. [Prior Art] Conventionally, as a still image recording device, a video camera is continuously driven to form a video signal periodically (for example, every 1760 seconds), and this video signal is recorded for only one frame. Are known.

[Problem that the invention seeks to solve]

However, since portability is important in such a system, there is a limit to the battery capacity, and it is a practical problem to continuously drive the video camera section before recording.

Furthermore, in conventional devices for recording still images of subjects illuminated by flash devices, devices that emit light in synchronization with the drive of a periodically driven video camera as described above are known; There is no consideration given to power saving even in products.

An object of the present invention is to provide a still video camera that can overcome the drawbacks of the prior art.

[Means for solving problems]

In order to solve these problems, the still video camera of the present invention includes an imaging means for converting a subject image into an image signal and storing it, a recording means for recording the image signal of the imaging means, and the imaging means. Recording gate means provided between the recording means for selectively guiding the image signal of the imaging means to the recording means, and a release for instructing the start of an operation for causing the recording means to record the image signal as a still image. With the operation of the operation member, a flashlight emitting device that illuminates a subject with flash light, and the release operation member, unnecessary charges of the image pickup means are cleared and a new still image accumulation operation is started,
Upon completion of the clearing, the flashlight emitting device starts emitting flashlight, and after completion of reading flashlight emission, the recording gate means is turned on for a predetermined time and the image signal of the imaging means is read out, thereby producing the still image. It has a control means for recording the information on the recording means.

[Effect]

As a result, a still image can be formed in the image pickup means as soon as the release operation member is operated, and the illumination operation by the flash device is performed extremely shortly after the release operation member is operated, so that a photo opportunity can be missed. There is no. Moreover, noise signals generated when the flash device fires or when the image pickup device clears the image are not recorded.
This enables high-quality still image recording.

Hereinafter, the present invention will be explained in detail based on Examples.

FIG. 1 is a block diagram showing an embodiment of a still video camera according to the present invention. In the figure, reference numeral 1 denotes an imaging optical system for forming an object image (not shown), and a solid-state image sensor 2 such as a COD is disposed near the imaging plane of the optical system 1. is provided with a lenticular screen 3 and a color filter 4 for detecting color information of an object. 5
A part of the object light obliquely provided on the optical axis of the imaging optical system 1 is transferred to a photoelectric conversion element 6 provided for detecting the amount of the object light, a focusing plate 7, a beam splitter 8 and a visibility correction device. The solid-state image pickup device 2 and the color filter 4 are constructed as shown in FIG. 2(a).
, shown in (b). In FIG. 2(a), the solid-state image sensor 2 is a photosensitive element (a
In response to the transfer pulse VφP, charges as image signals accumulated in the vertical shift registers (V S r + V S 21...vS
n) transfer game) (TGI,
TG2. -TGn) and a horizontal shift register HS for transferring the image signal stored in the vertical shift register to an output terminal 2e via a buffer amplifier 2d. In the solid-state imaging device, the image signal recorded on the photosensitive element is transferred to the vertical shift register by the transfer pulse VφP, shifted one row upward in the figure by the vertical transfer pulses Vφv+ and Vφv2, and then transferred to the horizontal transfer pulse by the horizontal shift register H8. The image output signal is configured to be transferred one line at a time to the right in the figure by VφH1 and VφH2, and as a result, the image output signal is sequentially read out from each photosensitive element in a predetermined order. The color filter 4 is divided into sections equal to the size of each photosensitive element, and the section Y has a transmission area selected to have spectral characteristics such that a component Y, which is a luminance signal in a standard television system, can be obtained. The section R and section B are color filters selected to have spectral characteristics such that the R (red) and B (blue) component signals of the above method can be obtained. If such a partition is an odd numbered row, it will be Y.
-R-Y-R, and in even rows, B-Y-B-Y. Therefore, for example, the first row of photosensitive elements a+-+
, a2-+ , -It, respectively Y-R-Y-
R-... signal is generated and the second row light receiving element al-2
.

a2-2. aa-z, = it sotL sot
L, B-Y-B-, etc. signals will be generated. Returning to FIG. 1, the output of the photoelectric conversion element 6 is converted by the photometric signal processing circuit 8 into a signal that allows the setting of the accumulation time of the solid-state image sensor from the photometric amount, and is further converted into a signal that can set the accumulation time of the solid-state image sensor. is input.

The accumulation time control circuit 9 receives the above signal and generates a timing pulse CPl for controlling the appropriate light amount accumulation time of the solid-state image sensor determined in accordance with the photometric amount, and inputs it to the synchronization signal generation circuit 10. As shown in FIG. 3, the photometric signal processing circuit 8 and the accumulation time control circuit 9 connect the photoelectric conversion element 6 composed of, for example, a photocell between their inputs.
Operational amplifier 3 with a capacitor 32 connected to the input and output terminals
1, which integrates the amount of light incident on the photoelectric conversion element and transmits the integrated output OPI to the comparator circuit 34; a transistor 33 connected to form a discharge path between the terminals of the capacitor 32; It is formed of a constant voltage circuit 35 for applying a reference voltage to the comparison circuit, and outputs the timing pulse CPl when the output OP+ of the photometric amplifier reaches the reference voltage. The synchronization signal generating circuit 10 generates a transfer pulse VφP to the transfer gate in response to the pulse CP+, and the horizontal and vertical transfer pulses Vlvt, VφV2°VφH1, VφH2 and the like to the solid-state image sensor 2 are sequentially read out. The image signal is reset each time the image signal corresponding to each photosensitive element is read out, and a reset pulse VφR8% is used to prevent the image signals corresponding to each photosensitive element from influencing each other. Furthermore, the transistor 33 is turned on. It not only outputs the pulse VLR for discharging the charge in the capacitor 32, but also controls the timing control of the entire device based on the known basic 20-clock frequency. Reference numeral 11 denotes an image signal processing circuit that receives an image signal read out from the solid-state image sensor 2 and converts it into an NTSC signal, and an example of the configuration of this circuit is shown in FIG. 2 and lO in FIG. 4 are the solid-state image sensor and the synchronization signal generation circuit, respectively;
The arrow CP+ in the figure shows how the accumulation time control signal is input to the synchronization signal generation circuit IO. The signal read from the solid-state image sensor 2 is output via the output terminal 2e, and vertical correlation processing is performed on the luminance signal Y in the signal. For this purpose, the signal corresponding to the section Y in the color filter is read out via the sample and hold circuit 41, the low pass filter 42, the delay circuit 43,
The signal is input to a known vertical correlation processing circuit 48, which includes a delay circuit 44 for delaying one horizontal scanning line (IH), a subtracter 45, and adders 46 and 47, and a luminance signal Yo is output. On the other hand, since the red component R and the blue component B are obtained for each IH, in order to continuously obtain color video signals, samples are provided to extract signals corresponding to sections R and H of the color filter. The R component and the B component are taken out via a hold circuit 49, and further input to a known synchronization circuit 52 via a low-pass filter 50 and a delay circuit 51 that remove unnecessary high frequency components. In this circuit, an R signal is always output from one output terminal, and a B signal is always output from the other output terminal. The luminance component YO, red component R1, and blue component B thus separated are input to a known encoder 53, and as an output of the encoder 53, a so-called N
The TSCi number is output. The NTSC signal that is the output of the image signal processing circuit 11 is input to the first video recording signal generation circuit 12 shown in the figure, where it is converted into a video signal and energized to the magnetic head 13 to record it on an image recording medium 14 such as a video disk. be done. In this example, the image recording medium 14 is a video disk, but the video disk is rotated at a predetermined speed around a rotation axis (not shown) by a motor 16 whose rotation is controlled by a motor drive circuit 15. Image recording is performed on a specific track. For example, about 40 tracks are provided concentrically on the video disc 14, and one image is recorded on each track. In order to record another image, it is therefore necessary to move the magnetic head 13 in the radial direction of the video disk, so a head access mechanism 18 driven by a head access circuit 17 is provided.

The video recording signal generating circuit 12 is as described above (NTSC
An example of a known method for converting signals into video signals is shown in FIG.

Elements in FIG. 5 that are numbered the same as in FIG. 1 have the same configuration and function, and therefore their explanations will be omitted. 60 in the same figure.
61, 62, and 63 are a low-pass filter, a pre-emphasis circuit, an FM modulation circuit, and a bypass filter, respectively, and the luminance signal is processed by these. 6
4 is a band pass filter that separates and extracts the color subcarrier signal of 3.58 MHz, and the output of this filter is connected to the frequency generated by the oscillator 65 and the frequency converter 66'.
The signal is balanced-modulated and processed as a color signal via a low-pass filter 67.

The luminance signal and color signal processed as described above are sent to a mixer 6.
6, amplified by a recording amplifier 67', and supplied to the magnetic head 13 for image recording. Returning to Figure 1, 19 is linked to pressing the release button.
A one-shot circuit that outputs the release pulse CPO.
The output of the one-shot circuit is connected to the synchronizing signal generating circuit 1O via an OR gate 20, and the synchronous signal generating circuit 10 is activated by the release pulse CPo. Reference numeral 22 denotes a gate circuit whose input section P is connected to the output terminal of the video recording signal generation circuit and transmits the video signal to the head 13, and the control input terminal of the gate circuit is connected to the output terminal of the accumulation time control circuit 9 and It is connected to the synchronizing signal generating circuit 10 and applies the video signal to the head 13 in response to the output pulse CPI of the control circuit 9. Also, 21 is continuous shooting and 1
A mode switch for selecting and switching the frame photography mode; when connected to contact (a), continuous photography mode is selected, and when connected to contact (b), single frame photography mode is selected. Note that the synchronization signal generation circuit 10 operates in the gate circuit 2 until the release button is released during continuous shooting mode.
2 is held in the open state, and in the single-frame shooting mode, outputs a control signal to close the gate circuit 22 when a video signal corresponding to the image signal of one screen is recorded on the recording medium 14. It is structured like this.

Next, the operation of the first embodiment of the present invention shown in FIGS. 1 to 5 will be explained with reference to the waveform diagram in FIG. 6. First, a case will be described in which the switch 21 is connected to the contact point (a) and continuous photographing is performed. It is now assumed that a power switch (not shown) is turned on and the multiple circuits are in a power supply state. In this state, the motor drive circuit 15 is operating, the motor 16 is rotating at a predetermined speed, and the image recording medium 1
4 is rotating at a constant speed. On the other hand, at this time, as will be described later, the signal CP+ is not yet output and the gate circuit 22 is closed, so the head 13 is not energized, so no image signal is recorded on the recording medium 14. When the release button (not shown) is pressed in this state, the one-shot circuit 19 is activated by the switch linked to the button, and the sixth
As shown in FIG. 2B, a pulse CPo with an extremely short pulse width is output at the release time tl, and is transmitted to the synchronizing signal generation circuit lO via the OR gate 20.

The synchronization signal generation circuit becomes activated in response to the pulse CPo, and generates a signal for controlling the readout operation of the charge accumulated in the solid-state image sensor, that is, an image signal, and the image signal processing circuit 11 as described above. A signal for controlling the operation of the video recording signal generation circuit 12 is output, and an image signal readout operation is started.

That is, when the pulse CPo is input to the synchronizing signal generating circuit IO, the circuit first outputs the transfer pulse VφP shown in FIG. It is turned on for a very short time, instantly discharging the charge accumulated in the capacitor 32, and setting the capacitor 32 to its initial state. At the same time, the transfer pulse VφP is transmitted to the transfer gates TGI to TGn in FIG. 2(a), and the charges accumulated in each photosensitive element are transferred to the vertical shift register at time t2 and recorded on the solid-state image sensor 2 before release. The image signal that was displayed is stored. Therefore, the solid-state image sensor returns to its initial state at time t2, and at time t2, the photosensitive element starts accumulating a new image signal. Furthermore, as described above, when the charges accumulated in the photosensitive element before the release are transferred to the vertical shift register, the aforementioned signals VφH1, Vφ82゜■φv+,
VφV2. An image signal that is time-seriesized by VφLR as described above is outputted from the output end 2e, inputted to the image signal processing circuit 11 and the video recording signal generation circuit 12, and converted into a video signal, and the video signal is sent to the head 13. transmitted,
A video signal corresponding to the image signal is recorded on the image recording medium 14, but as mentioned above, the accumulation time control circuit 9 has not yet outputted the signal CP and the gate circuit 22 is in the closed state. Since the head 13 is not energized and the video signal is not transmitted, the video signal is not recorded onto the image recording medium 14. On the other hand, as described above, at time t2, capacitor 32 in FIG. 3 is reset to the initial state and transistor 33 is turned off, so that charging of capacitor 32 is started after time t2. The charging speed of the capacitor 32 depends on the time constant determined by the impedance of the photoelectric conversion element 6, and the impedance corresponds to the brightness of the object, so the output voltage of the operational amplifier 31 is as shown in FIG. ), and when this voltage reaches the reference voltage from the constant voltage circuit 35, the comparator circuit 34 is inverted at time t3, and the voltage shown in FIG. 6(c) is output. An output signal CP+ is output as shown in FIG. The output signal CP+ is passed through the OR gate 20 and the synchronization signal generation circuit 10 shown in FIG.
The charge as an image signal is converted into the transfer pulse VφP, transmitted to the transfer gates T G r - T G n of FIG. is transferred to the vertical shift register, and the charge accumulation operation of the solid-state image sensor for the image is completed. In other words, the exposure time is controlled by the photometric signal processing circuit 8 and the accumulation time control circuit 9 based on the brightness of the subject. That is, the accumulation time of the image signal for the image of the solid-state image sensor changes depending on the brightness of the object. When the object is bright, the impedance is low and the capacitor 32 is quickly charged, so the timing at which the comparator circuit is inverted becomes faster, resulting in a shorter storage time. On the other hand, when the object is dark,
If the impedance is high (the capacitor 32 is charged slowly, the timing at which the comparator circuit inverts is delayed, resulting in a long accumulation time),
The image signal from the solid-state image sensor 2 is maintained at an appropriate exposure level, and is prevented from becoming saturated or a minute gap signal.

As described above, when the image signal reaches the appropriate exposure level, the output signal CP+ is generated from the comparator circuit, and the image signal, which is controlled to the appropriate exposure level of 0 level by this signal, is transferred to the vertical shift register. , that is, it will be stored.

Further, the output signal CP1 generated at time t3 when the image signal storage operation is completed is transmitted to the gate circuit 22 in FIG. It becomes open. Therefore, the head 13 is energized for the first time after the time t3. Therefore, after t3, the video signal corresponding to the image signal outputted in time series by each signal from the synchronization signal generation circuit 1O, that is, the image signal of the appropriate exposure level accumulated between time points t2 and t3, is sent to the head 13. is applied to the recording medium 14, and one image is recorded on the recording medium 14 track at an appropriate exposure level, and the one-image photographing operation is completed. On the other hand, as described above, the transistor 33 in FIG. 3 is turned on instantaneously by the inverted pulse VLR of the signal VφP generated at time t3, so the capacitor 32 is reset every time the image signal accumulation operation of the solid-state image sensor is completed. Therefore, the image signal accumulation time control operation for the next image to be captured is restarted after the image accumulation operation is completed, and the image signal accumulation state of the solid-state image sensor is returned to the initial state each time it is transferred to the vertical shift register. Since it has recovered, the accumulation time control described above is repeated, and the level control of the image signal and the recording operation of the image signal to the recording medium 14 are continuously performed for each screen until the release button is released. The process is repeated and continuous shooting is performed.Continuous shooting is performed as described above, but in the case of single frame shooting,
Since the switch 21 is connected to the contact point (b), the gate circuit 22 is closed after the recording of one image is completed, so that the subsequent recording operation of the image signal is blocked, and only one image is recorded. . In the above-mentioned control process, the gate circuit 22 is kept in the closed state until the image signal stored in the solid-state image sensor 2 immediately before the release is read out, and the recording operation is not performed. This is because the image signal in question is not subject to the above-mentioned accumulation time control and does not have an appropriate exposure level, so it is inappropriate as an image recording signal.

FIGS. 7(a), (b), and (c) are waveform diagrams for explaining the circuit and operation forming another embodiment of the present invention. out (,) to,
, " Detects and holds the maximum value of the input image signal for one screen, changes the accumulation time so that the maximum value falls within a certain output voltage range, and displays subject information after the accumulation time reaches the optimum time. This system provides a method for recording images on a magnetic recording medium, uses a solid-state image sensor for image signal accumulation as a photoelectric conversion element for measuring subject brightness, and provides a method for controlling exposure time using a single photoelectric conversion element. In Figure 7 (a) and (b),
Circuit components having the same configuration as those of the first embodiment shown in FIGS. 1 to 6 are given the same symbols as those of the first embodiment. Figure 7 (
In a), 100 is a peak detection circuit for detecting the peak value of the image signal output in time series from the solid-state image sensor 2, and 101 is a peak detection circuit whose output is within a certain voltage range. Discrimination circuit for determining whether
2 is based on the output from the discrimination circuit 101, and if the peak value is larger than a certain voltage range, the accumulation time is shortened (but if the peak value is smaller than the certain voltage range, the accumulation time is changed to lengthen the accumulation time). 104 is a switching circuit that cuts off transmission of the video signal corresponding to the image signal to the recording head 13 when the peak value of the image signal is outside a certain voltage range based on the output of the discrimination circuit 101. The video signal is transmitted to the recording head 13 and reliable image recording is performed only when the peak value of the image signal is within a certain voltage range. A condenser lens, 106 a pentaprism, and 107 an eyepiece lens form a finder optical system. Figure 7 (b
), Rr −Ro is the resistance, T r + −T
r 7 is a transistor, C! ~C6 is a capacitor, CP
I~CPa are comparison circuits, BP2~BPa are buffer amplifiers, D+ is a diode, FTI, FT2 are analog gates, RQ is a constant voltage power supply, INr, IN2 are inverters, OR+~ORa are OR games), EX+~ E
Xa is an exclusive OR gate, ANI and AN2 are AND gates, FF+ to FFa are flip-flops at J-, and DCD is a decoder.

Regarding the operations in Figures 7(a) and (b) below, Figure 7(C)
This will be explained using a waveform diagram. When the shutter button of the camera is pressed, the synchronization signal generation circuit 1
0 is in the operating state, and the circuit is chronologically shown in Figure 7 (C).
Each signal is output and the control operation is started. That is, first, at the release point 11, the reset pulse φR' is applied to the output terminal φ.
Output from R, and flip-flop FF+ to FF to J-
a, and the flip-flop F F ly F F
3 and Exclusive or Gate EX2. Furthermore, the up/down counter consisting of the inverter I N 1 is reset. Next, an initial accumulation time set pulse φ1' is outputted from the output terminal φl of the synchronization signal generation circuit 10, and is transmitted to the clock terminal C of the flip-flop via the previous OR gates OR2 to OR4, and is transmitted to the clock terminal C of the flip-flop consisting of the flip-flops FFI to FFa. A digital value corresponding to the initial accumulation time is set in the counter. Next, at time t2, the output terminal φPI of the synchronizing signal generating circuit 10.

φD, φPDI φSH to pulse signals φYen', φT'
,φPD'.

φ forceps′ is output. The pulse φPI' is transmitted to the transfer gate of the solid-state image sensor 2 as the aforementioned transfer pulse VφP via the OR gate ORs, and in the same way as in the previous embodiment, the image signal accumulated in the solid-state image sensor 2 before the release is vertically recorded in the shift register.

In addition, the pulse φd' causes the transistors Trs to T
ry is turned on momentarily, and the capacitors C3 to C5 forming a time constant circuit for controlling the accumulation time are reset to the initial state. In addition, the transistor Trl is turned on momentarily by the pulse φPD', and the comparison circuit CP+
is inactive while the transistor Trl is on. or,
The analog switch FTI is momentarily turned on by the pulse φSH', and the first
During the output operation, the image signal of the maximum level stored in the peak value holding capacitor C1 of the previous image signal is transferred to the second holding capacitor 02.

Then, at time t3, the output terminal φP of the synchronization signal generation circuit 10
Pulses φPR' and φC' are output from R and φC.
' The transistor T r 4 is turned on momentarily, and the image signal at the maximum brightness level during the previous image signal readout operation, which was held in the capacitor c1, is reset. Also, at this time, the pulse φC' is used to determine whether or not to update the accumulation time information set in the up/down counter as described above, and if the previous image signal is at an appropriate exposure level, The accumulation operation of the solid-state image sensor is controlled according to the initially set accumulation time. That is, since the maximum level of the previous image signal is transferred to the capacitor C2 at time t2, the level of the image signal is the same as that of the comparison circuit CP2. Compared with CPs 1. When the level is not within the reference level from the reference voltage wave RQ, the comparison circuit CP2. “l” from either side of CPa
When the signal is output and exists within the reference level, a "0" signal is output from both comparison circuits, and the output of the circuit is transmitted to the input terminal of the ANt via the OR gate. Therefore, when the pulse φC' is output, the output state of the analog gate) ANs changes to the comparator circuit CP2.
．． It is determined by the output of CPa, and when the exposure level of the previous image signal is appropriate, "0" from A N r continues to be output, and when it is inappropriate, the pulse φC'
is transmitted to the up/down counter via ANt and OAGENIT, and the set accumulation time is updated by one step.

Now, as mentioned above (detection of image signal immediately after release,
Normally, unnecessary excess charge is accumulated in the photosensitive element of the solid-state image sensor before the release, and the charge accumulated in the solid-state image sensor is in a saturated state, so the hold that is read out immediately after the release is released. Capacitor 〇t, C2
Since the image signal level accumulated in is extremely high, the output of the comparison circuit CP2 is an "L" signal
At time t3, the contents of the up-down counter are updated by one step. As a result, the decoder DCD selects a time constant circuit corresponding to the contents of the up/down counter, and the time constant circuit controls the accumulation time, and after the accumulation time determined by the specific circuit, the OR gate OR6 The pulse φn' is outputted through the OR gate ORa and transmitted to the solid-state image sensor as the transfer pulse VφP, and the vertical shift register of the image signal accumulated during the accumulation time, that is, the first accumulation operation after the release. The transfer will take place. On the other hand, from time t3 onwards, the image signals transferred at time t2 are read out in time series in the same manner as in the first embodiment described above, and the maximum level of the image signals read out in time series is The signal is sent to the comparator circuit CPU, transistor Tr2. Resistor R2, diode Ds*tin sister Tr3. It is held in the capacitor 〇+ of the constant current operation type peak detection circuit consisting of the capacitor 〇+. Therefore, when the image signal is transferred to the vertical shift register at time t4 as described above, the signal with the highest level among the previous image signals transferred to the capacitor CI is again transferred to the capacitor 02, and the comparator circuit A comparison operation is performed by CPz and CPs, and when the level of the image signal is not at the appropriate exposure level, the contents of the up-down counter are updated, and the accumulation operation is performed again at the updated accumulation time. . Therefore, the accumulation time is gradually increased or decreased until the image signal level reaches the appropriate level, and the operation for setting the accumulation time for appropriate exposure is performed, and when the image signal level reaches the appropriate level, the comparator circuit The outputs of CPI and CF2 both become “O” signals for the first time and the AND gate A
From then on, the N+ continues to output the "O" signal, the up/down counter update operation is completed, and the subsequent accumulation time is controlled by a time-setting circuit that forms a predetermined accumulation time for proper exposure. becomes. On the other hand, and gate AN
Since the output signal of the output of the OR gate OR+ via the inverter IN2 is input to the input terminal of the comparator circuit CP2. The AND gate AN2 outputs a "0" signal until both of the comparator circuits CP and eCPs output an "O" signal, that is, until an image signal with an appropriate exposure level is obtained within the set accumulation time, and both of the comparison circuits CP and eCPs output a "0" signal. The AND gate ANs+ outputs a "1" signal only when it outputs a "0" signal, that is, when an image signal with an appropriate exposure level is obtained within the set accumulation time. For this reason, the analog switch FT2 operates only after the set accumulation time has taken an appropriate value to obtain an image signal with an appropriate exposure level, and the analog switch FT2 operates only after the set accumulation time has taken a value suitable for obtaining an image signal with an appropriate exposure level. is applied to the head 13, and the recording operation of the image signal onto the recording medium 14 is started.

Therefore, the operation of recording the image signal onto the recording medium 14 is not performed until the image signal has an appropriate exposure level, and the image signal is always recorded at the appropriate exposure level. Furthermore, Tr8 is a transistor, and LED+ is a light emitting diode. When the output of AND gate AN2 becomes a "1" signal and the recording operation of the image signal to the recording medium is started, this is indicated by lighting of the LEDI. It's an action lamp. Further, the output of the computer game AN2 is transmitted to the terminal TDP, and if a warning means such as a buzzer is connected to the terminal, it is possible to confirm by sound that the recording operation is being executed. In addition, the exclusive or gate EX1 is configured to output a "0" signal when the contents of the up-down counter reach the upper or lower limit value, and the exclusive or gate EX1 is configured to output a "0" signal when the contents of the up-down counter reach the upper or lower limit value. This is to prevent updates, such as when the counter is at the upper limit, it is further updated and from the upper limit to the lower limit, or when the counter is at the lower limit, it is further updated and the lower limit is converted to the upper limit. It is a gate for changing the set accumulation time from the longest seconds to the shortest seconds.
Alternatively, the purpose is to prevent the transition from the shortest seconds to the longest seconds.

Note that the output terminal φM of the synchronization signal generation circuit 10 is connected to the contact point (b) of the mode switch 21, and the output of the inverter IN2 is "l" when the mode switch 21 is in the -frame shooting mode.
” signal, the signal is detected by the terminal φF of the synchronizing signal generation circuit lO, and the output of the inverter IN2 becomes the “l” signal.
” signal, outputs a “1” signal from the terminal φM while the image signal for one screen is being recorded on the recording medium,
When the recording of one screen is controlled, if the switch 21 is connected to the contact point (a) first, the "l" signal is output continuously to control continuous shooting.

FIG. 8 is a block diagram showing another embodiment of the present invention, in which the same components as in the first and second embodiments are given the same symbols.

In the same figure, 300 is an aperture, which is normally closed and blocks incident light to the solid-state image sensor except when taking pictures. Prevents it from burning.

303 is a switching means, and the switching means 30
Reference numeral 3 is for transmitting the aperture signal from the exposure control calculation circuit 305 to the meter 301 via the switching means 302, and is turned on in response to the output of an AND gate 309, which will be described later. 306 is a switching means, which is connected to the contact point (b) by the output of the AND gate 309, and is turned on by the first stroke of the release switch 3.
The signal from meter 30 connects to contact (a), transmits the release button on signal of switching means 302, connects switching means 302 to contact (a), and connects meter 30 to contact (a).
1, the aperture is fully opened. 31
1 is a switch that is turned on by the second stroke of the release button 312, and the on signal of this switch is the AND gate 3.
It is applied to one input terminal of 09. 3074 is a photographing time control timer circuit, and the timer circuit is a differentiating circuit 30.
In response to the pulse No. 8, the output level is inverted from the "1" signal to the "O" signal, and the "0" signal is held until one recording of the image signal on the recording medium 14 is completed; It is configured to return to a "1" signal after the recording of the image signal is completed. Further, the exposure control calculation circuit 305 stores the output of the photoelectric conversion element 6 in response to the output of the AND gate 309, and calculates the aperture value and accumulation time value.The details of this circuit are as follows.
Since it is described in Japanese Patent Application No. 1983-36379, which was proposed by the present applicant, detailed explanation thereof will be omitted, but
It is shown in a block diagram in FIG. Reference numeral 304 denotes an accumulation time control circuit, which transmits an accumulation time end signal to the synchronization signal generation circuit 10 based on the accumulation time calculated by the exposure calculation control circuit 306 or set in advance, and receives the signal from the synchronization signal generation circuit IO as described above. The transfer pulse VφP is output, and the image signal accumulated in the solid-state image sensor 2 is stored in the vertical shift register as described above. Also, the synchronization signal generation circuit IO responds to the output of the AND gate 309. The transfer pulse VφP is outputted to transfer the image signal before the release, and the release signal is output to put the exposure calculation control circuit and the accumulation time control circuit into the operating state.

When the accumulation time control circuit finishes controlling the accumulation time, it outputs a signal that closes the gate circuit, and sends the image signal exposed for the time controlled by the accumulation time control circuit to the head 13 as a video signal. Outputs control signals to communicate. Furthermore, the synchronization signal generating circuit is connected to the head 13.
When the recording of the video signal onto the recording medium is completed, it becomes inactive.

Next, the operation of the eighth embodiment will be explained. If the release button 3.2 is now pressed, the first stroke turns on the switch 310. As a result, the switch means 300 responds and connects the contact (a) and transmits the ON signal of the release button to the switch means 302, which connects with the contact (a) and applies the voltage Voc to the meter 301. As a result, the meter pointer swings to its maximum value, the diaphragm 300 is fully opened, and the light from the subject due to open metering is input to the photoelectric conversion element, which inputs a luminance signal to the exposure calculation control circuit 305. . The exposure calculation control circuit 305 calculates the aperture value or accumulation time based on the luminance signal, and if the accumulation time is set in advance, calculates the aperture value corresponding to the luminance signal and the set accumulation time. On the other hand, if the aperture value is set, the accumulation time is calculated based on the luminance signal and the set aperture value. After this, when the release button 312 is further pressed, the switch 311 is turned on and the AND gate 309 is activated.
l” signal is output and transmitted to the exposure calculation control circuit 305,
The circuit 305 stores the luminance signal. Further, the "1" signal from the AND gate 309 is sent to the switch means 303, 3.
06, the switch means 303 is turned on, and the switch means 306 is connected to the contact point (b). This results in
When the mode of the exposure calculation control circuit 305 is the accumulation time setting mode, the calculated aperture value is transmitted to the switch means 302 via the switch means 303. The switch means 302 connects with the contact (b) in response to the aperture value signal, and the aperture value signal is applied to the meter 301, and the aperture value signal is applied to the meter 301.
The aperture is stopped down to the calculated aperture value of 00. Further, the "1" signal from the AND gate 309 is transmitted as a start signal to the synchronizing signal generation circuit 10, which turns the circuit 10 into an operating state, and the transfer pulse VφP is transmitted to the solid-state image sensor 2, so that the image stored before release is The signal is transferred to the vertical shift register, converted into a video signal by the above-mentioned operation, and applied to the head 13, but at this time, as will be described later (since the gate circuit 22 is not yet in the open state, The transfer pulse VφP is applied as a release signal to the exposure calculation control circuit, and time control of the set accumulation time is started by the accumulation time control circuit 304. After a time based on the accumulation time, the transfer pulse VφP is generated again, the image signal accumulation operation by the solid-state image sensor is completed, and the image signal accumulated in the solid-state image sensor 2 during the accumulation time is vertically At this time, the signal from the synchronizing signal generation circuit IO is transmitted to the gate circuit 22, which opens the gate circuit, and the video signal corresponding to the image signal whose accumulation time has been controlled is transferred to the head 13. The image signal for one image is recorded on the recording medium 14.The synchronizing signal generating circuit 1O becomes inactive when the recording of the image signal for one image is completed, and at this time, the output of the timer circuit 307 is is inverted and changes from a "0" signal to a "1" signal. Therefore, if the release button 312 continues to be pressed, the "l" signal is output from the AND gate 309 again, and the synchronization signal generation circuit is activated again. The above-mentioned operation is repeated, and continuous shooting is performed.

As described above, continuous shooting is performed until the release button 312 is released, and when the release button is released, the shooting ends, and in conjunction with the release of the release button, the switch means 302 connects with the contact (C). , the aperture becomes fully open and all photographing operations are completed. Continuous shooting is executed as described above, but in the case of single-frame shooting, the switch 320, which is always turned on by the mode changeover switch (not shown), is pressed even further from the second stroke of the release button. - Since the configuration is such that the "l" signal is not output from the AND gate 309 after image recording, the entire shooting operation ends after one frame shooting is completed.Also, during frame shooting, the timer is turned off. The switch means 302 is configured to connect to the contact (C) when the output of the circuit 307 is reversed from "0" to "l" signal after the recording of one image is completed, and the aperture is fully opened immediately after the recording is completed. In addition, in the above control process, the output of the timer circuit 307 is input to the exposure calculation control circuit 305, and the output of the timer circuit is inputted to the exposure calculation control circuit 305, and the output of the timer circuit is input to the "0" signal, that is, from the release operation to the end of image recording. In response to the "0" signal, the warning circuit shown in Figure 1O indicates that the photographing operation is in progress by lighting up a lamp, etc. or by sounding a buzzer, etc. The above operation control is explained when the accumulation time is set in advance. However, when the aperture priority mode in which the aperture value is set in advance is set, the accumulation time is determined by the exposure calculation control circuit 305 based on the brightness signal and the set aperture value.
The storage operation time of the image signal of the solid-state image sensor is limited by the calculated storage time, and the aperture 300 is controlled at the set aperture value, so that photography is performed with aperture priority. Also, if you set it to the so-called magic shooting mode,
When the calculated aperture value or accumulation time reaches the limit aperture value or limit time, the set aperture value or accumulation time is inversely calculated based on the limit aperture value or limit time, and the set aperture value or accumulation time is calculated based on the limit aperture value or limit time. The accumulation time is changed and controlled based on the limit aperture value or limit time and the changed aperture value or accumulation time. Furthermore, when the program mode is set, the aperture value and accumulation time are calculated based on the luminance signal from the photoelectric conversion element 6, and control is executed using the aperture value and accumulation time similarly calculated. Become. The photographing control operation in the above mode is exactly the same as the accumulation time setting mode described above, so a detailed explanation thereof will be omitted.

FIG. 10 is a block diagram showing an embodiment of the exposure calculation control circuit 305 shown in FIG.
Since it is described in detail in No. 36379, a detailed explanation will be omitted, and the outline thereof will be explained below.

The A block is for daylight photography, and the B block is for flash photography. 5W201 of block A is a mode changeover switch that changes the shooting mode, 5W202
is a shift switch that changes the accumulation time of the photographing element 2 or the set value of the aperture, and the contact points are (a), (b), and (c).
It is configured to take on three states. 5W203 is a number setting switch, which sets the number of shots according to the capacity of the recording medium loaded in the camera. 5W204 is a number-counting switch, which is turned on every time the shooting of -frames is completed. 5W205 is a switch that starts the oscillation circuit, and is turned on in conjunction with 5W201 and 5W203. Further, the switch 205 is configured to automatically turn on when the 5W 202 is connected to the contact (a) or the contact (C). Block 201 is a control mode block, 202 is an oscillation circuit block, 203 is a counter group block that stores set information, and 204 is a block that compares the set number of shots with the information on the number of shots that have been taken each time input by the switch 5W204. It is a circuit. Block 205 is a warning circuit which issues a warning by sounding or emitting light when the number of photographed images reaches a set number according to the output of comparison circuit 204. Block 206 is a decoder driver that cooperates with external display block 207 to display information input to the counters. block 2
08 is an A-D conversion circuit that converts the output of the photoelectric conversion element 6 into A-D.
Store conversion value. Block 209 is an adder circuit, and switch group 5W206 is a code switch for inputting the open aperture value of the lens. Block 210 is a register for storing a photographing mode and a register for storing set photographing information, that is, an accumulation time of an image sensor or an aperture value. Block 211 is a subtraction circuit, which is a block for subtracting the photographing information value set from the output of the adding circuit 209. 212 is a multiplexer, which subtracts the photographing information set from block 210 and block 211, and the calculated photographing information. In response to this, the camera outputs the accumulation time or aperture value depending on the shooting mode.

Block 213 is a comparison circuit that compares the accumulation time and the aperture value with their respective control limits. Block 214 is a decoder driver into which the accumulation time, aperture value, and comparison results from block 213 are input, and drives the finder display 25 to display each piece of information.

5W207 is a changeover switch that switches the signal from the photoelectric conversion element between daylight photography and flash photography.

Block 216 is a block that receives a signal from the light receiving element during flash photography and controls the storage time of the solid-state image sensor, and is constituted by an integrating circuit. block 21
7 is a circuit for confirming the shooting by emitting sound or emitting light at the start of shooting, and block 218 is a real-time expansion circuit. 219 is a D/A converter. Next, the operation of the exposure control block having the above configuration will be explained. First, when photographing, daylight photography or flash photography is selected. When daylight photography is selected, the changeover switch 5W207 is set to (a) either manually or automatically depending on whether or not a flash is installed.
One terminal is connected. Next, select the shooting mode. When the mode switch 5W201 is turned on and the oscillation switch 5W205 is turned on, the pulse input from the oscillation circuit 202 to the control gate 201 is outputted to the control gate 201, and the output terminal is selected by the control gate 201, and the counter for setting the shooting mode in the counter group 203 is output. is input. In other words, as long as you keep pressing the mode switch 5W201 and the oscillation switch 5W205, the count value of the shooting mode setting counter will continue to change, such as binary code 0000,0001,0010, etc.
Shooting modes such as storage time priority mode, aperture priority mode, storage time priority magic mode, aperture priority magic mode, program mode, etc. are set as codes such as 0011°0100. Setting the storage time or aperture value, and setting the track of the inserted recording medium, that is, the number of images to be taken, are performed in the same manner. That is, when the shift switch 5W202 is operated and the contact (a) is connected, the oscillation switch 5W205 is configured to turn on in conjunction with the shift switch 5W202, so the pulse from the oscillation circuit 202 immediately activates the control gate 201. Thereafter, the pulses are input to a counter for setting photographic information values in the counter group 203, and the pulses continue to be counted up while the shift switch 5W202 is operated. Also, shift switch 5W20
When 2 is connected to contact (b), the countdown continues.

At this time, when the shooting mode is the storage time priority mode, the value set in the shooting information value setting counter means the storage time, and when the shooting mode is the aperture priority shooting mode, it means the aperture value. Further, when setting the number of images that can be photographed, when the oscillation switch 5W205 and the number setting switch 5W203 are turned on together with the oscillation switch 5W205 and the number setting switch 5W203, a pulse is set in the number setting counter in the counter group '203. Each time a photograph is taken, the pulse from the number-of-pictures counter 5W 204 that is turned on is directly input to the photographed number counter in the counter group 203, regardless of the oscillation circuit. The number comparing circuit 204 compares the number of sheets representing the recording capacity of the recorded recording medium, and when the number of remaining sheets becomes less or the number of remaining sheets becomes less, a warning circuit 204
Press 5 to issue a sound or flash warning. counter group 203
The shooting mode, shooting information value, set number of shots, and count number of shots set as described above are stored in the decoder driver 206.
The external display 207 displays the image on the outside of the camera via the external display 207.

The photographing mode and photographing information value set in the counter group 203 are temporarily set in the register group 210.

Now, the shooting modes include storage time priority mode, aperture priority mode, storage time priority magic mode, aperture priority magic mode, and program mode.

First, the accumulation time priority mode will be explained. The input signal input from the photoelectric conversion element 6 is stored in the A/D converter 20B, and the addition circuit 209 adds the maximum aperture value of the lens. Then, the accumulation time value stored in the register 210 is subtracted by the subtraction circuit 211, and the aperture value is determined by the multiplexer 212.
input to the decoder driver 214 via the internal display 2
15. At the same time, the accumulation time value is also set to multiplexer 2.
12, internal display 21 via decoder driver 214
Displayed on 5. The aperture value calculated here is the comparator circuit 2
If the aperture control limit value set in advance in the comparison circuit 213 is exceeded, a warning signal is displayed on the internal display 215 via the decoder driver 214.

In addition, the aperture value is output as is, but the accumulation time value is extended in real time by a real time expansion circuit 218 in synchronization with the transfer pulse from the synchronization signal generation circuit. Output as a signal. Next, the aperture priority shooting mode will be explained.

In the aperture priority shooting mode, the value set in the register 210 means the aperture value, so the addition circuit 209
A subtraction circuit 211 subtracts the aperture value from the luminance signal output from the luminance signal, and outputs the resulting signal to the multiplexer 212 as an accumulation time value. In the multiplexer 212, the set value and the calculated value are sorted into an aperture value and an accumulation time value, and are displayed on the internal display 215 via a decoder driver as in the accumulation time priority mode. Further, the calculated accumulation time value is compared with a limit value of accumulation time in a comparison circuit 213,
It is displayed on the internal display via the decoder driver 214. Next, the accumulation time priority magic mode will be explained. The calculations in the addition circuit 209 and the subtraction circuit 210 and the selection of data by the multiplexer 212 are the same as in the accumulation time mode, but when the output of the comparison circuit 213 indicates that the aperture control limit value has been exceeded, Comparison circuit 213
By the output of , the accumulation time value set in the register 210 is automatically changed so that proper exposure is performed.

The same applies to the aperture priority magic mode, and when the calculated accumulated value exceeds the control limit value, the aperture value set in the register 210 is automatically changed by the output of the comparison circuit 213. Prevent proper exposure.

Next, the program mode will be explained. Addition circuit 20
The luminance signal output from 9 is directly input to the multiplexer 212 without passing through the subtraction circuit, and is divided into a calibration value and an accumulation time value according to a predetermined program, and input to the decoder driver 214, which displays the internal display. 21
5.

Next, the case of flash photography will be explained.

When the flash is attached or charging is completed, the changeover switch 207 is manually or automatically switched from contact (a) to contact (b). Therefore, the output from the photoelectric conversion element enters the flash control circuit 216, and when the strobe is triggered in synchronization with the transfer pulse from the synchronization signal generation circuit and the strobe generates a flash, the reflected light from the subject is transmitted to the flash control circuit 216. It is integrated by When the integrated value reaches a predetermined level, an accumulation stop signal is output to the image sensor. Further, regardless of whether daylight photography or flash photography is performed, the warning circuit 217 notifies the operating state by a warning sound for confirmation or by light emission from a light emitting element or the like for each photography. When recording of the video signal is completed, the output of the timer circuit 307 is input to the decoder driver 206, and the external display 20
7 is displayed with an “OK” mark.

FIG. 9 shows an embodiment of a flash device attached to the embodiment of FIG. 8, where 403 is an ordinary strobe, the terminal Xt is connected to the synchronizing signal generating circuit IO of FIG. 8, and the above-mentioned transfer pulse is The trigger circuit of the strobe is triggered in synchronization with the transfer pulse inputted into the strobe through the terminal X+. Also, terminal X3 connects switch 5W207 in Fig. 10 to contact (b)
This is a terminal that outputs a straw attachment signal, for example, a charging completion signal, for switching to the charging station. Further, 402 is a so-called dimming strobe having a light receiving element for dimming, and the terminal X2 is connected to the strobe 40.
Similarly to 3, it is a trigger terminal for triggering a strobe by a transfer pulse, and the terminal X4 inputs the aperture value output from the exposure calculation control circuit 305, and is provided, for example, on the front of the light receiving element for light control. This is a terminal for controlling the aperture and the amount of light emitted by the strobe. First, we will explain the case where a normal strobe is attached. In this case, first set the aperture manually and attach the flash to the camera. As a result, the strobe attachment signal is input from the terminal X3 to the exposure calculation control circuit, and the switch 5W207 in FIG.
connects with contact (b). After this, when the shutter button is pressed, a transfer pulse is output from the synchronization signal generation circuit 1O by the above-mentioned operation, and the image signal accumulation operation of the solid-state image sensor is started, and at the same time, the transfer pulse is input to the strobe via the terminal XI. , the strobe is triggered and produces a flash of light. For this reason, the subject is illuminated by flash light from a strobe, and the reflected light enters the photoelectric conversion element 6 through the lens l, and the amount of the incident light is integrated by block 216 in Figure 1O, and when it reaches a predetermined integral value. The accumulation time stop signal is sent to the synchronization signal generation circuit lO via the OR gate 220 in FIG.
As a result of the above-described operation, the transfer pulse VφP is output, and the image signal accumulation operation is completed.

Therefore, the accumulation time is controlled based on the amount of light from the strobe, and proper exposure control equivalent to using a dimming slot flash in a normal strobe device that does not have a so-called dimming function is performed. Next, a case will be described in which flash photography is performed using the dimming strobe 402. In this case, the flash attachment signal is not input to the exposure calculation control circuit 305, and the above-mentioned daylight photography mode is maintained. When the release button is pressed in this state, the aperture signal is output as described above and the aperture of the camera is set. Further, based on the aperture signal value, the value of the aperture provided in front of the light receiving element for dimming or the amount of light emitted by the strobe is determined. Thereafter, the strobe 402 is triggered by the transfer pulse VφP in the above-described operation, the strobe emits light, and the light receiving element of the strobe performs a dimming operation to control the amount of light emitted by the strobe. Also, the storage time of the solid-state image sensor is controlled in the same way as in the daylight photography mode. Therefore, even after the strobe light emission has stopped, the control is performed using a preset or calculated accumulation time, similar to daylight photography. Therefore, when a dimming flash is used, so-called daytime synchronized photography is executed.

〔effect〕

As described above (according to the present invention), still images can be captured efficiently and the power saving effect is large.

In addition, noise signals caused by flash light emission and noise signals caused by clearing operations are not recorded, making it possible to record high-quality still images.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the still video camera according to the present invention, FIG. 2(a) is a block diagram showing the configuration of the solid-state image sensor 2 of FIG. 1, and FIG. FIG. 3 is a circuit diagram showing an embodiment of the photometric signal processing circuit and accumulation time control circuit of FIG. 1, and FIG. 4 is a block diagram showing the configuration of the color filter 4 shown in FIG. 5 is a circuit diagram showing an embodiment of the video recording signal generation circuit 12, FIG. 6 is a waveform diagram for explaining the operations of FIGS. 1 to 5, and FIG. 7(a), 7(b), and 7(c) are circuit diagrams and operation explanatory diagrams respectively showing other uninvented embodiments. FIG. 7(a) is an overall configuration diagram, and FIG. 7(b) is a main circuit. Figure, 7th
FIG. 8 is a block diagram showing another embodiment of the present invention; FIG. 9 is a configuration diagram showing an embodiment of a flash device attached to the embodiment of FIG. 8; FIG. 1O is a block diagram showing one embodiment of the exposure calculation control circuit 305 of FIG. 8. 2: Solid-state imaging device 1: Imaging optical system 6: Photoelectric conversion element 11: Image signal processing circuit 12: Video recording signal generation circuit 13: Magnetic head 14: Recording medium patent applicant Canon Co., Ltd., procedure report ( Method) 1. Display of case 1986 Patent Application No. 38377 2, name of invention Still video camera 3, person making amendment Relationship with case Patent applicant address 3-30-2 Shimomaruko, Ota-ku, Tokyo Name (100)
) Canon Co., Ltd. Representative Ryuzo Kaku
Part 4, Agent's residence 3-30-25 Shimomaruko, Ota-ku, Tokyo 146 Date of amendment order (all sending dates) September 27, 1988 6. Specification subject to amendment 7, Contents of amendment First stated in the application As per the engravings and attachments of the specification and drawings attached to (no changes to the contents).

Claims (1)

[Claims] (1) Imaging means for converting a subject image into an image signal and storing it; recording means for recording the image signal of the imaging means; and selection of the image signal of the imaging means provided between the imaging means and the recording means. recording gate means for guiding the image signal to the recording means; a release operation member for instructing the start of an operation for recording the image signal as a still image in the recording means; and a flash light emitting device for illuminating a subject with flash light. , upon operation of the release operation member, unnecessary charges of the imaging means are cleared to start a new still image accumulation operation, and upon completion of the clearing, the flashlight emitting device starts emitting flashlight, and then A still video camera comprising: a control means for recording the still image in a recording means by turning on the recording gate means for a predetermined period of time after completion of the flash emission and reading an image signal from the imaging means.