JPH01117297A - Driving method for thin film el display - Google Patents

Abstract

PURPOSE:To usually unify brightness despite of the number of luminescence picture elements by controlling a write-pluse width varied in response to the number of the luminescence picture elements in a scan side electrode with a rising timing of the pulse. CONSTITUTION:In the first and second fields, write-operation is performed by applying, negative or positive pulse with respect to a data side electrode, to a scan side electrode. The pulses are alternately inputted into the first or second field side high pressure proof driver IC 120, 130. The time elapsed until the rising edge of a power source switching signal PSW for pull-up is previously set and the pulse width is controlled with the rising timing. In this case, the logical multiply of a signal PSW and the signal of a maximum pulse width is taken as a data inputted in the first field. As a result, the above control is performed in response to the number of picture elements A, B in the scan side electrode and the write-pulse width is varied, thereby uniform brightness can be obtained despite of the number of the picture elements.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a method for driving an AC driven capacitive flat matrix display panel, that is, a thin film EL display device.

<Prior Art> For example, a double insulation type (or three-layer structure) thin film EL display device is configured as follows.

As shown in FIG. 7, IntO,
A strip-shaped transparent electrode 12 made of YzO3, S i sNa, T i Ox, for example, is provided in parallel.

Dielectric material layer 13. AI, O, etc. EL layer 14 made of ZnS doped with an activator such as Mn. Same as above <Y, 0
3. A dielectric material layer 13' of s t3 N4.7 iOf, A 12 oz, etc. is sequentially laminated to a thickness of 500 to 10,000 layers using a thin film technique such as an evaporation method or a sputtering method to form a three-layer structure, and then A strip-shaped back electrode 15 made of Al is provided parallel to the transparent electrode 12 in a direction perpendicular to the transparent electrode 12 .

The thin film EL panel 10 has a dielectric material 13 between its electrodes.
．． Since the EL material 14 sandwiched between the ends 13' is interposed, it can be seen as a capacitive element in terms of an equivalent circuit. Moreover, the thin film EL panel 10 has a voltage of -
As is clear from the brightness characteristics, it is driven by applying a relatively high voltage of about 250 V.

Conventionally, in order to drive such a thin film EL display device, an Nch MOS driver and a Pch MOS driver are used as scan electrode drive circuits.
A driving device that is equipped with a MOS driver and performs so-called field inversion driving in which the polarity is inverted for each field (line sequential driving for one screen) has been used. Furthermore, the special application was made in 1983.
No. 105375 proposes a driving device that can reduce flicker by changing the polarity of the write waveform applied to picture elements for each scanning line, thereby averaging out variations in light emission intensity due to the polarity of the voltage applied to the panel. Also, special request in 1986
In No. 125384, a driver IC with a push-pull configuration is used on the data side, and the positive and negative polarity pulse voltage waveforms applied to the pixels of the EL display device are completely symmetrical, thereby eliminating the burn-in phenomenon caused by polarization and providing long-term reliability. In addition to improving the trajectory, a reduction in power consumption was achieved.

<Problems to be Solved by the Invention> However, with these driving methods, as shown in FIG. Brightness when pixel is emitted is set to 1
If it is set to 00, then when 100 picture elements emit light (1/6 light emission), the luminance will be approximately 110%. However, this value varies depending on the capability of the driving driver IC, the width of the write pulse, the write voltage, and the capacity of the EL panel.

In such a driving method, as shown in FIG.
When the strip pattern 32 is displayed in negative on the panel 10, the area 33 in which all bits are lit and the areas 34, 35, and 36 in which fewer bits are lit have different brightness, and in particular, the brightness difference between area 33 and area 34 is different. becomes extremely large, and a band-like pattern becomes visible even within the light emitting area (the white area in the figure).

The reason for this is that the load on the line differs depending on the light-emitting picture element of the panel, and the applied voltage waveform differs. 11th
41 in the figure is a voltage waveform applied to a line with a relatively large number of light-emitting pixels, and 42 is a voltage waveform applied to a line with a relatively small number of light-emitting pixels. Both are the voltage vt at which the panel starts emitting light.
The slope of the waveform is the same up to h, but when the voltage exceeds vth, the larger the number of light-emitting pixels, the larger the current flows, but due to the ability of the high breakdown voltage IC for driving EL, the current becomes constant and the voltage waveform becomes rounded. Therefore, the time from reaching the final voltage Vw applied to the picture element until the start of discharge becomes tll>tA, resulting in a difference in luminance.

As a countermeasure against this problem, a conventional method has been used in which uniform brightness is obtained by controlling the rise timing of the applied voltage waveform pulse width in accordance with the number of light-emitting picture elements on the scanning side electrode.

However, in this case, if we use Cyrisk, which allows a large current to flow through the switching element in the output stage of the driver IC, and if we perform step drive to reduce power consumption, the applied voltage waveform will appear at the output end of the driver IC. The inconvenience of not having one occurs.

This phenomenon will be explained below using FIGS. 12 to 14. FIG. 12 shows a thyristor 59.5 as a switching element on the pull amplifier side as a switching circuit in the output stage of the driver IC. A simulated circuit is shown in which an NPN l-transistoro 0 is used as a pull-down side switching element and an EL picture element 50 is connected as a load. HVCC of this simulated circuit
When the voltage waveform 51 shown in FIG. 13 is applied to the line,
A voltage waveform 57 is applied to the EL picture element 50, and the waveform of the charged current becomes as shown by 52.53. However, when the voltage waveform 56 shown in FIG. 14 is applied as the voltage waveform, the output voltage waveform 58 becomes as shown, and the current corresponding to the current 53 in FIG. 13 does not flow at the timing of the second step. become.

This is because the thyristor's self-off function works.

Cylisk once trigger pulse 61 (
12) is applied and ignited, the current continues to flow steadily. However, when charging a capacitive element such as an EL, this current stops flowing at the same time as charging up. After that, if no current flows through Cyrisk for a period of ts, Cyrisk automatically turns off,
After that, even if you try to pass current, it will not flow. This is the self-off function of the thyristor.

Therefore, in the applied voltage waveform of FIG. 13 in which the period j crff during which no current flows through the sirisk after charge-up is smaller than the period ts (torr < t S) in the first step, a normal output voltage 57 is obtained; Lo
In the applied voltage waveform of FIG. 14 where ff is larger than the period ts (Ctott > tS), the voltage charged up in the first step is held, and in the second step, no current flows and the EL does not emit light.

In this case, it is conceivable to widen the width of the trigger pulse of the thyristor or to apply the trigger pulse several times in succession, but this is not preferable because the current consumption increases.

The present invention has been made in view of these circumstances, and uses SIRISK as a switching element, and provides display quality that allows uniform luminance to be obtained regardless of the number of light-emitting pixels for each scanning electrode. An object of the present invention is to provide a method for driving an EL display device with high performance.

Means for Solving the Problems> The present invention is a thin film EL display device constructed by interposing ELJi between scanning side electrodes and data side electrodes arranged in directions crossing each other, a first field that applies a write pulse of negative polarity to the data side electrode to the electrode, and a second field that applies a write pulse of positive polarity to the data side electrode to the scan side electrode, A method for driving a thin film EL display device in which a writing pulse width is changed in accordance with a change in the number of light emitting pixels in a scanning side electrode of a thin film EL display device, which is formed by line sequential driving in which the first and second fields are alternately repeated. In this case, the pulse width is controlled by the falling timing of the pulse.

<Function> The method for driving a thin film EL display device according to the present invention eliminates self-off of the thyristor by controlling the write pulse width, which is changed according to the number of light emitting pixels in the scanning side electrode, at the falling timing of the pulse. This prevents unevenness in brightness due to differences in the number of light-emitting pixels on the screen and provides high-quality display.

<Example> The present invention will be described in detail below based on embodiments shown in the drawings.

Note that the present invention is not limited to this.

FIG. 1 is an electrical circuit diagram showing one embodiment of the present invention.

110 is the emission threshold voltage 190V (=Vw) (7)
A thin film EL display device is shown, and in this figure, only the electrodes are shown, with the X-direction electrode being the data-side electrode and the Y-direction electrode being the scanning-side electrode. Reference numerals 120 and 130 are scanning-side high voltage driver ICs corresponding to the odd and even lines of the Y-direction electrodes, respectively; 121 and 131 are logic circuits such as shift registers in each IC 120 and 130;

200 is a data side driver IC corresponding to the X-direction electrode, and the driver part is connected to a power supply of voltage V, 4 (-60V) on one side, and is a PchFET or PNP transistor UTI to UTi (third switching circuit) having a pull-up function. ), NchFET or NPN transistor DT with one side grounded and pull-down function
I~DTi (corresponding to the fourth switching circuit) and diodes UDI~UDi and DD1~DDi for flowing current in the opposite direction to the respective transistors, each of which is a logic circuit 201 such as a shift register in the same IC. controlled by.

Reference numeral 300 denotes a source potential switching circuit of the thyristor for the scanning side pull amplifier, and the potentials are switched between 125V, 250V, and Ov by a switch SWI that opens and closes in response to a signal "PSW" and a switch SW2 that opens and closes in response to a signal "PSC."

400 is a source potential switching circuit for the scanning side pull-down NP and rl transistors, and the potential is -190V (=
-Vw) and Ov are switched by a switch SW3 which is opened and closed by a signal "NSC".

500 is a data inversion control circuit.

600 is a circuit for controlling the common line (hereinafter referred to as v ccz) of transistors UTI to UTi and diodes UDI to UDi in the data side driver IC 200, and switches T1 to "OFF" and switch T2 to "
ON” and connect capacitor C to 30 V (1/2 V
M) and turn switch 7 (T1) to "ON".

The switch T2 is turned OFF'' to raise the potential to 60 V (VM). The switch T3 is a switch that switches the common line potential vccz between a potential controlled by the switches TI and T2 and a floating state.

Next, the operation of the circuit shown in FIG. 1 will be explained using the time chart shown in FIG.

Here, Yl containing picture element A and Y! containing picture element B are line-sequentially driven. It is assumed that the scanning side electrode of is selected. Also,
In this driving device, the polarity of the voltage applied to the picture element is inverted every line, and the high voltage NPN transistor connected to the scanning side selection electrode is ONL, and the picture element on that electrode line is driven. The drive timing for one line in which a negative write pulse is applied to is called the Nch drive timing.
On the other hand, the high voltage thyristor connected to the scanning side selection electrode will be referred to as ONL, and the driving timing for one line in which a positive write pulse is applied to the picture elements on that electrode line will be referred to as Pch driving timing.

Further, a field (screen) in which Nch driving is performed for odd lines on the scanning side and Pch driving is performed for even lines will be referred to as an NP field, and the opposite field will be referred to as a PN field.

In Fig. 2, “H” is a horizontal synchronization signal and “High”
h" period indicates a data valid period. "■" is a vertical synchronization signal, and driving of one frame starts from the rising edge of this signal. "DLS" is a data latch signal, and 1
Output after line data transfer is completed. “D,CK”
is a data-side data transfer lock. "RVC" is a data inversion signal that becomes "High" during the data transfer period of the line that performs Pch driving, and inverts all data during this period. "DATA" is a display data signal. D1~Di are data side driver IC200
transistors UTI to UTi.

This is data input to DTI to DTi.

Basically, data-side driving is performed by switching the voltage applied to each data-side line between 60V (=V, 4) and OV at the cycle of one horizontal period according to display data (H: light emission, L: non-light emission). Do it by doing this.

Next, the timing of switching will be explained. FIG. 3 shows the internal configuration of the logic circuit 201 of the data side driver IC 200. During a period when a certain line is being driven, display data for the next line (H: light emission, L:
(non-emission) and the signal "RVC" are sequentially input to a shift register 2011 having a storage capacity for one line.

“DATA@” input to this shift register 2011
RVC" is taken into the latch circuit 2012 by the input signal "DLS" after one line of data transfer is completed, and thereafter stored in the latch circuit 2012 until the end of the drive timing. Then, the latch circuit 20
Transistors UTI~UTt, DTI by the output of 12
~Control each DTi. Therefore, the voltage of the data side electrode changes over the period of one horizontal period every time the signal "DLS" is input.

However, as a feature of the proposed drive circuit, the transistor UTn
Even if it turns “ON”, 60V (=Vs) is not applied immediately, and the voltage of 30V is
Stepwise driving is performed from V (=1/2 V) to 60 V (=V!4>), reducing the power consumption during modulation to 374V.

Also, the signal "RVC" becomes High during the data transfer period of the line that executes Pch driving, and is a data inversion signal for inverting the data during this period, but the reason for inverting the display data of Pch driving is is shown below.

As will be described later, in Pch driving, when applying a write pulse, turn on the high voltage resistance of the selection line on the scanning side and raise it to 250V (=Vw + VM), set the selection line on the data side to OV, and set the selection line on the data side to 250V (= Vw+
VM ) is applied to the picture element to cause it to emit light.

At this time, the unselected line is set to 60V (=Vw), and (
Vw + VM ) VM = 190 V is applied to the picture element, but since this is below the threshold for light emission, this picture element does not emit light. In order to carry out such a driving method, the transistor UT connected to the selection line N on the data side
n is turned OFF, and transistor DTn is turned ON. In the non-selected line M, the transistor UTm is turned "ON" and the transistor DTm is turned "OFF". In other words, the input data Dn of the selected line must be set to "l, ow" and the input data Dm of the non-selected line must be set to High.This is the opposite of the input display data (H: light emission, L: non-light emission). Therefore, a signal "RVC" is required to invert the data. The applied waveform on the data side resulting from the above driving is shown in FIG. 2 as data side X2. The solid line is the applied waveform when the entire surface is emitted, and the dotted line is the applied waveform when the entire surface is erased.

Next, driving on the scanning side will be explained. On the scanning side, the width of the write pulse applied to the selected line is changed by controlling the signal "psw" according to the number of light-emitting picture elements. Here, the truth values of the logic circuit on the scanning side are shown in Table 1.

Table 1 In these driver ICs 120 and 130, each logic circuit 121 and 131 sequentially transfers one piece of "H" data for each line driven during one field period, thereby changing the output mode. The control signal OE,
Can be selected by STB.

For example, when trying to cause picture element A to emit light in an NP field, the situation will be as follows.

■Driver IC120 terminal OEO is set to H”.

By setting 5TBO to "L", all the Cyrisks except Cyrisk PT1 are turned on.

■Driver IC130 terminal OEE is “L”, 5TBE
By setting "H" to "H", all the circuits of the driver IC 130 are turned on.

■Switch SW3 of pull-down potential switching circuit 400
is turned on, and switches SWI and SW2 of the pull-up potential switching circuit 300 are turned off. As a result, line Y1
is set to -190 V, and Y2 to Yi are set to O to 60 V, respectively.

■Set the data side to maintain line X2 at 60V.

As described above, a light emitting voltage of 250 V is applied to the picture element A, and the picture element A emits light.

Next, when trying to make picture element B emit light in the NP field, the situation will be as follows.

■Driver IC120 terminal OEO is “L”, 5T
BO is set to L'', and all NPN) transistors in the driver lCl2O are turned on.

■Driver IC130 terminal OEE is “H”, 5TBE
is set to "H", and all NPN) transistors other than the thyristor PT2 and the NPN) transistor NT2 in the driver ICl30 are turned on.

■Switch SW3 of pull-down potential switching circuit 400
, switch SW2 of the pull-up potential switching circuit 300 is turned off. Turn on SWI. As a result, line Y2
is applied stepwise at voltages of 125v and 250v,
Lines Yl, Y3 to Yi are set to 0 to 60V.

■Set the data side to hold line X2 at Ov.

As described above, a light emitting voltage of 250 V is applied to picture element B, and picture element B emits light.

To summarize the above operations, the operation of this drive circuit is roughly divided into two types of timing, NP field and PN field, as described above, and by completing the execution of these two fields, the thin film EL display device This closes the alternating current pulse necessary for light emission to all picture elements. Furthermore, each field has Nch drive and Pc
, h driving. During the write pulse application period, in the NP field, Nch driving is performed for the odd-numbered selected line on the scanning side, and in the PN field, the opposite driving is performed.

Next, the signal "psw" according to an embodiment of the present invention will be explained using FIGS. 4 and 5. In Figure 4, 1
．． 4 is inverter (N07 circuit), 2.3.7 is AND
The circuit 6 is an OR circuit.

First, the signal “DATA” is inverted by inverter 1 and A
Input to ND circuit 2. The valid period of data is the signal “H”
D” is at “H” level, so the signal “HD”
is also input to the AND circuit 2.

Since the data outputted by this is related to both the N drive and the P drive, in order to extract the data related to only the P drive, a logical product is performed with the signal "PS'" applied to the AND circuit 3. The data outputted by this is transferred to the diode D1.
The electric charge passes through the resistor R2 and charges the capacitor C1. The amount of charge in the capacitor C1 increases as the number of "L" levels in the signal "DATA" increases. The diode D1 is necessary to prevent the charge accumulated in the capacitor c1 from flowing back to the AND circuit 3, and the resistor R2 needs to have an appropriate value selected depending on the width of the signal "HD". Next, after a while after the P drive starts, the inverter 4 causes the capacitor C to
Discharges the charge accumulated in 1. The amount of discharge is controlled by resistor R1. As a result, the capacitor CI(7) level (ie, the voltage level at point A) becomes as shown in FIG.

The voltage level of the capacitor C1 gradually decreases from the start of the P drive by the signal DS, and the fall timing of the P drive can be controlled by the difference in the time at which the OR circuit 6 reaches the switching level. However, since there is a high possibility that the voltage level of this capacitor CI will be at a high level from the input to the OR circuit 6 during N drive, the AND circuit 7 is used to output the output signal PSW only when P drive is necessary. It is necessary to perform a logical product with PWH.

Also, there are cases where no charge is accumulated in the capacitor C1 due to the signal DATA, but even in this case, the compensation pulse PWC is inputted so that a minimum width voltage is applied to the EL picture element, and the logical sum with the OR circuit 6 is performed. Take. Thereby, the width of the write voltage pulse can be controlled at the falling timing of the pulse as shown in FIG. 6, and can be changed from the maximum pulse width PWH to the minimum pulse width PWC.

Furthermore, the time t from inputting the ON signal to the SIRISK to the rising edge of the pull amplifier power switching PSW. ff can be set in advance on the system side during the on-keeping period of Cyrisk, and can prevent malfunctions of Cyrisk.

<Effects of the Invention> As described above, according to the present invention, when a thyristor is used as a switching element of a driver IC, self-off of the thyristor is eliminated, and uniform brightness is always obtained regardless of the number of light-emitting pixels. Thin film EL with excellent quality
A method for driving a display device can be provided.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a circuit configuration of an embodiment of the present invention, FIG. 2 is a timing chart of an embodiment of the present invention, FIG. 3 is a diagram showing a logic circuit of an embodiment of the present invention, and FIG. 4 is a diagram showing an embodiment of the present invention. 5 is a timing chart of an embodiment of the present invention, FIG. 6 is a diagram showing the output voltage waveform of the driver IC of an embodiment of the present invention, and FIG. 7 is a diagram showing the structure of a thin film EL panel. A perspective view, FIG. 8 is a diagram showing the relationship between applied voltage and relative brightness of a thin film EL panel, FIG. 9 is a diagram showing the relationship between the number of light emitting pixels and relative brightness of a conventional thin film EL panel, and FIG. Figure 11 is a diagram showing the conventional display pattern of an EL panel that can distinguish luminance differences. Figure 11 is a diagram showing the voltage waveform applied to the picture element that changes depending on the number of light-emitting picture elements in the past. Figure 12 is the diagram of the output circuit of the driver IC. FIG. 13 is a diagram showing the normal firing waveform of the thyristor, and FIG. 14 is a diagram showing the abnormal firing waveform of the thyristor. 10... Thin film EL panel 50... EL picture element 59... High voltage cyrisk 60... High voltage NPN) Run risk 120.130... High voltage driver IC 121, 13
1...Logic circuit 3.00...Pull-up potential switching circuit 400...
Pull-down potential switching circuit 500...Data inversion control circuit 600...V CCT control circuit Patent applicant Sharp Corporation Representative Patent attorney Nishi 1) Shin

Claims (1)

[Claims] This is a thin film EL display device in which an EL layer is interposed between a scanning side electrode and a data side electrode arranged in a direction crossing each other, and the scanning side electrode is provided with a write pulse having a negative polarity with respect to the data side electrode. a first field for applying a write pulse of positive polarity to the data side electrode to the scanning side electrode, and a second field for applying a write pulse of positive polarity to the data side electrode,
and a method for driving a thin film EL display device that performs line sequential driving in which second fields are alternately repeated, wherein a switching element is a means for applying the write pulse in at least one of the first and second fields. Driving a thin film EL display device comprising a thyristor as a thyristor, changing the width of the write pulse according to the number of light emitting picture elements in a scanning side electrode, and controlling the write pulse width at the rising timing of the pulse. Method.