JPH0683284A - El display device - Google Patents

Abstract

PURPOSE:To improve reliability by suppressing a change in the impressed voltage-luminance characteristics of an electroluminescence(EL) display device using a thin film EL element as a display panel. CONSTITUTION:The thin film EL element 10 has a light emitting layer between plural scanning side electrodes Y1 to Yi and plural data side electrodes X1 to Xi and writing voltage pulses are linearly sequentially impressed to the electrodes Y1 to Yi. A current detecting part 111 detects the level of a current flowing into a writing voltage supplying line 400. A pulse width adjusting part 112 controls the pulse width of writing voltage so as to narrow it when a current value detected by the detecting part 111 is large or increase it when the current value is small.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an EL (electroluminescence) display device, and more particularly to a display device such as an AC drive type capacitive flat matrix display panel.

[0002]

2. Description of the Related Art As shown in FIG. 13, an EL display device of this type includes a display panel 10 composed of a double insulating type (or three-layer structure) thin film EL element and a scanning side high breakdown voltage MOS driver I.
C (Integrated Circuit) 20, 30, 40,
50, a data side driver IC 60, source potential switching circuits 80 and 90, and a data inverting circuit 100. As shown in FIG. 11, the thin film EL element 10 has a strip-shaped transparent electrode 2 made of In ₂ O ₃ in parallel on a glass substrate 1. On top of this, for example, Y ₂ O ₃ , Si
_{3 N 4, SiO 2, TiO} 3, Al 2 O 3 and the like dielectric material layer 3, Mn EL made of ZnS which activator-doped such
Layer 4 and the same Y ₂ O ₃ , Si ₃ N ₄ , Si as described above.
The dielectric material layer 3a made of O ₂ , TiO ₃ , Al ₂ O _3, etc.,
The layers are sequentially stacked to have a film thickness of 500 to 10,000 Å by using thin film technology such as vapor deposition and sputtering (three-layer structure). Then, in the direction orthogonal to the transparent electrode 2, Al
Strip-shaped back electrodes 5 made of, for example, are provided in parallel. Since the thin film EL element 10 has the EL layer 4 sandwiched between the dielectric materials 3 and 3a between the electrodes 2 and 5, it can be regarded as a capacitive element in terms of an equivalent circuit. Further, the thin film EL element 10 exhibits a voltage-luminance characteristic (LV characteristic) as indicated by a symbol lo in FIG. 12, and the light emission threshold voltage Vth is higher than Vw (= 190V). . Therefore, this thin film EL element is driven by applying a relatively high voltage of about 200V.

In this EL display device, the thin film EL element 10 is used.
One of the transparent electrode 2 and the back electrode 5 of the scanning side electrodes Y _{1 to} Y
i, the other is referred to as data-side electrodes X ₁ ~xi. That is, N
Channel high voltage MOS driver IC 20, 30 and P
A write voltage is applied to the scan side electrodes Y which are line-sequentially selected by the scan side drive circuit including the channel high breakdown voltage MOS driver ICs 40 and 50, and at the same time, the N channel high breakdown voltage MOS driver IC and the P channel high breakdown voltage MO are also provided.
Display driving is performed by applying a modulation voltage according to display data for determining light emission / non-light emission to the data side electrode X by the data side drive circuit 60 including an S driver IC. In the display driving, P driving for applying a positive writing voltage to the scanning side electrode Y and N driving for applying a negative writing voltage in consideration of the thin film EL element 10 being a capacitive element. Alternating current drive is used alternately for each frame.

The source potential switching circuit 80 has a control signal P.
It has a voltage switching switch SW ₁ composed of a MOSFET (field effect transistor) controlled to be turned on and off by the SC. By the operation of the switch SW ₁ , the source potentials of all the P-channel MOS transistors PT _{1 to} PTi of the scanning-side P-channel high breakdown voltage MOS driver ICs 40, 50 are set to the positive write voltage Vw + Vm (= 250V) and 0V.
You can switch to and. On the other hand, the source potential switching circuit 90 has a voltage switching SW ₂ composed of a MOSFET which is on / off controlled by a control signal NSC. By the operation of the switch SW ₂ , all N of the scanning side N channel high breakdown voltage MOS driver ICs 20 and 30 are
The source potentials of the channel MOS transistors NT _{1 to} NTi can be switched between the negative write voltage −Vw (= −190V) and 0V. The reason why the switches SW ₁ and SW ₂ are composed of MOSFETs instead of bipolar transistors is that MOSFETs can have a larger energizing ability (saturation current) during pulse operation, and as a result, a voltage is applied to the thin film EL element 10. This is because the light emission time can be secured by applying at high speed. For example, comparing with a pulse width of 1 msec, a bipolar transistor has a collector-emitter voltage Vce.
= 100V, a saturation current Ic of about 0.3 mA is obtained, whereas in the MOSFET, a saturation current Id of about 12 A is obtained when the source-drain voltage Vds = 100V.

The data inverting circuit 100 converts the data DATA input to the data side driver IC 60 into a control signal RV.
It is a circuit for performing inversion processing by C, and is configured by an exclusive OR gate or the like.

In the conventional driving method applied to the EL display device, the voltage Vw + Vm obtained by adding the constant voltage Vm to the voltage Vw (= + 190 V) lower than the light emission threshold voltage is set as the writing voltage during P driving, and N is set. A constant negative voltage −Vw is set as the write voltage during driving. Further, 60V is set as the voltage Vm in this case. Therefore, P
The write voltage during driving is Vw + Vm = 190V + 60V = 250V (1), and the write voltage during N driving is -Vw = -190V (2).

On the other hand, regarding the modulation voltage, a voltage of 0 V is set at the time of P driving and a voltage of Vm (= 60 V) is set at the time of N driving as a modulation voltage corresponding to the light emitting display, and a modulation voltage corresponding to non-light emitting display is set at the time of P driving. Vm (= 60V), N
A voltage of 0 V is set during driving. Therefore, in the picture element, P in the light emitting display is based on the potential of the scanning side electrode.
A voltage of 0V-Vw = 0V-250V = -250V (3) is applied during driving, and a voltage of Vm-Vw = 60V-(-190V) =-250V (4) is applied during N driving. In non-emission display, a voltage of Vm- (Vw + Vm) = 60V-250V = -190V (5) is applied during P driving, and 0V-Vw = 0V-(-190V) = + 190V during N driving (6). Is applied. In FIG. 12, each of the above voltages V
w, Vm, and (Vw + Vm) are shown at corresponding positions on the horizontal axis.

As described above, the voltage Vw equal to or lower than the light emission threshold voltage Vth is applied to the non-emission picture element, and Vt is applied to the light emission picture element.
A voltage Vw '(= Vw + Vm) exceeding h is applied (for the method of applying Vw or (Vw + Vm) in this way,
The details are described in JP-A-63-168998. ). At this time, the difference between the voltage Vw 'applied to the light emitting pixel and the voltage Vw applied to the non-light emitting display (Vw'-Vw) (=
Vm) is referred to as the modulation voltage Vm.

Conventionally, the pulse width of the applied voltage applied to the picture element at the intersection of the i-th X electrode and the j-th Y electrode is set to a constant width based on a clock (not shown).

In general, the L-V characteristic of a thin film EL element shifts to a higher voltage side as the accumulated time when an applied voltage exceeding Vth ((Vw + Vm) in this case) is applied and light emission is increased. Is known (for example, Japanese Patent Publication Sho 61
-39718). That is, in FIG. 12, the curve lo representing the initial L-V characteristic is lo ', whereas the curve representing the L-V characteristic after the light emission for a certain cumulative time is exhibited.
As a result of this characteristic shift, the light-emitting pixel to which the voltage of (Vw + Vm) is applied (which initially had the brightness of Lo) exhibits the brightness of Lo '(<Lo) after a certain cumulative time. And the brightness gradually decreases. Therefore, from the viewpoint of preventing a decrease in luminance, the modulation voltage should be set large so that the voltage applied to the light emitting pixel reaches the high voltage side as much as possible and reaches the region where the slope of the L-V characteristic curve is gentle. Is desirable (the brightness value itself becomes large). However, as described above, since the thin film EL element 10 has one side of a capacitive element, the power consumption required for modulation driving is
(Occupies 50% or more of the total) is the square of the modulation voltage Vm Vm
Proportional to ² . Therefore, from the viewpoint of reducing power consumption, it is desirable to reduce the modulation voltage. Normally, the modulation voltage Vm is 3 when the above two contradictory requests are being made.
It is set between 0 and 70V (it was 60V in the above example).

[0011]

By the way, in the thin film EL element 10 shown in FIG. 11, the material of the EL layer 4 or the dopant is changed, or the material of the dielectric layers 3 and 3a sandwiching the EL layer. The research and improvement efforts are being continued in order to achieve high luminous efficiency and high brightness characteristics by changing the film thickness or changing the film thickness composition of the three layers. When an EL element having such a high luminous efficiency and a high luminance characteristic is realized, its LV characteristic is represented by a curve l ₁ , as shown in FIG. In this case, a small modulation voltage Vm than the conventional EL device represented by curve l ₂ '(<Vm), it is possible to obtain higher luminance can therefore be reduced power consumption. However, there is a problem that the luminance change (L ₁ ′ −L ₁ ) after a certain accumulation time is much larger than the luminance change (Lo′−Lo) of the element having the characteristic represented by the curve lo.

Therefore, the present invention provides an EL display device which solves this problem and can effectively prevent a decrease in the luminance of a thin film EL element having a high luminous efficiency and a high luminance characteristic to enhance the reliability. To provide.

[0013]

In order to achieve the above object, a first invention is a thin film having a light emitting layer between a plurality of scanning side electrodes and a plurality of data side electrodes arranged in directions intersecting with each other. An EL element, a data side drive circuit for applying a modulation voltage corresponding to light emission display and non-emission display to the data side electrode, and a voltage switching switch, and a drive mode is provided in a write voltage supply line connected to the scan side electrode. And a scanning side drive circuit which is provided in the writing voltage supply line and which applies a writing voltage pulse to the scanning side electrodes in a line-sequential manner. Each pixel composed of the intersection of the electrode and the data side electrode is driven by applying a voltage exceeding the light emission threshold voltage of the light emitting layer during light emission display, and emits light during non-light emission display. In an EL display device that is driven by applying a voltage equal to or lower than the voltage, when a current detection unit that detects the magnitude of the current flowing in the write voltage supply line and a current value detected by the current detection unit are large, A pulse width adjusting unit is provided for controlling the write voltage so that the pulse width of the write voltage is narrowed and the pulse width of the write voltage is widened when the current value detected by the current detection unit is small.

The second invention is a thin film EL element having a light emitting layer between a plurality of scanning side electrodes and a plurality of data side electrodes arranged in a direction intersecting with each other, and a light emitting display on the data side electrode. A potential which has a data side drive circuit for applying a modulation voltage corresponding to non-emissive display and a voltage switching switch, and which supplies a write voltage of a different level depending on a drive mode to a write voltage supply line connected to the scanning side electrode A switching circuit and a scanning side driving circuit which is provided on the writing voltage supply line and applies a writing voltage pulse to the scanning side electrodes in a line-sequential manner, each of which includes an intersection of the scanning side electrode and the data side electrode. A voltage higher than the light emission threshold voltage of the light emitting layer is applied to the picture element during the light emission display, and a voltage lower than the light emission threshold voltage is applied during the non-light emission display. In the EL display device, switching voltage switching of the potential switching circuit is characterized by comprising a bipolar transistor.

[0015]

In the EL display device of the first aspect of the invention, the current detector detects the magnitude of the current flowing through the write voltage supply line. The pulse width adjusting unit narrows the pulse width of the writing voltage when the current value detected by the current detecting unit is large, while the pulse width adjusting unit reduces the pulse width of the writing voltage when the current value detected by the current detecting unit is small. Control to widen the pulse width. That is, the higher the peak value of the write voltage, the narrower the pulse width thereof. Further, the pulse width becomes narrower as the current value accompanying the light emission of the thin film EL element increases. Therefore, the pulse width becomes narrower as the thin film EL element exhibits higher luminous efficiency and higher luminous brightness. As a result, the LV on the high voltage side of the thin film EL element showing high light emission efficiency and high light emission luminance.
By making the characteristic curve slower, the decrease in luminance due to the accumulated light emission time is suppressed and the reliability is improved.

In the EL display device of the second aspect of the invention, since the voltage changeover switch of the potential changeover circuit is formed of a bipolar transistor, a saturation current at the time of pulse operation is selected to be smaller by about one digit than the conventional one. It becomes possible. In this case, the pulse width of the write voltage can be effectively reduced. In particular, as the thin film EL element exhibits higher luminous efficiency and higher luminous brightness, the luminous current increases, so that the rising waveform of the write voltage pulse can be effectively blunted. Therefore, by slowing down the LV characteristic curve on the high voltage side of the thin film EL element exhibiting high light emission efficiency and high light emission luminance, the decrease in luminance due to the accumulated light emission time is suppressed and the reliability is enhanced.

【Example】

The EL display device of the present invention will be described in detail below with reference to embodiments. FIG. 1 shows an EL of an embodiment of the present invention.
The display device is shown. This EL display device is a thin film E having a light emission threshold voltage Vth higher than Vw (= 190V).
A display panel including the L element 10 is provided (for simplicity, the same components as those of the conventional one shown in FIG. 13 are denoted by the same reference numerals). Display panel 10 includes a data-side electrodes X ₁ ~xi arranged in the X direction, the scanning electrode Y ₁ in the Y-direction
~ Yi. Further, the scanning side high voltage MOS driver ICs 20, 30, 40, 50 and the data side driver ICs
60, source potential switching circuits 80 and 90, and a data inverting circuit 100.

Scan side N channel high voltage MOS driver I
C20 and C30 are pull-down drive circuits respectively associated with odd-numbered lines and even-numbered lines of the scanning-side electrodes, and N-channel MO that is a pull-down switching element.
It includes logic circuits 21 and 31 such as S transistors NT _{1 to} NTi and shift registers.

Scanning P-channel high breakdown voltage MOS driver I
C40 and C50 are pull-up drive circuits respectively associated with odd-numbered lines and even-numbered lines of the scanning side electrodes, and are P-channel MO that are pull-up switching elements.
It includes logic circuits 41 and 51 such as S transistors PT _{1 to} PTi and shift registers.

The data-side driver IC 60 is a push-pull driving circuit associated with the data-side electrode, and has transistors UT _{1 to} UTi having a pull-up function in which one terminal is connected to the power supply side with a voltage of Vm (= 60 V). , A transistor D having a pull-down function with one terminal grounded
T _{1 to} DTi, diodes UD _{1 to} UDi, DD _{1 to} DDi for causing current to flow in the direction opposite to these transistors, and a logic circuit 70 such as a shift register for on / off controlling each of the above transistors are included.

The source potential switching circuit 80 is provided for all Ps of the scanning side P channel high voltage MOS driver ICs 40 and 50.
A circuit for switching the source potentials of the channel MOS transistors PT _{1 to} PTi between a positive polarity write voltage Vw + Vm (= 250V) and 0V, and a switch SW _{1 formed of} a MOSFET that opens and closes according to a control signal PSC,
It is composed of a discharging diode DD ₈₀ .

The source potential switching circuit 90 is provided for all N of the scanning side N channel high voltage MOS driver ICs 20 and 30.
A circuit for switching the source potentials of the channel MOS transistors NT _{1 to} NTi between a negative write voltage −Vw (= −190V) and 0V, a switch SW _{2 formed of} a MOSFET that opens and closes according to a control signal NSC, and a discharge It is constituted by a diode DD ₉₀ for use.

The data inversion circuit 100 converts the data DATA input to the data side driver IC 70 into the control signal RV.
It is a circuit for performing inversion processing by C, and is configured by an exclusive OR gate or the like.

The current-pulse phase adjusting circuit 200 detects the current flowing in the write voltage line 400, and the phase of the control signal NCL 'based on the magnitude of the current detected by the current detecting section 111. The pulse width adjusting unit 112 for adjusting More specifically, the pulse width adjusting unit 112 generates a control signal NCL 'in which the phase of the signal NCL is shifted with reference to the timing of the signal PSC. When the detected current value is large, the time from when the control signal PSC becomes high level (hereinafter referred to as “H level”) to when the control signal NCL ′ becomes H level is shortened, while the detected current value Is small, the control signal PSC
The time from when the signal becomes H level to when the control signal NCL 'becomes H level is lengthened. These control signals NCL,
NCL 'is, the AND is synthesized by (logical product) circuit 300, the transistors NT ₁ ~NTi on, used in off control. As a result, the larger the peak value of the write voltage pulse, the smaller its pulse width.

The picture element A on the scanning side electrode Y ₁ and the picture element B on the scanning side electrode Y ₂ in the display panel 10 of the EL display device are driven according to the timing chart shown in FIG. Note that here, line inversion drive is performed in which the polarity of the voltage applied to the picture element is inverted for each scanning line.
In the following description, the positive writing voltage Vw is applied to the scanning side electrode Y.
Driving one scanning line to apply + Vm is called P driving,
Applying a negative writing voltage −Vw to the scanning side electrode Y 1
The drive of the scanning line is called N drive.

In the timing chart of FIG. 2, the symbol H (shown in the upper part) indicates the horizontal synchronizing signal, and the H level period of the waveform indicates the data valid period. Reference numeral V indicates a vertical synchronizing signal, and driving of one frame is started at the rising time of this signal. Reference symbol DLS indicates a data latch signal, which is output after the data transfer for one scanning line is completed. Reference symbol RVC indicates a data inversion signal, the waveform of which is at the H level in the data transfer period for one scanning line for P driving, and all the data in this period is inverted. Reference numeral DATA indicates a display data signal, and reference numerals D _{1 to} Di indicate data input to the transistors UT _{1 to} UTi and DT _{1 to} DTi of the data side driver IC 60. The meanings of the other signals NSC to PDADA are explained in Table 1.

[Table 1]

The data side of the driven row by basically switching the modulation voltage to be applied in a cycle of the horizontal period according to the display data to each data-side electrodes X ₁ ~xi, and the 0V Vm (= 60V) Be seen. In the display data, the H level is associated with light emission and the low level (hereinafter referred to as “L level”) is associated with non-light emission.

Next, the switching timing of the modulation voltage will be described with reference to FIG. FIG. 3A shows the internal configuration of the logic circuit 70. In the logic circuit 70, the exclusive OR output (DATA) * of the display data DATA of the next scan line and the control signal RVC, which is provided by the data inversion control circuit 100, while the drive of a scan line is being performed. (RVC) is sequentially input to the shift register 71 having a storage capacity for one scanning line.
The data input to the shift register 71 is captured by the latch circuit 72 by the signal DLS input after the end of the data transfer for one scanning line, and thereafter stored in the latch circuit 72 until the end of the drive timing. By the output of the latch circuit 72, the transistors UT _{1 to} UT
ON / OFF of i, DT _{1 to} DTi is controlled, and as a result,
The voltage of the data electrodes X _{1 to} Xi is 1 for each input of the signal DLS.
It will be switched in the cycle of the horizontal period.

Further, the data inversion control circuit 100
The control signal RVC input to is at the H level during the data transfer period of the scan line that performs the P drive, and is a signal for inverting the display data DATA input to the data inversion control circuit 100 during this period. . The display data DATA during P driving is inverted in this way for the following reason. That is, in the P drive, the transistors of the P channel high voltage MOS driver ICs 40 and 50 are turned on to raise the potential of the selected scanning side electrode Y to Vw + Vm, while the selected data side electrode X, that is, the data including the pixel to be emitted. By setting the potential of the side electrode X to 0 V, a voltage is applied to the picture element at the intersection of the selected data side electrode X and the selected scanning side electrode Y, and light emission driving is performed. At this time, the voltage applied to the picture element is 0V- (Vw + Vm) = 0V-250V = -250V (7) with reference to the scanning electrode side. On the other hand, the potential of the non-selected data-side electrode X, that is, the data-side electrode X including the pixels that do not emit light is Vm (= 60).
V), and the voltage Vm- (Vw + Vm) is applied to the picture element at the intersection of the non-selected data side electrode X and the set scanning side electrode Y.
Is applied. That is, the voltage applied to the picture element is Vm- (Vw + Vm) = 60V-250v = -190V (8), which is below the light emission threshold voltage Vth, and the picture element does not emit light. In order to execute such driving, the transistor UTn connected to the selection data side electrode Xn is set to OFF and the transistor DTn is set to ON. Also,
The transistor UTm connected to the non-selected data side electrode Xm is set to ON and the transistor DTm is set to OFF. That is, the input data Dn corresponding to the selected data side electrode Xn must be set to L level and the input data Dm corresponding to the non-selected data side electrode Xm must be set to H level. In this case, the level is the data inversion control circuit 1
The relationship is inverse to the level of the display data DATA input to 00. Therefore, the control signal RVC is required to invert the display data DATA at this time.

The applied waveform to the data side electrode X ₂ by the above driving is shown in FIG. 2 as the data side X ₂ .

Next, driving on the scanning side will be described with reference to FIGS. 3 (b) and 3 (c). FIG. 3B shows the internal configuration of the N-channel high breakdown voltage MOS driver ICs 20 and 30, and FIG. 3C shows the internal configuration of the P-channel high breakdown voltage MOS driver ICs 40 and 50. In addition, the N-channel high voltage MOS driver I
Table 2 shows a truth table of the logic circuits of C20 and C30, and Table 3 shows a truth table of the logic circuits of the P channel high voltage MOS driver ICs 40 and 50.

[Table 2]

[Table 3]

N-channel high voltage MOS driver IC
20, 30 and P channel high voltage MOS driver IC
Reference numerals 40 and 50 have complementary circuit configurations, and the logics are all opposite to each other, but the configurations are the same. Here, only the N channel high breakdown voltage MOS driver ICs 20 and 30 will be described.

The shift register 110 is a circuit for storing the selected scanning line, and is a clock signal CLOC.
It has a function of fetching the transfer data NDATA while K is at the H level and transferring the data while the clock signal CLOCK is at the L level. Transfer data NDATA
Is once in one frame, as shown in FIG.
The first clock signals NSTodd and NSTeven input after the rising of the vertical synchronization signal V are L level only during the H level period. Further, in this EL display device, the signal NSTOdd is supplied to the odd-numbered N-channel high-voltage MOS driver IC 20 as the clock signal CLOCK.
The signal NSTeven is input to the even-side N-channel high-voltage MOS driver IC 30. As shown in FIG. 2, the clock signal N is generated once every two horizontal periods.
STodd and NSTeven are input because N drive and P drive are alternately repeated for each scanning line. As a result, the clock signal CLOCK input to the N channel high breakdown voltage MOS driver ICs 20 and 30 and the P channel high breakdown voltage M
Clock signal C input to the OS driver ICs 40 and 50
The phase of LOCK is shifted by one horizontal period. Further, when a field in which N driving is executed for odd scan lines is called an NP field and a field in which N driving is executed for even scan lines is called a PN field, only the signal NSTodd is generated in the NP field. In the PN field, only the signal NSTeven is input as the clock signal to the corresponding shift register 110.

The logic circuit 120 receives the two input signals NST and NCL, and receives the N-channel high breakdown voltage MOS driver I
A circuit for switching three states depending transistors NT ₁ ~NTi of C20,30 the data in the shift register 110, the logic follows the truth table 2.

Table 4 shows the above operation.

[Table 4]

That is, the operation of this thin film EL display device is
As described above, it is roughly divided into two types of timings, that is, the NP field and the PN field, and by completing the execution of these two fields, the AC pulse necessary for light emission for all the picture elements is closed. Further, two kinds of driving, P driving and N driving, are performed in each field, and in the NP field, N driving is performed for odd-numbered selection scanning lines and P driving is performed for even-numbered selection scanning lines. In the PN field, the opposite drive is executed. The N drive and the P drive each have a modulation period and a writing period. About 10μ as modulation period
By giving sec and 30 μsec as the writing period, one horizontal period is set to about 40 μsec.

The Nch source potential and the Pch source potential in Table 4 are the source potentials of the transistors of the N-channel high breakdown voltage MOS driver ICs 20 and 30 and the P-channel high breakdown voltage MOS driver ICs 40 and 50 shown in FIG. It is required to apply a voltage with a perfect symmetrical AC waveform that can cause the picture elements to emit light in the PN field.

The signal NSC is an N-channel high withstand voltage M.
It is a control signal of the source potential switching circuit 90 for the OS driver ICs 20 and 30, and when this signal is at H level, that is, the switch SW ₂ of the source potential switching circuit 90.
There source potential -Vw when on (= - 190 V), and the switch SW ₂ is the source potential when the OFF becomes 0V.

The signal PSC is a source potential switching circuit 8 for the P channel high voltage MOS driver ICs 40 and 50.
Control signal of 0. When this signal is at H level, that is, when the switch SW ₁ of the source potential switching circuit 80 is on, the source potential is Vw + Vm (= 250V), and when the switch SW ₁ is off, the source potential is 0V. Becomes

Reference numeral NTodd in Table 4 is the driver I
Transistor in C20, symbol NTeven is driver IC
Transistor in 30, reference numeral PTodd is driver IC4
0 is a transistor within 0, and ON / OFF indicates ON / OFF operation of those transistors at each timing. However, those with parentheses such as (On) are
This means that only the transistor corresponding to the selected scan line is turned on. Turn on these transistors
Signals NCLodd and NSTod control off and on
d, NCLeven, NSTeven, PCLodd, PSTodd,
PCLeven and PSLeven, and the respective logics at each timing are as shown in Table 4.

In the modulation period, the signals NSC and PSC are
As a result, the switches SW ₁ and SW ₂ are turned off, all the transistors of the scanning side driver ICs 20, 30, 40, 50 are turned on, and the potentials of all the scanning side electrodes Y are set to 0V. At this time, the display data DATA is displayed on the data-side electrode X.
Accordingly, the modulation voltage with Vm (= 60V) of 0V is applied. As a result, of the data side electrodes X, Vm (= 60V)
In the electrode to which the modulation voltage of (1) is applied, a positive voltage Vm (= 60V) is charged with respect to the pixel on the scanning side electrode Y as a charging path using the transistors of the N-channel high breakdown voltage MOS driver ICs 20 and 30 as charging paths. , The electrodes to which the modulation voltage of 0V is applied are kept at the potential of 0V with reference to the scanning side electrode Y.

Thus, in the modulation period, the modulation voltage applied to the data side electrode X is set to 0 according to the display data DATA.
By selecting either V or Vm (= 60V), and applying 0V to all scanning side electrodes Y, the potential of the data side electrode Y with respect to the scanning side electrode Y is Vm (= 60V).
Will be charged or held at 0V. In addition, in the N drive and the P drive, the polarity is inverted by the signal RVC even with the same display data DATA, so the voltage waveform applied to the picture element becomes a completely symmetrical AC waveform by alternately executing the NP field and the PN field. .

Next, the operations of the above-mentioned four types of write periods will be described with reference to the equivalent circuits shown in FIGS.

[0044] (1) -Vw the source potential of the transistors of the writing period N channel high voltage MOS driver IC20,30 in NP field N drive - in order to (= 190 V), the signal NSC to turn on the switch SW ₂ Is set to H level. On the other hand, in order to set the source potential of the transistors of the P-channel high breakdown voltage MOS driver ICs 40 and 50 to 0V, the signal PSC is set to the L level that turns off the switch SW ₁ . Further, in order to select one scan line on the odd side, an N-channel high breakdown voltage MOS driver IC
Among the 20 transistors NTodd, the transistors corresponding to one scan line are turned on and the transistors corresponding to the other scan lines are turned off according to the data of the shift register in the logic circuit 21. At this time, the transistors NTeven, PTeven, and PTodd are all turned off. Further, the data-side electrode X continues to be driven during the modulation period.

4A and 4B show the display panel 1 in this state.
An equivalent circuit of 0 is shown. Of these, Figure 4 (a) shows Figure 1.
Is an equivalent circuit when the picture element A shown in (4) is made to emit light, and the picture element A at the intersection of the data side electrode X ₂ and the selective scanning side electrode Y ₁
Only, the positive voltage Vm − (− Vw) = 60V − (− 190V) = 250V (9) is applied to the data side electrode X ₂ with reference to the scanning side electrode Y ₁ to emit light. FIG. 4B is an equivalent circuit when the picture element A is not made to emit light, and the voltage applied to the picture element A is 0 V-(-Vw) = 0 V-(-190 V) = 190 V (10) It does not emit light because it becomes a value below the threshold voltage Vth.

(2) Write period in NP field P drive In order to set the source potential of the transistors of the N-channel high breakdown voltage MOS driver ICs 20 and 30 to 0V, the signal NSC
Is set to the H level for turning on the switch SW ₂ .
On the other hand, P-channel high voltage MOS driver ICs 40, 50
In order to set the source potential of the transistor of Vw + Vm (= 250V), the signal PSC is set to the H level that turns on the switch SW ₁ . Further, in order to select one scanning line on the even side, a P-channel high breakdown voltage MOS driver IC
Among the 50 transistors PTeven, the transistor corresponding to one scan line is turned on according to the data of the shift register in the logic circuit 51, and the transistors corresponding to the other scan lines are turned off. At this time, the transistors PTodd, NTodd, and NTeven are all turned off. Further, the data-side electrode X continues to be driven during the modulation period.

4C and 4D show the display panel 1 in this state.
An equivalent circuit of 0 is shown. Among them, Figure 4 (c) is Figure 1
Is an equivalent circuit when the picture element B shown in FIG. 4 is made to emit light, and the picture element B at the intersection of the data side electrode X ₂ and the selective scanning side electrode Y ₂
Only, the scanning electrode Y ₂ and based on the data side electrodes X ₂ to a negative polarity voltage 0V- (Vw + Vm) = 0V -250V = -250V ... (11) emits light is applied. FIG. 4 (d) is an equivalent circuit when the picture element B does not emit light, and the voltage applied to the picture element B is Vm- (Vw + Vm) = 60V-250V = -190V (12) Since the value is less than Vth, it does not emit light.

(3) Write period in PN field P drive In order to set the source potential of the transistors of the N channel high breakdown voltage MOS driver ICs 20 and 30 to 0V, the signal NSC
Is set to L level which turns off the switch SW ₂ .
On the other hand, P-channel high voltage MOS driver ICs 40, 50
In order to set the source potential of the transistor of Vw + Vm (= 250V), the signal PSC is set to the H level that turns on the switch SW ₁ . Further, in order to select one scan line on the odd side, a P-channel high breakdown voltage MOS driver IC
Among the transistors PTodd of 40, the transistor corresponding to one scanning line is turned on and the transistors corresponding to the other scanning lines are turned off according to the data of the shift register in the logic circuit 41. At this time, the transistors PTeven, NTeven, NTodd are all turned off. Further, the data-side electrode X continues to be driven during the modulation period.

FIGS. 4 (e) and 4 (f) show the display panel 1 in this state.
An equivalent circuit of 0 is shown. Of these, Figure 4 (e) is Figure 1
Is an equivalent circuit when the picture element A shown in (4) is made to emit light, and the picture element A at the intersection of the data side electrode X ₂ and the selective scanning side electrode Y ₁
Only the voltage 0V- (Vw + Vm) of the negative polarity with respect to the scanning electrode Y ₁ to the data side electrodes _{X 2 = 0V-250V = -250V} (13) emits light is applied. FIG. 4 (f) is an equivalent circuit when the picture element A does not emit light, and the voltage applied to the picture element A is Vm- (Vw + Vm) = 60V-250V = -190V (14) and the light emission threshold voltage Vth or less. The value of is not emitted.

[0050] (4) The potential of the transistor in the write period N channel high voltage MOS driver IC20,30 in PN field N driving -Vw = - To (= 190 V), the signal NSC to turn on the switch SW ₂ Is set to H level. On the other hand, in order to set the potential of the transistors of the P channel high breakdown voltage MOS driver ICs 40 and 50 to 0V, the signal PSC is set to the L level that turns off the switch SW ₁ . Further, in order to select one scanning line on the even side, the transistor corresponding to one scanning line is turned on according to the data of the shift register in the logic circuit 31 from the transistors NTeven of the N-channel high breakdown voltage MOS driver IC 30. The transistors corresponding to the other scan lines are turned off. At this time, the transistor N
Todd, PTodd, and PTeven are all turned off. Further, the data-side electrode X continues to be driven during the modulation period.

4G and 4H show the display panel 1 in this state.
An equivalent circuit of 0 is shown. Of these, Figure 4 (g) is Figure 1
Is an equivalent circuit when the picture element B shown in FIG. 4 is made to emit light, and the picture element B at the intersection of the data side electrode X ₂ and the selective scanning side electrode Y ₂
Only, the voltage Vm of the positive polarity with respect to the scanning electrode Y ₂ in the data side electrodes _{X 2 - (- Vw) =} 60V + 190V = 250V ... (15) emits light is applied. FIG. 4 (h) is an equivalent circuit when the picture element B is not made to emit light, and the voltage applied to the picture element B is 0V-(-Vw) = 0V + 190V = 190V (16) and the light emission threshold voltage Vth or less. It does not emit light because it becomes a value.

In this EL display device, the pulse width of the writing voltage applied from the scanning side electrode is determined in the following process. In the case of P drive, first, the transistor PTi (shown in FIG. 1) corresponding to the selected electrode Y is turned on, Vw + Vm (= 250 V) is applied via SW ₁ , and the constant time (several microseconds (Several tens of microseconds) The state is maintained. After this, SW ₁ is turned off, and then NT _{1 to} NTi
Is turned on, and the electric charge charged in the picture element is discharged to the ground GND through the diode in the circuit 90. The pulse width of the write voltage is determined in this process. In the case of N drive, NTi corresponding to the selected electrode Y is turned on, -Vw (= -190V) is applied via SW _2, and the state is kept for a certain time (several microseconds to several tens of microseconds). Maintained. After this, SW ₂ turns off, and then PT _{1 to} PTi
Is turned on, and the electric charge charged in the pixel is discharged to the ground GND through the diode in the circuit 80. The pulse width of the write voltage is determined in this process. Here, in this EL display device, the current detection unit 111 of the current-pulse phase adjustment circuit 200 causes the current flowing through SW _1.
(Current flowing in the write voltage line 400) is detected, and the timing (phase) at which the signal NCL 'becomes H level is adjusted based on the detected current value, as shown in FIG. 5 (b). That is, when the detected current value is large, the signal PS
While shortening the time from when C becomes H level to when the signal NCL 'becomes H level, when the detected current value is small, the signal NC becomes high after the signal PSC becomes H level.
Increase the time until L'goes to H level. As a result, the larger the peak value of the write voltage pulse, the smaller its pulse width. In addition, since a current flows with light emission, the pulse width becomes narrower as the light emission brightness increases.
That is, as shown in FIG. 5A, the pulse width becomes narrower as the writing voltage becomes higher or the emission brightness becomes higher. Therefore, the thin film E which originally has a sharp emission luminance vs. applied voltage characteristic as shown by the characteristic curve l ₁ shown in FIG.
The L element shows the apparent light emission luminance vs. applied voltage characteristic represented by the characteristic curve l _{2 in} FIG. Therefore, the decrease in brightness due to the accumulated light emission time is suppressed, that is, (L ₂ −L ₂ ′) <(L ₁ −
L ₁ ′) and reliability is improved.

Although the case of the P drive has been described so far, the same can be considered in the case of the N drive.
That is, as shown in FIG. 7, a current-pulse phase adjusting circuit 220 is provided instead of or together with the current-pulse phase adjusting circuit 200. The circuit 220 includes a current detection unit 121 that detects a value of a current flowing through the write voltage supply line 420, and the current detection unit 12.
The pulse width adjusting unit 122 adjusts the phase of the control signal PCL based on the current value detected by the signal No. 1. The pulse width adjusting unit 122 shifts the phase of the signal PCL with reference to the timing of the control signal NSC as a control signal PCL ′.
To occur. When the detected current value is large, the time from when the control signal NSC becomes H level to when the control signal PCL ′ becomes H level is shortened, while when the detected current value is small, the control signal NSC becomes H level. The time until the control signal PCL 'becomes the H level after the signal becomes the level is lengthened. These signals PCL and PCL 'are connected to the AND circuit 3
Synthesized by 20, the transistors PT ₁ ~PTi on, used in off control. By the operation of the current-pulse phase adjusting circuit 220, the width of the writing voltage pulse can be narrowed as the writing voltage becomes higher and the emission brightness becomes higher, just as in the case of the P drive. , thin-film EL element has inherent steep edge emission luminance versus applied voltage characteristic as the characteristic curve l ₁ shown in FIG. 6, a light emission luminance versus applied voltage characteristic on over characteristic curve l ₂ Narumi in FIG Show. Therefore, the decrease in luminance due to the accumulated light emission time is suppressed, that is, (L ₂ −L ₂ ′) <(L ₁ −L ₁ ′), and the reliability is improved.

As will be described below, the switches SW ₁ and SW ₂ forming the potential switching circuits 80 and 90 are switched to the MO
A bipolar transistor may be used instead of the SFET. That is, N-channel high voltage MOS driver IC
The switch SW ₂ for switching the source potential of the transistors 20 and 30 and the switch SW ₁ for switching the source potential of the transistors of the P-channel high breakdown voltage MOS driver ICs 40 and 50 have current-voltage characteristics as shown in FIG. Adopt a bipolar transistor with. The characteristic curve of this bipolar transistor is approximately approximated to a linear region A and a saturation region (constant current region) B. As an example, P drive when a bipolar transistor is used as the switch SW ₁ will be described. As shown in FIG. 9 (a), the control signal PSC becomes conductive state SW ₁ at the H level, one line Yi of the scanning electrode is selected and that the transistor PTi is on connected thereto And so on (others are off). At this time, the change in the potential V of the scanning-side electrode Yi with time first shows that the potential increases linearly with time corresponding to the region B of the characteristic curve shown in FIG. 8 as shown in FIG. Go (area C). Next, the potential increases exponentially corresponding to the area A of the characteristic curve of FIG. 8 (area D). Since we are now considering the case of P drive, as described above,
The control signal PSC becomes H level, and Vw is applied to the scanning side electrode Yi.
After a write voltage of + Vm is applied, after a certain time, N
T ₁ ~NTi is rendered conductive, the write voltage circuit 90
Is discharged to the ground GND through the diode. Therefore, as shown in FIG. 10, the write voltage (Vw + Vm)
Becomes higher voltage (Vw + Vm) ', the pulse width near the peak becomes narrower. Further, as the emission current of high-luminance emission is exhibited and the emission current flows, the inclination of the starting portion of the region D becomes gentler and the pulse width also becomes narrower. Therefore, by slowing down the LV characteristic curve on the high voltage side of the thin film EL element exhibiting high light emission efficiency and high light emission luminance, it is possible to suppress the decrease in luminance due to the accumulated light emission time and improve the reliability. it can.

The above-mentioned operation when the switches SW ₁ and SW ₂ are bipolar transistors has the same effect as Vw (=
It can be obtained even if the power supply for supplying 250 V) is a constant current power supply.

[0056]

As is apparent from the above, the E of the present invention is
The L display device detects the magnitude of the current flowing through the write voltage supply line, and narrows the pulse width of the write voltage when the current value detected by the current detector is large, while the current detector detects the current. When the current value detected by the detection unit is small, a pulse width adjustment unit that controls the pulse width of the write voltage to be widened is provided.Therefore, the pulse width should be narrowed as the peak value of the write voltage pulse increases. You can Further, since the current value increases as the thin film EL element emits light, the pulse width can be narrowed as the thin film EL element exhibits higher emission brightness. Therefore, by slowing down the LV characteristic curve on the high voltage side of the thin film EL element exhibiting high light emission efficiency and high light emission luminance, it is possible to suppress the decrease in luminance due to the accumulated light emission time and improve the reliability. it can.

Further, in the EL display device of the present invention, since the voltage switching switch forming the potential switching circuit is composed of the bipolar transistor, the pulse width becomes narrower as the peak value of the write voltage pulse increases. be able to. Further, since the current value increases as the thin film EL element emits light, the pulse width can be narrowed as the thin film EL element exhibits higher emission brightness.
Therefore, as in the above case, therefore, the L- at the high voltage side of the thin film EL element that exhibits high luminous efficiency and high luminous brightness is obtained.
By slowing the V characteristic curve, it is possible to suppress the decrease in luminance due to the accumulated light emission time and improve the reliability.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of an EL display device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an operation timing of the EL display device.

FIG. 3 is a diagram showing a configuration of a logic circuit in the EL display device.

FIG. 4 is a diagram showing an equivalent circuit in an operating state of a thin film EL element that constitutes the EL display device.

FIG. 5 is a diagram showing a waveform of a write voltage in the EL display device.

FIG. 6 is a diagram showing applied voltage-luminance characteristics of a high brightness thin film EL element and a normal thin film EL element.

FIG. 7 is a diagram showing a modification of the EL display device.

FIG. 8 is a diagram showing current-voltage characteristics of a voltage switching switch including a bipolar transistor included in the potential switching circuit.

FIG. 9 is a diagram for explaining the operation of the EL display device including the voltage changeover switch composed of the bipolar transistor.

FIG. 10 is a diagram for explaining the operation of the EL display device including the voltage changeover switch composed of the bipolar transistor.

FIG. 11 is a view showing a partially cutaway cross section of a thin film EL element.

FIG. 12 is a diagram showing applied voltage-luminance characteristics of a thin film EL element.

FIG. 13 is a diagram showing a configuration of a conventional thin film EL display device.

[Explanation of symbols]

10 Display panel 20,30 N-channel high voltage MOS driver IC 40,50 P-channel high voltage MOS driver IC 60 Data side driver IC 80,90 Source potential switching circuit 111 Current detector 112 Pulse width adjuster 200,220 Voltage-pulse phase adjustment circuit 300 or 320 the AND circuit 400, 420 a write voltage supply line SW _1, SW ₂ voltage switching switch X ₁ ~xi data side electrodes Y ₁ ~Yi scanning electrode

Claims (2)

[Claims] 1. A thin film EL element having a light emitting layer between a plurality of scanning side electrodes and a plurality of data side electrodes arranged in a direction intersecting with each other, and the data side electrode corresponding to light emitting display and non-light emitting display. A data side drive circuit for applying a modulation voltage and a voltage changeover switch, and a potential changeover circuit for supplying a write voltage supply line connected to the scanning side electrode with a write voltage of a different level according to a drive mode,
A scanning side drive circuit which is provided in the writing voltage supply line and applies a writing voltage pulse to the scanning side electrodes in a line-sequential manner is provided, and for each picture element formed by the intersection of the scanning side electrode and the data side electrode. In the EL display device which is driven by applying a voltage exceeding the light emission threshold voltage of the light emitting layer during the light emitting display, and is driven by applying a voltage lower than the light emission threshold voltage during the non-light emitting display. When the current detection unit that detects the magnitude of the current flowing in the line and the current value detected by the current detection unit are large, the pulse width of the write voltage is narrowed while the current value detected by the current detection unit is An EL display device comprising a pulse width adjusting section for controlling the pulse width of the write voltage to be wide when the pulse width is small. 2. A thin film EL element having a light emitting layer between a plurality of scanning side electrodes and a plurality of data side electrodes arranged in a direction intersecting with each other, and the data side electrode corresponding to light emitting display and non-light emitting display. A data side drive circuit for applying a modulation voltage and a voltage changeover switch, and a potential changeover circuit for supplying a write voltage supply line connected to the scanning side electrode with a write voltage of a different level according to a drive mode,
A scanning side drive circuit which is provided in the writing voltage supply line and applies a writing voltage pulse to the scanning side electrodes in a line-sequential manner is provided, and for each picture element formed by the intersection of the scanning side electrode and the data side electrode. In the EL display device which is driven by applying a voltage exceeding the light emission threshold voltage of the light emitting layer during the light emission display, and is driven by applying a voltage lower than the light emission threshold voltage during the non-light emission display. The EL display device characterized in that the voltage changeover switch is composed of a bipolar transistor.