JPH01116685A - Blinking controller - Google Patents

Abstract

PURPOSE: To shorten time required for controlling the blinking of a central processing unit(CPU) by alternately switching two storage means by using an outputted selection signal. CONSTITUTION: The blinking control device is provided with storage means 13, 14, a selection signal preparing means 16 for preparing a selection signal 15 for alternately selecting either one of the means 13, 14 and a multiplexer 20 for alternately reading out picture information 17, 18 outputted from the means 13, 14 to an output part 19. The multiplexer 20 alternately switches the two storage means 13, 14 to control blinking. Even when much character information to be used for blinking exist, time occupied by the CPU to execute blinking control processing can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a computer terminal device, and, for example, to a blinking control device that performs blinking control of a video output device.

[Conventional technology]

The blinking control device is used, for example, when a programmer develops software by blinking program data that requires attention on a screen so that the programmer can confirm the data.

FIG. 5 illustrates the configuration of a conventional blinking control device and its surroundings. A microprocessor is used in the solid processing device 1, and various devices are connected via a bus 2 such as a data bus. Among these devices, RO
A read-only memory (M) 3 stores instructions for executing a program that controls overall video output control including blinking control. R.A.
M (random access memory) 4 is for temporarily storing data, and a graphic display controller (GDC) 5 is for controlling video output including blinking control. .

The graphic display controller 5 includes a character generator (CG) that stores character information.
6. A video RAM (video random access memory) 7 into which character information is written and an output section 8 which outputs the character information written in this memory are connected. The output unit 8 is a CRT (CRT) such as a graphic display.
A CathodeRay Tube) display is used.

The central processing unit 1 reads out a command signal 9 stored in the ROM 3 for executing a video output control program including blinking control. The read command signal 9 is
Written to the graphic display controller 5. Graphic display controller 5
Now, according to the command signal 9, the character generator 6
The character information 10 stored in is written into the video RAM 7. The written character information 10 is
Graphic display: output by the controller 5 to the output section 8.

Thereafter, the central processing unit 1 instructs the graphic display controller 5 to erase the character information 10 written in the video RAM 7. When specifying blinking, the central processing unit l inputs character information 1.
Blinking control was performed by writing or erasing 0 into the video RAM 7 at regular intervals.

[Problem that the invention seeks to solve]

The circuit configuration of the conventional blinking control device is video RA.
M7 and output section 8 were connected in a one-to-one correspondence. When specifying blinking, text information 10 is video RA
Data is written to or erased from M7 at regular intervals. Therefore, as the amount of character information 10 increases, the amount of writing to and erasing from video RAM 7 increases in proportion. Therefore, the central processing unit 1 is exclusively used for blinking control processing. This has caused a problem in that the processing time of the program is delayed.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a blinking control device that can reduce the time that a central processing unit devotes to blinking control processing.

[Means for solving problems]

In the present invention, as shown in principle in FIG.
3 right and second storage means 14, selection signal creation means 16 for creating a selection signal 15 for alternatively selecting either the first storage means 13 or the second storage means 14, and this selection Image information 17 outputted from the first storage means 13 or the second storage means 14 by the signal 15, respectively.
．． 18 to the output section 19 alternately.
0 in the blinking control device.

That is, in the present invention, the multiplexer 20 uses the selection signal 15 created by the selection signal creation means 16 to alternately switch between the two storage means 13 and 14, thereby controlling blinking.

Therefore, even when the amount of character information used for blinking is large, it is possible to reduce the amount of time that the central processing unit devotes to blinking control processing.

〔Example〕

The present invention will be described in detail below with reference to Examples.

FIG. 2 shows the configuration of a blinking control device and its surroundings in an embodiment of the present invention. This blinking control device has 1. A central processing unit 21 is installed to control blinking. Central processing unit 21
is connected to various devices described below through a bus 22 such as a data bus.

Among the devices connected to the bus 22, the ROM 23 is a read-only memory that stores instructions for executing programs related to overall video output control including blinking control.
It's memory. RAM 24 is a working random access memory for temporarily storing data. The character generator 25 is a generator that stores patterns of characters. 1st video RAM2
The sixth video RAM 27 and the second video RAM 27 are configured to write character information (not shown) stored in the character generator 25 onto respective bitmaps. The control unit 28 includes a multiplexer 29
When a predetermined selection signal (not shown) is input manually, the character information written on the bitmaps of the first video RAM 26 and the second video RAM 27 is output to the output unit 3.
Output to 1. The output section 31 generally has a graphic
A CRT display such as a display is used.

Figure 3 shows the character and
This figure shows the procedure for writing character information from a generator into two video RAMs. This figure will be explained together with the second figure of noodles. A clock (not shown) output from the outside is input to the control unit 28 (FIG. 2) (step ■).The central processing unit 21 reads the character code 32 in synchronization with this clock. The character code 32 is outputted from the ROM 23 to the control unit 28 (step ■).When the character code 32 is input to the character generator 25, character information (not shown) is output from the character code 32.
The data is supplied to the first video RAM 26 or the second video RAM 27 based on (step 2).

On the other hand, a status signal (not shown) output from the central processing unit 21 (FIG. 2) is supplied to the control unit 28. When specifying blinking, for example, “ABC”
When blinking the character, the following operations occur.

In the control unit 28, when the input status signal is "1" (step ■; Y), the first video RAM
Character information “A B
CD E” is written in synchronization with the above-mentioned data (step ■). When the status signal is “0” (step ■; N), character information is written on the bitmap provided in the second video RAM 27. “DE” is written in synchronization with the aforementioned clock (step ■). The character information “ABCDE” and “DE” written to the first video RAM 26 and the second video RAM 27 are as follows:
They are read out alternately using a multiplexer 29 shown in FIG. Two character information "ABCDE"',
"DE" are the first video RAM 26 and the second video RAM 26, respectively.
The write control from step (2) to step (2) is repeated until the operation of writing to the video RAM 27 is completed (step (2); N).

FIG. 4 shows a procedure for reading character information from two video RAMs by a multiplexer when specifying blinking. This figure will be explained in conjunction with FIG. 2. A command for reading character information (not shown) is stored in a buffer of the ROM 23 (FIG. 2). When specifying blinking, the central processing unit 2
1 (FIG. 2) outputs a blinking designation command 33 (FIG. 2) for designating blinking from the ROM 23 (step 2; Y). When the blinking designation command 33 is manually input to the control section 28, the selection signal 34 (FIG. 2) is sent to the control section 28 in synchronization with the aforementioned clock.
is output from. This selection signal 34 is sent to the multiplexer 2
9, the first video RAM 26 (Figure 2)
(Step ■). As a result of the selection, the character information "ABCDE" written on the bitmap of the first video RAM 26 is sent to the multiplexer 2.
9 (FIG. 2).

The reading operation of the character information "ABCDE" continues until the successive output time t reaches time TI. Read time t is time T
1, the character information "ABCDE" written on the bitmap provided in the first video RAM 26 is cleared (step ■).
. In order to be able to write information other than the character information “ABCDE”, the character information “ABCDE” that has been read out
” will be cleared.

After being cleared, when the selection signal 35 (FIG. 2) output from the control section 28 is input to the multiplexer 29, the second video RA'M 27 (FIG. 2) is selected (step 2). As a result of the selection, the second video RA
The character information "DE" written on the bitmap provided in M2.7 is read out to the multiplexer 29. This reading operation of the character information "DE" continues until the reading time t reaches time T2. When the read time t reaches time T2 (step 2; Y), the character information "DE" written on the bitmap to be read from the second video RAM'27 is cleared (step 2). The character information "'DE" that has been read twice is cleared so that information other than the character information "DE" can be written. After being cleared, the first video RAM 26
Then, the operation of reading each predetermined character information from the second video RAM 27 is completed (step 2; Y). To continue this read operation, select signal 35 (Fig. 2)
is input to the multiplexer 29, and the first video RAM 26 is selected again (step 2; N).

In this way, two character information “ABCDE” and “DE”
are the first video RAM 26 and the second video RAM
27 are read out alternately at regular intervals. This results in
In the output section 31, character information "ABC" blinks on the display.

When the central processing unit 21 shown in FIG. 2 outputs a command (not shown) to continue printing character information without blinking from the ROM 23 (step ■; N), the character information is stored in the first video RAM 26 or Second video RAM 27
(Step ■). 1st video RAM
26 or the second video RAM 27 is displayed by the output section 31.

In this embodiment, text information is used as the information to be written into the first video R1' 126 and the second video RAM 27, but it goes without saying that the information is not limited to this and image information may also be used.

〔Effect of the invention〕

In this way, in the present invention, since the blinking control IT is provided with a selection signal generation means such as a control section, it is possible to alternately switch between the two storage means using the selection signal outputted from the control section. Ta. As a result, blinking control can be performed, so that the time required for the central processing unit to perform blinking control can be reduced. Therefore, the program processing time of the central processing unit is not delayed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the basic configuration of the blinking control device of the present invention, and FIG. 2 is a block diagram showing the blinking control device and its peripheral configuration in an embodiment of the present invention. FIG. 3 is a block diagram showing the procedure for writing character information from a character generator into two video RAMs when specifying blinking;
Fig. 4 is a block diagram showing the procedure for reading character information from two video RAMs by a multiplexer when specifying blinking, and Fig. 5 shows the configuration of a conventional blinking control device and its surroundings. It is a block diagram. 11... Image information generation means (character generator), 13... First storage means (first video RAM), 14... Second storage means ( 2nd video RAM), 16... selection signal creation means (control section)
, 20...Multiplexer. Applicant: NEC Corporation Representative

Claims (1)

[Scope of Claims] Image information generation means; first storage means and second storage means for storing image information output from the image information generation means at predetermined timing; and these first storage means or selection signal generation means for generating a selection signal for alternatively selecting one of the second storage means; A blinking control device comprising: a multiplexer for reading data.