JPH01114182A - Balancing transmission circuit for video signal - Google Patents

Balancing transmission circuit for video signal

Info

Publication number
JPH01114182A
JPH01114182A JP27076187A JP27076187A JPH01114182A JP H01114182 A JPH01114182 A JP H01114182A JP 27076187 A JP27076187 A JP 27076187A JP 27076187 A JP27076187 A JP 27076187A JP H01114182 A JPH01114182 A JP H01114182A
Authority
JP
Japan
Prior art keywords
video signal
base
collector
resistor
transmission circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27076187A
Other languages
Japanese (ja)
Inventor
Yoshihiro Tanigawa
嘉浩 谷川
Keiichi Mizuguchi
水口 慶一
Yoshiaki Ueno
植野 嘉章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP27076187A priority Critical patent/JPH01114182A/en
Publication of JPH01114182A publication Critical patent/JPH01114182A/en
Pending legal-status Critical Current

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  • Closed-Circuit Television Systems (AREA)

Abstract

PURPOSE:To obtain a video signal balancing transmission circuit offering small size, low cost and space saving by applying an unbalanced signal to a base of a transistor(TR) of a circuit employing NPN and PNP TRs and resistors. CONSTITUTION:A collector of an NPN TR 4 connects to a positive power supply and an output terminal and a collector of a PNP TR 5 connects to a negative power supply and an output terminal. Emitters of the TRs 4, 5 are connected together via a resistor 8. A base of the TR 5 is connected to ground via a capacitor 7. A video signal is given to the base of the TR 4. The collector current of the TRs 4, 5 is controlled by a voltage applied to the base of the TR 4 to attain balanced transmission of the video signal. The voltage applied to the collector of the TR 4 and the feedback resistor 8 is used in common by a DC voltage fed to the output terminal. The amplitude voltage ratio of the input and output signals is decided by the ratio of load impedances of the resistor 8 and the monitor TV.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は平行2線ケーブルにカメラ側から映像信号を、
モニタテレビ側からカメラ供給DC電源を送る2線式映
像監視装置の映像信号送信回路の方式に関する。
[Detailed Description of the Invention] [Technical Field] The present invention transmits video signals from the camera side to a parallel two-wire cable.
The present invention relates to a system for a video signal transmission circuit of a two-wire video monitoring device that sends DC power supplied to the camera from the monitor television side.

〔背景技術〕[Background technology]

ベースバンド映像信号を平行2線ケーブルで伝送する場
合の方式として、ビデオトランス1を使用した第1図の
方式がある。この回路では不平衡の映像信号をトランス
によって平衡系の信号に変換し伝、送する。平行2線ケ
ーブルに不平衡信号を注入した場合には、不要輻射によ
り他の機器たとえばAMラジオ等に妨害を与えることに
なる。
As a method for transmitting a baseband video signal using a parallel two-wire cable, there is a method shown in FIG. 1 that uses a video transformer 1. In this circuit, an unbalanced video signal is converted into a balanced signal by a transformer, and then transmitted. If an unbalanced signal is injected into a parallel two-wire cable, unnecessary radiation will cause interference to other equipment, such as an AM radio.

この方式にカメラ用電源が重畳されている場合には、電
源分離回路2、直流しゃ断用コンデンサ3を付加するこ
とになる。この回路を第2図に示す。ここで、電源分離
回路はベースバンド映像信号周波数帯域で、電源あるい
はグランドに対し高いインピーダンスが保持されるもの
でなければならない。この回路方式の欠点として、 (i)ビデオトランス1はベースバンド映像信号を伝送
するものであるから、数十H2の低周波から数MH,の
高周波までの伝送帯域を持つものであるから、形状が大
きい、高価であるという欠点がある。
If a camera power supply is superimposed on this system, a power supply separation circuit 2 and a DC cutoff capacitor 3 will be added. This circuit is shown in FIG. Here, the power supply separation circuit must maintain a high impedance with respect to the power supply or ground in the baseband video signal frequency band. The drawbacks of this circuit system are: (i) Since the video transformer 1 transmits baseband video signals, it has a transmission band from a low frequency of several tens of H2 to a high frequency of several MH2, so the shape It has the disadvantages of being large and expensive.

(ii)直流しゃ断用コンデンサはベースバンド映像信
号の数十H8の低周波を通過させなければならず、大容
量のコンデンサを使用する必要があり、形状が大きくな
る。
(ii) The DC cutoff capacitor must pass the low frequency of several tens of H8 of the baseband video signal, and a large capacity capacitor must be used, resulting in a large size.

の2点がある。There are two points.

〔発明の目的〕[Purpose of the invention]

本発明は安価で、形状が小さ(、省スペースとなる、映
像信号平衡伝送回路を提供することにある。
An object of the present invention is to provide a video signal balanced transmission circuit that is inexpensive, small in size (and space saving).

〔発明の開示〕[Disclosure of the invention]

本発明は、電源電圧が重畳された平行2線ケーブルに映
像信号を伝送する映像信号伝送回路において、平行2線
ケーブルが接続される1対の出力端子にNPN型トラン
ジスタとPNP型トランジスタのコレクタを接続し、2
つのトランジスタのエミッタ間を抵抗を介して接続し、
一方のトランジスタのベースに入力信号電圧を印加する
構成としたものである。
The present invention provides a video signal transmission circuit that transmits a video signal to a parallel two-wire cable on which a power supply voltage is superimposed, in which the collectors of an NPN transistor and a PNP transistor are connected to a pair of output terminals to which the parallel two-wire cable is connected. Connect, 2
Connect the emitters of two transistors through a resistor,
The configuration is such that an input signal voltage is applied to the base of one transistor.

本発明による映像信号平衡伝送回路の実施例を第3図に
示す。4はNPN型トランジスタ、5はPNP型トラン
ジスタ、6はバイアス用抵抗、7はコンデンサ、8は帰
還抵抗である。4のコレクタは電源がプラス側の出力端
子に接続され、PNP型トランジスタ5のコレクタは電
源がマイナス側の出力端子に接続される。NPN型トラ
ンジスタ4とPNP型トランジスタ5のエミッタは抵抗
8を介して接続される。P、NP型トランジスタ5のベ
ースはコンデンサ7を介して接地する。映像信号はNP
N型トランジスタ4のベースに入力する。ここではNP
N型トランジスタ4のベースに印加される電圧により、
NPN型トランジスタ4、PNP型トランジスタ5を流
れるコレクタ電流が制御され、映像信号の平衡伝送が行
なえる。ここでNPN型トランジスタ4、帰還抵抗8の
コレクタ印加電圧は出力端子に印加されているDC電圧
が兼ねることになる。入力信号と出力信号の振幅電圧比
は帰還抵抗8とモニタTV側の負荷インピーダンスの比
により決定される。参考までにモニタTV側の回路を第
4図に示す。9.10は電源重畳回路、11は負荷イン
ピーダンス、12はDCLや所用コンデンサ、13は、
差動アンプである。ここで第3図のグランドと第4図の
グランドは電位が異なる。差動アンプ13により平衡信
号を不平衡信号に変換する。
An embodiment of a video signal balanced transmission circuit according to the present invention is shown in FIG. 4 is an NPN type transistor, 5 is a PNP type transistor, 6 is a bias resistor, 7 is a capacitor, and 8 is a feedback resistor. The collector of PNP transistor 5 is connected to the output terminal on the positive side of the power source, and the collector of PNP transistor 5 is connected to the output terminal on the negative side of the power source. The emitters of the NPN transistor 4 and the PNP transistor 5 are connected via a resistor 8. The base of the P, NP type transistor 5 is grounded via a capacitor 7. Video signal is NP
Input to the base of N-type transistor 4. Here NP
Due to the voltage applied to the base of the N-type transistor 4,
Collector currents flowing through the NPN transistor 4 and the PNP transistor 5 are controlled, allowing balanced transmission of video signals. Here, the voltage applied to the collectors of the NPN transistor 4 and the feedback resistor 8 is the DC voltage applied to the output terminal. The amplitude voltage ratio between the input signal and the output signal is determined by the ratio of the feedback resistor 8 and the load impedance on the monitor TV side. For reference, the circuit on the monitor TV side is shown in Figure 4. 9.10 is the power supply superimposition circuit, 11 is the load impedance, 12 is the DCL and necessary capacitors, and 13 is,
It is a differential amplifier. Here, the ground in FIG. 3 and the ground in FIG. 4 have different potentials. A differential amplifier 13 converts the balanced signal into an unbalanced signal.

尚、NPN型トランジスタ4とPNP型)ランジスタ5
に代えてPチャンネルをFETとNチャンネルFETを
使用することも可能である。
In addition, NPN type transistor 4 and PNP type) transistor 5
It is also possible to use a P-channel FET and an N-channel FET instead.

〔発明の効果〕〔Effect of the invention〕

本発明により、電源電圧が重畳されている平行2線ケー
ブルの両端にNPNトランジスタとPNPトランジスタ
のコレクタを接続し、両トランジスタのエミッタ間を抵
抗を介して接続した平衡信号送出回路を構成することに
より、不平衡信号を一方のトランジスタのベースに印加
することにより、平衡信号を平行2線ケーブルに送出で
きるとともに、ケーブルと平衡信号送出回路間にコンデ
ンサを介することがなく、また上記回路はトランスで構
成されるものでないから、形状が小さくなり、また低コ
スト化が実現できる。
According to the present invention, by configuring a balanced signal sending circuit in which the collectors of an NPN transistor and a PNP transistor are connected to both ends of a parallel two-wire cable on which power supply voltages are superimposed, and the emitters of both transistors are connected via a resistor. By applying an unbalanced signal to the base of one transistor, a balanced signal can be sent to a parallel two-wire cable, and there is no need to use a capacitor between the cable and the balanced signal sending circuit, and the above circuit is constructed with a transformer. Since it is not a plastic material, the size can be reduced and costs can be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は従来例を示し、第1図はビデオトラ
ンスを使用した従来の映像信号平衡伝送回路、第2図は
電源分離回路を付加した映像信号平衡伝送回路、第3図
及び第4図は実施例を示し、第3図は本発明による映像
信号平衡伝送回路、第4図はモニタテレビ側の映像信号
受信回路。 特許出願人  松下電工株式会社 代理人弁理士 竹光敏丸 ほか2名 第1図 ] 第2図 第3図 第4図
Figures 1 and 2 show conventional examples. Figure 1 is a conventional video signal balanced transmission circuit using a video transformer, Figure 2 is a video signal balanced transmission circuit with a power separation circuit added, and Figure 3 and FIG. 4 shows an embodiment, FIG. 3 shows a video signal balanced transmission circuit according to the present invention, and FIG. 4 shows a video signal receiving circuit on the monitor television side. Patent Applicant Matsushita Electric Works Co., Ltd. Patent Attorney Toshimaru Takemitsu and 2 others Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

【特許請求の範囲】[Claims] 電源電圧が重畳された平行2線ケーブルに映像信号を伝
送する映像信号伝送回路において、平行2線ケーブルが
接続される1対の出力端子にNPN型トランジスタとP
NP型トランジスタのコレクタを接続し、2つのトラン
ジスタのエミッタ間を抵抗を介して接続し、一方のトラ
ンジスタのベースに入力信号電圧を印加することを特徴
とする映像信号平衡伝送回路。
In a video signal transmission circuit that transmits a video signal to a parallel two-wire cable with a superimposed power supply voltage, an NPN transistor and a P
A video signal balanced transmission circuit characterized in that the collectors of NP type transistors are connected, the emitters of two transistors are connected via a resistor, and an input signal voltage is applied to the base of one transistor.
JP27076187A 1987-10-27 1987-10-27 Balancing transmission circuit for video signal Pending JPH01114182A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27076187A JPH01114182A (en) 1987-10-27 1987-10-27 Balancing transmission circuit for video signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27076187A JPH01114182A (en) 1987-10-27 1987-10-27 Balancing transmission circuit for video signal

Publications (1)

Publication Number Publication Date
JPH01114182A true JPH01114182A (en) 1989-05-02

Family

ID=17490623

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27076187A Pending JPH01114182A (en) 1987-10-27 1987-10-27 Balancing transmission circuit for video signal

Country Status (1)

Country Link
JP (1) JPH01114182A (en)

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