JPH01111872A - Sputtering device - Google Patents

Sputtering device

Info

Publication number
JPH01111872A
JPH01111872A JP26889387A JP26889387A JPH01111872A JP H01111872 A JPH01111872 A JP H01111872A JP 26889387 A JP26889387 A JP 26889387A JP 26889387 A JP26889387 A JP 26889387A JP H01111872 A JPH01111872 A JP H01111872A
Authority
JP
Japan
Prior art keywords
target
sputtering
semiconductor substrate
substrate
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26889387A
Other languages
Japanese (ja)
Other versions
JPH0583633B2 (en
Inventor
Shigeru Nakajima
中島 成
Hiroshi Yano
浩 矢野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP26889387A priority Critical patent/JPH01111872A/en
Publication of JPH01111872A publication Critical patent/JPH01111872A/en
Publication of JPH0583633B2 publication Critical patent/JPH0583633B2/ja
Granted legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Physical Vapour Deposition (AREA)

Abstract

PURPOSE:To prevent the adhesion of sputtered grains other than those directly sputtered from a target to a substrate and to improve film quality by providing an electrode having an electrostatically charged surface and capturing the grains of a sputtering material sputtered from a target. CONSTITUTION:A semiconductor substrate 1 is placed on a grounded supporting body and a target 2 is connected to the negative side of an electric power source 3, and an electric field from the substrate 1 toward the target 2 is generated between the substrate 1 and the target 2. A capture electrode 5 is disposed between the inner side face of a vacuum chamber 8 and the target 2 and substrate 1 and connected to the positive side of an electric power source 9, by which the surface of the capture electrode 5 is positively electrostatically charged and attracts sputtered grains. Accordingly, the adhesion of the grains of a sputtering material to the inner wall of the chamber 8 and, further, the adhesion of the resulting film to the substrate 1 due to peeling can be prevented. Moreover, a grounded mesh structure 4 is provided between the electrode 5 and the target 2 and substrate 1, by which the electric field generated form the electrode 5 is prevented from adversely affecting the electric field for sputtering, and simultaneously, the grains of the sputtering material can be allowed to penetrate.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はスパッタリング装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a sputtering device.

〔従来技術及びその問題点〕[Prior art and its problems]

半導体素子の製造の際、半導体基板上にスパッタ材の薄
膜を付着させる方法として、スパッタリング法が、その
付着薄膜の品質の点から採用されている。このスパッタ
リング法を実施する装置として、例えば第3図に示すよ
うものが知られている。
When manufacturing semiconductor devices, a sputtering method is adopted as a method for depositing a thin film of a sputtering material onto a semiconductor substrate from the viewpoint of the quality of the deposited thin film. For example, an apparatus shown in FIG. 3 is known as an apparatus for carrying out this sputtering method.

第3図を用いて従来のスパッタリング装置を説明する。A conventional sputtering apparatus will be explained using FIG.

この図に示す装置では、真空チャンバ8内にA「ガスを
導入し、半導体基板1とターゲット2間に電圧源3を用
いて電界を発生し、Arガスをイオン化しターゲット2
に衝突させ、ターゲット2から飛び出すターゲットのス
パッタ材粒子、例えばW等の金属又は、S 102等の
酸化物を半導、  体基板1上に付着させている。
In the apparatus shown in this figure, A gas is introduced into a vacuum chamber 8, an electric field is generated between the semiconductor substrate 1 and the target 2 using a voltage source 3, and the Ar gas is ionized.
The target sputtering material particles ejected from the target 2, such as metals such as W or oxides such as S102, are deposited on the semiconductor substrate 1.

〔発明の解決すべき問題点〕[Problems to be solved by the invention]

上記構成の従来のスパッタリング装置では、ターゲット
2から飛び出したスパッタ材粒子は半導体基板1上ばか
りでなく真空チャンバ8の内壁にも付着する。そして、
内壁に付着したスパッタ材粒子により形成される膜は、
ある程度の厚さになると、膜自身の応力により剥がれ落
ちる。そして、剥がれ落ちた薄膜が半導体基板1上に落
下して再付着することがある。その再付着により半導体
基板上に良質な膜を形成することが出来ない。また、第
3図に示す構造とは逆に半導体基板が上側に設けられ、
ターゲットが下側に設けられているようなスパッタリン
グ装置では、剥離した膜がターゲット上に落下し、その
落下した膜が再度Arイオンのターゲットへの衝突によ
り、半導体基板に向けて飛び出し、再付着する。この場
合にも、半導体基板上に良質な膜を形成できない。
In the conventional sputtering apparatus having the above configuration, sputtering material particles ejected from the target 2 adhere not only to the semiconductor substrate 1 but also to the inner wall of the vacuum chamber 8 . and,
The film formed by sputtered material particles adhering to the inner wall is
Once the film reaches a certain thickness, it will peel off due to its own stress. Then, the peeled off thin film may fall onto the semiconductor substrate 1 and re-adhere thereon. Due to the redeposition, a high quality film cannot be formed on the semiconductor substrate. Further, contrary to the structure shown in FIG. 3, the semiconductor substrate is provided on the upper side,
In sputtering equipment where the target is installed on the lower side, the peeled film falls onto the target, and as Ar ions collide with the target again, the fallen film flies out toward the semiconductor substrate and re-attaches. . In this case as well, a high quality film cannot be formed on the semiconductor substrate.

本発明は上記問題点を解決し、半導体基板上に良質な膜
を付着することができるスパッタリング装置を提供する
ことを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide a sputtering apparatus that can deposit a high-quality film on a semiconductor substrate.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のスパッタリング装置はスパッタリングすべきス
パッタ材よりなるターゲットと、前記ターゲットとスパ
ッタ材が付着されるべき物体との間に電界を発生させる
手段と、その表面が帯電され、ターゲットからのスパッ
タ材粒子を捕獲する電極とを有することを特徴とする。
The sputtering apparatus of the present invention includes a target made of a sputtering material to be sputtered, a means for generating an electric field between the target and an object to which the sputtering material is to be attached, and a surface of the sputtering device is electrically charged so that particles of the sputtering material from the target It is characterized by having an electrode that captures.

更に、本発明に従うスパッタリング装置はスパッタリン
グすべきスパッタ材よりなるターゲットと、このターゲ
ットとその上にスパッタ材が付着されるべき物体との間
に電界を発生させる手段と、その表面が帯電され、ター
ゲットからのスパッタ材粒子を捕獲する電極と、この電
極と電界発生手段及び物体との間に配置され、接地され
ている手段とを有することを特徴とする 〔作用〕 本発明に従うスパッタリング装置は、上記のように構成
しているので、ターゲットから飛び出したスパッタ材粒
子のうち、スパッタ材が付着されるべき物体の表面以外
に向かうスパッタ材粒子と、真空チャンバの内壁に付着
し剥離落下するスバ・ツタ材薄膜を確実に捕獲し、半導
体基板上に再付着させないので、半導体基板上に良質な
膜が形成できる。
Furthermore, the sputtering apparatus according to the present invention includes a target made of a sputtering material to be sputtered, a means for generating an electric field between the target and an object on which the sputtering material is to be deposited, and a surface of the sputtering device is electrically charged. [Function] The sputtering apparatus according to the present invention is characterized by having an electrode that captures sputtering material particles from the source, and a means that is disposed between the electrode, the electric field generating means, and the object, and is grounded. Among the sputtering material particles that fly out from the target, there are sputtering material particles that are directed toward other than the surface of the object to which the sputtering material is to be attached, and sputtering material particles that adhere to the inner wall of the vacuum chamber and peel off and fall. Since the material thin film is reliably captured and not re-deposited on the semiconductor substrate, a high quality film can be formed on the semiconductor substrate.

〔実施例〕〔Example〕

以下図面を参照しつつ本発明に従う実施例について説明
していく。
Embodiments according to the present invention will be described below with reference to the drawings.

各図において同一の符号を付した要素は同一のものを示
し、その為、重複した説明は省略する。
Elements with the same reference numerals in each figure indicate the same elements, and therefore, redundant explanation will be omitted.

第1図は本発明に従うスパッタリング装置の側断面構成
図である。図に示すように、スパッタリング装置は真空
チャンバ8と、半導体基板1上に付着させるべきスパッ
タ材、例えばW −S t O2よりなるターゲット2
と、このターゲット2と半導体基板1との間に電界を発
生させるための電源3と、ターゲット2から半導体基板
1の方向以外へとび出したスパッタ材粒子を捕獲する捕
獲電極5と、ターゲット2及び半導体基板1と捕獲電極
5との間に配置されたメツシュ構造体4とより構成され
る。ここで、メツシュ構造体4は捕獲電極5より生じる
電界がターゲット2と半導体基板lとの間に生じるスパ
ッタリングのための電界に悪影響をおよぼすのを防止し
、かつ、スパッタ材粒子が透過できるように構成される
FIG. 1 is a side cross-sectional configuration diagram of a sputtering apparatus according to the present invention. As shown in the figure, the sputtering apparatus includes a vacuum chamber 8 and a sputtering material to be deposited on a semiconductor substrate 1, such as a target 2 made of W-S t O2.
, a power source 3 for generating an electric field between the target 2 and the semiconductor substrate 1, a capture electrode 5 for capturing sputtering material particles protruding from the target 2 in a direction other than the direction toward the semiconductor substrate 1, and It is composed of a mesh structure 4 disposed between a substrate 1 and a capture electrode 5. Here, the mesh structure 4 prevents the electric field generated by the capture electrode 5 from adversely affecting the electric field for sputtering generated between the target 2 and the semiconductor substrate l, and allows the sputtering material particles to pass through. configured.

半導体基板1は基板支持体la上に設置し、この基板支
持体1aは、接地されている。一方、ターゲット2は電
源3のマイナス側に接続し、半導体基板1とターゲット
2との間に半導体基板lからターゲット2に向かう電界
を発生させる。捕獲電極5を、真空チャンバ8の内側面
とターゲット2及び半導体基板1との間に配置し、電源
9のプラス側に接続する。これにより捕獲電極5の表面
はプラスに帯電し、スパッタ材粒子を吸着する。
The semiconductor substrate 1 is placed on a substrate support la, and the substrate support la is grounded. On the other hand, the target 2 is connected to the negative side of the power source 3, and an electric field is generated between the semiconductor substrate 1 and the target 2 from the semiconductor substrate l toward the target 2. A capture electrode 5 is disposed between the inner surface of the vacuum chamber 8 and the target 2 and semiconductor substrate 1, and is connected to the positive side of a power source 9. As a result, the surface of the capture electrode 5 is positively charged and adsorbs sputtering material particles.

半導体基板1及びターゲット2と捕獲電極5との間に配
置したメツシュ構造体4は、接地しておく。
The mesh structure 4 disposed between the semiconductor substrate 1 and the target 2 and the capture electrode 5 is grounded.

また、このメツシュ構造体4はスパッタ材のような導電
性を有する材料で形成し、ターゲット2から飛び出した
スパッタ材粒子が透過して、捕獲電極5へ到達できるよ
うに網目状のメツシュ構造にする。
The mesh structure 4 is made of a conductive material such as sputtering material, and has a mesh structure so that particles of the sputtering material ejected from the target 2 can pass through and reach the capture electrode 5. .

第2図にこのメツシュ構造体4と捕獲電極5の種々の変
形構成例を示す。この変形構造例で必要とされる要件は
、捕獲電極5より生じる電界が、半導体基板1とターゲ
ット2との間に発生しているスパッタリングのための電
界を乱さないようにすることである。その為には、捕獲
電極5と半導体基板1及びターゲット2との間にメツシ
ュ構造体4を配置することである。第2(a)図ではメ
ツシュ構造体4及び捕獲電極5を半導体基板1及びター
ゲット2を囲むように、同心円状に配置した例を示し、
第2(b)図は捕獲電極5を円筒状に形成し、その捕獲
電極5を半導体基板1及びターゲット2の周囲に均等に
配置し、その捕獲電極5の周囲にメツシュ構造体4で取
り囲むように配置している例を示す。第2(c)図は捕
獲電極5を角柱状に構成し、この捕獲電極5を半導体基
板1及びターゲット2の周囲に均等に配置し、更にメツ
シュ構造体4をこの捕獲電極5と半導体基板1等との間
であって半導体基板1等を囲むように配置した例を示す
。更に第2(d)図は、第2(a)図の変形例で、捕獲
電極5を矩形状に形成し配置した例を示す。
FIG. 2 shows various modified configuration examples of the mesh structure 4 and the capture electrode 5. A requirement for this modified structure example is that the electric field generated by the capture electrode 5 should not disturb the electric field for sputtering generated between the semiconductor substrate 1 and the target 2. For this purpose, a mesh structure 4 is disposed between the capture electrode 5 and the semiconductor substrate 1 and target 2. FIG. 2(a) shows an example in which the mesh structure 4 and the capture electrode 5 are arranged concentrically so as to surround the semiconductor substrate 1 and the target 2,
In FIG. 2(b), the capture electrode 5 is formed into a cylindrical shape, the capture electrode 5 is arranged evenly around the semiconductor substrate 1 and the target 2, and the capture electrode 5 is surrounded by a mesh structure 4. An example is shown below. In FIG. 2(c), the capture electrode 5 is formed into a prismatic shape, the capture electrode 5 is arranged evenly around the semiconductor substrate 1 and the target 2, and the mesh structure 4 is arranged between the capture electrode 5 and the semiconductor substrate 2. An example is shown in which the semiconductor substrate 1 and the like are arranged so as to surround the semiconductor substrate 1 and the like. Furthermore, FIG. 2(d) is a modification of FIG. 2(a), and shows an example in which the capture electrode 5 is formed and arranged in a rectangular shape.

次にターゲット2から真空チャンバ8の内壁に向かって
飛び出したスパッタ材粒子を捕獲電極4で捕獲できる原
理について説明する。
Next, the principle by which sputtering material particles flying out from the target 2 toward the inner wall of the vacuum chamber 8 can be captured by the capture electrode 4 will be explained.

真空チャンバ8内でArイオンが電源3により発生する
電界によりターゲット2に衝突し、ターゲット2からス
パッタ材粒子が飛び出す。このように飛び出したスパッ
タ材粒子は、一部、半導体基板1に向かい半導体基板1
に付着するが、その一方で、真空チャンバの内壁に向か
うスパッタ材粒子7がある。この様なスパッタ材粒子7
はメツシュ構造体4のメツシュ部を通り抜は捕獲電極5
に付着する。
Ar ions in the vacuum chamber 8 collide with the target 2 due to the electric field generated by the power source 3, and sputtering material particles fly out from the target 2. Some of the sputtering material particles that fly out in this way head toward the semiconductor substrate 1 and move toward the semiconductor substrate 1.
On the other hand, there are sputtered material particles 7 that are directed towards the inner walls of the vacuum chamber. Such sputtered material particles 7
passes through the mesh part of the mesh structure 4 and the capture electrode 5
Attach to.

そして、この捕獲電極5の表面は先に説明したようにプ
ラスに帯電されているので、飛来したスパッタ材粒子は
確実に捕獲電極5に付着し、捕獲電極5から落下して半
導体基板1の上に再付着することはない。また、捕獲電
極5に付着せず真空チャンバ8の内壁に薄膜となって付
着したスパッタ材薄膜が、スパッタリング中に内壁より
剥離しても、この捕獲電極5により再度捕獲され、半導
体基板1上に落下して良質な膜の形成を妨げることはな
い。またメツシュ構造体4のメツシュ部を透過出来ず、
メツシュ構造体4の表面に付着したスパッタ材粒子も捕
獲電極5の吸引力により、捕獲電極側5に引っ張られ半
導体基板上に再付着することは防止される。更に、この
捕獲用電極5はスパッタリング中ばかりでなく真空チャ
ンバ8の真空を破る際にも帯電させておき、真空を破る
際に生じる気流の乱れによるスパッタ材薄膜の再付着を
防止することが好ましい。
Since the surface of the capture electrode 5 is positively charged as described above, the flying sputtering material particles reliably adhere to the capture electrode 5 and fall from the capture electrode 5 onto the semiconductor substrate 1. It will not re-attach. Furthermore, even if a thin film of sputtering material that does not adhere to the capture electrode 5 but adheres as a thin film to the inner wall of the vacuum chamber 8 is peeled off from the inner wall during sputtering, it will be captured again by the capture electrode 5 and deposited on the semiconductor substrate 1. It will not fall and prevent formation of a good quality film. Also, it cannot pass through the mesh part of the mesh structure 4,
The sputtered material particles adhering to the surface of the mesh structure 4 are also pulled toward the capture electrode side 5 by the suction force of the capture electrode 5, and are prevented from re-adhering onto the semiconductor substrate. Furthermore, it is preferable that the capture electrode 5 is electrically charged not only during sputtering but also when the vacuum in the vacuum chamber 8 is broken, to prevent the sputtered material thin film from re-adhering due to airflow turbulence that occurs when the vacuum is broken. .

ここで、メツシュ構造体4を設けたのは以下の理由によ
る。捕獲電極5はスパッタ材粒子捕獲用電源9によりそ
の表面が帯電しているため、この帯電により、電界が生
じる。そして、この電界が、Arイオンに作用するター
ゲット2と半導体基板1との間の電界に悪影響をおよぼ
す可能性がある。
Here, the reason why the mesh structure 4 is provided is as follows. Since the surface of the capture electrode 5 is charged by the sputtering material particle capture power supply 9, an electric field is generated by this charge. This electric field may have an adverse effect on the electric field between the target 2 and the semiconductor substrate 1 that acts on Ar ions.

そこで、この接地されているメツシュ構造体4により捕
獲電極5による電界をシールドし、悪影響が及ぶのを防
いでいる。
Therefore, the grounded mesh structure 4 shields the electric field generated by the capture electrode 5, thereby preventing any adverse effects from occurring.

本発明は上記実施例に限定されるものでなく種々の変形
例が考えられ得る。
The present invention is not limited to the above embodiments, and various modifications may be made.

具体的には、上記実施例はターゲットが半導体基板の上
に位置しているスパッタリング装置を示しているが、そ
の逆の場合、すなわち、半導体基板がターゲットの上に
位置しているスパッタリング装置にも本発明は使用でき
る。
Specifically, although the above embodiment shows a sputtering apparatus in which the target is located on a semiconductor substrate, the sputtering apparatus in which the semiconductor substrate is located on the target can also be used in the reverse case. The invention can be used.

更に、上記実施例ではメツシュ構造体を設けたスパッタ
リング装置について説明したが、この様なメツシュ構造
体を設けなくても、捕獲電極の電界がスパッタリングの
電界に悪影響を与えない程度のものであれば、敢えて設
ける必要はない。
Furthermore, in the above embodiment, a sputtering apparatus provided with a mesh structure was described, but even if such a mesh structure is not provided, as long as the electric field of the capture electrode does not adversely affect the sputtering electric field. , there is no need to intentionally provide it.

また更に、捕獲電極とメツシュ構造体の変形例を第2図
に種々示したが、この例に限定されるものでなく、更に
別の変形例をも考えられ得る。
Furthermore, although various modifications of the capture electrode and the mesh structure are shown in FIG. 2, the present invention is not limited to this example, and other modifications may also be considered.

更に上記実施例では一定の電圧を印加するタイプのスパ
ッタリング装置について説明したが、このタイプ以外の
スパッタリング装置、例えばマグネトロンスパッタリン
グ装置等についても本発明は適用できる。
Further, in the above embodiments, a type of sputtering apparatus that applies a constant voltage has been described, but the present invention can also be applied to sputtering apparatuses other than this type, such as a magnetron sputtering apparatus.

更に、上記実施例では捕獲電極を半導体基板及びターゲ
ットの周囲を覆うように配置しであるが、捕獲電極を真
空チャンバ内のある特定の場所に設けてそこに剥離して
落下するスパッタ材薄膜を捕獲するようにしてもよい。
Furthermore, in the above embodiment, the capture electrode is arranged so as to cover the semiconductor substrate and the target, but the capture electrode is provided at a specific location in the vacuum chamber, and the sputtering material thin film that peels off and falls is placed there. You may also try to capture it.

〔発明の効果〕〔Effect of the invention〕

本発明に従うスパッタリング装置は上述のように構成し
ているので、スパッタリングの際、ターゲットから直接
飛来したスパッタ材粒子以外は半導体基板上に付着しな
いので、良質な膜を半導体基板上に形成できる。
Since the sputtering apparatus according to the present invention is configured as described above, during sputtering, particles of sputtering material other than those directly flying from the target do not adhere to the semiconductor substrate, so that a high-quality film can be formed on the semiconductor substrate.

通常側壁などから剥がれて落下する薄膜はターゲットよ
り飛来してくるスパッタ材粒子よりも形状が大きいので
それ自身が帯電している電荷量はターゲットより飛来す
る粒子よりはるかに大きい。
Usually, the thin film that peels off from the side wall and falls is larger in shape than the sputtering material particles that fly from the target, so the amount of charge it carries is much larger than the particles that fly from the target.

そのため捕獲電極に印加する電圧を調整することにより
ある大きさの粒子のみを掴まえることができ半導体基板
には常に正常な大きさを有した粒子のみを半導体基板上
に付着させ、良質な薄膜を形成できる。
Therefore, by adjusting the voltage applied to the capture electrode, only particles of a certain size can be captured, and only particles of a normal size are always attached to the semiconductor substrate, creating a high-quality thin film. Can be formed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例の側断面構成図、第2図は捕獲
電極とメツシュ構造体の構成の変形例を示す図、及び第
3図は従来のスパッタリング装置の構成図である。 1・・・半導体基板、2・・・ターゲット、3・・・電
源、4・・・メツシュ構造体、5・・・捕獲電極、8・
・・真空チャンバ、9・・・スパッタ材粒子捕獲用電源
。 特許出願人  住友電気工業株式会社 代理人弁理士   長谷用  芳  樹間      
   寺   崎   史   朗第1図 (a)                (c)(1:
+)                 (d)第2図
FIG. 1 is a side cross-sectional configuration diagram of an embodiment of the present invention, FIG. 2 is a diagram showing a modified example of the configuration of a capture electrode and a mesh structure, and FIG. 3 is a configuration diagram of a conventional sputtering apparatus. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Target, 3... Power source, 4... Mesh structure, 5... Capture electrode, 8...
...Vacuum chamber, 9...Power supply for capturing sputtering material particles. Patent applicant: Sumitomo Electric Industries, Ltd. Representative patent attorney Yoshiki Hase
Fumiaki Terasaki Figure 1 (a) (c) (1:
+) (d) Figure 2

Claims (1)

【特許請求の範囲】 1、スパッタリング装置において、 スパッタリングすべきスパッタ材よりなるターゲットと
、 前記ターゲットとスパッタ材が付着されるべき物体との
間に電界を発生させる手段と その表面が帯電され、前記ターゲットからのスパッタ材
粒子を捕獲する電極手段とを有することを特徴とするス
パッタリング装置。 2、スパッタリング装置において、 スパッタリングすべきスパッタ材よりなるターゲットと
、 前記ターゲットとスパッタ材が付着されるべき物体との
間に電界を発生させる手段と その表面が帯電され、前記ターゲットからのスパッタ材
粒子を捕獲する電極と 前記電極と前記電界発生手段及び前記物体との間に配置
され、接地されている手段とを有することを特徴とする
スパッタリング装置。
[Claims] 1. A sputtering apparatus comprising: a target made of a sputtering material to be sputtered; a means for generating an electric field between the target and an object to which the sputtering material is to be attached; 1. A sputtering apparatus comprising: electrode means for capturing sputtering material particles from a target. 2. In a sputtering apparatus, a target made of a sputtering material to be sputtered, a means for generating an electric field between the target and an object to which the sputtering material is to be attached, and the surface thereof is charged, so that particles of the sputtering material from the target are 1. A sputtering apparatus comprising: an electrode that captures the electric field; and means that is disposed between the electrode, the electric field generating means, and the object, and is grounded.
JP26889387A 1987-10-23 1987-10-23 Sputtering device Granted JPH01111872A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26889387A JPH01111872A (en) 1987-10-23 1987-10-23 Sputtering device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26889387A JPH01111872A (en) 1987-10-23 1987-10-23 Sputtering device

Publications (2)

Publication Number Publication Date
JPH01111872A true JPH01111872A (en) 1989-04-28
JPH0583633B2 JPH0583633B2 (en) 1993-11-26

Family

ID=17464731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26889387A Granted JPH01111872A (en) 1987-10-23 1987-10-23 Sputtering device

Country Status (1)

Country Link
JP (1) JPH01111872A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08239761A (en) * 1995-02-28 1996-09-17 Hiroshima Nippon Denki Kk Sputtering device
WO1998053117A1 (en) * 1997-05-22 1998-11-26 Tokyo Electron Limited Apparatus and method for sputter depositing dielectric films on a substrate
US6077403A (en) * 1997-06-06 2000-06-20 Anelva Corporation Sputtering device and sputtering method
US6361667B1 (en) 1997-03-18 2002-03-26 Anelva Corporation Ionization sputtering apparatus
CN104008268A (en) * 2014-03-20 2014-08-27 上海宇航系统工程研究所 Verification method for visible light scattering characteristic analysis model of space target

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916975A (en) * 1982-07-20 1984-01-28 Canon Inc Sputtering apparatus

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916975A (en) * 1982-07-20 1984-01-28 Canon Inc Sputtering apparatus

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08239761A (en) * 1995-02-28 1996-09-17 Hiroshima Nippon Denki Kk Sputtering device
US6361667B1 (en) 1997-03-18 2002-03-26 Anelva Corporation Ionization sputtering apparatus
WO1998053117A1 (en) * 1997-05-22 1998-11-26 Tokyo Electron Limited Apparatus and method for sputter depositing dielectric films on a substrate
US6475353B1 (en) * 1997-05-22 2002-11-05 Sony Corporation Apparatus and method for sputter depositing dielectric films on a substrate
US6077403A (en) * 1997-06-06 2000-06-20 Anelva Corporation Sputtering device and sputtering method
CN104008268A (en) * 2014-03-20 2014-08-27 上海宇航系统工程研究所 Verification method for visible light scattering characteristic analysis model of space target

Also Published As

Publication number Publication date
JPH0583633B2 (en) 1993-11-26

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