JPH01110973A - Detection of abnormal condition in recording head - Google Patents

Abstract

PURPOSE:To enable easy detection of an abnormal condition both before a printing operation and during the printing operation, by performing the detection while passing a discrimination bit signal with a small number of bits in a data line of a shift register. CONSTITUTION:When a discrimination bit signal 52a is not transmitted from an output terminal of a shift register 21 or is changed due to a fault such as breaking of wire in a part of a recording head such as the shift register 21, an error signal is outputted through a gate circuit 36 because two signals do not coincide with each other. In this case, an error signal instead of an ON signal is outputted from an LED element-driving circuit 4 to a control panel 6 or the like, thereby informing the user of the condition. When the discrimination bit signal 52a transmitted from the output terminal of the shift register or is changed due to breaking of wire or the like in the head during a printing operation, an error signal is outputted from the gate circuit 36. In this case, a driving power supply 5 is turned OFF, the printing operation is stopped, and an error signal is outputted to the control panel 6 or the like, thereby informing the user of the condition.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a method for detecting an abnormality in a recording head in which recording elements are arranged in a line, such as an optical printer head or a thermal head using an LED or LCD array.

``Prior art'' Conventionally, for example, a predetermined latent image is formed on a photoreceptor drum while selectively energizing LED elements arranged in a line to emit light, and the latent image is visualized based on electrophotography. Optical printers that form a predetermined image on a recording medium are well known.
Since the recording head used in this type of printer generally has a large number of LED elements arranged at high density, it is necessary to avoid an unnecessary increase in the number of signal input terminals for controlling the energization of the elements. A method has been adopted in which a signal is serially transferred from one or several locations, and after the transfer is completed, each LED element is simultaneously controlled to emit light based on the signal.

To briefly explain the circuit configuration of such an LED recording head, 1 is a shift register, a latch/driver circuit, and an L
It consists of a recording head consisting of an ED array, and the shift register is provided with a signal input terminal, a clock terminal, and a signal output terminal, respectively. According to this circuit, electrical signals serially transferred from the signal input terminal are transferred to the shift register according to the clock signal, and after all signal transfer is completed, the driver circuit is operated, and the connections are made in a one-to-one correspondence. Each LED element is controlled to emit light simultaneously via wiring.

``Problems to be Solved by the Invention'' However, the LED array generally has elements of around 300 to 400 dots per inch, which are
2600~34 when arranged in a line for 4 equivalent paper piles
00 dots, and if we try to emit light at the same time, even if a current of 10 mA flows per LED element, a current of 28 to 34 A will flow, and therefore the power supply capacity to drive the recording head will inevitably be required. If there is an electrical failure in a part of the head, an abnormally large current may flow through the head, and if printing is performed in this state, various parts may be damaged due to the abnormal current. may cause damage or other accidents.

Furthermore, as mentioned above, the flip-flop elements constituting the shift register must also be composed of 2,800 to 3,400 element arrays corresponding to the LED elements, and data signals are serially transmitted to the register. Therefore, if a disconnection or short circuit occurs in one part, it will affect not only that part but also the flip-flop element array downstream, which may result in incorrect data being printed. Even if noise occurs on the input side, even if blank data such as line spacing and margins is originally being transferred, the data may become garbled during data transfer and may be transferred as print data. .

In order to eliminate this drawback, for example, as shown in FIG. 4, a shift register 1 mounted on a thermal head 101 is used.
The print data storage circuit 103 and comparison circuit 104 capable of storing data of the same number of bits as 02 are connected to the thermal head 1.
01, and simultaneously inputs the same print data to the shift register 102 and the print data storage circuit 103,
A data out signal outputted from each of the shift register 102 and the print data storage circuit 103 is sent to a comparison circuit 104.
proposed an error check circuit configured to detect the presence or absence of an abnormality based on the coincidence and mismatch between the two data out signals. (Unexamined Showa Elf-2849!3
No. 3) However, since the shift register 102 has 2,800 to 3,400 element arrays as described above, the print data storage circuit 1.3 has the same storage capacity.
Providing 2,600 to 34 points for each dot line not only increases the size of the device and complicates the circuit configuration.
Performing comparison detection while sequentially serially data-out data elements of 00 significantly increases the detection time, which becomes a major obstacle in achieving high speed. However, if you try to compare and detect all of the 2,600 to 3,400 data elements for each dot line, malfunctions are likely to occur, and even normal cases may be determined to be abnormal, so maintenance is performed each time to reconfirm the abnormal state. The error check function does not work smoothly.

In view of the shortcomings of the prior art, the present invention provides a method for detecting a problem before the start of printing operation or when the printing head section has a short circuit or other abnormality, or when the transferred data is garbled due to noise or the like. It is an object of the present invention to provide a method for detecting an abnormality in a recording head, which is configured to be able to detect the abnormality easily and with a simple configuration, thereby making it possible to prevent the occurrence of printing defects in advance or one after another.

Another object of the present invention is that the abnormality detection is performed promptly;
An object of the present invention is to provide a method for detecting an abnormality in a recording head that can cope with increased speed.

Another object of the present invention is to provide a recording head abnormality detection method that improves detection accuracy and, in particular, significantly reduces the rate at which unnecessary print operations are stopped or maintenance is performed.

``Means for solving the problem'' The great invention is to detect an abnormal state of the recording head by comparing the signal that passed through the shift register and was data-out with the signal that did not pass through the shift register. This is similar to the prior art described above.

1. However, the present invention does not detect the image data signal itself, but adds an identification bit signal of - or multiple bits to a data signal having a number of bits equal to at least one image line, and detects these signals. By sending the identification bit signal from the data input terminal into the shift register, the identification bit signal passes sequentially through the flip-flop elements that make up the shift register, and prevents disconnections, short circuits, noise, etc. from occurring in the element row or other parts. If so, the identification bit signal changes while passing through the element array, and the changed identification bit signal is extracted from the output signal terminal side of the shift register,
An abnormal state of the recording head is detected by comparing the extracted identification bit signal with a pre-stored identification beat signal before being transmitted to the shift register. It is.

In this case, the identification bit signal may be added to a non-print data signal having a number of bits equal to or more than one image line and transmitted prior to the actual transfer of the image data signal. In addition, every time one image line is printed, the identification bit signal is added to the actual image data signal and sent to the shift register, thereby making it possible to detect the abnormal state of the recording head. Detection is possible. Which of the above is adopted depends on the required specifications of the printer, but if the former is adopted, the printer will be faster, and if the latter is adopted, more accurate abnormality detection will be possible.

Note that the abnormality detection is possible even when the added identification bit signal is a single bit; , it becomes possible to detect anomalies with high accuracy.

In this case, the signals added to the non-print image data signal and the actual image data are not limited to the identification bit signal, but other control function signals may also be added.

Therefore, in the signals taken out from the shift register, not only the identification bit signal but also other control signals other than the image data signal may be taken out.

Note that the present invention is applicable to a print head in which at least a part of each print element arranged in a line is simultaneously controlled to be energized based on an image data signal serially transferred to a shift register in the print head. In addition to optical printer heads, the present invention is also applied to thermal printer heads, LCD printer heads, etc., and is naturally applied not only to devices that simultaneously energize a line of head arrays, but also to devices that use divided bed arrays.

"Effect" According to such technical means, 280
There is no need to provide a large container storage means for storing data signals with a capacity of 0 to 3400, and even if the function bit is composed of a plurality of bits, the storage capacity of the storage means etc. for temporarily storing the function bit signal is reduced. need only be extremely small, leading to simplification of the circuit configuration and miniaturization of the device configuration.

Furthermore, the transmission of the function bits is not performed separately from the transfer of image data, but the identification bit signal is added to the actual image data signal and transmitted to the shift register using the input terminal of the data signal. In addition, since the data signal can be taken out from the output terminal, there is no need for a special input/output control terminal or a control circuit for that purpose, and from this point of view as well, the circuit configuration can be simplified. .

Furthermore, the abnormality detection is performed at 2600 to 3 as in the prior art.
It does not compare and detect all 400 capacity data signals, but only compares and detects the functional bit signals pushed out from the shift register, so even when sequentially detecting each image line, the detection time is short and the speed is high. It can respond to changes.

In addition, with a small number of detection bits for abnormality detection, the risk of malfunction is greatly reduced, detection accuracy is improved, and the function bit signal consisting of a combination of zero data and one data is By detecting it, Low
It becomes possible to detect abnormalities at both the current level and the old level, further improving the accuracy of abnormality detection.

"Embodiments" Hereinafter, preferred embodiments of the present invention will be described in detail by way of example with reference to the drawings. However, unless otherwise specified, the dimensions, materials, shapes, and relative arrangements of the components described in this example are not intended to limit the scope of this invention, but are merely illustrative examples. It's nothing more than that.

FIG. 1 shows a control circuit for an optical printer head according to an embodiment of the present invention, in which 1 is a data control section, 2 is an LED head, 3 is an abnormality detection circuit, and 4 is an LED element drive circuit.

FIG. 2 is a block diagram showing the internal configuration of the data control section 1. To briefly explain each block, 11 is a CPU that operates according to a predetermined program stored in the system memory 12, which will be described later. Along with generation of function bit signals, access to each block (to be described later) is controlled according to a predetermined program.

The system memory 12 includes a ROM having a predetermined program that determines the operation of the CPU 11, and an R that can be read and written freely.
Consists of AM.

13 is an I10 interface that inputs a character code for creating image data to be transferred to the LED head main body 2 side according to a predetermined protocol between the CPU 11 and the system memory 12 and the host computer 19; Stored sequentially in .

A font memory 14 transfers the corresponding bitmap character data to the image memory 17 by inputting the character code stored in the character code memory 15.

The character code memory 15 inputs and stores character codes from the I10 interface 13, and
Store the character code in font memory 1 as necessary.
Transfer to 4.

1B is an image memory control circuit that controls the image memory 17 when writing bitmap character data from the font memory 14 to the image memory 17, and also converts the image data signal 51 written to the image memory 17 into a function bit signal group 52. Subsequently, control is performed to transmit each image line to the LED head main body 2 side.

18 is a function bit signal memory which reads data from the external memory 18A or stores the function bit signal group 52 after being subjected to arithmetic processing by the CPU 11;
Before transferring the image data signal 51 to the LED head main body 2 side, a function bit signal group 52 including an identification bit signal is sent to the shift register 21.

As a result, the functional bit signal group 52 and the image data signal 51
For each image line, first the function bit signal group 52 and then the image data signal 51 are serially transmitted from the input signal terminal 24 to the shift register 21 on the LED head main body 2 side based on the clock signal. The data structure sent to the shift register 21 is as follows.

FIG. 3 shows bit groups indicating such data structure 1-1-
A functional bit signal group 52 is added to the beginning of the image data signal 51 having the number of bits corresponding to the number of LED elements for a line. The function bit signal-q group 52 is
It includes at least l and 0 data and is composed of bit groups such as an identification bit signal 52a for detecting an abnormality, a light emission time control signal 52b, a light emission duty signal 52c, a light emission count signal 52d, and an error check signal 52e. ,
- Since the functional bits other than the line identification bit signal 52a are irrelevant to the present invention, detailed explanation thereof will be omitted.

As described above, the external memory 18A not only transfers the functional bit signal data to the functional bit signal memory 18 as necessary, but also stores various functional bit signals that have been processed by the CPU U in a timely manner. Prior to transferring the signal to the shift register 21, the identification bit signal 52a transferred to the shift register 21 is previously transferred to the comparison storage means 32 in the abnormality detection circuit 3 for each image line.

The LED head 2 has four shift registers 21 as described above.
, a latch/driver circuit 22, and an LED array 23.The input side of the shift register 21 has a signal input terminal 24 and a clock terminal 25 connected to the data control section 1, and the output side has a signal input terminal 24 and a clock terminal 25. Signal output terminal 2 connected to temporary storage means 31 on abnormality detection circuit 3 side
B are provided respectively.

The abnormality detection circuit 3 includes temporary storage means 31. Compares the comparison storage means 32 that stores the identification bit signal 52a directly from the data controller 1 with the identification bit signal 52a stored in the re-storage means 31.32, and outputs a comparison signal when the two match. A comparator 33, a first gate circuit 34 which performs an AND operation on the comparison signal and the line synchronization signal, and outputs a drive permission signal when the two match, and an inverter 3.
The gate circuit 3B is configured to output an error signal when the comparison signal is not outputted through the gate circuit 5.

Next, the operation of this embodiment will be explained.

First, before the light emission start point of the corresponding page, that is, the first line of printing! A data signal in which an identification bit signal 52a is added to the beginning of non-print data for line bits is sent to the signal input terminal 2.
4 to the shift register 21 based on the clock signal.

and an identification bit signal 5 attached to the beginning of the data signal.
2a is pushed out from the shift register 21 and stored in the temporary storage means 31, and is directly compared with the identification bit signal 52a stored in the -time storage means 31 from the data control section 1. The identification bit signal 52 stored in the storage means 32 is
A is compared with a by a comparator 33.

In this case, if there is no abnormality on the LED head 2 side, the two signals match, so a drive permission signal is output to the LED element drive circuit 4 via the gate circuit 34, and the head drive power source 5 is turned on.

Further, if the identification bit signal 52a is not transmitted from the output terminal of the shift register 21 due to a failure such as a disconnection in a part of the recording head such as the shift register 21, or if the identification bit signal 52a changes, Since the two signals do not match, an error signal is output through the gate circuit 38, the LED element drive circuit 4 is not turned on, and the error signal is output to the control panel 8 etc. Inform the user accordingly.

Next, after the driving of the LED head is started, an identification bit signal 52a is added to the actual image data signal 51, and the abnormality detection operation is repeated for each image line, and if there is no abnormality, a predetermined Printing continues.

On the other hand, if the identification bit signal 52a is not transmitted from the output terminal of the shift register 21 due to a disconnection in the head while the printing operation is continuing, or the identification bit signal 52a is not transmitted from the output terminal of the shift register 21,
If a is changing, the error signal is sent to the gate circuit 3B.
In order to output more data, the drive power supply 5 is turned off, the L printing operation is interrupted, and an error signal is output to the control panel 6 etc. to notify the user of this fact.

"Effects of the Invention" As described above, according to the present invention, since an abnormality is detected while passing an identification bit signal with a small number of bits in the data line of a shift register, short-circuit disconnection occurs in the recording head section. When other abnormalities occur, or when transferred data is garbled due to noise, etc., the abnormality can be easily detected with a simple configuration either before or during the printing operation. This prevents printing defects from occurring, and since abnormality detection is performed using an identification bit signal with a small number of bits, it is possible to sufficiently cope with high speeds and improve detection accuracy.

It has various effects such as

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a control circuit of an optical printer head according to an embodiment of the present invention, FIG. 2 is a block diagram showing the internal configuration of the data control section, and FIG. 3 is a group of bits sent to a shift register. FIG. FIG. 4 shows an abnormality detection circuit for a thermal head according to the prior art.

Claims (1)

[Claims] 1) Recording in which a printing operation is performed while simultaneously controlling the energization of at least a part of a recording element array arranged in a line based on an image data signal transferred to a shift register in a recording head. In a head abnormality detection method, an identification bit signal added to a data signal having a number of bits equal to or more than one image line and transmitted to the shift register is extracted from an output signal terminal side of the shift register; 2) Prior to the actual transfer of the image data signal, at least one An abnormality according to claim 1, wherein an abnormal state of a recording head is detected by transmitting the identification bit signal to a shift register in addition to a non-print data signal having a number of bits equal to or more than an image line. Detection method 3) An abnormal state of the recording head is detected by adding the identification bit signal to the image data signal and transmitting it to a shift register each time one image line is printed. 4) Anomaly detection method according to claim 1, wherein the identification bit signal is composed of a plurality of bit numbers.