JPH01108890A - Yc separation circuit - Google Patents

Abstract

PURPOSE:To obtain a chrominance signal with fewer unnecessary signal components by operating a chrominance signal with few unnecessary chrominance signals and a mean signal obtained by a conventional circuit by an arithmetic circuit composed of a MAX, a MIN, an adder and an subtracter. CONSTITUTION:A signal A and a signal C are added to each other by an adder 19, its level is made 1/2 by a 1/2 circuit 20 and it is made into a signal D. The one with the higher potential out of the output signal Cc' of a 1/2 circuit 18 and the inverted signal of the signal D is extracted by a high potential detecting circuit (MAX) 21, it is compared with 0 and the one with the lower potential is extracted by a low potential detecting circuit (MIN) 22. On the other hand, the one with the lower potential out of the signal Cc' and the inverted signal of the signal D is extracted by a MIN 23, it is compared with 0 and the one with the higher potential is extracted by a MAX 24. The output signal of the MIN 22 and the output signal of the MAX 24 are added to each other by an adder 25 and made into a signal E, it is subtracted from the signal Cc' by a subtracter 26 and it is removed as a Cc signal. Thus, the chrominance signal with fewer unnecessary signal components can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a YC separation circuit for separating and extracting Yc (luminance) and Cc (W1 color feeding) signals from a composite video signal, for example in a VTR or the like.

BACKGROUND OF THE INVENTION FIG. 6 shows a block diagram of an example of a conventional YC separation circuit. In the same figure, a composite video signal (for example, a color par signal) inputted to a terminal 1 passes through a bandpass filter 2 and a filter circuit 3, which will be described later, and is multiplied by Cc and outputted from a terminal 4. .It is supplied to the adder 7 through the 1-day delay circuit 6, where the Cc times signal is added, and the Y
The signal is multiplied by c and taken out from terminal 8. This YC separation circuit utilizes vertical correlation of video signals.

Traditionally, comb filters using vertical correlation have two lines (
Previously, predictions were made using three lines (current line information, line information from the past day, and line information from the past day).

Here, in the filter circuit 3, if the input signal is A (past), the output of the one-day delay circuit 9 is B (present), and the output of the one-day delay circuit 10 is C (future), then the signals A, B, C The above three lines of information are obtained. In Figure 6, 11.12
．． Reference numeral 13 denotes a high potential detection circuit (hereinafter referred to as MAX), which has the configuration shown in FIG. 7(A) and outputs the higher of the two potentials. 14, 15, and 16 are low potential output circuits (hereinafter referred to as MIN), as shown in Figure 7 (B).
), and outputs the lower of the two electric potentials.

For example, if an NTSC video signal is viewed in the vertical direction of the screen and three lines are selected and classified, the three patterns shown in FIG. 8 (Δ) to (C) will be obtained. The figure (Δ) shows a flat pattern, the figure (B) shows a step pattern, and the figure (C) shows a pulse pattern. Here, n
is one point on any raster (current), (n-1) is a point one line above any raster (past), (n + 1') is a point one line below any raster (future) be. For example, considering the Cc multiplied signal, the subcarrier frequency fs
Since c is fsc = (''5/2)f+-+ (fH is the horizontal scanning frequency), if there is a vertical correlation, it is a pattern that alternates for each line, that is, a pulse pattern (Figure 8 (C)). That can be said.

This pulse pattern is a pattern that could not be obtained with the conventional two-line type.

FIG. 9 shows a diagram for explaining the basic operation of the filter circuit 3 in FIG. 6. For example, in MAXII, signals A and B
Outputs the larger potential of the two, and outputs the signal A at MAX12.
, B, and outputs the potential of M at MIN14.
The smaller potential X(-) of the output of AXll and the output of MAX12 is output, and X(+)=M (N (B, M
It is written as AX (A, C)). Similarly, MIN1
Signal A at 5.

Outputs the smaller potential of signals B and C at MIN16, outputs the smaller potential of signals B and C at MAX13, and outputs the larger potential of the output of MIN15 and the output of MIN16 at MAX13. Output potential x (-), x (-) = MAX (B, M
It is written as IN (A, C)').

The signals x(+) and x(-1 are added in an adder 17,
The level is set to 172 in the 1/2 circuit 18 and Cc=1/
2 (X(1) +×(-)). In this circuit, since the Cc multiplied signal is obtained first, the signal of the current line is performed using the fr word which is an inversion of the signal.

In this case, the transfer function of the filter circuit 3 is 1/2(B+
MID (A, B, C)). Here, M.I.D.
(A, B, C) is 2 for the 3 human power of signals A, B, C.
This is a function that outputs the highest data. Therefore, the ninth
For the four patterns shown in the figure, Cc multiplied signals as shown are obtained.

Problems to be Solved by the Invention The conventional circuit shown in FIG. 6, for example, when displaying a pattern of vertical stripes by repeating black and white like the multi-burst shown in FIG. 10(A), the conventional circuit shown in FIG. As shown, there was a problem that cross color and Yc low signal blurring occurred at the upper and lower ends of the image. In other words, if there is a w1 stripe below 8 as shown in Figure 10 (A), the information on the top three lines will be A-0, B-C-1 as shown in Figure 11 (A>). ,
Since 8 is inverted to create a Cc multiplied signal, Figure 11 (B
), A-0, 8--1, C=1.

Therefore, transfer function = 1/2 (B + MID (A, B.

There was a problem in that (-B+A)/2=1/2 from C)) was extracted as C and c signals, and colors were added to areas that should not be colored (cross color). On the other hand, Yc
Low signal Yc = 1-1/2 = 1/2 so that the amplitude is 1
/2, which caused the problem of blurring.

Means for Solving the Problems In FIG. 1, the adder 19.1/2 circuit 20 is a circuit that obtains the average signal of past line information and future line information, MAX21.24. MIN22.23, adder 25
is the subtracter 26, which is a circuit that, for the average signal and a color signal with few unnecessary signal components, sends a signal of a smaller level if they have the same sign, and a signal of a smaller level if they have different signs, regardless of the level. These are embodiments of a circuit for obtaining a color signal with even less unnecessary signal components by subtracting either the signal of the lower level or the zero signal from the color signal with less unnecessary signal components.

Effect Color signal (Cc
') (including error components) and the average signal MAX, M
A color signal (Cc) with even fewer unnecessary signal components is obtained by performing calculations in an arithmetic circuit consisting of an IN, an adder, and a subtracter. In particular, A=1 in a flat pattern. B-1/2.
In the case of C-0, and in the step pattern, A=8-1.
When 0=O, the signal Cc can be made zero, and cross color or Yc low signal blurring will not occur at the top and bottom edges of the image.

Embodiment FIG. 1 shows a block diagram of a first embodiment of the circuit of the present invention,
In this figure, the same parts as in FIG. 6 are given the same numbers and their explanations will be omitted. In this figure, the portion surrounded by a dashed line is the same as in FIG. 6.

In FIG. 1, a signal C is added to the signal by an adder 19, and the level is halved by a 1/2 circuit 20 to produce a signal. Note that the output signal of the 1/2 circuit 18 is referred to as a signal Cc' in order to distinguish it from the output carrier color signal Cc of the present invention. The signal Cc' and the inverted signal are MA
The higher potential is extracted at X21, compared with zero at MIN22, and the lower potential is extracted. On the other hand, the signal Cc' and the inverted signal are MIN2
The lower potential is extracted at step 3, compared with zero at MAX 24, and the higher potential is extracted. MIN2
The output signal of MAX24 and the output signal of MAX24 are added by an adder 25 to form a signal E, and a subtracter 26 adds a signal Cc.
' is subtracted from Cc and taken out from terminal 4 as a signal multiplied by Cc.

Here, choose the main one from each pattern shown in Figure 8,
rOJ MJr1/2J for each of signals A, B, and C
Possible patterns of r-1J combinations and signal C
c', D, E, Cc, Yc, Yc' (The relationship with the Yc low signal taken out from the terminal 8 shown in FIG. 6 is shown in FIG. 2).

For example, as shown in *+III in Figure 2, in a flat pattern A=1.8=1/2. The reason why the past, present, and future line information when C=O changes continuously in the order of 1.1/2°0 is generally considered to be because the vertical stripes are tilted in the vertical direction. In the conventional circuit shown in FIG. 6, the signal Cc' is 1/1/
However, in the circuit of the present invention, it becomes zero and does not cause cross color. - On the other hand, the signal Yc is also 1/2 compared to 1/4 of the conventional circuit.
This can reduce the blur.

Also, as shown in *21111 in Figure 2, when A = 8 = 1.0 = O in the step pattern (it is desirable for the signal Cc to output zero in a multi-burst-like signal), the conventional circuit The signal Cc' becomes -1/2 and produces a cross color, but in the circuit of the present invention it becomes zero and does not produce a cross color. On the other hand, the signal Yc can also be set to 1 compared to 1/2 of the conventional circuit, so no blurring occurs.

In addition, *1. *For columns other than 2al, there is no difference from the conventional circuit.

Here, the output of the circuit added according to the present invention (signal E
) and the signals Cc', D (~D) are shown in FIG.

When the signal Cc' and the signal RI have the same sign, the smaller level is taken out, and when they have different signs, zero is output regardless of the level.

FIG. 4 shows a circuit diagram of a second embodiment of the circuit of the present invention, in which the same parts as in FIGS. 6 and 1 are given the same numbers and their explanations will be omitted. In the figure, the output of the 1/2 circuit 18 is compared with zero in the MAX 27 and the higher potential is taken out, while the output of the adder 19 is inverted in polarity by the 1/2 circuit 28. Then, the level is set to 172, compared with zero at MAX 29, and the higher potential is taken out. Each output of MAX27, 29, and 30 is supplied to MIN31, where the lowest potential among these levels is taken out as signal E.

The basic operation of this device is easier to understand than the first embodiment, so its explanation will be omitted.

Next, a block diagram of a modified example of the circuit of the present invention in which the one-day delay circuit 6 in FIG. 1 is also used as the one-day delay circuit 9 of the filter circuit 3 is shown in FIGS. 5(A) to 5(C).

In FIG. 5, the same parts as in FIGS. 1 and 6 are given the same numbers and their explanations will be omitted.

Both of the modified examples shown in FIGS. 5(A) to 5(C) have a configuration in which the output of the IHI delay circuit 9 is supplied to the adder 7 via the Δtl delay circuit 5, resulting in a one-day delay in FIG. The circuit 6 can be omitted. Accordingly, in the one shown in FIG. 5(A), the bandpass filter 22 with a delay of Δt is connected between the one-day delay circuit 9 and MIN15.16, MAXll, 12, and the delay of Δt is The bandpass filter 23 with
1” delay circuit 10 and MAX12. Connect between MIN16 and MIN16. In the one shown in FIG. 5(B), a bandpass filter 24 having a delay of Δt is connected between the subtracter 26 and the adder 7. In addition, in the one shown in FIG. 5(C), the bandpass filter 25 with a delay of 8t is connected to the 1/2 circuit 18 and the MAX21.
．． A bandpass filter 26'11/2 circuit 28 with a delay of 8t is connected between the subtracter 26 and the MAX21.
Connect between MIN23 and MIN23.

Note that in both the embodiments and the modified examples, in the case of the PAL system, a two-day delay circuit is used instead of the one-day delay circuit.

Effects of the Invention According to the present invention, unnecessary signal components can be reduced by calculating in an arithmetic circuit using a color signal (including error components) with few unnecessary signal components obtained by a conventional circuit and an average signal of past lines and future lines. can obtain even less color signal,
In particular, when displaying a multiburst in the form of vertical stripes with repetition of black and white, a high-quality screen can be obtained without cross-color or Yc signal blurring occurring at the top and bottom edges of the image unlike in conventional circuits.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a first embodiment of the circuit of the present invention, FIG. 2 is a diagram comparing signals obtained by the circuit of the present invention and a conventional circuit, and FIG. 3 is a diagram showing signal states obtained by the circuit of the present invention. , FIG. 4 is a block diagram of a second embodiment of the circuit of the present invention, FIG. 5 is a block diagram showing a modification of the circuit of the present invention, FIG. 6 is a block diagram of a conventional circuit, and FIG. 7 is a block diagram of the circuit of the present invention. , a circuit diagram of the MIN circuit, Fig. 8 is a diagram showing a pattern obtained by the 3-line method, Fig. 9 is a diagram explaining the Cc multiplied signal obtained by the filter circuit of the conventional circuit, and Fig. 10 is a diagram showing a multi-burst image. The figure shown in FIG. 11 shows a multi-burst pattern obtained by the conventional circuit. 1... Composite video signal input terminal, 2... Bandpass filter, 3... Filter circuit, 4... Color signal output terminal, 6.9.10... 1 day delay circuit, 7.17° 1
9.25... Adder, 8... Luminance signal output terminal, 1
1.12.13, 21.24.27.29°30・BE
Position detection circuit (MAX), 14.15°16.22.2
3.31...Low potential detection circuit (MIN), 18.20
...1/2 circuit, 26...subtraction, 28...-1
/2 circuits. Patent applicant Victor Company of Japan Co., Ltd. Figure 6 Figure 10 Figure 11 (A) (B) (A) (B) Figure 7 Figure 8 (A) Figure 9

Claims (3)

[Claims] (1) A filter that extracts a color signal with fewer unnecessary signal components by further calculating the color signal extracted from the composite video signal by a bandpass filter using information on three lines: past line, current line, and future line. A YC separation circuit provided with the circuit obtains an average signal of the information of the past line and the information of the future line, and determines whether the average signal and the color signal having less unnecessary signal composition have the same sign. is the signal with the smaller level, and in the case of opposite signs, obtains zero regardless of the level, and subtracts the signal with the smaller level or the signal with the zero from the color signal with fewer unnecessary signal components to obtain the unnecessary signal. A YC separation circuit characterized by being newly provided with an arithmetic circuit for obtaining a color signal with fewer components. (2) The arithmetic circuit includes a first circuit that outputs a signal with a higher potential between the average signal and the color signal with less unnecessary signal components; and the average signal and the color signal with less unnecessary signal components. a second circuit that outputs a signal with a lower potential between the output of the first circuit and the zero level; a third circuit that outputs a signal with a lower potential between the output of the first circuit and the zero level; A fourth circuit that outputs a signal with a higher potential between the output of the circuit and the zero level, and the output of the third circuit and the output of the fourth circuit are added, and then the unnecessary signal component is added. 2. The YC separation circuit according to claim 1, further comprising a fifth circuit that obtains a color signal with even less unnecessary signal components by subtracting from the color signal with less unnecessary signal components. (3) The arithmetic circuit includes a first circuit that outputs a signal with a higher potential between the color signal with less unnecessary signal components and a zero level, and a signal with a higher potential between the average signal and the zero level. a second circuit that outputs a signal with a higher potential of the color signal with less unnecessary signal components and the average signal; and an output of the first circuit and the above. The output of the second circuit and the third circuit
The fourth circuit outputs the lowest potential signal among the outputs of the circuit.
and a fifth circuit that obtains a color signal with even less unnecessary signal components by subtracting the output of the fourth circuit from the color signal with less unnecessary signal components. A YC separation circuit according to claim 1.