JPH01107230A - Light beam scanning device - Google Patents

Light beam scanning device

Info

Publication number
JPH01107230A
JPH01107230A JP62265660A JP26566087A JPH01107230A JP H01107230 A JPH01107230 A JP H01107230A JP 62265660 A JP62265660 A JP 62265660A JP 26566087 A JP26566087 A JP 26566087A JP H01107230 A JPH01107230 A JP H01107230A
Authority
JP
Japan
Prior art keywords
circuit
signal
phase
scanning
light beam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62265660A
Other languages
Japanese (ja)
Inventor
Toshiaki Kumakawa
俊明 熊川
Mitsuo Kaji
梶 光雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Engineering Ltd
Original Assignee
NEC Corp
NEC Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Engineering Ltd filed Critical NEC Corp
Priority to JP62265660A priority Critical patent/JPH01107230A/en
Publication of JPH01107230A publication Critical patent/JPH01107230A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve the quality of a reproduced image by correcting the frequency of a picture element clock with respect to the variance in the light beam scanning time of every plane of a polygon mirror and the position of the picture element clock with respect to the variance in the scanning time in a scanning image plane respectively. CONSTITUTION:A thinning circuit 8 is provided with a flipflop and a gate circuit and outputs two-phase signals PCKa and PCKb obtained by thinning the picture element clock PCK from a synthesizer 7 into half to a phase modulation circuit 9. A clock synthesis circuit 11 is constituted by providing a gate circuit and synthesizing two-phase signals PCKa' and PCKb' which are modulated in terms of phase from the phase modulation circuit 9 into one-phase signal so as to output from a terminal T3. In case of using the signal from the terminal T3 in a printer device, it is impressed on an A/O optical modulation part and in case of using said signal in a scanner device, it is impressed on a circuit which samples a read image signal so as to correct a scanning position in a main scanning direction. Thus, the quality of the reproduced image can be prevented from being deteriorated.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は光ビーム走査装置に関し、特に回転多面鏡によ
り光ビームを走査するスキャナ装置またはプリンタ装置
に使用し画素クロックの制御をする光ビーム走査装置に
関する。
Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a light beam scanning device, and particularly to a light beam scanning device used in a scanner device or printer device that scans a light beam using a rotating polygon mirror and controls a pixel clock. Regarding equipment.

〔従来の技術〕[Conventional technology]

従来の光ビーム走査装置は、回転多面鏡によりレーザか
らの光ビームを走査して画像を読み取るスキャナ装置お
よび画像を記録するプリンタ装置に使用され口絵多面鏡
の走査に同期して画素クロックを発生する。この場合、
回転多面鏡を駆動するモータの回転精度、いわゆる回転
むらにより回転多面鏡の各面ごとに光ビームの走査時間
が異なるため同一周波数による画素クロックを使用する
といわゆるジャダが発生し再生した画質が劣化する0 従来、この欠点を解決する手段として回転多面鏡の各面
ごとの光ビームの走査時間をあらかじめ測定しておき、
基準となる画素クロックの周波数との偏差量に対応して
各面ごとの周波数値を回転多面鏡の動作に同期させて設
定するという画素クロック制御方式がある。
Conventional light beam scanning devices are used in scanner devices that read images by scanning a light beam from a laser with a rotating polygon mirror, and in printer devices that record images, and generate pixel clocks in synchronization with the scanning of the frontispiece polygon mirror. . in this case,
The scanning time of the light beam differs for each face of the rotating polygon mirror due to the rotational accuracy of the motor that drives the rotating polygon mirror, so-called rotational unevenness, so if pixel clocks with the same frequency are used, so-called judder will occur and the reproduced image quality will deteriorate. 0 Conventionally, as a means to solve this drawback, the scanning time of the light beam for each surface of the rotating polygon mirror is measured in advance.
There is a pixel clock control method in which a frequency value for each surface is set in synchronization with the operation of a rotating polygon mirror in accordance with the amount of deviation from the frequency of a reference pixel clock.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の光ビーム走査装置の画素クロック制御方
式は、回転多面鏡の各面ごとの画素クロック周波数を設
定する方式となっているので走査画面内の走査時間のば
らつきは補正できないため再生した画像の画質が劣化す
るという問題がある。
The pixel clock control method of the conventional light beam scanning device described above sets the pixel clock frequency for each face of the rotating polygon mirror, so variations in scanning time within the scanning screen cannot be corrected, so the reproduced image There is a problem that the image quality deteriorates.

本発明の目的は、回転多面鏡の各面の光ビームの走査時
間と走査画面内の走査時間のばらつきを補正することが
できる光ビーム走査装置を提供することにある。
An object of the present invention is to provide a light beam scanning device that can correct variations in the scanning time of a light beam on each surface of a rotating polygon mirror and the scanning time within a scanning screen.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の光ビーム走査装置は、光ビームを主走査させる
回転多面鏡の各面を識別し面情報を出力する走査面検出
器と、前記面情報に対応し前記回転多面鏡の各面の光ビ
ーム走査時間に比例した画素クロック周波値を設定しシ
ンセサイザに画素クロックを出力させる周波数値発生器
と、前記画素クロックをl/n(nは正の整数)に間引
いてn相化した信号を出力する間引回路と、補正信号発
生器から前記回転多面鏡の各面の位置補正信号により前
記周波数値発生器からの信号を位相変調し出力する位相
変調回路と、この位相変調回路からの出力を1相の信号
に合成し出力するクロック合成回路とを有している。
The light beam scanning device of the present invention includes a scanning surface detector that identifies each surface of a rotating polygon mirror for main scanning with a light beam and outputs surface information; A frequency value generator that sets a pixel clock frequency value proportional to the beam scanning time and outputs the pixel clock to the synthesizer, and outputs an n-phase signal by thinning the pixel clock to l/n (n is a positive integer). a thinning circuit that modulates the phase of the signal from the frequency value generator using a position correction signal for each surface of the rotating polygon mirror from a correction signal generator, and a phase modulation circuit that modulates the phase of the signal from the frequency value generator and outputs the signal; It has a clock synthesis circuit that synthesizes and outputs a one-phase signal.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例のブロック図、第2図は本実
施例の動作を説明するための信号波形図である。第1図
及び第2図を参照して説明する。
FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a signal waveform diagram for explaining the operation of this embodiment. This will be explained with reference to FIGS. 1 and 2.

光検出器1は、ホトダイオードとコンパレータを備えて
構成し、レーザ5から回転多面鏡4に照射した光ビーム
の反射光を検出した信号を走査面検出器2に出力する。
The photodetector 1 includes a photodiode and a comparator, and outputs a signal obtained by detecting the reflected light of the light beam irradiated onto the rotating polygon mirror 4 from the laser 5 to the scanning surface detector 2.

走査面検出器2は、カウンタ回路とゲート回路を備えて
構成し、回転多面鏡4を駆動する主走査モータ3の1回
転を表わす信号MPH8と光検出器1からの信号により
走査している回転多面鏡。
The scanning surface detector 2 is configured with a counter circuit and a gate circuit, and detects the rotation being scanned by a signal MPH8 representing one rotation of the main scanning motor 3 that drives the rotating polygon mirror 4 and a signal from the photodetector 1. Polygonal mirror.

の各面を識別した面情報を周波数値発生器、に出力する
The surface information identifying each surface of is output to a frequency value generator.

周波数値発生器6は、メモリとカウンタ回路及びゲート
回路を備えて構成し、端子T1から回転多面鏡4の各面
の光ビーム走査時間に比例した画素クロック周波数値を
あらかじめメモリに記憶し、この記憶した画素クロック
周波数値を回転多面鏡4の各面に同期させてシンセサイ
ザ7に出力する。
The frequency value generator 6 includes a memory, a counter circuit, and a gate circuit, and stores in advance a pixel clock frequency value proportional to the light beam scanning time of each surface of the rotating polygon mirror 4 from the terminal T1 in the memory. The stored pixel clock frequency value is synchronized with each surface of the rotating polygon mirror 4 and output to the synthesizer 7.

シンセサイザ7は、周波数値発生器6からの画素クロッ
ク周波数値に基き画素クロックPCKを発生し間引回路
8に出力する。
The synthesizer 7 generates a pixel clock PCK based on the pixel clock frequency value from the frequency value generator 6 and outputs it to the thinning circuit 8 .

間引回路8は、フリップ70ツブとゲート回路を備えて
構成し、シンセサイザ7からの画素クロックPCK′t
−1/2に間引いて2相化17た信号PCKa、PCK
bを位相変調回路9に出力する。
The thinning circuit 8 includes a flip 70 tube and a gate circuit, and receives the pixel clock PCK't from the synthesizer 7.
- Signals PCKa and PCK thinned out to 1/2 and converted into two-phase 17
b is output to the phase modulation circuit 9.

補正信号発生器1oは、メモリとカウンタ回路及びゲー
ト回路を備えて構成し、端子T2がら回転多面鏡4の各
面ごとの走査画面内の走査速度の偏差値をあらかじめメ
モリに記憶しこの記憶した偏差値を位置補正信号C8G
として光ビーム走査位置に対応させて位相変調回路9に
出力する。
The correction signal generator 1o includes a memory, a counter circuit, and a gate circuit, and stores in advance the deviation value of the scanning speed within the scanning screen for each surface of the rotating polygon mirror 4 from the terminal T2 in the memory. The deviation value is used as the position correction signal C8G.
The signal is outputted to the phase modulation circuit 9 in correspondence with the light beam scanning position.

位相変調回路9は、鋸歯状波発生回路と加算回路及びコ
ンパレータを備えて構成し、補正信号発生回路10から
の位置補正信号C8Gにより回転多面鏡4の各面に同期
して間引回路からの2相の画素クロックPCKa、PC
Kbを位相変調した2相の信号PCKa’、PCKb’
をクロyり合成回路11に出力する。
The phase modulation circuit 9 includes a sawtooth wave generation circuit, an adder circuit, and a comparator. Two-phase pixel clock PCKa, PC
Two-phase signals PCKa', PCKb' obtained by phase modulating Kb
is output to the black signal synthesis circuit 11.

クロック合成回路11は、ゲート回路を備えて構成し、
位相変調回路9から位相変調された2相の信号PCKa
’、PCKb’を1相の信号に合成し端子T3から出力
する。
The clock synthesis circuit 11 includes a gate circuit,
A two-phase signal PCKa phase-modulated from the phase modulation circuit 9
', PCKb' are combined into a one-phase signal and output from terminal T3.

なお上記実施例では、間引回路80間引き例を1/2と
したが間引き値は2以上の自然数であれば良い。
In the above embodiment, the example of thinning out by the thinning circuit 80 is 1/2, but the thinning value may be a natural number of 2 or more.

このようにして得らnた端子’11’3からの信号は、
プリンタ装置に使用する場合゛にはA10光変調部に印
加し、また、スキャナ装置に使用する場合には読取った
画像信号を標本化する回路に印加して主走査方向の走査
位置を補正することができる。
The signal from terminal '11'3 obtained in this way is
When used in a printer device, it is applied to the A10 light modulation section, and when used in a scanner device, it is applied to a circuit that samples the read image signal to correct the scanning position in the main scanning direction. Can be done.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は回転多面鏡の各面ごとの光
ビーム走査時間のばらつきに対しては画素クロックの周
波数を、また、走査画面内の走査時間のばらつきに対し
ては画素クロックの位fをそれぞれ修正することにより
、回転多面鏡の各面の走査位置が補正でき再生した画像
の質を向上させるという効果を有する。
As explained above, the present invention adjusts the frequency of the pixel clock to deal with variations in the light beam scanning time for each surface of a rotating polygon mirror, and adjusts the position of the pixel clock to deal with variations in the scanning time within the scanning screen. By correcting f respectively, the scanning position of each surface of the rotating polygon mirror can be corrected, which has the effect of improving the quality of the reproduced image.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のブロック図、第2図は本実
施例の動作を説明するだめの信号波形図である。 1・・・・・・光検出器、2・・・・・・走査面検出器
、3・・・・・・主走査モータ、4・・・・・・回転多
面鏡、5・旧・・レーザ、6・−・・・・周波数値発生
器、7・・・・・・シンセサイザ、8・・・・・・間引
回路、9・・・・・・位相変調器、1o・・・・・・補
正信号発生器111・・・・・・クロック合成回路。 代理人 弁理士  内 原   會
FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a signal waveform diagram for explaining the operation of this embodiment. 1...Photodetector, 2...Scanning surface detector, 3...Main scanning motor, 4...Rotating polygon mirror, 5...Old... Laser, 6... Frequency value generator, 7... Synthesizer, 8... Thinning circuit, 9... Phase modulator, 1o... ...Correction signal generator 111...Clock synthesis circuit. Agent Patent Attorney Uchihara Kai

Claims (1)

【特許請求の範囲】[Claims] 光ビームを主走査させる回転多面鏡の各面を識別し面情
報を出力する走査面検出器と、前記面情報に対応し前記
回転多面鏡の各面の光ビーム走査時間に比例した画素ク
ロック周波値を設定しシンセサイザに画素クロックを出
力させる周波数値発生器と、前記画素クロックを1/n
(nは正の整数)に間引いてn相化した信号を出力する
間引回路と、補正信号発生器から前記回転多面鏡の各面
の位置補正信号により前記周波数値発生器からの信号を
位相変調し出力する位相変調回路と、この位相変調回路
からの出力を1相の信号に合成し出力するクロック合成
回路とを有することを特徴とする光ビーム走査装置。
a scanning surface detector that identifies each surface of a rotating polygon mirror for main scanning with a light beam and outputs surface information; and a pixel clock frequency that corresponds to the surface information and is proportional to the light beam scanning time of each surface of the rotating polygon mirror. a frequency value generator that sets a value and outputs a pixel clock to a synthesizer, and a frequency value generator that outputs a pixel clock to a synthesizer;
(n is a positive integer) and a decimation circuit that outputs a signal that has been decimated into n-phase signals; A light beam scanning device comprising: a phase modulation circuit that modulates and outputs the signal; and a clock synthesis circuit that combines the output from the phase modulation circuit into a one-phase signal and outputs the signal.
JP62265660A 1987-10-20 1987-10-20 Light beam scanning device Pending JPH01107230A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62265660A JPH01107230A (en) 1987-10-20 1987-10-20 Light beam scanning device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62265660A JPH01107230A (en) 1987-10-20 1987-10-20 Light beam scanning device

Publications (1)

Publication Number Publication Date
JPH01107230A true JPH01107230A (en) 1989-04-25

Family

ID=17420223

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62265660A Pending JPH01107230A (en) 1987-10-20 1987-10-20 Light beam scanning device

Country Status (1)

Country Link
JP (1) JPH01107230A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6791596B2 (en) 2001-06-28 2004-09-14 Ricoh Company, Ltd. Method and apparatus for image forming capable of effectively generating pixel clock pulses

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6791596B2 (en) 2001-06-28 2004-09-14 Ricoh Company, Ltd. Method and apparatus for image forming capable of effectively generating pixel clock pulses

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