JPH01106254A - Scsi host adaptor circuit - Google Patents

Abstract

PURPOSE:To surely obtain a command suspending mechanism between a host device having no DMA restarting function and a slave device by providing a host adaptor with a new means for processing a command suspending command applied during the transfer of data. CONSTITUTION:If a flag is not set up in a command suspending request flag setting part 204 when a DMA operation request is applied from the host device 1 to an SCSI host adaptor circuit 2, DMA transfer is requested from a DMA processing part 202 to the host device 1. When the flag is set up in the setting part 204, a data transfer direction in DMA operation is checked by a transfer direction checking part 205. When the data transfer direction is an SCSI bus 4 direction, dummy data are transferred one by one byte from a dummy data sending part 206 until the end of the DMA operation. When the data transfer direction is the host device 1 direction, the data are read out one by one byte or canceled without adopting them by a cancel processing part 207 until the end of the DMA operation.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field J] The present invention is applicable to a host device such as a host 81 bookkeeping machine that does not have a direct memory access restart function, and to an SCS.
I (Small Computer+puter Sy
stem terr-ace; ANSI
X3.131-1986) Regarding a 5cst boss adapter circuit for coupling with a lower device connected to a bus,
This improves the processing when a command abort request is given from a higher-level device.

``Prior art 1'' Fig. 8 shows an example of the configuration of a host adapter circuit such as a high-level device such as a small scale calculator, a low-level device connected to a SCSI bus, and an SCSI host adapter circuit as an interface that connects these. .

In this figure, 1 indicates the upper 5A location of the host t1 computer that does not have a direct memory access restart function, and 2
is a SCSI host adapter dedicated to the SC8I bus, and 3 is a disk device and printer device.

4 is a SCSI bus, and 5 is a channel bus.

Note that the DMA restart function means that even after the upper device [1 has issued a command abort request on its own during DMA operation, if there is a DMA start request from the lower device 3 side, the previous D
This is a function to restart MA191 work.

In such a system, when the host device 1 sends a command abort request for some reason, the S, C8I host adapter 2 performs corresponding processing according to the following procedure.

First, the host adapter 2 that has received the command abort request activates the control signal ATN on the SCSI bus 4 and requests the lower device 3 to accept a message.

When the lower device 3 starts accepting messages, it transfers an "abort (Δbort)" message as a command abort request.

Through the above procedure, a command cancellation request is transmitted from the higher-level device 1 side to the lower-level device 3 side.

Problems to be Solved by R-Ming" However, in the above procedure, depending on the operating status of the lower-level device 3, messages from the host adapter 2 (upper-level device 1 side) may be accepted or ignored.

In other words, while the lower device 3 is in the middle of DMAILJ operation, that is, in the middle of two data transfers, even if the lower device 3 is given the control signal A from the host adapter 2, the lower device 3 will not receive it. No reception, DMA transfer to host device 1
Try to continue to the side. On the other hand, since the host device 1 side has sent the command abort request rfj L/, it interrupts this DMA operation and does not attempt to accept new data.

As described above, there is a problem in that the command cancellation request from the higher-level device 1 is not accepted by the lower-level device 3, and the command cancellation function cannot be normally realized.

The present invention is intended to solve the above-mentioned problems, and its purpose is to ensure a command intermediate function between a higher-level device that does not have a DMA restart function and a lower-level device that is connected via a SCSI bus. do.

The present invention provides a new means for processing data in the host adapter, and when a command abort command is given during data transfer, the data processing means processes the transferred data. The detailed structure is as follows.

In other words, a command cancellation request is received from the host device during data transfer processing at J5 in an SC8I host adapter circuit that connects a host device that does not have a direct memory access restart function and a lower device connected to the SCSI bus. a transfer direction confirmation means for confirming the data transfer direction when the above SCSR bus is given; a dummy data sending means for sending dummy data when transferring data to the SCSR bus; and a dummy data sending means for sending data to the host device side. In this case, the above scs
1. A SCSI host adapter circuit comprising a discard means for discarding an f on an r bus.

"Operation" When the command abort function is given during data transfer, the SCSI host adapter circuit of the present invention checks the data transfer direction, sends dummy data if the data is transferred to the SCSI bus, and sends dummy data to the SCSI bus. If data is given from , read and discard this data.

Embodiment FIG. 1 shows an example of the configuration of a SCSI host adapter circuit embodying the present invention.

In this figure, 21 is a central processing unit CPU that controls the entire circuit, 22 is a channel bus control unit that controls the protocol of the channel bus 5, and 2 and 3 are SCs.
This is a SCSI bus control W unit that controls the protocol of the 8I bus 4. Further, the CPU 21 and chitnel control section 22 are connected to the address bus A1 and the control line B1, and the CPU 21 is connected to the control line B1.
1 and SCSI bus control unit 23 are connected to address bus Δ2 and control line B2. Also, CPLI21. Channel fl, II ti11 section 22, and SC8I'' bus control section 23 are connected by data bus D.

CPU21 DM ll11tII Kan B1.82
It is used for the handshake I signal in A 1ull till, and is configured to perform DMA transfer via data bus D, while having the function of performing data transfer independently of the SC8I bus control unit 23.

Furthermore, the configuration of this SCSI host adapter circuit 2 is shown as a functional block diagram in FIG.

, this figure shows only functional blocks related to the present invention, and other functions are omitted.

That is, the 5cst host adapter 2 includes a command transmitting and receiving unit 201 that transmits and receives commands to and from the host device 1, and a DMA processing unit 202 that participates in DMA transfer operations according to commands.
, the status transmitting/receiving unit 203 that transmits and receives status between the upper Rv11 and the lower device 3. Further, a command cancel request flag setting unit 204 sets a command cancel request flag when a command cancel request is given from the host device 1 to the command transmitting/receiving unit 201, and a data transfer direction is set when the command cancel request flag is set. A dummy data sending unit 206 sends out dummy data if the data transfer direction is on the SC8I bus 4 side, and if the data transfer direction is given to the host device 1 side, this data is read and discarded. It has a read-discard processing unit 207.

Incidentally, the above configuration is realized by firmware stored in the ROM in the CI''U 21.

Now, the SCSI host of the present invention configured as described above.
The operation of the adapter circuit will now be described.

FIG. 3 is a flowchart showing the normal control processing operation of this circuit.

When there is, for example, a DMA operation request from the higher-level device, the upper (Q) request reception process is performed, and the lower-level device selection process is performed.

The next step, command cancellation processing, will be described later.

Next, send a command to the selected lower device, receive the status from the lower device after data transfer processing,
This is sent to the higher-level device and one process ends.

While such processing is being executed, interrupt processing from the host device is performed, and command cancellation processing is performed at the timing when each processing is completed.

Regarding interrupt processing, as shown in FIG. 4, it is checked whether it is a command cancellation request, and if it is a command cancellation request, a command cancellation request flag is set, and if it is not a command cancellation request, various separate processing is executed.

FIG. 5 shows the contents of command abort processing, which is not shown in FIG. 3 but is performed in the middle of each process.

This command cancellation process is performed periodically and is executed only when the command cancellation request flag is set.

If the command abort request flag ° is set, AT
Activate the N signal and check whether the lower device can accept messages. If it is not possible, the process moves to the next step in the flow shown in FIG. 3, and the remaining processing is performed in the command cancellation processing at the next opportunity. If the message can be accepted, the command abort command “Abor” is sent to the lower device.
t” is sent.

When the lower device receives the command cancellation status fli, it sets the command cancellation success status to indicate that the command cancellation was successful, resets the command cancellation request flag, returns to the flow shown in FIG. 3, and transmits this status to the upper device side. If the command abort is not successful, the command abort failure status is set to cell 1, the command abort flag is reset, and this status is sent to the upper Ml side.

Next, a case, not shown in FIG. 3, in which a command abort request is interrupted from a higher-level device in the "data transfer process" will be explained using the flowchart of FIG. 6.

Flow v −1 in this figure is during the operation of the circuit of the present invention,
This is the most important processing procedure, and represents processing when a command abort request flag is given during DMA data transfer processing, and when it is not.

If the command abort request flag is not hit,
Request DMA transfer from the upper device side, start DMA, DMA transfer
Check for completion. If the command abort request flag is set before the DMA ends, this DMA6 operation is reset.

When the command abort request flag set is detected, the DMA
Check the data transfer direction in the 113th work.

If the Y-Y transfer direction is the SCSI bus direction, dummy data is transferred one byte at a time until the DMA operation is completed. If the data transfer direction is toward the upper device, the data is read one byte at a time until the DMA operation is completed, but the data is read and discarded.

Next, in the flow shown in FIG. 3, if the command abort flag is turned on during the status transmission process, the flow shown in FIG. 7 is followed.

In other words, the change in this command abort request flag remains unchanged.
Include it in the status to be sent and send it to the higher-level device.

As described above, in the SCSR host adapter circuit of the present invention, when a command abort request is given from a host device during data transfer, even if this request is not accepted immediately, this request is correctly accepted. Depending on the data transfer direction, dummy data is sent or data is read and discarded until the command is received, so when the lower device is viewed from the upper Ill, it appears as if it has interpreted a command abort request.

Effects of the Invention j The SC8I host adapter circuit of the present invention, when a command abort request is given during data transfer, checks the data transfer direction and sends dummy data if the data transfer is to the SCS R bus. , if data is given from the SC8I bus, this data is discarded, so it is possible to ensure command abort operations between a host device that does not have a DMA restart function and a lower device connected via the SCSI bus. can.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of a SCSI host adapter circuit embodying the present invention, FIG. 2 is a functional block diagram of the circuit of the present invention, FIG. 3 is a flow chart showing the normal operation of the circuit of the present invention, and FIG. 4 is a flowchart when an interrupt is made in the processing shown in FIG. 3, FIG. 5 is a flowchart showing the command cancellation processing in the flowchart of FIG. 2, and FIG. 6 is a flowchart showing the command cancellation request processing during data transfer processing. , FIG. 7 is a flowchart when a command abort request is given during status transmission processing, and FIG. 8 is a system diagram when a SCSI host adapter circuit is used. 1...Upper 5A''/!1゜2...scs r host adapter circuit, 21...
Central processing unit cpu1 22...Channel control unit, 23...SCSI bus control unit, 201...Command transmitting and receiving unit, 202...DMA processing unit, 203...Status transmitting and receiving unit, 204...Command Cancellation request flag setting unit, 205.
・・Transfer direction confirmed ii! Group, 206... Dummy data transmission "Yamabe", 207... Read-discard processing unit, 3... Lower device, 4... SCSI bus, 5...
- Channel bus, A1. A2...address bus, B1. B2...Control tXIII, D...Data bus. Figure 1 4 Figure 5 Figure 197 rs B High

Claims (1)

[Claims] (1) In a SCSI host adapter circuit that connects a higher-level device that does not have a direct memory access restart function and a lower-level device connected to the SCSI bus, a command abort request is received from the higher-level device during data transfer processing. a transfer direction confirmation means for confirming the data transfer direction when given, a dummy data sending means for sending dummy data when transferring data to the SCSI bus, and a dummy data sending means for sending dummy data when transferring data to the host device side. and discard means for reading and discarding data on the SCSI bus.