JPH01104046U - - Google Patents

Info

Publication number
JPH01104046U
JPH01104046U JP1987198975U JP19897587U JPH01104046U JP H01104046 U JPH01104046 U JP H01104046U JP 1987198975 U JP1987198975 U JP 1987198975U JP 19897587 U JP19897587 U JP 19897587U JP H01104046 U JPH01104046 U JP H01104046U
Authority
JP
Japan
Prior art keywords
external lead
thin metal
semiconductor device
length
transistor elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987198975U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987198975U priority Critical patent/JPH01104046U/ja
Publication of JPH01104046U publication Critical patent/JPH01104046U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の第一実施例のボンデイングの
様子を示す説明図。第２図は本考案の第二実施例
のボンデイングの様子を示す説明図。第３図は従
来例のボンデイングの様子を示す説明図。 １，１ａ，１０１，１０１ａ……入力用金属細
線、２，２ａ……入力ボンデイングパツド、３…
…入力リード接続部、４，４ａ……ペレツト、５
，５ａ……接地部、６……絶縁基板、７，７ａ…
…接地用金属細線、８……出力リード接続部、９
……出力リード線、１０……入力リード線、１１
，１１ａ……接地ボンデイングパツド。 FIG. 1 is an explanatory diagram showing the state of bonding in the first embodiment of the present invention. FIG. 2 is an explanatory diagram showing the state of bonding in a second embodiment of the present invention. FIG. 3 is an explanatory diagram showing the state of bonding in a conventional example. 1, 1a, 101, 101a... thin metal wire for input, 2, 2a... input bonding pad, 3...
...Input lead connection part, 4, 4a...Pellet, 5
, 5a... Grounding part, 6... Insulating substrate, 7, 7a...
... Thin metal wire for grounding, 8 ... Output lead connection part, 9
...Output lead wire, 10...Input lead wire, 11
, 11a... Ground bonding pad.

Claims (1)

【実用新案登録請求の範囲】 複数のトランジスタ素子が並列に接続された構
造を有し、かつ外部リード線１０が接続された少
くとも一つの外部リード接続部３と前記各トラン
ジスタ素子の少くとも一つの電極端子２，２ａと
がそれぞれ金属細線１０１，１０１ａで接続され
た半導体装置において、 前記金属細線の長さを前記外部リード線の端面
と前記電極端子との間の長さに応じて短くしたこ
と を特徴とする半導体装置。[Claims for Utility Model Registration] It has a structure in which a plurality of transistor elements are connected in parallel, and at least one external lead connection part 3 to which an external lead wire 10 is connected and at least one of the transistor elements. In a semiconductor device in which two electrode terminals 2 and 2a are connected by thin metal wires 101 and 101a, respectively, the length of the thin metal wire is shortened according to the length between the end surface of the external lead wire and the electrode terminal. A semiconductor device characterized by:
JP1987198975U 1987-12-28 1987-12-28 Pending JPH01104046U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987198975U JPH01104046U (en) 1987-12-28 1987-12-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987198975U JPH01104046U (en) 1987-12-28 1987-12-28

Publications (1)

Publication Number Publication Date
JPH01104046U true JPH01104046U (en) 1989-07-13

Family

ID=31489450

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987198975U Pending JPH01104046U (en) 1987-12-28 1987-12-28

Country Status (1)

Country Link
JP (1) JPH01104046U (en)

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