JPH01101082A - Video signal storage device - Google Patents

Abstract

PURPOSE:To store a satisfactory video signal free from picture distortion, residue of an unnecessary signal, or the like by supplying a separated horizontal synchronizing signal to an interpolating circuit and performing switching between the interpolated horizontal synchronizing signal and said separated horizontal synchronizing signal to supply them to a memory control circuit. CONSTITUTION:The signal from an input terminal 1 is supplied to a synchronizing separating circuit 4 to separate the horizontal synchronizing signal, and the signal from this circuit 4 is supplied to an AFC circuit 5 to perform the signal processing for servo or the like. In this AFC circuit 5, the horizontal synchronizing signal is interpolated by self-oscillation or the like with respect to a drop-out part of the video signal. Further, the signal from the terminal 1 is supplied to an envelope detecting circuit 2, and a detection signal which goes to '1' for the presence of a signal from the circuit 7 is supplied to a switch 6 to switch the switch 6 to the side of the separating circuit 4. Then, the video signal is stored in a memory 3 based on the horizontal synchronizing signal and its interpolated signal. Thus, the satisfactory video signal free from picture distortion, residue of an unnecessary signal, or the like is stored.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video signal storage device for storing playback signals of, for example, a VTR.

[Summary of the invention]

The present invention relates to a video signal storage device, and by switching between a reproduced horizontal synchronizing signal and its interpolation signal and supplying the same to a memory control circuit, the present invention can also be applied to a video signal in which a signal is missing during high-speed search playback of a VTR, etc. This allows for good memory.

[Conventional technology]

For example, it has been put into practical use to store any one field of a video signal reproduced by a VTR in a memory and repeatedly read out the memory to obtain a still image. The video signal storage device used in this case is configured as shown in FIG. 3, for example.

In the figure, the input terminal (31) has a head system (not shown).
A video signal is supplied from the , and this signal is sent to the AD conversion circuit (
32), it is converted into a digital signal and supplied to the memory (33). Also, the signal from the terminal (31) is transmitted to the synchronous separation circuit (
34), the horizontal synchronizing signal is separated, and this separated horizontal synchronizing signal is supplied to the memory control circuit (35). In this control circuit (35), a counter (not shown) that counts clock signals from the oscillation circuit (36), for example, is reset by the horizontal synchronization signal, and a control signal formed according to the count value of this counter is transmitted to the memory IJ. (33).

As a result, the video signal is stored in the memory (33) with reference to the horizontal synchronizing signal, and the stored signal is read out according to the clock signal from the oscillation circuit (36), for example, and sent through the DA* conversion circuit (37). Output terminal (
38), and by repeating this process, for example, a still image can be obtained.

[Problem that the invention seeks to solve]

By the way, for example, in the consumer V'I'H, the azimuth angles of the two heads of the helical scan type are made different from each other, and the guard band between tracks is eliminated to perform high-density recording, as shown in Figure 4. has been done. In this case, so-called high-speed search playback can be performed by transporting the tape recorded in this manner at high speed and rotating the head between steady and constant rotation.

However, when performing such a high-speed re-search, the scanning locus of the head becomes as shown by a broken line in the figure, and here, for example, every other track is shown with hatching,
Since the azimuth angles of the head and the recording are different, it is not possible to obtain a reproduced signal for this part, and the reproduced video signal has some gaps in the middle.

When such a video signal is supplied to the above-mentioned storage device, the count value of the memory control circuit (35) is reset in this part because no horizontal synchronizing signal is obtained in the part where the above-mentioned signal is missing. First, the reset is performed only on the part where the signal is obtained, and only the part where the signal is obtained is continuously stored in the memory (33).

Therefore, when this memory (33) is read out to form a video signal, the displayed image will be vertically distorted, as shown in Figure 5, for example, and no signal will be stored at the bottom of the image. Various problems have arisen, such as noise and parts of previously stored images remaining in the display.

Means for Solving Problem C] The present invention divides the horizontal synchronizing signal in the video signal (input terminal (1)) into a circuit 111 (circuit (41) t), and converts this separated horizontal synchronizing signal into a memory control circuit. (8), and stores the video signal in the memory (3) under the control of this memory control circuit. 5
)), and the interpolated horizontal synchronization signal and the separated horizontal synchronization signal are switched and supplied to the memory control circuit (switch (6)). It is.

(Operation) According to this, since the interpolated horizontal synchronization signal is supplied to the memory control circuit in the signal missing part, the predetermined memory control is performed even during this time, and this eliminates image distortion and unnecessary signals. It is possible to store a good video signal without any residue or the like.

(Example) In FIG. 1, an input terminal (1) is supplied with a video signal from a head system (not shown), and this signal is sent to the AD conversion circuit! The signal is converted into a digital signal and supplied to the memory (3).

In addition, the signal from the terminal (1) is supplied to the sync separation circuit (4) to separate the horizontal synchronization signal, and the signal from this separation circuit (4) is supplied to the AFC circuit (5) to control the servo (not shown). In this AFC circuit (5), the horizontal synchronizing signal is interpolated by, for example, self-oscillation at the missing portion of the video signal.

This interpolated signal and the horizontal synchronizing signal from the separation circuit (4) are then supplied to the switch (6).

Furthermore, the signal from terminal (1) is sent to the envelope detection circuit (
For example, when there is a signal from this circuit (7), a detection signal that becomes "L" is supplied to the switch (6), and during this time the switch (6) switches to the separation circuit (41 side). It will be done.

The signal from this switch (6) is sent to the memory control circuit (8).
In this control circuit (8), for example, a counter (
(not shown) is reset by a signal from the switch (6), and a control signal formed according to the count value of this counter is supplied to the memo 3).

As a result, the video signal is stored in the memory (3) based on the horizontal synchronization signal and its interpolation signal, and the stored signal is read out in accordance with the clock signal from the oscillation circuit (9), for example, and the DA conversion circuit ( 10) to the output terminal (11), and by repeating this process, for example, a still image can be obtained.

In this way, according to the above-mentioned device, the interpolated horizontal synchronization signal is supplied to the memory control circuit in the signal missing portion, so that
Even during this time, predetermined memory control is performed, thereby making it possible to store a good video signal without image distortion or residual unnecessary signals.

That is, according to this device, when the signal read from the memory (3) is displayed, an image as shown in FIG. 2 is obtained, and although so-called noise bars appear in the portion corresponding to the missing portion, the image is A good display image without residual distortion or unnecessary signals can be obtained.

In addition, in the above-mentioned device, the interpolation of the horizontal synchronization signal is A'
A circuit other than the FC circuit may be used.

Furthermore, when such interpolation is performed, there is a risk that the interpolated signal will deviate somewhat from the original signal. Therefore, in the above-mentioned apparatus, omissions in the video signal are detected by detecting the envelope, etc., and the above-mentioned interpolated signal is used only for these omissions. As a result, during the period when the video signal exists, storage is performed according to the separated horizontal synchronization signal, and even if there is a slight deviation, the interpolated signal is used only for the missing part, which is not a problem. The storage of video signals is performed.

〔Effect of the invention〕

According to this invention, since the interpolated horizontal synchronizing signal is supplied to the memory control circuit in the signal missing portion, predetermined memory control is performed even during this period, and this causes image distortion, residual unnecessary signals, etc. It is now possible to store good video signals without any problems.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of an example of the present invention, FIG. 2 is a diagram for explaining the same, and FIGS. 3 to 5 are diagrams for explaining the prior art. (1) is an input terminal, (3) is a memory, (4) is a synchronous separation circuit, (5) is an AFC circuit, (6) is a switch, (8)
is a memory control circuit.

Claims (1)

[Claims] A horizontal synchronizing signal in a video signal is separated, the separated horizontal synchronizing signal is supplied to a memory control circuit, and the video signal is stored in the memory under the control of the memory control circuit. In the video signal storage device, the separated horizontal synchronizing signal is supplied to an interpolation circuit, and the interpolated horizontal synchronizing signal and the separated horizontal synchronizing signal are switched and supplied to the memory control circuit. A video signal storage device characterized by: