JPH01101030A - Receiver - Google Patents

Receiver

Info

Publication number
JPH01101030A
JPH01101030A JP25880587A JP25880587A JPH01101030A JP H01101030 A JPH01101030 A JP H01101030A JP 25880587 A JP25880587 A JP 25880587A JP 25880587 A JP25880587 A JP 25880587A JP H01101030 A JPH01101030 A JP H01101030A
Authority
JP
Japan
Prior art keywords
jitter
equalizer
phase
output
components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP25880587A
Other languages
Japanese (ja)
Other versions
JPH0775332B2 (en
Inventor
Yutaka Inoue
豊 井上
Tatsuya Yaguchi
達也 矢口
Hiroko Ichikawa
裕子 市川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP62258805A priority Critical patent/JPH0775332B2/en
Priority to US07/258,163 priority patent/US5175746A/en
Publication of JPH01101030A publication Critical patent/JPH01101030A/en
Publication of JPH0775332B2 publication Critical patent/JPH0775332B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Facsimile Image Signal Circuits (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To form a receiver in which a jitter restraint is high and a transmitting quality is good by detecting the jitter of an output through the equalizer of transmitted data and controlling the equalizing characteristic of equalizer according to the detected jitter. CONSTITUTION:A phase detector 150 to extract jitter components from the equalizing output signal of an equalizer 114, a phase control device 151 and a jitter phase predicting device 160 are provided, and a feedback control is executed. The jitter phase predicting device 160 predicts the future unknown jitter components from the past jitter components, and the output of the jitter predicting device 160 is fed each to respective tap gains of the equalizer 114. Respective tap gains of the equalizer 114 are shored onto a memory as a tap gain register 161, for example, when the tap gains are composed of a DSP. Respective gains are multiplied by the output of the jitter predicting device 160 by means of a multiplier 162. Namely, the jitter components by a time width which the equalizer covers are predicted, respective tap gains are adjusted by using the prediction data, and thereby, the jitter can be correctly suppressed.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 本発明は受信装置に関し、特に回線ジッタのrje’f
fを吸収する受信装置に関する。
[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a receiving device, and in particular, to
This invention relates to a receiving device that absorbs f.

〈従来の技術〉 従来伝送路での歪を除去するために用いられる装置とし
て等化器が有るがこの等化器自体で除去できない成分と
して、伝送路(回線)で発生する位相ジッダがある。こ
れは伝送データの位相が回線上の主に商用周波数(50
Hz。
<Prior Art> Conventionally, an equalizer is used as a device to remove distortion in a transmission line, but one component that cannot be removed by the equalizer itself is phase jitter generated in the transmission line (line). This means that the phase of the transmitted data is mainly at the commercial frequency (50
Hz.

60Hz)成分により回転(すなわち位相変調)されて
しまう現象であり、等化器にしてみれば非常に早い変動
成分となり、従来の等化器では吸収できないものである
。このため従来はこの様な変S成分を除去するため第7
図以下に示す様な方法が採られていた。
This is a phenomenon in which the signal is rotated (that is, phase modulated) by the 60 Hz) component, and from the perspective of an equalizer, it becomes a very fast fluctuation component that cannot be absorbed by a conventional equalizer. For this reason, conventionally, in order to remove such a strange S component, a seventh
The method shown below was adopted.

従来のジッタ抑制方法のブロック図を第7図に示す。A block diagram of a conventional jitter suppression method is shown in FIG.

第7図は等花器部分のブロック図である。FIG. 7 is a block diagram of the flower vase section.

114.115は夫々受信データの歪を除去する等化器
及び等化器114の出力から送信されたデータを判定す
る判定器でありその等化出力信号からジッダ成分を抽出
する位相検出器150及び位相制御器151を設け、フ
ィードバック制御を行うものである。この位置でジツ夕
補正−1を、行うのは、回線歪か予め等花器11.4て
等化されている為、ジッダ成分の検出か容易であるから
である。
114 and 115 are an equalizer that removes distortion from received data, and a determiner that determines data transmitted from the output of the equalizer 114, respectively, and a phase detector 150 that extracts a jedder component from the equalized output signal. A phase controller 151 is provided to perform feedback control. The reason why the jitter correction -1 is performed at this position is that since the line distortion has been equalized in advance by the equalizer 11.4, it is easy to detect the jitter component.

又、シックによる影うはデータの回転成分として現われ
るので位相検出器150で検出したジッダ位相と逆方向
の回転を、位相制御部152で加える事により、ジッダ
成分を除去しようとするものである。尚この位相回転は
等花器114の出力に所定の位相の波をかけ合わせるこ
とによって行われる。
Furthermore, since the shadow caused by sick appears as a rotational component of data, the phase controller 152 applies rotation in the opposite direction to the jedder phase detected by the phase detector 150 to remove the jedder component. Note that this phase rotation is performed by multiplying the output of the flower vase 114 by a wave of a predetermined phase.

〈゛発明の解決しようとする問題点〉 ここで、等花器114は時間的にある範囲のデータで計
算したものを出゛力するもので、その゛出力自体、同時
間範囲のジッタ成分°を全て含んだものとなる。
<Problems to be Solved by the Invention> Here, the isometric vase 114 outputs something calculated using data in a certain time range, and its output itself has jitter components in the same time range. It includes everything.

したがって従来の制御例(第7図)では、この等化出力
から検出されたジッタ量に応じて位相制御を加えるもの
であるため、制御する位相量は等花器の時間スパン内で
みた平均値にすぎない。
Therefore, in the conventional control example (Figure 7), phase control is applied according to the amount of jitter detected from this equalized output, so the amount of phase to be controlled is the average value seen within the time span of the equal flower. Only.

一品質の劣化を引き起こしていた。This caused a deterioration in quality.

、本発明は、上述従来例の欠点を除去したジッダ抑制力
の高い、すなわち伝送品質の良い受信装置を提供するこ
とを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a receiving apparatus that eliminates the drawbacks of the conventional example and has a high jitter suppression ability, that is, a high transmission quality.

く問題点を解決するための手段〉 ジッタを検出する”手段、該検出手段に検出され゛たジ
ッタに応じて前記等化器の等化特性を制御する手段とを
有する。
Means for Solving the Problems The present invention includes means for detecting jitter, and means for controlling equalization characteristics of the equalizer in accordance with the jitter detected by the detecting means.

く作用〉 ′  上記構成に於いて前記検出手段により検出された
ジッタに応じて前記等化器の等化特性が制御される。
Effect>' In the above configuration, the equalization characteristic of the equalizer is controlled according to the jitter detected by the detection means.

〈実施例〉 本実施例の概要はジッダ位相制御を平均値で行うのでは
なく、等花器スパン内のジッタ成分を検出し、等花器に
含まれるトランスバーサルフィルタの各タップゲインを
直接制御する事により同スパン内のジッタ成分を除去す
ることが出来、従来例に比してジッタ抑制力を高めたも
のである。
<Example> The outline of this example is that instead of performing jitter phase control using an average value, the jitter component within the isoflower span is detected and each tap gain of the transversal filter included in the isoflower span is directly controlled. This makes it possible to remove jitter components within the same span, thereby increasing the jitter suppression ability compared to the conventional example.

以下図面に従い本発明の実施例を詳細に説明する。Embodiments of the present invention will be described in detail below with reference to the drawings.

第1図は本発明の一実施例の概略を示す為の等化部の構
成図を示す。
FIG. 1 shows a block diagram of an equalization section to outline an embodiment of the present invention.

114.115は前述した等花器、判定器であり、15
0,151も前記従来例で説明した位相検出器及びジッ
タ位相制御器である。例えば位相変調の場合には位相検
出器150は等花器出力ykを判定値akて割りその虚
数部(信号は複素数として扱う)をとる事で検出でき、
位相制御器は2次以上の伝達関数をもつフィルタとなる
114.115 is the above-mentioned flower vase and judgment device, and 15
0,151 is also the phase detector and jitter phase controller described in the conventional example. For example, in the case of phase modulation, the phase detector 150 can detect by dividing the constant output yk by the judgment value ak and taking its imaginary part (the signal is treated as a complex number).
The phase controller becomes a filter with a transfer function of second order or higher.

実際に1回線変動成分が位相ジッタのみの時のジッダ位
相制御器151の出力を第2図に示す。今矢印点を現時
点とすると、従来方式では矢印点での位相検出器150
の出力値を等花器出力へフィードバック制御していた。
FIG. 2 shows the output of the jitter phase controller 151 when the only fluctuation component of one line is actually phase jitter. Assuming that the arrow point is the current point, in the conventional method, the phase detector 150 at the arrow point
The output value was feedback-controlled to the output of the flower vase.

したかって従来は等花器のスパン巾において平均的なジ
ッタ成分を等花器出力へフィードバックしていたのに対
して本実施例では第3図(a)に示す現時点に於ての等
花器が見る時間巾(等化器スパン巾)における平均的な
ジッタ10てはなく、リアルタイムのジッタ成分を等花
器の各タップゲインにフィードバックしようとするもの
である−1 ここで第6図に等花器114の内部構成を示す。− 等花器114の中で130は受信したデータを1ビツト
毎に転送するネ信データシフトレジスタ、131はレジ
スタ130の各段、の出力と乗算されるべきタップゲイ
ンを発生するタップゲインレジスタ、132はシフトレ
ジスタ130の各段の出力とタップゲインとを乗算する
乗算器、133は乗算器132の出力の総和を演算する
加算器であや。   − ここで本実施例における等花器114中のりツブゲイン
レジスタ131に格納されている。タップゲインは第3
図(a)に示す時間巾に相当する期間の信号に対して設
定されている。一般にタップゲインレジスタ131に格
納されているタップゲインは等花器の単位インパルス応
答と呼ばれ、送信路の周波数特性を逆フーリエ変換した
ものに等しくすれば送進路の歪を除去することが出来る
。即ち等花器出力信号ykは以下の式となる。
Therefore, whereas in the past, the average jitter component over the span width of the iso-vase was fed back to the iso-vase output, in this embodiment, the jitter component is fed back to the iso-vase output at the current time shown in Fig. 3(a). The purpose is to feed back the real-time jitter component to each tap gain of the equalizer, rather than the average jitter in the width (equalizer span width). Show the configuration. - In the container 114, 130 is a transmission data shift register that transfers received data bit by bit; 131 is a tap gain register that generates a tap gain to be multiplied by the output of each stage of the register 130; 132; 133 is a multiplier that multiplies the output of each stage of the shift register 130 by a tap gain, and 133 is an adder that calculates the sum of the outputs of the multiplier 132. - Here, it is stored in the glue gain register 131 in the flower vase 114 in this embodiment. Tap gain is 3rd
It is set for a signal of a period corresponding to the time width shown in FIG. Generally, the tap gain stored in the tap gain register 131 is called a uniform impulse response, and distortion in the transmission path can be removed by making it equal to the inverse Fourier transform of the frequency characteristics of the transmission path. That is, the equal flower vase output signal yk is expressed by the following formula.

ここでタップゲインの設定としてはデータの通信に先だ
って、送・受信間で予め定められたデータを伝送するト
レーニングが行われる。
In setting the tap gain, prior to data communication, training is performed to transmit predetermined data between transmission and reception.

一般にタップゲイン(C−N〜CN)の計算はMean
 5quare Frror法(MSE法)を用い、以
下の式で逐次計算される。
Generally, tap gain (CN to CN) is calculated using Mean
Using the 5-square Frollor method (MSE method), it is calculated sequentially using the following formula.

α :収束係数(α〈〈1) ak:受信信号akの予測値 (トレーニング時 ak =ak ) 上記計算はトレーニング時以後のデータ通信時にも行わ
れ、ゆるやかな回線特性の変動に追従する。
α: Convergence coefficient (α<<1) ak: Predicted value of received signal ak (during training ak = ak) The above calculation is also performed during data communication after training to follow gradual fluctuations in line characteristics.

尚本実施例においては第3図(a)の点線で示した未来
の未知のジッダ成分を過去のジッダ成分から予測しなく
てはならない、この予測を行うのが第1図に於るジッタ
位相予測器160である。
In this embodiment, it is necessary to predict the future unknown jitter component shown by the dotted line in FIG. 3(a) from the past jitter component. This prediction is performed using the jitter phase in FIG. A predictor 160.

その予測法の一例を第3図(b)に示す。これは現時点
までに得られたジッタ成分を現時点で折り返して鏡像を
作りこれを予測部分として用いるものである。尚、この
予測は他にも種々の方法が考えられるものである。
An example of the prediction method is shown in FIG. 3(b). This involves folding back the jitter components obtained up to this point to create a mirror image, which is then used as the prediction part. Note that various other methods can be considered for this prediction.

実際にこの様な処理はプログラマブルなディジタルシグ
ナルプロセッサ(DSP)を用いて行われる事が多く、
この予測方法を変えるにあたってはソフトウェアを変更
するだけで済むため一々ハードウェア構成を変えて例え
ば前記したジッタ位相予測器を作る必要は無い。
In fact, such processing is often performed using a programmable digital signal processor (DSP).
To change this prediction method, it is only necessary to change the software, so there is no need to change the hardware configuration to create, for example, the above-mentioned jitter phase predictor.

このジッタ予測器160の出力が、本実施例ではそのま
ま等花器の各タップゲインにフィードバックされる。こ
の様子なJ84図に示す。
In this embodiment, the output of the jitter predictor 160 is fed back as is to each tap gain of the isoflower. This situation is shown in Figure J84.

尚、等花器114の各タップゲインは例えばDSPで構
成する場合、メモリ上にタップゲインレジスタ161と
して格納されている。この各タップゲインにジッタ予測
器160の出力を乗算器162を用いて乗算する。この
時タップゲインの配置は01〜CNであり、Nが小さい
程未来のデータとなるので、かけ合わせる予測ジッタの
時間軸も第3図とは逆方向となる。
Incidentally, each tap gain of the flower vase 114 is stored as a tap gain register 161 on the memory when configured by, for example, a DSP. Each tap gain is multiplied by the output of the jitter predictor 160 using a multiplier 162. At this time, the tap gains are arranged from 01 to CN, and the smaller N is, the more future data there is, so the time axis of the predicted jitter to be multiplied is also in the opposite direction to that in FIG.

又、このジッタ補正の時期であるが、等花器単体の等化
機能を失わない様になるべくなら、(2)式のMSE法
に於るコラ−信号によるタップ更新の前に各タップゲイ
ンの重み付けとして行ってもよい。この場合等花器の本
来の等化性能を落とすことがない。
Also, at the time of this jitter correction, if it is possible to avoid losing the equalization function of a single equalizer, it is necessary to weight each tap gain before updating the taps using the collar signal in the MSE method of equation (2). You can also go as In this case, the original equalization performance of the vase is not degraded.

この様に本実施例に依れば等花器のカバーしている時間
重分のジッタ成分を予測し、その予測データを用い、各
タップゲインを調整している為、従来に比べ、正確なジ
ッダ抑制が可能となる。      − 次・に前述した゛実施例の等花器を組み込むべき受信装
置を含むモデムの構成について説明する。このモデムの
概要を第5図に示す。図中点線で囲んだ部分がモデムに
含まれる部分である。
As described above, according to this embodiment, the jitter component of the time overlap portion covered by the flower vase is predicted, and each tap gain is adjusted using the predicted data, so the jitter is more accurate than in the past. Suppression becomes possible. - Next, the configuration of a modem including a receiving device into which the flower vase of the above-described embodiment is to be incorporated will be explained. An outline of this modem is shown in FIG. The part surrounded by the dotted line in the figure is the part included in the modem.

100は送信ディジタル信号を発生する送信端末、又1
18は同信号を受信する受信端末である。
100 is a transmitting terminal that generates a transmitting digital signal, and 1
18 is a receiving terminal that receives the same signal.

101は受信側で、信号の区切りを明確にする等の役目
を果たし、送′信データを白色化するスクランブラであ
り、102はスクランブラ出力信号をトリビット、ダイ
ビット毎等に符号を割り付ける符号器であり、103は
、□信号の符号量干渉を防止する為のパルス成形フィル
タ(ロールオフフィルタ)である。
Reference numeral 101 is a scrambler on the receiving side, which plays a role such as clarifying the delimitation of signals and whitens the transmitted data, and reference numeral 102 is an encoder that assigns a code to the scrambler output signal for each tribit, dibit, etc. 103 is a pulse shaping filter (roll-off filter) for preventing code amount interference of the □ signal.

104は信号を搬送波に乗せる変調器である。この変調
方式はデータ転送スピード等により種々有り、代表的な
ものに搬送波の位相を変化させる位相変調(PSに)、
同周波数を変化させる周波数変調(FSX)、同振巾を
変化させる振巾変調(AM)及び同振巾、同位相を変化
させる直交振巾変調(QAM)がある。
104 is a modulator that puts a signal on a carrier wave. There are various modulation methods depending on the data transfer speed, etc., and typical ones include phase modulation (PS) that changes the phase of the carrier wave,
There are frequency modulation (FSX) that changes the same frequency, amplitude modulation (AM) that changes the same amplitude, and quadrature amplitude modulation (QAM) that changes the same amplitude and phase.

変調塁104で変調された信号は、アナログ回線に送出
すべくD/A変換器105でアナログ信号に変換されロ
ーパスフィルタ106により余分な高調波成分が取り除
かれ伝送路へ伝送される。
The signal modulated by the modulation base 104 is converted into an analog signal by a D/A converter 105 to be sent to an analog line, and excess harmonic components are removed by a low-pass filter 106 before being transmitted to a transmission line.

受信側において伝送信号はその伝送帯域外の成分をバン
ドパスフィルタ110で除去され受信側で扱う信号レベ
ルにAGCl l 1で制御され、ざらにA/D変換器
112でディジタル信号化され、復調器113で元の信
号(変調前の信号)に復調される。
On the receiving side, the transmitted signal has components outside the transmission band removed by a bandpass filter 110, controlled by AGCl l 1 to a signal level that can be handled by the receiving side, roughly converted into a digital signal by an A/D converter 112, and then sent to a demodulator. In step 113, the signal is demodulated to the original signal (signal before modulation).

114は第1図に示した等花器である。これにより本来
の伝送信号が抽出される。
114 is the same flower vase shown in FIG. This extracts the original transmission signal.

この等化器出力信号は、判定器115により符号ポイン
ト点に判定しさらに復号器116で複合され、スクラン
ブラ101で白色化した信号を元に戻す為のディスクラ
ンツラ117により元来の送信信号に戻され受信端末1
1Bで同信号を受信する。
This equalizer output signal is determined to be a code point by a determiner 115, further decoded by a decoder 116, and is converted into an original transmission signal by a descrunzer 117 for restoring the signal whitened by the scrambler 101. receiving terminal 1
Receive the same signal on 1B.

以上の様に、本発明を適用したモデムを使用することで
信号を一般の公衆回線を介してジッタの影響なく確実に
データ伝送が行なえる。
As described above, by using a modem to which the present invention is applied, data can be reliably transmitted through a general public line without the influence of jitter.

以上説明した実施例に於いて、ジッダ未知部分の予測法
として、−g簡単な現時点まての鏡像をとる方法を述べ
たが、他に、確率統計等の多種な予測手段がある。例え
ば過去のジッタ成分を判別して過去のジッダ成分のうち
最も割合の高い周波数成分の抜4き出したり過去の周期
からみて最も生じる可能性の高いジッダ成分に対応した
データをタップレジスタに設定する様にしてもよい、又
、実施例及び従来例として、通常の等花器を用いて述べ
てきたが、本発明は特にこれに限るわけではなく、ダブ
ルサンプリング等化法(通信方式研究合間49年5月「
タイミング位相ずれを吸収する等化法」参照)にも適用
できることは言うまでも無い。
In the embodiment described above, the -g simple method of taking a mirror image up to the present time has been described as a prediction method for the unknown part of Jeddah, but there are various other prediction methods such as probability statistics. For example, by determining past jitter components, extracting the frequency component with the highest proportion among the past jitter components, or setting data corresponding to the jitter component that is most likely to occur based on the past cycle in the tap register. In addition, although the embodiment and conventional example have been described using a normal equal flower vase, the present invention is not limited to this. May
Needless to say, this method can also be applied to "equalization method for absorbing timing phase shift").

また本実施例では送信路として電話回線等を想定したか
本発明の受信装置はこれに限らず、例えばジッタを有す
る記録媒体から再生された信号のジッダ成分を抑圧する
ものを含むことは勿論である。
Furthermore, in this embodiment, a telephone line or the like is assumed as the transmission path, but the receiving apparatus of the present invention is not limited to this, and may of course include one that suppresses the jitter component of a signal reproduced from a recording medium having jitter, for example. be.

以E説明した様に本実施例に依れば等花器のスパン申分
のジッタ成分を全て除去する方法をとる為、従来の平均
値的除去法に比べ、ジッダ抑圧力が大きく、結果伝送誤
差の少ない高品質なデータ通信が行える効果がある。
As explained below, according to this embodiment, since the method of removing all the jitter components for the span of the same flower vase is used, the jitter suppression power is greater than that of the conventional average value removal method, and as a result, the transmission error is reduced. This has the effect of enabling high-quality data communication with less traffic.

〈発明の効果〉 以上説明した様に本発明に依れば伝送されたデータの等
花器を介した出力のジッタを検出し、その検出されたジ
ッタに応じて等花器の等化特性を制御する様にしたので
ジッダを良好に防止することが出来る。
<Effects of the Invention> As explained above, according to the present invention, the jitter in the output of the transmitted data via the isolator is detected, and the equalization characteristic of the isolator is controlled according to the detected jitter. This makes it possible to effectively prevent jitter.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の受像装置の構成を示すブロ
ック図、 第2図はジッダ制御量を示すグラフ、 第3図(a)、(b)はジッダ予測器の動作を説明する
グラフ、 第4図は1本発明によるジッダ補正法を示す図、 第5図はモデムの概要を示すブロック図、第6因は第1
図の等化器の内部の構成を示す図、 第7図は従来の回線ジッダ制御方法を示すブロック図で
ある。 114−・・等花器 150−・・位相検出器 151−・・ジッタ位相制御 160・・・ジッタ位相予測器
Fig. 1 is a block diagram showing the configuration of an image receiving device according to an embodiment of the present invention, Fig. 2 is a graph showing the jidder control amount, and Figs. 3 (a) and (b) explain the operation of the jidder predictor. Figure 4 is a diagram showing the Jeddah correction method according to the present invention, Figure 5 is a block diagram showing an overview of the modem, and the sixth factor is the first factor.
FIG. 7 is a block diagram showing the conventional line jitter control method. 114--Vase 150--Phase detector 151--Jitter phase control 160--Jitter phase predictor

Claims (2)

【特許請求の範囲】[Claims] (1)伝送されたデータの等化器を介した出力のジッタ
を検出する手段、 該検出手段に検出されたジッタに応じて 前記等化器の等化特性を制御する手段とを 有することを特徴とする受信装置。
(1) Means for detecting jitter in the output of transmitted data via an equalizer, and means for controlling equalization characteristics of the equalizer according to the jitter detected by the detecting means. Features of the receiving device.
(2)前記等化器はトランスバーサルフィルタを有して
おり、前記制御手段は前記検出手 段に検出されたジッタに応じて前記トラン スバーサルフィルタのタップゲインを制御 する手段であることを特徴とする特許請求 の範囲第1項記載の受信装置。
(2) The equalizer has a transversal filter, and the control means is a means for controlling the tap gain of the transversal filter in accordance with the jitter detected by the detection means. A receiving device according to claim 1.
JP62258805A 1987-10-14 1987-10-14 Receiver Expired - Fee Related JPH0775332B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62258805A JPH0775332B2 (en) 1987-10-14 1987-10-14 Receiver
US07/258,163 US5175746A (en) 1987-10-14 1988-10-14 Receiving apparatus and transmitting-receiving apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62258805A JPH0775332B2 (en) 1987-10-14 1987-10-14 Receiver

Publications (2)

Publication Number Publication Date
JPH01101030A true JPH01101030A (en) 1989-04-19
JPH0775332B2 JPH0775332B2 (en) 1995-08-09

Family

ID=17325296

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62258805A Expired - Fee Related JPH0775332B2 (en) 1987-10-14 1987-10-14 Receiver

Country Status (1)

Country Link
JP (1) JPH0775332B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0366217A (en) * 1989-07-31 1991-03-20 Samsung Electron Co Ltd Jitter equalizer of digital signal transmitting wave filter
JP2009014279A (en) * 2007-07-05 2009-01-22 Rinnai Corp Burner plate and power generating device
CN107534425A (en) * 2015-07-28 2018-01-02 拉姆伯斯公司 Tolerate the decision feedback equalization of burst

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5825707A (en) * 1981-08-07 1983-02-16 Mitsubishi Electric Corp Waveform equalizer
JPS6087516A (en) * 1983-10-20 1985-05-17 Sansui Electric Co Equalizer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5825707A (en) * 1981-08-07 1983-02-16 Mitsubishi Electric Corp Waveform equalizer
JPS6087516A (en) * 1983-10-20 1985-05-17 Sansui Electric Co Equalizer

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0366217A (en) * 1989-07-31 1991-03-20 Samsung Electron Co Ltd Jitter equalizer of digital signal transmitting wave filter
JP2009014279A (en) * 2007-07-05 2009-01-22 Rinnai Corp Burner plate and power generating device
CN107534425A (en) * 2015-07-28 2018-01-02 拉姆伯斯公司 Tolerate the decision feedback equalization of burst
CN107534425B (en) * 2015-07-28 2021-06-29 拉姆伯斯公司 Burst tolerant decision feedback equalization
US11184197B2 (en) 2015-07-28 2021-11-23 Rambus Inc. Burst-tolerant decision feedback equalization
US11949539B2 (en) 2015-07-28 2024-04-02 Rambus Inc. Burst-tolerant decision feedback equalization

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