JP7760258B2 - 情報処理装置、情報処理システム、および情報処理方法 - Google Patents

情報処理装置、情報処理システム、および情報処理方法

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Publication number
JP7760258B2
JP7760258B2 JP2021078775A JP2021078775A JP7760258B2 JP 7760258 B2 JP7760258 B2 JP 7760258B2 JP 2021078775 A JP2021078775 A JP 2021078775A JP 2021078775 A JP2021078775 A JP 2021078775A JP 7760258 B2 JP7760258 B2 JP 7760258B2
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JP
Japan
Prior art keywords
read
information processing
memory
data
mode
Prior art date
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Application number
JP2021078775A
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English (en)
Japanese (ja)
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JP2022172698A (ja
JP2022172698A5 (https=
Inventor
英幸 斎藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Interactive Entertainment Inc
Original Assignee
Sony Interactive Entertainment Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Interactive Entertainment Inc filed Critical Sony Interactive Entertainment Inc
Priority to JP2021078775A priority Critical patent/JP7760258B2/ja
Priority to US18/557,063 priority patent/US20240232071A1/en
Priority to PCT/JP2022/013501 priority patent/WO2022234740A1/ja
Publication of JP2022172698A publication Critical patent/JP2022172698A/ja
Publication of JP2022172698A5 publication Critical patent/JP2022172698A5/ja
Application granted granted Critical
Publication of JP7760258B2 publication Critical patent/JP7760258B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1694—Configuration of memory controller to different memory types
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/08—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers from or to individual record carriers, e.g. punched card, memory card, integrated circuit [IC] card or smart card
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System (AREA)
JP2021078775A 2021-05-06 2021-05-06 情報処理装置、情報処理システム、および情報処理方法 Active JP7760258B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2021078775A JP7760258B2 (ja) 2021-05-06 2021-05-06 情報処理装置、情報処理システム、および情報処理方法
US18/557,063 US20240232071A1 (en) 2021-05-06 2022-03-23 Information processing apparatus, information processing system, and information processing method
PCT/JP2022/013501 WO2022234740A1 (ja) 2021-05-06 2022-03-23 情報処理装置、情報処理システム、および情報処理方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2021078775A JP7760258B2 (ja) 2021-05-06 2021-05-06 情報処理装置、情報処理システム、および情報処理方法

Publications (3)

Publication Number Publication Date
JP2022172698A JP2022172698A (ja) 2022-11-17
JP2022172698A5 JP2022172698A5 (https=) 2024-05-13
JP7760258B2 true JP7760258B2 (ja) 2025-10-27

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021078775A Active JP7760258B2 (ja) 2021-05-06 2021-05-06 情報処理装置、情報処理システム、および情報処理方法

Country Status (3)

Country Link
US (1) US20240232071A1 (https=)
JP (1) JP7760258B2 (https=)
WO (1) WO2022234740A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN119002821B (zh) * 2024-08-30 2025-10-03 苏州元脑智能科技有限公司 一种数据存储方法、装置、设备及介质

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014534503A (ja) 2011-10-05 2014-12-18 エルエスアイ コーポレーション 不揮発性記憶のための自己ジャーナリングおよび階層的整合性
JP2015064860A (ja) 2013-08-27 2015-04-09 キヤノン株式会社 画像形成装置およびその制御方法、並びにプログラム
JP2019008729A (ja) 2017-06-28 2019-01-17 東芝メモリ株式会社 メモリシステムおよび制御方法
US20190179569A1 (en) 2017-12-07 2019-06-13 Shannon Systems Ltd. Data storage device and data storage method

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8706950B2 (en) * 2008-03-01 2014-04-22 Kabushiki Kaisha Toshiba Memory system
JP5002719B1 (ja) * 2011-03-10 2012-08-15 株式会社東芝 情報処理装置、外部記憶装置、ホスト装置、中継装置、制御プログラム及び情報処理装置の制御方法
US20170003911A1 (en) * 2014-02-03 2017-01-05 Hitachi, Ltd. Information processing device
US20170109074A1 (en) * 2015-10-16 2017-04-20 SK Hynix Inc. Memory system
US10277258B2 (en) * 2016-09-09 2019-04-30 Toshiba Memory Corporation Information processing device and host device
JP6677627B2 (ja) * 2016-12-20 2020-04-08 株式会社ソニー・インタラクティブエンタテインメント 情報処理装置およびメモリアクセス方法
US10545701B1 (en) * 2018-08-17 2020-01-28 Apple Inc. Memory arbitration techniques based on latency tolerance
JP7401215B2 (ja) * 2019-07-19 2023-12-19 キヤノン株式会社 情報処理装置、その制御方法およびプログラム
US11580017B2 (en) * 2020-04-27 2023-02-14 Silicon Motion, Inc. Method and apparatus and computer program product for preparing logical-to-physical mapping information for host side
US11782851B2 (en) * 2021-09-01 2023-10-10 Micron Technology, Inc. Dynamic queue depth adjustment

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014534503A (ja) 2011-10-05 2014-12-18 エルエスアイ コーポレーション 不揮発性記憶のための自己ジャーナリングおよび階層的整合性
JP2015064860A (ja) 2013-08-27 2015-04-09 キヤノン株式会社 画像形成装置およびその制御方法、並びにプログラム
JP2019008729A (ja) 2017-06-28 2019-01-17 東芝メモリ株式会社 メモリシステムおよび制御方法
US20190179569A1 (en) 2017-12-07 2019-06-13 Shannon Systems Ltd. Data storage device and data storage method

Also Published As

Publication number Publication date
JP2022172698A (ja) 2022-11-17
WO2022234740A1 (ja) 2022-11-10
US20240232071A1 (en) 2024-07-11

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