JP7521404B2 - Electrostatic Chuck Device - Google Patents

Description

The present invention relates to an electrostatic chuck device.

In the semiconductor manufacturing process, an electrostatic chuck device is used to hold a semiconductor wafer in a vacuum environment. In the electrostatic chuck device, a plate-shaped sample such as a semiconductor wafer is placed on the mounting surface, and an electrostatic force is generated between the plate-shaped sample and the internal electrode to attract and fix the plate-shaped sample (for example, Patent Document 1).

Patent No. 3746935

In conventional electrostatic chuck devices, it has been thought that adding conductive ceramics to the insulating ceramics (e.g., alumina-based sintered body) of the dielectric layer could improve properties such as the dielectric constant. However, adding conductive ceramics reduces the bond strength between the dielectric layer and the electrode layer, which increases the likelihood of peeling between them.

The present invention was made in consideration of the above circumstances, and aims to provide an electrostatic chuck device that improves the bonding strength between the dielectric layer and the electrode layer.

In order to solve the above problems, one aspect of the present invention is an electrostatic chuck device comprising a dielectric layer containing insulating ceramics as a main phase and conductive ceramics as a subphase, a support layer supporting the dielectric layer, and an electrode layer sandwiched between the dielectric layer and the support layer, wherein the interface between the dielectric layer and the electrode layer has an uneven shape and a maximum height Rz is smaller than the average crystal grain size of the insulating ceramics and larger than the average crystal grain size of the conductive ceramics.

In one aspect of the present invention, the uneven shape of the interface between the dielectric layer and the electrode layer may be configured to be a curved surface.

In one aspect of the present invention, the support layer may include insulating ceramics as a main phase and conductive ceramics as a subphase, and the interface between the support layer and the electrode layer may have an uneven shape, with a maximum height Rz smaller than the average crystal grain size of the insulating ceramics and larger than the average crystal grain size of the conductive ceramics.

In one aspect of the present invention, the insulating ceramic may be at least one selected from the group consisting of Al ₂ O ₃ , AlN, Si ₃ N ₄ , YAG, and SmAlO ₃ .

In one aspect of the present invention, the conductive ceramic may be at least one selected from the group consisting of SiC, _TiO2 , TiN, TiC, W, WC, Mo, _Mo2C and C.

In one aspect of the present invention, the dielectric layer may include a sintering aid, and the sintering aid may be at least one selected from the group consisting of Y ₂ O ₃ , MgO, and SiO ₂ .

In one aspect of the present invention, the electrode layer may be configured to function as either an electrostatic adsorption electrode, a heater electrode, or an RF electrode.

The present invention provides an electrostatic chuck device that improves the bonding strength between the dielectric layer and the electrode layer.

FIG. 1 is a cross-sectional view of an electrostatic chuck device according to one embodiment. FIG. 2 is a schematic diagram showing the dielectric layer, the support layer and the electrode layer of one embodiment. FIG. 3 is a schematic diagram showing a method for manufacturing an electrostatic chuck portion according to an embodiment.

The electrostatic chuck device according to the present invention will be described below with reference to the drawings. Note that the drawings used in the following description show enlarged views of characteristic parts for the sake of convenience, and the dimensional ratios of each component may differ from the actual ones. Furthermore, the materials, dimensions, etc. exemplified in the following description are merely examples, and the present invention is not limited to them, and may be modified as appropriate without changing the gist of the invention.

FIG. 1 is a cross-sectional view of an electrostatic chuck device 1 according to the present embodiment.
The electrostatic chuck device 1 includes a disk-shaped electrostatic chuck portion 2, a temperature adjustment base portion 3 that supports the electrostatic chuck portion 2 from below and adjusts the electrostatic chuck portion 2 to a desired temperature, and an adhesive layer 4 that bonds the electrostatic chuck portion 2 and the temperature adjustment base portion 3 together.

In the following description, the mounting surface 11s side of the dielectric layer 11 is described as "upper" and the temperature adjustment base portion 3 side is described as "lower" to indicate the relative positions of each component. However, the up-down direction here is used merely to simplify the description and does not limit the position of the electrostatic chuck device 1 during use.

The electrostatic chuck section 2 has a dielectric layer 11 made of ceramics, the upper surface of which is a mounting surface 11s on which a plate-shaped sample such as a semiconductor wafer is placed, a support layer 12 provided on the opposite side of the dielectric layer 11 from the mounting surface 11s, an electrode layer 13 sandwiched between the dielectric layer 11 and the support layer 12, a ring-shaped insulating material 14 sandwiched between the dielectric layer 11 and the support layer 12 and surrounding the electrode layer 13, a power supply terminal 16 provided in a through hole 15 of the support layer 12 so as to contact the electrode layer 13, and an electrode pin 18 provided in a fixing hole 17 of the temperature adjustment base section 3.

The dielectric layer 11 is plate-shaped along a plane perpendicular to the up-down direction. The dielectric layer 11 has a mounting surface 11s that supports a plate-shaped sample such as a semiconductor wafer. On the mounting surface 11s, multiple protrusions (not shown) whose diameter is smaller than the thickness of the plate-shaped sample are formed at predetermined intervals, and these protrusions support the plate-shaped sample W.

The thickness of the dielectric layer 11 is preferably 0.3 mm or more and 3.0 mm or less, and more preferably 0.5 mm or more and 1.5 mm or less. If the thickness of the dielectric layer 11 is 0.3 mm or more, the dielectric layer 11 has excellent voltage resistance. On the other hand, if the thickness of the dielectric layer 11 is 3.0 mm or less, the electrostatic adsorption force of the electrostatic chuck portion 2 is not reduced, and the thermal conductivity between the plate-shaped sample mounted on the plate-shaped sample and the temperature adjustment base portion 3 is not reduced, and the temperature of the plate-shaped sample during processing can be maintained at a desired constant temperature.

The support layer 12 is a plate-like shape that is aligned along a plane perpendicular to the vertical direction. The support layer 12 is disposed below the dielectric layer 11. The support layer 12 supports the dielectric layer 11 and the electrode layer 13 from below.

The thickness of the support layer 12 is preferably 0.3 mm or more and 3.0 mm or less, and more preferably 0.5 mm or more and 1.5 mm or less. If the thickness of the support layer 12 is 0.3 mm or more, a sufficient voltage resistance can be ensured. On the other hand, if the thickness of the support layer 12 is 3.0 mm or less, the electrostatic adsorption force of the electrostatic chuck portion 2 is not reduced, the thermal conductivity between the plate-shaped sample and the temperature adjustment base portion 3 is not reduced, and the temperature of the plate-shaped sample during processing can be maintained at a desired constant temperature.

The electrode layer 13 is sandwiched between the dielectric layer 11 and the support layer 12. In this embodiment, the electrode layer 13 functions as an electrostatic adsorption electrode. When a voltage is applied to the electrode layer 13, an electrostatic adsorption force is generated that holds a plate-shaped sample on the mounting surface 11s of the dielectric layer 11.
The electrode layer 13 may function as a heater electrode. In this case, the electrode layer 13 as a heater electrode generates heat when a current is passed through it. Furthermore, the electrode layer 13 may function as an RF (Radio Frequency) electrode. In this case, the electrode layer 13 as an RF electrode generates plasma on the plate-shaped sample when a voltage is applied to it. That is, the electrode layer 13 may function as any one of an electrostatic adsorption electrode, a heater electrode, and an RF electrode.

The thickness of the electrode layer 13 is preferably 5 μm or more and 200 μm or less, and more preferably 10 μm or more and 100 μm or less. If the thickness of the electrode layer 13 is 5 μm or more, sufficient electrical conductivity can be ensured. On the other hand, if the thickness of the electrode layer 13 is 200 μm or less, the thermal conductivity between the plate-shaped sample and the temperature adjustment base part 3 does not decrease, and the temperature of the plate-shaped sample during processing can be kept at a desired constant temperature. In addition, the plasma permeability does not decrease, and plasma can be generated stably.

The configurations of the dielectric layer 11, the support layer 12, and the electrode layer 13 will be described in detail later with reference to FIG. 2.

The insulating material 14 surrounds the electrode layer 13 and is disposed, together with the electrode layer 13, between the dielectric layer 11 and the support layer 12. The dielectric layer 11 and the support layer 12 are joined together by the insulating material 14, sandwiching the electrode layer 13 therebetween. The insulating material 14 protects the electrode layer 13 from corrosive gases and plasma.

The insulating material 14 is made of an insulating material. The insulating material constituting the insulating material 14 is not particularly limited, but it is preferable that the insulating material be the same as the main component of the dielectric layer 11 and the support layer 12.

The power supply terminals 16 and electrode pins 18 are provided to apply a voltage to the electrode layer 13. The number, shape, etc. of the power supply terminals 16 are determined by the type of the electrode layer 13, i.e., whether it is a monopolar type or a bipolar type.

The temperature adjustment base part 3 is a thick disk-shaped member made of at least one of metal and ceramics. The body of the temperature adjustment base part 3 is configured to also function as an internal electrode for generating plasma. Inside the body of the temperature adjustment base part 3, a flow path 21 is formed for circulating a cooling medium such as water, He gas, or N2 gas.

The body of the temperature adjustment base 3 is connected to an external high-frequency power source 22. An electrode pin 18, the outer periphery of which is surrounded by an insulating material 23, is fixed in the fixing hole 17 of the temperature adjustment base 3 via the insulating material 23. The electrode pin 18 is connected to an external DC power source 24.

The material constituting the temperature adjusting base part 3 is not particularly limited as long as it is a metal having excellent thermal conductivity, electrical conductivity, and workability, or a composite material containing such a metal. For example, aluminum (Al), copper (Cu), stainless steel (SUS), titanium (Ti), etc. are preferably used as the material constituting the temperature adjusting base part 3.
At least the surface of the temperature adjusting base 3 that is exposed to plasma is preferably anodized or resin-coated with polyimide resin. More preferably, the entire surface of the temperature adjusting base 3 is anodized or resin-coated.

By applying anodizing or resin coating to the temperature adjustment base part 3, the plasma resistance of the temperature adjustment base part 3 is improved and abnormal discharge is prevented. Therefore, the plasma resistance stability of the temperature adjustment base part 3 is improved and the occurrence of surface scratches on the temperature adjustment base part 3 can be prevented.

The adhesive layer 4 bonds and integrates the electrostatic chuck portion 2 and the temperature adjustment base portion 3. The adhesive layer 4 is formed of, for example, a hardened body obtained by heating and hardening a silicone-based resin composition, an acrylic resin, an epoxy resin, a polyimide resin, or the like.
A silicone-based resin composition is more preferred because it is a silicon compound having a siloxane bond (Si--O--Si) and is a resin with excellent heat resistance and elasticity.

As such a silicone-based resin composition, a silicone resin having a heat curing temperature of 70°C to 140°C is particularly preferred.
Here, if the heat curing temperature is below 70° C., when the electrostatic chuck portion 2 and the temperature adjustment base portion 3 are joined in a facing state, the curing does not proceed sufficiently during the joining process, which is undesirable because of poor workability. On the other hand, if the heat curing temperature exceeds 140° C., the thermal expansion difference between the electrostatic chuck portion 2 and the temperature adjustment base portion 3 becomes large, which increases the stress between the electrostatic chuck portion 2 and the temperature adjustment base portion 3, which is undesirable because it may cause peeling between them.

FIG. 2 is a schematic diagram showing the dielectric layer 11, the support layer 12 and the electrode layer 13.
The dielectric layer 11 and the support layer 12 are made of a composite sintered body having mechanical strength and durability against corrosive gases and their plasma.

The dielectric layer 11 includes an insulating ceramic as the main phase 11a and a conductive ceramic as the subphase 11b. Similarly, the support layer 12 includes an insulating ceramic as the main phase 12a and a conductive ceramic as the subphase 12b.

In this embodiment, the dielectric layer 11 and the support layer 12 are made of the same material. Therefore, the main phases 11a, 12a of the dielectric layer 11 and the support layer 12 are made of the same material. In addition, the subphases 11b, 12b of the dielectric layer 11 and the support layer 12 are made of the same material. However, the dielectric layer 11 and the support layer 12 may be made of different materials.

The insulating ceramics as the main phases 11a and 12a are at least one selected from the group consisting of _Al2O3 , _{AlN , Si3N4} , YAG, and _SmAlO3 .

The average crystal grain size D of the insulating ceramics of the main phases 11a and 12a is preferably 1.0 μm or more and 15 μm or less. In the dielectric layer 11 and the support layer 12, which are sintered bodies, the average crystal grain size D of the main phases 11a and 12a is 1.0 μm or more, so that the resistivity of the particles of the main phases 11a and 12a themselves does not decrease too much, and a sufficient insulating effect can be achieved. In addition, the average crystal grain size D of the main phases 11a and 12a is 15 μm or less, so that the mechanical strength of the obtained sintered body is sufficiently high and chipping is less likely to occur.

The average crystal grain size D of the main phases 11a and 12a can be adjusted by controlling the sintering temperature. When the sintering temperature is high, the average crystal grain size D of the main phases 11a and 12a tends to be large, and when the sintering temperature is low, the average crystal grain size D of the main phases 11a and 12a tends to be small.

The conductive ceramics as the subphases 11b and 12b are at least one selected from the group consisting of SiC, _TiO2 , TiN, TiC, W, WC, Mo, _Mo2C and C.

The average crystal grain size of the conductive ceramics of the subphases 11b and 12b is preferably 0.1 μm or more and 5 μm or less. The crystal grains of the subphases 11b and 12b are preferably dispersed within the crystal grains of the main phases 11a and 12a and at the crystal grain boundaries of the main phases 11a and 12a.

The average crystal grain sizes of the main phases 11a, 12a and the subphases 11b, 12b are measured by the following procedure.
First, the surface of the sintered body constituting the dielectric layer 11 or the support layer 12 is mirror-polished with diamond paste having an average abrasive grain size of 3 μm (grain size: #8000), and then thermally etched at 1400° C. for 30 minutes in an argon atmosphere.
Next, the surface of the obtained sintered body is subjected to structural observation at a magnification of 10,000 times using a scanning electron microscope (manufactured by Hitachi High-Technologies Corporation, model number: S-4000).
The obtained electron microscope photographs are then imported into image analysis-based grain size distribution measurement software (Mac-View Version 4, manufactured by Mountec Co., Ltd.) to calculate the Heywood diameters of 200 or more crystal grains of the main phases 11a and 12a and the subphases 11b and 12b. The arithmetic mean value of the obtained Heywood diameters of each crystal grain is defined as the "average grain size."

The dielectric layer 11 and the support layer 12 may contain a sintering aid 11c in addition to the main phases 11a _, 12a and the subphases 11b, 12b. In this case, the sintering aid 11c is at least one selected from the group consisting of _Y2O3 , MgO, and _SiO2 .

The electrode layer 13 is a composite of an insulating material and a conductive material.
The insulating material contained in the electrode layer 13 is not particularly limited, but is preferably at least one selected from the group consisting of aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), yttrium(III) oxide (Y2O3), yttrium aluminum garnet (YAG), and SmAlO3.

The conductive material contained in the electrode layer 13 is preferably at least one selected from the group consisting of molybdenum carbide (Mo2C), molybdenum (Mo), tungsten carbide (WC), tungsten (W), tantalum carbide (TaC), tantalum (Ta), silicon carbide (SiC), carbon black, carbon nanotubes, and carbon nanofibers.

Here, the interface between the dielectric layer 11 and the electrode layer 13 is called the first interface 5. Also, the interface between the support layer 12 and the electrode layer 13 is called the second interface 6.

The first interface 5 has an uneven shape. By making the first interface 5 uneven, the contact area between the dielectric layer 11 and the electrode layer 13 increases. In addition, the surface of the dielectric layer 11 and the surface of the electrode layer 13 bite into each other and come into contact. This provides an anchor effect, increasing the bonding strength between the dielectric layer 11 and the electrode layer 13. As a result, peeling between the dielectric layer 11 and the electrode layer 13 can be effectively suppressed.

At the first interface 5, the distance between the tips of the peaks 13p of the electrode layer 13 is preferably 1 μm or more and 100 μm or less. By making the distance between the tips of the peaks 13p 1 μm or more, it becomes easier for part of the dielectric layer 11 to enter between the peaks 13p, making it easier to obtain an anchor effect between the electrode layer 13 and the dielectric layer 11. In addition, by making the distance between the tips of the peaks 13p 100 μm or less, it becomes possible to ensure a sufficiently wide surface area at the interface between the electrode layer 13 and the dielectric layer 11, making it easier to obtain an anchor effect.

The uneven shape of the first interface 5 is preferably a curved surface. When the first interface 5 has an uneven shape, the peaks 13p of the electrode layer 13 function like an antenna, making it easier for discharge to occur in the thickness direction of the dielectric layer 11. According to this embodiment, by making the uneven shape of the first interface 5 a curved surface, the peaks 13p of the electrode layer 13 can be made into a smoothly curved surface. This suppresses discharge from the peaks 13p of the electrode layer 13, and increases the withstand voltage of the electrostatic chuck portion 2.

It is preferable that the curved surface of the uneven shape of the first interface 5 has a radius of curvature of 1 μm or more. This allows the radius of curvature of the peaks 13p of the electrode layer 13 to be 1 μm or more, and discharge from the peaks 13p can be effectively suppressed.

The arithmetic mean roughness Ra of the first interface 5 is preferably 0.1 μm or more and 10 μm or less. By making the arithmetic mean roughness Ra of the first interface 5 0.1 μm or more, a wide contact area between the dielectric layer 11 and the electrode layer 13 at the interface can be secured, and a large anchor effect can be obtained. In addition, by making the arithmetic mean roughness Ra of the first interface 5 10 μm or less, discharge from the peaks 13p of the electrode layer 13 can be suppressed.

It is preferable that the maximum height Rz of the first interface 5 is 0.1 μm or more and 10 μm or less. By making the maximum height Rz of the first interface 5 0.1 μm or more, the dielectric layer 11 and the electrode layer 13 can be brought into intricate contact with each other at the interface, and a large anchor effect can be obtained. In addition, by making the maximum height Rz of the first interface 5 10 μm or less, discharge from the peak portion 13p of the electrode layer 13 can be suppressed.

The arithmetic mean roughness Ra and maximum height Rz of the first interface 5 and the second interface 6 are measured by the following procedure.
First, the cross sections of the dielectric layer, internal electrode, and support layer in the thickness direction are observed using a field emission scanning electron microscope (FE-SEM) manufactured by JEOL Ltd., and the images of the cross sections are analyzed using image analysis software to identify the positions of the interfaces.
Next, a 100 μm section is removed from the interface curve in the direction of the mean line, the X axis is plotted in the direction of the mean line of the removed section, and the Y axis is plotted vertically. The arithmetic mean roughness Ra is calculated according to the following formula (1), and the maximum height Rz is calculated according to formula (2).
The measurements were performed at three locations on the mounting surface: the center, the outer periphery, and the middle (center+outer periphery/2), and the averages of the three locations were taken as Ra and Rz, respectively.
Ra=1/L∫ ₀ ^L | f(x) | dx ... (1)
Rz = Rp + Rv ... (2)
In the formula (1), L is the measurement length (here, 100 μm).
In addition, in formula (2), Rp is the height of the highest peak within the measurement range, and Rv is the depth of the deepest valley within the measurement range.

In this embodiment, the maximum height Rz of the first interface 5 is smaller than the average crystal grain size D of the insulating ceramics constituting the main phase 11a of the dielectric layer 11. When a voltage is applied to the dielectric layer 11, electrons tend to move along the grain boundaries of the main phase 11a. That is, the dielectric layer 11 is most likely to pass current through the grain boundaries of the main phase 11a. According to this embodiment, since the average crystal grain size D of the main phase 11a is larger than the maximum height Rz of the first interface 5, the crystal grains of the main phase 11a tend to cover the peaks 13p of the electrode layer 13. Therefore, it is possible to reduce the probability that the tip of the peaks 13p, which are likely to cause discharge, overlaps with the grain boundaries of the main phase 11a, which are likely to pass current, and the withstand voltage of the electrostatic chuck portion 2 can be increased.

In this embodiment, the maximum height Rz of the first interface 5 is larger than the average crystal grain size d of the conductive ceramics constituting the subphase 11b of the dielectric layer 11. The conductive ceramics constituting the subphase 11b are conductors. Therefore, if the average crystal grain size d of the subphase 11b is larger than the maximum height Rz of the first interface 5, the crystal grains of the subphase 11b formed on the surface of the electrode layer 13 may form an antenna shape higher than the peaks 13p of the electrode layer 13, which may reduce the withstand voltage of the electrostatic chuck portion 2. According to this embodiment, by making the average crystal grain size d of the subphase 11b smaller than the peaks 13p, the effect of the crystal grains of the subphase 11b on the height of the peaks 13p is reduced, and the withstand voltage of the electrostatic chuck portion 2 can be ensured.

It is preferable that the second interface 6 has a similar configuration to the first interface 5. That is, the second interface 6 has an uneven shape like the first interface 5. By making the second interface 6 uneven, the bonding strength between the support layer 12 and the electrode layer 13 is increased by the anchor effect. It is preferable that the distance between the tips of the peaks 13p of the electrode layer 13 in the second interface 6 is also 1 μm or more and 100 μm or less. It is also preferable that the uneven shape of the second interface 6 is made of a curved surface. It is also preferable that the curved surface of the uneven shape of the second interface 6 has a radius of curvature of 1 μm or more.

The arithmetic mean roughness Ra of the second interface 6 is preferably 0.1 μm or more and 10 μm or less, similar to the first interface 5. In addition, the maximum height Rz of the second interface 6 is preferably 0.1 μm or more and 10 μm or less, similar to the first interface 5.

In this embodiment, the maximum height Rz of the second interface 6 is smaller than the average crystal grain size D of the insulating ceramics that constitute the main phase 12a of the support layer 12. This reduces the probability that the tip of the peak 13p of the electrode layer 13, where discharge is likely to occur, will overlap with the grain boundary of the main phase 12a, where current is likely to flow, and increases the withstand voltage of the electrostatic chuck portion 2.

In this embodiment, the maximum height Rz of the second interface 6 is larger than the average crystal grain size d of the conductive ceramics that constitute the subphase 12b of the support layer 12. This reduces the effect of the crystal grains of the subphase 11b on the height of the peaks 13p, ensuring the withstand voltage of the electrostatic chuck portion 2.

Next, a method for manufacturing the electrostatic chuck portion 2 of this embodiment will be described with reference to FIG. 3. Note that the manufacturing method described below is an example, and the electrostatic chuck portion 2 may be manufactured by other methods.

First, as a preliminary step, the plate-shaped dielectric layer 11 and the support layer 12 are molded by sintering.
Next, the convex portion 13a is formed on the upper surface of the support layer 12 by a coating method such as screen printing using the electrode layer forming paste. At this time, the viscosity of the electrode layer forming paste is adjusted to form the curved convex portion 13a. The electrode layer forming paste is then applied multiple times from above to form a coating layer 13b, and the convex portion 13a is formed again on top of that. Although not shown in the figure, an insulating material 14 made of the same material as the dielectric layer 11 and the support layer 12 is disposed around the coating layer 13b.

Next, the dielectric layer 11 is laminated on the support layer 12 and the coating layer 13b of the electrode layer forming paste. Furthermore, the dielectric layer 11, the support layer 12, the insulating material 14, and the electrode layer forming paste are heated and pressed in the thickness direction. The atmosphere in which the laminate is heated and pressed in the thickness direction is preferably a vacuum or an inert atmosphere such as Ar, He, or N2.

By going through the above steps, the electrostatic chuck portion 2 of this embodiment can be formed. In the manufacturing method of this embodiment, the dielectric layer 11 and the support layer 12 are heated and pressurized when the convex portion 13a formed by the electrode layer forming paste hardens. This causes the dielectric layer 11 and the support layer 12 to be reshaped along the convex portion 13a of the electrode layer 13, forming the first interface 5 and the second interface 6 with uneven shapes.

Although the embodiments of the present invention have been described above, each configuration and their combinations in the embodiments are merely examples, and additions, omissions, substitutions and other modifications of configurations are possible without departing from the spirit of the present invention. Furthermore, the present invention is not limited to the embodiments.

1...electrostatic chuck device, 5...first interface (interface), 6...second interface (interface), 11...dielectric layer, 11a, 12a...main phase, 11b, 12b...subphase, 11c...sintering aid, 12...support layer, 13...electrode layer, d, D...average crystal grain size

Claims (7)

a dielectric layer including an insulating ceramic as a main phase and a conductive ceramic as a subphase;
a support layer supporting the dielectric layer;
an electrode layer sandwiched between the dielectric layer and the support layer;
the interface between the dielectric layer and the electrode layer has an uneven shape, and a maximum height Rz is smaller than an average crystal grain size of the insulating ceramic and is larger than an average crystal grain size of the conductive ceramic;
Electrostatic chuck device. The uneven shape of the interface between the dielectric layer and the electrode layer is a curved surface.
2. The electrostatic chuck device of claim 1. The support layer includes an insulating ceramic as a main phase and a conductive ceramic as a subphase,
the interface between the support layer and the electrode layer has an uneven shape, and a maximum height Rz is smaller than the average crystal grain size of the insulating ceramic and is larger than the average crystal grain size of the conductive ceramic;
3. The electrostatic chuck device according to claim 1 or 2. The insulating ceramic is at least one selected from the group consisting of _Al2O3 , _{AlN , Si3N4} , YAG, and _SmAlO3 ;
The electrostatic chuck device according to any one of claims 1 to 3. The conductive ceramic is at least one selected from the group consisting of SiC, TiO ₂ , TiN, TiC, W, WC, Mo, Mo ₂ C, and C;
The electrostatic chuck device according to any one of claims 1 to 4. the dielectric layer comprises a sintering aid;
The _sintering aid is at least one selected from the group consisting of _Y2O3 , MgO and _SiO2 ;
The electrostatic chuck device according to any one of claims 1 to 5. the electrode layer functions as any one of an electrostatic adsorption electrode, a heater electrode, and an RF electrode;
The electrostatic chuck device according to any one of claims 1 to 6.

Images