JP7469192B2 - Gaming Machines - Google Patents

Description

The present invention relates to gaming machines and technology that contributes to improving the performance of gaming machines.

In pinball and rotary game machines, various devices such as liquid crystal display screens, speakers, LEDs, gadgets, vibrators, and blowers are used to enhance the game.
The following patent documents disclose techniques for controlling various performance operations.

JP 2014-64693 A

However, in order to realize a variety of effects, the number of circuit boards increases, the wiring becomes more complicated and difficult, and the power supply becomes more complicated as a result.
Therefore, an object of the present invention is to propose a desirable configuration for a gaming machine to alleviate these problems.

The gaming machine of the present invention comprises a first substrate, a second substrate mounted with a light-emitting element and a light-emitting drive section for driving the light-emitting element to emit light, connected to the first substrate by a first transmission line and supplied with a first power supply voltage, and a third substrate mounted with a light-emitting element and a light-emitting drive section for driving the light-emitting element to emit light, connected to the second substrate by a second transmission line and supplied with the first power supply voltage, the third substrate being a substrate having a distance between itself and the first substrate shorter than a distance between the first substrate and the second substrate, the light-emitting element and the light-emitting drive section of the second substrate being operated by the first power supply voltage supplied via a common wiring on the substrate, and a plurality of light-emitting elements are connected in series to all or a portion of the terminals of the light-emitting drive current of the light-emitting drive section, and the light-emitting element and the light-emitting drive section of the third substrate being operated by the first power supply voltage supplied via the common wiring on the substrate, and a plurality of light-emitting elements are connected to all or a portion of the terminals of the light-emitting drive current of the light-emitting drive section. the number of lines used for transmitting the first power supply voltage in the second transmission line is less than the number of lines for supplying the first power supply voltage in the first transmission line, the third board is provided with a connector which serves as a terminal of the second transmission line, and the light-emitting drive unit of the third board drives the plurality of light-emitting elements to emit light based on a performance control signal input via the connector, and when the direction of a straight line which extends from one end of the third board to the other end is taken as the longest direction, on the third board, the connector is arranged in the vicinity of an edge of the board, and the light-emitting drive unit is arranged closer to the center of the board than the connector as viewed in the longest direction, and the plurality of light-emitting elements are arranged discretely within a range from one end side to the other end side of the board as viewed from the light-emitting drive unit in the longest direction.

The gaming machine of the present invention simplifies wiring of the circuit board and realizes an efficient configuration.

1 is a front perspective view showing the appearance of an amusement machine according to an embodiment of the present invention; FIG. 2 is a diagram showing the configuration of a game board of the gaming machine according to the embodiment. 2 is a block diagram showing a control configuration of the gaming machine according to the embodiment. An explanatory diagram of an example of a pre-reading preview performance in an embodiment. 1 is an oblique view of a gaming machine according to an embodiment with a door open. 2 is an oblique view of the gaming machine of the embodiment with the inner frame open. FIG. 1 is an explanatory diagram of the board arrangement on the back side of a game board according to an embodiment of the present invention. FIG. 2 is an explanatory diagram of the board arrangement of the door and inner frame of the gaming machine of the embodiment. FIG. 2 is an explanatory diagram of the board arrangement of the inner frame of the gaming machine according to the embodiment. FIG. FIG. 2 is an explanatory diagram of the arrangement of various devices. FIG. 2 is a block diagram of the connection configuration of the board. FIG. 4 is an explanatory diagram of power supply system input/output for the power supply board 300. 4 is a circuit diagram of the inner frame LED relay board 400. FIG. 4 is a circuit diagram of the inner frame LED relay board 400. FIG. 4 is a circuit diagram of the front frame LED connection board 500. FIG. 4 is a circuit diagram of the front frame LED connection board 500. FIG. 4 is a circuit diagram of the front frame LED connection board 500. FIG. 4 is a circuit diagram of the front frame LED connection board 500. FIG. 4 is a circuit diagram of the front frame LED connection board 500. FIG. 4 is a circuit diagram of the front frame LED connection board 500. FIG. 13 is a block diagram showing the flow of signals in the front frame LED connection board 500. FIG. 13 is a block diagram showing the flow of signals in the front frame LED connection board 500. FIG. FIG. 4 is a circuit diagram of a relay board 550. FIG. 13 is a circuit diagram of the side unit upper right LED board 600. FIG. 13 is a circuit diagram of the side unit upper right LED board 600. FIG. 13 is a circuit diagram of the side unit upper right LED board 600. FIG. 13 is a circuit diagram of the side unit upper right LED board 600. FIG. 13 is a circuit diagram of the side unit upper right LED board 600. FIG. 13 is a circuit diagram of the side unit upper right LED board 600. FIG. 13 is a circuit diagram of the side unit lower right LED board 620. FIG. 13 is a circuit diagram of the side unit lower right LED board 620. FIG. 13 is a circuit diagram of the LED board 630 on the side unit. 6 is a circuit diagram of a button LED connection board 640. FIG. 6 is a circuit diagram of a button LED board 660. FIG. 6 is a circuit diagram of a button LED board 660. FIG. FIG. 7 is a circuit diagram of an LED connection board 700. FIG. 7 is a circuit diagram of an LED connection board 700. FIG. 7 is a circuit diagram of an LED connection board 700. FIG. 7 is a circuit diagram of an LED connection board 700. FIG. 7 is a circuit diagram of an LED connection board 700. FIG. 7 is a circuit diagram of an LED connection board 700. 13 is a circuit diagram of the left rear relay board 720. FIG. 7 is a circuit diagram of the decorative substrate 740. FIG. 7 is a circuit diagram of a relay board 760. FIG. 7 is a circuit diagram of an LED board 780. FIG. 4 is a circuit diagram of the underside relay board 800. FIG. 13 is a circuit diagram of the decorative substrate 820. FIG. 2 is an explanatory diagram of an overview of transmission of power supply voltage between boards. FIG. 1 is an explanatory diagram of an example of a connector. FIG. 1 is an explanatory diagram of an example of a connector. FIG. 1 is an explanatory diagram of an example of a connector. FIG. 1 is an explanatory diagram of an example of a connector. FIG. 1 is an explanatory diagram of an example of a connector. FIG. 4 is an explanatory diagram of wiring paths between substrates. FIG. 4 is an explanatory diagram of the transmission of power supply voltage between boards. FIG. 13 is an explanatory diagram of a power supply system for the upper right LED board 600 of the side unit. 4 is an explanatory diagram of a power supply system of the front frame LED connection board 500. FIG. FIG. 4 is an explanatory diagram of the transmission of power supply voltage between boards. FIG. 2 is an explanatory diagram of a buffer and signal branching. 13 is an explanatory diagram of a signal path of the side unit upper right LED board 600. FIG. FIG. 2 is an explanatory diagram of a buffer and signal branching. FIG. 2 is an explanatory diagram of a buffer and signal branching. FIG. 13 is a circuit diagram of a modified example of an LED board 780. FIG. 2 is an explanatory diagram of a pin arrangement of a connector. 13 is an explanatory diagram of the component arrangement on the surface of the front frame LED connection board 500. FIG. 13 is an explanatory diagram of the component arrangement on the back surface of the front frame LED connection board 500. FIG. 13 is an explanatory diagram of the pattern on the surface of the front frame LED connection board 500. FIG. 13 is an explanatory diagram of the pattern of the first inner layer of the front frame LED connection board 500. FIG. 13 is an explanatory diagram of the pattern of the second inner layer of the front frame LED connection board 500. FIG. 13 is an explanatory diagram of the pattern on the back surface of the front frame LED connection board 500. FIG. 13 is an explanatory diagram of power supply wiring of a modified example of the front frame LED connection board 500. FIG. FIG. 11 is an explanatory diagram of a configuration example of another substrate. FIG. 13 is an explanatory diagram of the surface pattern of the side unit upper LED board 630A. 13 is an explanatory diagram of the pattern on the back surface of the side unit LED board 630A. FIG. FIG. 13 is a circuit diagram of the side unit upper LED board 630A. 4 is an explanatory diagram of the shape and terminals of an LED driver. FIG. 13 is an explanatory diagram of an example of the arrangement of an LED board 630A on a side unit. FIG. FIG. 13 is an explanatory diagram of the relationship of an arrangement example. 13 is an explanatory diagram of the surface pattern of an LED substrate 780. FIG. 13 is an explanatory diagram of the pattern on the back surface of the LED board 780. FIG. 13 is an explanatory diagram of an example of the arrangement of an LED board 780. FIG. FIG. 13 is an explanatory diagram of the division of the periphery of an LED driver into regions. 13 is an explanatory diagram of an example of the arrangement of an LED board 630A on a side unit. FIG. 13 is an explanatory diagram of an example of the arrangement of an LED board 780. FIG. 13 is an explanatory diagram of an example of the arrangement of an LED board 630A on a side unit. FIG. FIG. 13 is an explanatory diagram of an example of the arrangement of an LED board 780A. 13 is an explanatory diagram of an example of the arrangement of an LED board 630A on a side unit. FIG.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, with reference to the accompanying drawings, an embodiment of the present invention will be described in the following order.
1. Structure of the gaming machine
2. Control configuration of gaming machine
2.1 Main control board
[2.2 Performance control board]
<3. Overview of operation>
[3.1 Variable symbol display game]
[3.2 Game Status]
[3.3 About hits]
[3.4 Production]
<4. Opening/Closing Structure and Board Arrangement>
<5. Board connection configuration>
[5.1 Connection state of each board]
[5.2 Inner frame LED relay board 400]
[5.3 Front Frame LED Connection Board 500]
[5.4 Relay board 550]
[5.5 Side unit upper right LED board 600]
[5.6 Side unit lower right LED board 620]
[5.7 Side unit upper LED board 630]
5.8 Button LED Connection Board 640
5.9 Button LED Board 660
[5.10 LED connection board 700]
[5.11 Back left relay board 720]
5.12 Decorative Substrate 740
[5.13 Relay board 760]
5.14 LED board 780
[5.15 Back-of-board relay board 800]
5.16 Decorative Substrate 820
<6. Explanation of noteworthy configuration>
6.1 Serial Data Signal Between Inner Frame 2 and Door 6
[6.2 Number of power lines on the transmission line H (part 1)]
[6.3 Connector structure]
6.4 Wiring Path
[6.5 Number of power sources for transmission line H (part 2)]
[6.6 Power supply path]
6.7 Separation of power supply voltage systems
[6.8 Number of power lines and ground lines]
6.9 Buffers and signal branching
6.10 Power supply by electrical components
6.11 Connectors and signal wiring
[6.12 Analog signal relay and wiring]
6.13 Pattern Configuration
[6.14 Arrangement of LEDs, LED drivers, connectors, etc.]
6.15 Other

1. Structure of the gaming machine

The structure of a pachinko gaming machine 1 according to an embodiment of the present invention will be described with reference to Figures 1 and 2. Figure 1 is a perspective view of the front side showing the exterior of the pachinko gaming machine 1, and Figure 2 is a view showing the front side of a game board 3 of the pachinko gaming machine 1.
In the case of the pachinko gaming machine 1, it has a frame member, a door member that is provided so as to be able to be opened and closed relative to the frame member, and an exchange member that is attached so as to be able to be replaced relative to the frame member.
The pachinko gaming machine 1 described below has an inner frame 2 which corresponds to a frame member, a door 6 which corresponds to a door member, and a gaming board 3 which corresponds to a replacement member.

The pachinko game machine 1 shown in Fig. 1 (hereinafter sometimes abbreviated as "game machine 1") has a structure in which a picture-frame-like inner frame 2 is attached to the front of a wooden outer frame 4 so as to be able to be opened and closed, a game board 3 (see Fig. 2) is mounted in a game board storage frame (not shown) attached to the back surface of the inner frame 2, and a game area 3a formed on the surface of this game board 3 faces the opening of the inner frame 2. The game board 3 can be called an exchangeable member because it can be attached and detached from the inner frame 2 so as to be exchangeable.
A door 6 supporting transparent glass is provided at the front of the game area 3a. Also, various control boards (see FIG. 3) for controlling game operations are provided at the rear side of the game board 3.

On the front side (player side) of the door 6, a side unit 10 is formed as a decorative unit that surrounds, for example, all or part of the periphery of the game board 3.
The side unit 10 itself is given a decorative shape that matches the theme of the gaming machine 1, and may be provided with LEDs, gimmicks, and other presentation elements inside, thereby exerting a presentation effect that conveys the atmosphere of the game to the player. This side unit 10 is a unit that is attached to the door 6 in a replaceable manner.

A key cylinder (not shown) for unlocking the door is provided on the front side of the door 6. By inserting a key into this key cylinder and operating it to one side, the locked state of the door 6 relative to the inner frame 2 can be released and the door 6 can be opened to the front. By operating it to the other side, the locked state of the inner frame 2 relative to the outer frame 4 can be released and the inner frame 2 can be opened to the front.

A front operation panel 7 is disposed below the door 6 and is pivotally supported on the inner frame 2 by a hinge (not shown) so as to be capable of being opened and closed.
An upper tray unit 8 is provided on the front operation panel 7, and this upper tray unit 8 is formed with an upper tray 9 for storing the discharged game balls.

The upper tray unit 8 is also provided with a ball removal button 14 for removing the game balls stored in the upper tray 9 downward from the gaming machine 1, a ball lending button 11 for requesting the payment of game balls from a game ball lending device (not shown), and a card return button 12 for requesting the return of any valuable medium inserted into the game ball lending device.
The upper tray unit 8 is also provided with an effect button 13 (operation means) that is configured to be operable by the player. This effect button 13 has a built-in lamp (button LED 75) lit during a specified input reception period, making it operable (input reception possible), and it is possible to bring about a change in the presentation by performing a specified operation (pressing, tapping repeatedly, pressing and holding, etc.) while the built-in lamp is lit.
The upper tray unit 8 is also provided with controls such as a cross key 15a which enables users such as players and hall staff to select various items and give direction instructions, and a decision button 15b which is used to confirm the selected item.

A firing operation handle 15 for operating the firing device 32 (see Figure 3) is provided on the right end side of the front operation panel 7.

In addition, speakers 46 that provide acoustic effects (sound effects) are provided on both sides of the upper part of the door 6 and on the upper side of the launch operation handle 15. In Fig. 1, only the two speakers 46 on the upper part of the door 6 are shown.
The multiple speakers 46 enable so-called stereophonic reproduction or multi-channel sound reproduction for sounds related to the performance.

In addition, multiple decorative lamps 45 (e.g., full-color LEDs for light effects, etc.: see FIG. 3) are provided at appropriate locations on the door 6 to create a light effect through light decoration. Multiple full-color LEDs (LEDs for light effects) as decorative lamps 45 are provided around the pachinko gaming machine 1, for example, on the periphery of the door 6 or within the side unit 10.

The configuration of the game board 3 will be described with reference to FIG.
The game board 3 shown in the figure has a ball guide rail 5 that guides the launched game ball attached in a ring shape as a board surface partitioning member, and the approximately circular area surrounded by this ball guide rail 5 is the game area 3a, while the four corners are non-game areas.

Approximately in the center of this game area 3a, a liquid crystal display device (LCD) 36 is provided which is capable of independently displaying (changing and stopping) multiple types of decorative patterns (e.g., left pattern (corresponding to the left display area), middle pattern (corresponding to the middle display area), right pattern (corresponding to the right display area)) using numbers, characters, symbols, etc. in, for example, three (left, middle, right) display areas (pattern changing display areas).
Under the control of the performance control board 30 described later, the liquid crystal display device 36 displays various performances as images, in addition to the varying display operation of decorative patterns.

In addition, within the game area 3a, a center ornament 48 is provided so as to surround at a distance the display surface of the liquid crystal display device 36. The center ornament 48 is provided along the front side of the game board 3, and protects the display surface of the liquid crystal display device 36 from surrounding game balls, and also functions as a flow path distribution means that enables the flow path of the game ball to be distributed to the left or right depending on the strength or stroke length of the game ball's launch.
In this embodiment, the center ornament 48 is disposed at approximately the center of the play area 3a so that flow paths for game balls are formed on both upper sides (left and right sides) of the play area 3a due to the presence of the center ornament 48. Game balls shot into the upper side of the play area 3a by the launching device 32 are sorted to the left and right at the upper side of the armor frame part 48b, and flow down either the left flow path 3b on the left side of the center ornament 48 or the right flow path 3c on the right side.

In addition, the non-play area at the bottom of the game board 3 is a display area for various functions, and is provided with a special pattern display device 38a (first special pattern display means) and a special pattern display device 38b (second special pattern display means) using dot displays.
The various function display sections including the special symbol display devices 38a and 38b are shown in an enlarged scale in FIG.

The special symbol display devices 38a, 38b are adapted to execute a special symbol variable display game by varying the display of "special symbols" represented by dot displays. The liquid crystal display device 36 is adapted to execute a decorative symbol variable display game together with various preview effects (effect images) by displaying decorative symbols in a variable display manner synchronized in time with the variable display of special symbols by the special symbol display devices 38a, 38b (details of these symbol variable display games will be explained later).

The various function display section is also provided with a composite display device (LED display device for reserved composite display) 38c, which is made up of a dot display device like the special symbol display devices 38a and 38b. It is called a composite display device because it is a reserved/time-saving/high probability composite display device (hereinafter simply referred to as a "composite display device") that has five display functions: displaying special symbols 1 and 2, the number of activated reserved balls for normal symbols, and notifying the status when the variable time-saving function is in operation (time-saving) and when in a high probability state (high probability).

The various function display section is also provided with a composite display device 38d, which is also made up of a dot display.
In the composite display device 38d, a round number display is performed to notify the specified number of rounds (maximum number of rounds) related to a jackpot by a combination of the on/off states of the four LEDs. For example, the specified number of rounds (maximum number of rounds) related to a jackpot is notified by a combination of the on/off states of the four LEDs.
In addition, in the composite display device 38d, a normal symbol variable display game is executed by a variable display operation of a normal symbol represented by one LED as a normal symbol display.
In addition, the composite display device 38d is configured to display right-hand hits using three LEDs.

2, a normal variable winning device 41 having a start hole 34 (first special symbol start hole: first start means) therein is provided below the center decoration 48. Inside the start hole 34, a detection sensor 34a (start hole sensor 34a, see FIG. 3) is formed to detect the passage of a game ball.
In addition, a start port 35 (second special pattern start port: second start means) that opens and closes is provided in the right flow path 3c, and a detection sensor 35a (start port sensor 35a: see Figure 3) that detects the passage of the game ball is formed inside.

The first special symbol starting hole, starting hole 34, is a winning hole related to the starting condition of the variable display operation of the first special symbol (hereinafter, the first special symbol is referred to as "special symbol 1" and sometimes abbreviated as "special symbol 1") in the special symbol display device 38a, and is configured as a winning device with a fixed winning rate that does not have a starting hole opening/closing means (means for opening or enlarging the starting hole). In this embodiment, due to the action of the game ball fall direction changing member (e.g., game nail, windmill 44, center ornament 48, etc.) in the game area 3a, the starting hole 34 is configured so that game balls that have flowed down the left flow path 3b can easily enter (win), but it is configured so that game balls that have flowed down the right flow path 3c can hardly or cannot enter.

The starting port 35 is a winning port related to the starting conditions for the variable display operation of the second special pattern (hereinafter, the second special pattern is referred to as "special pattern 2" and sometimes abbreviated as "special pattern 2") in the special pattern display device 38b, and the winning area of this starting port 35 is configured to be openable between an open state in which a winning is possible and a closed state in which a winning is not possible.

In addition, two general winning ports 43 are provided on both sides of the normal variable winning device 41, and each of them has a general winning port sensor 43a (see Figure 3) formed inside for detecting the passage of the game ball.
Additionally, within the area of the game board, movable devices (not shown) that provide visual effects are arranged in positions that do not interfere with the flow of the game balls.

In addition, diagonally above the right of the normal variable winning device 41, that is, above the middle part of the right flow-down path 3c, there is provided a normal pattern start port 37 (third start means) consisting of a pass gate (specific pass area) through which the game ball can pass. This normal pattern start port 37 is a winning port related to the variable display operation of the normal pattern of the composite display device 38d, and inside it is formed a normal pattern start port sensor 37a (see FIG. 3) that detects the game ball passing through. In this embodiment, the normal pattern start port 37 is formed only on the right flow-down path 3c side, and is not formed on the left flow-down path 3b side. However, the present invention is not limited to this, and it may be formed only on the left flow-down path 3b, or it may be formed on both flow-down paths.

Midway along the path from the normal pattern starting port 37 to the normal variable winning device 41 in the right flow path 3c, there is provided a special variable winning device 52 (special electric device) which is configured to be able to open or expand the large winning port 50 by an opening door 52b, and inside it is formed a large winning port sensor 52a (see Figure 3) which detects a game ball that has entered the large winning port 50.
Around the large prize opening 50, there are provided guide sections 55 and windmills 53 that function to guide the game balls flowing downward in the direction of the large prize opening 50.

The process of the game ball entering the big prize opening 50 is as follows.
The gaming ball that passes through the free movement area between the upper surface of the center ornament 48 and the ball guide rail 5 and passes through the right flow path 3c is guided in the direction of the big prize opening 50 by the guide unit 55. If the big prize opening 50 is in an open state (big prize opening open state), the gaming ball is guided into the big prize opening 50.

In the gaming machine 1 of this embodiment, when the player aims the launch position on the special variable winning device 52 side (when the player aims so that the game ball passes through the right flow path 3c), the game ball is difficult to be guided to the starting hole 34 side or is not guided at all. Therefore, if the "big winning hole closed state", it is difficult or impossible for the game ball to win the starting hole 34 of the normal variable winning device 41.
In addition, when the game enters a gaming state with electric support, which will be described later, the starting hole 35 operates in an opening and closing pattern that is more advantageous than in the normal state.

In this embodiment, the way in which the player can hit the ball to gain an advantage varies depending on the game state. Specifically, in a game state that includes the "no electric support state" described below, a "left hit" that aims the game ball to pass through the left flow path 3b is considered advantageous, and in a game state that includes the "electric support state" described below, a "right hit" that aims the game ball to pass through the right flow path 3c is considered advantageous.

In the gaming machine 1 of this embodiment, when a winning ball is won in any winning hole other than the normal symbol starting hole 37 among the various winning holes provided in the playing area 3a, the number of winning balls per winning ball promised for each winning hole (for example, 3 balls for starting hole 34 or starting hole 35, 13 balls for the large winning hole 50, and 10 balls for the general winning hole 43) is paid out from the gaming ball payout device 19 (see FIG. 3). The gaming balls that do not win in any of the above winning holes are discharged from the playing area 3a through the outlet hole 49.

Here, "winning" refers to the entrance taking in a game ball, or, if the entrance is a winning entrance that is not structured to take in a game ball but is a gate that passes through (for example, the normal symbol start entrance 37), the game ball passes through the gate. In fact, when a game ball is detected by each winning detection switch formed for each winning entrance, it is treated as having "winning" at that winning entrance. The game ball related to this winning is also called "winning ball". Note that if a game ball enters a winning entrance, the game ball will be detected by the winning detection switch, so in this specification, unless otherwise specified, the term "winning" may refer to the entry of a game ball into a winning entrance, regardless of whether the game ball is detected by the winning detection switch.

2. Control configuration of gaming machine

The configuration (control configuration) for realizing the game operation control of the gaming machine 1 will be described with reference to the block diagram of FIG.
The gaming machine 1 of this embodiment is composed of a main control board (main control means) 20 that is responsible for overall control of all gaming operations (gaming operation control), a presentation control board 30 (presentation control means) that receives presentation control commands from the main control board 20 and is responsible for overall control of the execution of presentations by the presentation means (presentation control), a payout control board (payout control means) 29 that controls the payout of prize balls, and a power supply board (power supply control means (not shown)) that generates and supplies the power required for the gaming machine 1 from an external power source (not shown).
In FIG. 3, the power supply routes to each unit are omitted.

2.1 Main control board
The main control board 20 is equipped with a microprocessor that incorporates a CPU (Central Processing Unit) 20a (main control CPU), as well as a ROM (Read Only Memory) 20b (main control ROM) that stores a control program describing game operation control procedures as well as various data necessary for game operation control, and a RAM (Random Access Memory) 20c (main control RAM) that functions as a work area and buffer memory, and as a whole constitutes a microcomputer.

Although not shown, the main control board 20 also includes a CTC (Counter Timer Circuit) for implementing periodic interrupts, a constant-period pulse output creation function (bit rate generator), and a time measurement function, an interrupt controller circuit that performs interrupt enable/disable functions such as timer interrupts that provide interrupt signals to the main control CPU 20a, a reset circuit that detects power-on/off and power supply abnormalities and outputs a system reset signal to reset the main control CPU 20a, a watchdog timer (WDT) circuit that monitors for operational abnormalities in the control program, an IAT circuit that monitors whether a program is being executed correctly within a preset address range, and a counter circuit for generating random numbers within a certain range in hardware.

The counter circuit is composed of a random number generation circuit that generates random numbers, and a sampling circuit that samples random numbers from the random number generation circuit at a predetermined timing, and functions as a 16-bit counter as a whole. The main control CPU 20a sends instructions to the sampling circuit according to the processing state, and obtains the number indicated by the random number generation circuit as a random number value for internal lottery (random number for determining a jackpot (size of random number: 65536)), and uses this random number value for the jackpot lottery. Note that the random number for internal lottery is obtained by adding a soft random number value generated by appropriate software processing and a hard random number value to prevent cheating such as aiming for a jackpot.

The main control board 20 is connected to a start port sensor 34a that detects winning (ball entry) into the start port 34, a start port sensor 35a that detects winning into the start port 35, a normal pattern start port sensor 37a that detects passage through the normal pattern start port 37, a large prize port sensor 52a that detects winning into the large prize port 50, a general prize port sensor 43a that detects winning into the general prize port 43, and an OUT monitoring switch 49a that detects game balls (out balls) discharged from the OUT port 49, and the main control board 20 is capable of receiving detection signals output from these. Based on the detection signals from each sensor, the main control board 20 is capable of determining which prize port the game ball has entered.

The main control board 20 is also connected to a normal electric role solenoid 41c for controlling the opening and closing of the movable wing piece 47 of the starting hole 35, and a large prize opening solenoid 52c for controlling the opening and closing of the opening door 52b of the large prize opening 50, and the main control board 20 is capable of transmitting control signals for controlling these.

The main control board 20 is further connected to a special symbol display device 38a and a special symbol display device 38b, and the main control board 20 is capable of transmitting control signals for controlling the display of special symbols 1 and 2. The main control board 20 is further connected to a composite display device 38c, and is capable of transmitting control signals for controlling the display of the number of reserved symbols and the status display.

The main control board 20 is also connected to a composite display device 38d, and the main control board 20 is capable of transmitting control signals for controlling the display of the normal symbol display, right hit display, and round display displayed on the composite display device 38d.

Furthermore, an external centralized terminal board 21 for the frame is connected to the main control board 20, and the main control board 20 is capable of transmitting specified game information (e.g., jackpot information, number of winning balls information, pattern change execution information, etc.) to a hall computer HC installed outside the gaming machine via the external centralized terminal board 21 for the frame.
The hall computer HC is an information processing device (computer device) that monitors game information from the main control board 20 and comprehensively manages the operating status of the gaming machines in the pachinko hall.

Furthermore, a payout control board (payout control unit) 29 is connected to the main control board 20, and when it is necessary to pay out prize balls, a control command related to the payout (a payout control command that specifies the number of prize balls) can be sent to the payout control board 29.

The payout control board 29 is connected to a launch control board (launch control unit) 28 that controls the launch device 32, and a game ball payout device (game ball payout means) 19 that pays out game balls. The main role of this payout control board 29 is to receive payout control commands from the main control board 20, control the payout of prize balls by the game ball payout device 19 based on the payout control commands, and send status signals to the main control board 20.

The game ball payout device 19 is provided with a supply shortage detection sensor 19a that detects a shortage of game balls and a ball counting sensor 19b that detects the game balls (prize balls) to be paid out, and the payout control board 29 is capable of receiving each of these detection signals. The game ball payout device 19 is also provided with a payout motor 19c that drives a ball payout mechanism (not shown) for paying out game balls, and the payout control board 29 is capable of transmitting a control signal for controlling the payout motor 19c.

Furthermore, the payout control board 29 is connected to a fullness detection sensor 60 (in this embodiment, a detection sensor that detects the storage state of game balls stored in the upper tray 9) that detects when the upper tray 9 is full of game balls, and a front door open sensor 61 (for example, a detection sensor that detects the open state of the door 6 or inner frame 2).

The payout control board 29 can transmit various status signals to the main control board 20 based on the detection signals from the full detection sensor 60, the front door open sensor 61, the supply shortage detection sensor 19a, and the ball counting sensor 19b. These status signals include a ball jamming signal indicating a full state, a door open signal indicating that at least the inner frame 2 is open, a supply shortage signal indicating a shortage of game balls from the game ball payout device 19, a counting error signal indicating a shortage of prize balls paid out or an abnormality has occurred in the ball counting sensor 19b, and a payout completion signal indicating that the payout operation has been completed, and are configured to transmit various status signals. Based on these status signals, the main control board 20 monitors the open state of the inner frame 2 (door open error), whether the payout operation of the game ball payout device 19 is normal or not (supply shortage error), and the full state of the upper tray 9 (ball jamming error).

Furthermore, the payout control board 29 is connected to the launch control board 28, and is capable of transmitting an authorization signal to the launch control board 28 to permit launch. The launch control board 28 controls the energization of a launch solenoid (not shown) provided in the launch device 32 based on the authorization signal being output from the payout control board 29, and realizes the launch operation of the game ball by operating the launch operation handle 15. Specifically, the launch operation of the game ball is permitted under the conditions that the launch permission signal is output from the payout control board 29 (launch permission signal ON state), the touch sensor provided in the launch operation handle 15 detects that the player is touching the handle, and the launch stop switch (not shown) provided in the launch operation handle 15 is not operated. Therefore, when the launch permission signal is not output (launch permission signal OFF state), the launch operation is not executed even if the launch operation handle 15 is operated, and the game ball is not launched. In addition, the strength of the launch of the game ball can be changed according to the amount of operation of the launch operation handle 15.
In addition, when the payout control board 29 detects the above-mentioned ball jam error, it sends a ball jam signal to the main control board 20 and stops outputting the launch permission signal to the launch control board 28 (launch permission signal OFF), and controls the firing operation to stop until the full state of the upper tray 9 is resolved.
In addition, the payout control board 29 outputs a launch permission signal to the launch control board 28 on the condition that launch permission is instructed by the main control board 20.

The main control board 20 is connected to a setting key switch 94 and a RAM clear switch 98, and is capable of receiving detection signals from these switches.

The RAM clear switch 98 is, for example, a push button switch for inputting an instruction to initialize a predetermined area of the main control RAM 20c.
The setting key switch 94 is a key switch for switching to a setting change mode (when turned ON) by inserting a setting key held by a waiter and turning it ON/OFF when the power is turned on.
Here, the setting change mode is a mode in which the setting value Ve can be changed. The setting value Ve is a value that indicates a stage of probability of winning a game state advantageous to the player.

The RAM clear switch 98 is turned ON/OFF in response to the operation of a RAM clear button that is operable when the inner frame 2 is open.
In addition, the setting key switch 94 is provided with a corresponding key cylinder into which the above-mentioned setting key can be inserted and removed, and is turned ON when the setting key inserted into the key cylinder is rotated in a forward direction, and turned OFF when the setting key is rotated in the reverse direction from the ON state.
The key cylinder is provided so as to be operable by inserting a setting key when the inner frame 2 is open. The key cylinder functions as an operator that is operable when the setting key is inserted.

In this example, the RAM clear button is also used to change the setting value Ve. Specifically, the RAM clear button also functions as an operator for sequentially changing the setting value Ve.

The RAM clear switch 98 and the setting key switch 94 are provided in appropriate locations inside the gaming machine 1. For example, they are located on the main control board 20.

In addition, a setting/performance display 97 is connected to the main control board 20 .
The setting/performance display 97 is configured to have, for example, a seven-segment display, and functions as a display means capable of displaying the setting value Ve and performance information (described later). The setting/performance display 97 is mounted, for example, at a position on the main control board 20 where it can be easily seen.
The main control board 20 is capable of transmitting control signals to the setting/performance display device 97 for displaying the setting value Ve and performance information.

Here, the setting value Ve primarily defines the lottery probability (probability of winning) of at least a jackpot (a type of winning that will activate a condition device described below) in stages (for example, six stages from setting 1 to 6), with the higher the setting value Ve, the higher the probability of winning (setting 1 is the lowest probability of winning, and thereafter the probability of winning increases in ascending order of the setting value), which works to the player's advantage. In other words, the higher the setting value Ve, the higher the so-called "machine payout rate (ball payout rate, PAYOUT rate)", which works to the player's advantage.
In this way, the set value Ve is a value that determines the probability of winning a jackpot and the machine payout ratio, and refers to a value regarding a grade related to the likelihood of a specific event occurring, such as a beneficial state that affects the player, and in this embodiment, the degree of advantage related to the game is determined according to each set value Ve.

In this example, it is assumed that the number of stages (stages of advantage) of the set value Ve that is legally available is six. Specifically, it is assumed that the range of the set value Ve that is legally available (hereinafter referred to as the "available range Re") is a range from "1" to "6."
Under this premise, the pachinko gaming machine 1 of this example uses only some of the setting values Ve that are available under the rules. Specifically, the pachinko gaming machine 1 of this example uses only three values, for example, "1", "2", and "6", out of the setting values Ve "1" to "6" within the available range Re. In other words, the number of stages for the probability of winning is limited to three stages, rather than the maximum number of stages according to the rules, which is six.
Hereinafter, the range of setting values Ve actually used in the pachinko game machine 1, specifically, the range of setting values Ve actually used among the setting values Ve within the usable range Re (the range of "1", "2", and "6" in the above example), will be referred to as the "usage range Ru".

The set value Ve is set by hall staff such as hall clerks based on the business strategy of the hall (game parlor). In addition, when there are multiple types of jackpots, the type of jackpot that is the target of which the winning probability of the jackpot is changed according to the set value Ve can be appropriately determined. For example, if there are three types of jackpots, jackpots 1 to 3, a relatively high set value Ve may increase the winning probability of all jackpots 1 to 3, or may increase the combined winning probability of jackpots 1 to 3. In addition, the winning probability of some jackpots may be increased. For example, only the winning probability of jackpots 1 and 2 may be increased, and the winning probability of jackpot 3 may be constant with the full set value Ve.

(Regarding changing settings)
In this example, to change the setting value Ve, with the power of the gaming machine 1 turned off and the inner frame 2 released, the setting key switch 94 is turned ON (operated to the setting change mode side) and the RAM clear button is pressed (RAM clear switch 98 is ON), and then the gaming machine 1 is powered on. Then, the current setting value Ve is displayed on the setting/performance display 97, and the game is switched to a "setting change mode" in which the setting value Ve (1, 2, 6 in this example) can be changed.

In this example, the determination of whether to transition to the setting change mode is performed in the main processing on the main control side, which will be described later (see step S104 in FIG. 8). When the above operating conditions for transitioning to the setting change mode are satisfied, processing for changing the settings is executed accordingly.

After transitioning to the setting change mode, when the RAM clear button, which functions as a change operator for the setting value Ve, is turned ON, the current display value of the setting/performance display 97 is changed cyclically within the usage range Ru, such as "1 → 2 → 6 → 1 → 2 → 6 → ...." When the desired setting value Ve is reached, the setting key switch 94 is turned OFF, the setting value Ve is confirmed, and the information on the confirmed setting value Ve is stored (memorized) in a specified area of the main control RAM 20c.
When the setting key switch 94 is turned OFF, the setting change mode is terminated and the display on the setting/performance display 97 is cleared.
When the setting change mode ends, the system transitions to a state in which game progress is permitted.

(About performance indication)
The main control board 20 is capable of transmitting a control signal to the setting/performance display device 97 for displaying predetermined performance information.
Performance information is information that pachinko halls and related agencies want to confirm, and typical examples include information regarding the presence or absence of illegal prize ball cheating, such as excessive prize balls for the gaming machine 1, and information regarding the original ball output performance of the gaming machine 1. Therefore, unlike advance notices and the like, the performance information itself is information that is not directly related to the progress of the game itself when the player is playing the game.

For this reason, the setting/performance display 97 is provided inside the gaming machine 1, for example, on the main control board 20, the payout control board 29, the launch control board 28, the relay board, the performance control board 30, or in the board case (the protective cover that protects the board), in a position where the display information can be seen when the inner frame 2 is in the open state.

Here, the following specific information can be used as performance information:

(1) Information (specific ratio information) based on the value (α/β) obtained by dividing the total number of payout balls paid out as a result of winning during a specific state (total number of prize balls during a specific state: α) by the total number of out balls discharged from the outlet 49 during the specific state (number of outs during a specific state: β) can be adopted as performance information.
The "total number of payouts" is the total number of game balls (prize balls) paid out when winning at the winning holes (starting hole 34, starting hole 35, general winning hole 43, and large winning hole 50). In this embodiment, the starting hole 34 or starting hole 35 pays out 3 balls, the large winning hole 50 pays out 13 balls, and the general winning hole 43 pays out 10 balls.
In addition, the state to be adopted as the specific state can be appropriately determined according to the state under which the performance information is to be grasped. In the case of this embodiment, any of the normal state, the potential state, the time-saving state, the probability state, and the jackpot game can be adopted. In addition, multiple types of states may be the measurement target. For example, the normal state and the probability state, or all game states except the jackpot game, and the type to be measured can be appropriately determined.
In addition, the period during the specific state may be a period during which the probability of winning a jackpot is either low or high.
In addition, the total number of payouts may be calculated by excluding one or more specific winning ports from the measurement (total number of payouts excluding specific winning ports). For example, the total number of payouts may be calculated by excluding the large winning port 50 from the measurement among the winning ports.

(2) Alternatively, the total number of balls paid out, the total number of balls paid out excluding a specific winning slot, or the total number of balls taken out may be measured, and the measurement results may be used as performance information.

In this embodiment, the total number of payouts during normal state (number of payouts under normal conditions) and the total number of balls out during normal state (number of outs under normal conditions) are measured in real time, and the value obtained by dividing the number of payouts under normal conditions by the number of outs under normal conditions and multiplying this value by 100 (the value calculated by number of payouts under normal conditions ÷ number of outs under normal conditions × 100) is displayed as performance information (hereinafter referred to as "normal ratio information"). Note that the displayed value in this case is rounded off to one decimal place.
Therefore, each data of the number of payouts in normal time, the number of outs in normal time, and the ratio information in normal time is stored (memorized) in the corresponding area (the specific total number of winning balls storage area, the specific number of outs storage area, and the specific ratio information storage area) of the main control RAM 20c. However, instead of simply measuring permanently and displaying the performance information, when the total number of out balls reaches a predetermined specified number (for example, 60,000 balls), the measurement is stopped once. This specified number is not the total number of out balls in the normal state, but the total number of out balls in all game states (including during a winning game) (hereinafter referred to as the "number of outs in all states"). This number of outs in all states is also measured in real time and stored in the corresponding area (the all state number of outs storage area) of the main control RAM 20c. Hereinafter, for the convenience of explanation, the specific total number of winning balls storage area, the specific number of outs storage area, the specific ratio information storage area, and the all state number of outs storage area will be abbreviated to "measurement information storage area".

Then, the normal time ratio information at the end is stored in a specified area (performance display storage area) of the main control RAM 20c (this time's normal time ratio information is stored), and then the measurement information storage area (number of payouts in normal time, number of outs in normal time, and number of outs in all states) is cleared, and measurement is started again (measurement of number of payouts in normal time, number of outs in normal time, normal time ratio information, and number of outs in all states is started). The setting and performance display 97 then displays the previous normal time ratio information (measurement history information) and the normal time ratio information currently being measured. Note that it is not limited to the previous information, and it may be configured to display history from the time before that or the time before that (three times ago), and it is possible to determine how many times back the information to display.

In this example, the setting value Ve and the performance information are alternatively displayed on the setting/performance display 97. Specifically, in this example, since setting changes and setting confirmation are performed only at the time of startup following power-on, the setting value Ve is displayed on the setting/performance display 97 in response to a transition to a setting change mode or setting confirmation mode after startup following power-on, and the performance information is displayed after the setting changes and setting confirmation are completed.
The display of the setting value Ve and the performance information is not limited to a common display, but may be performed on separate displays. In this case, the setting value Ve and the performance information may be displayed in parallel.

(Performance control command)
The main control board 20 is capable of transmitting various presentation control commands, including information on the special symbol variation display game and information on errors, to the presentation control board 30 according to the processing state. However, in order to prevent fraudulent acts such as cheating, the main control board 20 is configured for one-way communication, in which it only transmits signals to the presentation control board 30 and cannot receive signals from the presentation control board 30.

Here, the performance control command defines the function by a two-byte configuration consisting of a one-byte-long mode (MODE) and a one-byte-long event (EVENT), and in order to distinguish between MODE and EVENT, Bit 7 of MODE is ON and Bit 7 of EVENT is OFF. When these pieces of information are transmitted as valid, a strobe signal is output corresponding to each of the mode (MODE) and event (EVENT). That is, when there is a command to be transmitted, the main control CPU 20a sets and outputs mode (MODE) information for transmitting the command to the performance control board 30, and transmits the first strobe signal after a predetermined time has elapsed since this setting. Furthermore, after a predetermined time has elapsed since the transmission of this strobe signal, it sets and outputs event (EVENT) information, and transmits the second strobe signal after a predetermined time has elapsed since this setting. The strobe signal is controlled to an active state by the main control CPU 20a for a predetermined period of time that allows the performance control CPU 30a to reliably receive commands.

[2.2 Performance control board]
The performance control board 30 is equipped with a microprocessor that has a built-in performance control CPU 30a, as well as a performance control ROM 30b that stores the performance data required for performance control processing, and a performance control RAM 30c that functions as a work area and buffer memory.In addition, it is equipped with an audio control unit (sound source IC), an RTC (Real Time Clock) function unit, a counter circuit, an interrupt controller circuit, a reset circuit, a WDT circuit, etc., and controls the overall performance operation.

The performance control CPU 30a performs calculations for various performance operations and controls each performance means based on the performance control program and the performance control commands received from the main control unit 20. In the case of the pachinko game machine 1 of this embodiment, the performance means are the liquid crystal display device 36 (main liquid crystal display device 36M, sub-liquid crystal display device 36S), the light display device 45a, the sound generating device 46a, and movable role objects (not shown).

The performance control ROM 30b stores a control program for the performance operation by the performance control CPU 30a, and various data necessary for controlling the performance operation.
The performance control RAM 30c is used as a work area used by the performance control CPU 30a for various calculation processes, a table data area, a buffer area for various input/output data and processing data, etc.
The performance control board 30 is configured to have, for example, a one-chip microcomputer and its peripheral circuits mounted thereon, but various configurations are possible for the performance control board 30. For example, in addition to the microcomputer, it may also have an interface circuit with each section, a random number generating circuit that generates random numbers for lottery use in performances, a CTC for various time counts, a watchdog timer (WDT) circuit, and an interrupt controller circuit that gives an interrupt signal to the performance control CPU 30a.

The main roles of this performance control board 30 are to receive performance control commands from the main control unit 20, select and decide the performance based on the performance control commands, control the display of the liquid crystal display device 36 (supply of display data), control the sound output of the sound generating device 46a, control the light emission of the light display device 45a (LED), and control the operation of the movable body role (drive control of the movable body role motor 80c).

Since this performance control board 30 also functions as a control device for the liquid crystal display device 36, the performance control board 30 also has the functions of a so-called VDP (Video Display Processor), image ROM, and VRAM (Video RAM), and the performance control CPU 30a also functions as a liquid crystal control unit.
VDP refers to a function for controlling the overall video output process, such as image development and image drawing.
Image ROM refers to a memory that stores image data (performance image data) that the VDP performs image development processing on.
The VRAM is an image memory area that temporarily stores image data rendered by the VDP.

With these configurations, the performance control board 30 generates various image data based on commands from the main control unit 20 and outputs it to the main liquid crystal display device 36M and the sub liquid crystal display device 36S. As a result, various performance images are displayed on the main liquid crystal display device 36M and the sub liquid crystal display device 36S.
2 is the main liquid crystal display device 36M. The sub liquid crystal display device 36S is not shown in FIG.

The performance control board 30 also has an audio control section (for example, the sound controller 230 in FIG. 4) for an audio generating device 46a including multiple speakers 46, and the audio signal output by the audio control section is amplified by an amplifier section 46d and supplied to the speaker 46. Note that the sound controller 230 as the audio control section will be described as being built into the performance control board 30, but the audio control section may use a sound source IC separate from the performance control board 30.
In addition, the performance control board 30 is connected to a lamp driver unit 45d that functions as a light display control unit for the light display device 45a including the decorative lamp 45 and various LEDs, and a motor driver unit 80d (motor drive circuit) that functions as a drive control unit for the movable body role motor 80c that operates the movable body (not shown). The performance control board 30 issues instructions to the lamp driver unit 45d and the motor driver unit 80d to control the light display operation by the light display device 45a and the operation of the movable body role motor 80c.

The performance control board 30 is also connected to an origin switch 81 and a position detection sensor 82 for monitoring the operation of the movable props.
The origin switch 81 is composed of, for example, a photointerrupter, and detects whether the movable body role motor 80c is at the origin position. The origin position is, for example, a position where the movable body is not normally exposed on the board surface of Figure 2. The performance control board 30 is capable of determining whether the movable body role motor 80c is at the origin position based on the detection information of this origin switch 81.
In addition, the performance control board 30 controls the operation mode while monitoring the current operating position of the movable body role (for example, the amount of movement from the origin position) based on the detection information from the position detection sensor 82. Furthermore, the performance control board 30 monitors malfunctions in the operation of the movable body role based on the detection information from the position detection sensor 82, and if a malfunction occurs, detects it as an error.

The performance control board 30 is also connected to the switches for the performance button 13, cross key 15a, and decision button 15b, which are shown as operation unit 17 in the figure, that is, the operation detection switches for the performance button 13, cross key 15a, and decision button 15b, and the performance control board 30 is capable of receiving operation detection signals from the performance button 13, cross key 15a, and decision button 15b.

The performance control board 30 is further provided with a handle sensor 83 (touch sensor) for detecting whether the firing operation handle 15 shown in FIG. 1 is being touched by a user such as a player. Based on the detection information from the handle sensor 83, the performance control board 30 is able to determine whether the firing operation handle 15 is being touched by a user.

Based on the performance control commands sent from the main control unit 20, the performance control board 30 selects (determines) a performance pattern by lottery or uniquely from multiple types of performance patterns prepared in advance, and controls various performance means at the required timing to produce the desired performance. This realizes the display of a performance image by the liquid crystal display device 36 corresponding to the performance pattern, the playback of sound from the speaker 46, and the lighting and blinking of the decorative lamps 45 and LEDs, and the chronological development of various performance patterns (such as decorative pattern changing display operations and preview performances) to realize a "performance scenario" in the broad sense.

Here, regarding the performance control command, the performance control board 30 (performance control CPU 30a) generates an interrupt process based on the input of the above-mentioned strobe signal sent by the main control unit 20 (main control CPU 20a) and receives and analyzes it. Specifically, the performance control CPU 30a executes a control program for command reception interrupt processing based on the input of the above-mentioned strobe signal, and in the interrupt processing realized by this, it obtains the performance control command and analyzes the command content.
In this case, when an interrupt occurs based on the input of a strobe signal, the performance control CPU 30a interrupts the interrupt processing based on another interrupt (timer interrupt processing executed periodically) even if that processing is in progress, and performs command reception interrupt processing, and even if another interrupt occurs at the same time, the command reception interrupt processing is given priority.

<3. Overview of operation>
[3.1 Variable symbol display game]
Next, an overview of the gaming operation of the gaming machine 1 realized by the above-mentioned control configuration (FIG. 3) will be described.
First, the symbol variation display game will be described.

(Special pattern change display game)
In the pachinko game machine 1 of this embodiment, a "jackpot lottery" is performed by random number lottery in the main control board 20 based on a predetermined starting condition, specifically, based on the game ball entering (winning) the starting hole 34 or the starting hole 35. Based on the lottery result, the main control board 20 variably displays special symbols 1 and 2 on the special symbol display devices 38a and 38b to start the special symbol variable display game, and after a predetermined time has passed, derives and displays the result on the special symbol display device, thereby ending the special symbol variable display game.

Here, in this embodiment, the jackpot lottery based on winning at the starting hole 34 and the jackpot lottery based on winning at the starting hole 35 are performed separately and independently. For this reason, the jackpot lottery result for the starting hole 34 is derived on the special pattern display device 38a side, and the jackpot lottery result for the starting hole 35 is derived on the special pattern display device 38b side. Specifically, on the special pattern display device 38a side, on the condition that a game ball has entered the starting hole 34, the special pattern 1 is displayed in a variable manner to start a first special pattern variable display game, while on the special pattern display device 38b side, on the condition that a game ball has entered the starting hole 35, the special pattern 2 is displayed in a variable manner to start a second special pattern variable display game. Then, when the special pattern variable display game is started on special pattern display device 38a or special pattern display device 38b, after a predetermined variable display time has elapsed, the special pattern being displayed in a variable manner is stopped and displayed in a predetermined "jackpot" manner if the jackpot lottery result is a "jackpot", or in a predetermined "miss" manner otherwise, thereby deriving the game result (jackpot lottery result).

For the sake of convenience, the first special symbol change display game on the special symbol display device 38a side will be referred to as "special symbol change display game 1," and the second special symbol change display game on the special symbol display device 38b side will be referred to as "special symbol change display game 2." Unless otherwise necessary, "special symbol 1" and "special symbol 2" will be referred to simply as "special symbol" (or sometimes abbreviated to "special symbol"), and "special symbol change display game 1" and "special symbol change display game 2" will be referred to simply as "special symbol change display game."

(Decorative pattern changing display game)
In addition, when the above-mentioned special symbol variable display game is started, the decorative symbol variable display game is started by displaying decorative symbols (game symbols for presentation) on the main liquid crystal display device 36M, and various presentations are performed in association with this. When the special symbol variable display game ends, the decorative symbol variable display game also ends, and a predetermined special symbol indicating the result of the big win lottery is displayed on the special symbol display device, and a decorative symbol reflecting the result of the big win lottery is derived and displayed on the main liquid crystal display device 36M. In other words, the result of the special symbol variable display game is reflected and displayed by the decorative symbol variable display game for presentation, including the decorative symbol variable display operation.

Therefore, for example, if the result of the special symbol change display game is a "jackpot" (if the jackpot lottery result is a "jackpot"), the decorative symbol change display game will develop an effect that reflects that result. Then, when the special symbol is displayed stationary in a display mode indicating a jackpot (for example, the 7-segment display shows "7") on the special symbol display device, the decorative symbols are displayed stationary in a display mode that reflects the "jackpot" in each of the "left", "middle", and "right" display areas on the main liquid crystal display device 36M (for example, the three decorative symbols are displayed as "7", "7", "7" in each of the "left", "middle", and "right" display areas).

When this "jackpot" occurs, specifically, the special pattern change display game ends, followed by the decorative pattern change display game, and as a result, the pattern form of the "jackpot" is derived and displayed, and then the large prize opening solenoid 52c of the special variable prize winning device 52 is activated and the opening door 52b opens and closes in a predetermined pattern, thereby opening and closing the large prize opening 50, and a special game state (jackpot game) which is more advantageous to the player than the normal game state is generated. In this jackpot game, the opening door 52b opens or expands the winning area until the opening time of the large prize opening has elapsed for a predetermined time (maximum opening time: for example, 29.8 seconds) or until the number of game balls that have entered the large prize opening (winning balls entering the large prize opening 50) reaches a predetermined number (maximum number of winning balls: the upper limit of the number of winning balls allowed for the opening or expanded winning opening when one operation of the device is performed: for example, 9 balls), and when either of these conditions is met, the large prize opening is closed. This "round game" is repeated for a predetermined number of rounds (for example, up to 16 rounds).

When the jackpot game starts, an opening performance is first performed to notify the player that the jackpot has started. After the opening performance ends, round play is performed multiple times up to a predetermined number of rounds. After the specified number of rounds has ended, an ending performance is performed to notify the player that the jackpot has ended, and the jackpot game ends.

Regarding the information necessary for executing the decorative symbol variation display game, first, the main control board 20 performs a jackpot lottery including a 'win/lose lottery (win/lose type lottery)' to select whether it is a jackpot or a loss, and a 'pattern lottery (win type (win type) lottery)' to select the type of jackpot if it is a jackpot, and the type of loss if it is a loss, based on the game ball entering (winning) the start hole 34 or the start hole 35, specifically, on the condition that the game ball is detected by the start hole sensor 34a or the start hole sensor 35a and the start condition (the start condition for the special symbol) is met (if there is only one type of loss, there is no need to perform a type lottery for the loss, so that lottery may be omitted), and based on the lottery result information, it determines the variation pattern of the special symbol and the special symbol (hereinafter referred to as the 'special stop symbol') to be finally stopped and displayed according to the type of win.

Then, the main control board 20 transmits a "variation pattern designation command" including at least special symbol variation pattern information (e.g., information related to the jackpot lottery result and the special symbol variation time, etc.) to the performance control board 30 as a performance control command that specifies the processing state. This causes basic information required for the decorative symbol variation display game to be sent to the performance control board 30. Note that in this embodiment, in order to provide a wide variety of performances, a "decorative symbol designation command" including special stop symbol information (symbol lottery result information (information related to the type of win)) is also transmitted to the performance control board 30.

The special symbol fluctuation pattern information may include information specifying whether or not a specific advance notice performance (such as the "reach performance" or "pseudo consecutive performance" described below) occurs. In more detail, the special symbol fluctuation pattern is roughly divided into a "hit fluctuation pattern" in the case of a hit and a "miss fluctuation pattern" in the case of a miss, depending on the result of the jackpot lottery. These fluctuation patterns include, for example, a "reach fluctuation pattern" that specifies the occurrence of a reach performance described below, a "normal fluctuation pattern" that does not specify the occurrence of a reach performance, a "reach fluctuation pattern with pseudo consecutive performance" that specifies the occurrence (overlapping occurrence) of a pseudo consecutive performance and a reach performance, and a "normal fluctuation pattern with pseudo consecutive performance" that specifies the occurrence of a pseudo consecutive performance but does not specify the occurrence of a reach performance. Note that, in order to secure the performance time of the reach performance or pseudo consecutive performance, the fluctuation time of the fluctuation pattern that specifies the reach performance or pseudo consecutive performance is usually set to be longer than the normal fluctuation pattern.

Based on the information contained in the performance control commands (here, the variation pattern designation command and the decorative pattern designation command) sent from the main control board 20, the performance control board 30 determines the performance content (performance scenario such as preview performance) to be developed in a chronological order during the decorative pattern variation display game and the decorative pattern (decorative stop pattern) to be finally displayed, and executes the decorative pattern variation display game by displaying the decorative patterns in a variable manner according to a time schedule based on the variation pattern of the special patterns. As a result, the decorative patterns are displayed by the main liquid crystal display device 36M in a variable manner in time with the variable display of the special patterns by the special pattern display devices 38a and 38b, and the period of the special pattern variation display game and the period during the decorative pattern variation display game are substantially the same time width. In addition, the performance control board 30 controls the main liquid crystal display device 36M, the light display device 45a, or the sound generating device 46a in accordance with the performance scenario, and develops various performances in the decorative pattern variation display game. This allows the main LCD display device 36M to play images (image effects), play sound effects (sound effects), and turn on and off decorative lamps 45, LEDs, etc. (light effects).

In this way, the special symbol variation display game and the decorative symbol variation display game have an inseparable relationship, and the display result of the special symbol variation display game is reflected in the decorative symbol variation display game, so these two symbol variation display games may be considered as equivalent symbol games. In this specification, unless otherwise necessary, the above two symbol variation display games may be simply referred to as "symbol variation display games."

(Normal pattern change display game)
In addition, in the gaming machine 1, a "support winning lottery" is performed by random number lottery in the main control board 20 based on the passing (winning) of the game ball through the normal symbol starting hole 37. Based on the lottery result, the normal symbol represented by the LED is displayed variably on the composite display device 38d to start the normal symbol variable display game, and after a certain time has passed, the result is displayed as a combination of the lit and unlit LEDs. For example, if the result of the normal symbol variable display game is a "support winning", the display section of the normal symbol on the composite display device 38d is displayed as a specific lighting state (for example, both of the two LEDs 39 are lit, or the LED on the "○" side of the LEDs representing "○" and "×" is lit).

When this "auxiliary hit" occurs, the normal electric role solenoid 41c (see FIG. 3) is activated, which causes the movable wing 47 to open in an inverted "V" shape, opening or enlarging the starting hole 35 to allow game balls to flow in easily (starting hole open state), creating an auxiliary game state (hereinafter referred to as "normal electric open game") that is more advantageous to the player than the normal game state. In this normal electric open game, the movable wing 47 of the normal variable winning device 41 opens or enlarges the winning area until the opening time of the starting hole 35 has elapsed for a predetermined time (e.g., 0.2 seconds) or until the number of game balls that have entered the starting hole 35 reaches a predetermined number (e.g., 4 balls), and when either of these conditions is met, the starting hole 35 is closed. This operation is repeated a predetermined number of times (e.g., up to twice).

(Regarding reservations)
In this embodiment, when a winning occurs in the start hole 34, the start hole 35, or the normal pattern start hole 37 during a special/decorative pattern change display game, during a normal pattern change display game, during a big win game, or during a normal power release game, i.e. when a detection signal is input from the start hole sensor 34a, the start hole sensor 35a, or the normal pattern start hole sensor 37a and the corresponding start condition (pattern game start condition) is established, this is reserved and stored as data related to the right to start the variable display game, up to a predetermined upper limit of the maximum reserved memory number (for example, up to 4 pieces), excluding data related to the variable display. The reserved data that is not used for the pattern change display operation, or the game balls related to the reserved data, are also called "operation reserved balls". In order to make the number of the operation reserved balls clear to the player, a dedicated reserved display (not shown) provided at an appropriate position of the gaming machine 1, or a reserved display provided as an icon image on the screen of the liquid crystal display device 36 (main liquid crystal display device 36M or sub liquid crystal display device 36S) is turned on and displayed.

In this embodiment, up to four operation reserved balls for each of the special symbol 1, the special symbol 2, and the normal symbol are reserved and stored in the corresponding memory area of the main control RAM 20c, and are reserved as the number of times the special symbol or the normal symbol changes. Note that the maximum number of operation reserved balls (maximum reserved memory number) for each of the special symbol 1, the special symbol 2, and the normal symbol is not particularly limited. In addition, all or part of the maximum reserved memory number for each symbol may be different, and the number can be appropriately determined according to the game characteristics.

[3.2 Game Status]
In the gaming machine 1 according to the present embodiment, in addition to the special gaming state of the jackpot, a plurality of other gaming states can be generated. In order to facilitate understanding of the present embodiment, the various gaming states will first be described.

The gaming machine 1 of this embodiment is configured to be able to execute and control at least four types of gaming states: normal state, time-saving state, potential probability state, and probability change state. These gaming states are distinguished by the jackpot lottery probability state (low probability state, high probability state) and the occurrence or non-occurrence of an electric chute support state (bonus play) (with electric support, without electric support), etc.

"Electric chute support state" refers to an "extended open state" in which the open operation period of the movable wing 47 of the normal variable winning device 41 in normal electric open play (at least one of the open time and the number of times the movable wing 47 is opened) is extended from the normal state. When the extended open state occurs, the open operation period of the movable wing 47 is extended, for example, from 0.2 seconds under normal conditions (non-extended open state) to 1.7 seconds, and the number of times it opens and closes is extended, for example, from 1 time under normal conditions to 2 to 3 times.

In this embodiment, when the electric chute is supported, the probability of winning the auxiliary prize changes from a low probability (e.g., 1 in 256) of a predetermined probability (normal probability) to a high probability (e.g., 255 in 256) (normal symbol probability change state), and a 'normal symbol time reduction state' occurs, shortening the average time required for one normal symbol change display game (normal symbol change display operation time) (e.g., shortened from 10 seconds to 1 second). Therefore, when the electric chute is supported, normal electric release games occur frequently, and the operation rate of the movable wing piece 47 per unit time is improved compared to the normal state, resulting in an operation rate improvement state (high base state). Hereinafter, the electric chute support state will be abbreviated as "with electric support" and the other state will be abbreviated as "without electric support".

In this embodiment, the "normal state" refers to a game state in which the probability of winning a jackpot is a low probability (e.g., 1 in 399) of a predetermined probability (normal probability) and there is no electric support (low probability + no electric support).

"Time-saving state" refers to a game state in which the probability of winning a jackpot is as low as in the normal state, but a 'special symbol time-saving state' occurs in which the average time required for one special symbol change display game (special symbol change display operation time) is shorter than in the normal state, and the electric chute is in a supported state. In other words, during the time-saving state, it is a "low probability + electric support + special symbol time-saving state."

The "potential state" is a "special symbol probability state" in which the probability of winning a jackpot has risen to a higher probability (for example, 1 in 39.9) than the low probability mentioned above, and refers to a gaming state without electric support (high probability + no electric support).

"Probable hit state" refers to a game state in which the probability of winning a jackpot is as high as in the potential hit state, but the special symbol time-saving state and electric chute support state occur. In other words, during the probable hit state, it is a "high probability + electric support + special symbol time-saving state."

Regarding the game state, if we focus on the probability of winning a jackpot, when the game state is "normal state" or "time-saving state", at least the probability of winning a jackpot is in a "low probability state", and when the game state is "latent probability state" or "probable probability state", at least the probability of winning a jackpot is in a "high probability state". During a jackpot, a jackpot game occurs in which the jackpot entry port opens and closes, but the probability of winning a jackpot and the presence or absence of electric support are the same as in the normal state, with a low probability and no electric support.

[3.3 About hits]
Next, a "hit" in the gaming machine 1 will be described.
In the gaming machine 1 of this embodiment, a jackpot lottery (a jackpot lottery) is conducted for a plurality of types of winnings. In this example, the types of winnings include, for example, each of the jackpot types, such as "normal 4R", "normal 6R", "probable 6R", and "probable 10R".
The above notation "R" means the prescribed number of rounds (maximum number of rounds).

The type of jackpot is the hit that triggers the activation of the conditional device. Here, a "conditional device" is a device whose operation is a necessary condition for the activation of the continuous device that operates the reels to play a round, and which is activated when a specific combination of special symbols is displayed or when the game ball passes through a specific area inside the jackpot opening.

The above-mentioned probability change state is a so-called "number-cut probability change machine (ST machine)" that ends the high probability state and transitions to a low probability state when the special pattern change display game is executed a predetermined number of times (for example, 70 times: the specified number of STs) without winning a jackpot type, and when the specified number of STs is completed, the state transitions to the normal state from the next game. However, it may also be a "general probability change machine" that continues until the next jackpot is won.

The number of times the special symbol change display game is executed may be the total number of times that the special symbol change display game 1 and the special symbol change display game 2 are executed (the total number of changes in special symbol 1 and special symbol 2), or it may be the number of times that either one of them is executed (for example, the number of times that the special symbol change display game 2 is executed). The number of times that the time-saving state is entered is not limited to 60 times or 100 times, and can be determined appropriately according to the gameplay. There is also no particular restriction on the type of winning to be provided, and it can be determined appropriately.

Here, in this example, a plurality of types of "loss" are provided similarly to the jackpot types. Specifically, three types of loss, "loss 1", "loss 2", and "loss 3", are provided.
As described above, if the result of the lottery is a "lose," a lottery for the type of loss will be held in the pattern lottery.

[3.4 Production]
(Performance mode)
Next, the presentation mode (presentation state) will be described. The gaming machine 1 of this embodiment is provided with a plurality of presentation modes for producing presentations related to the game state, and is configured to be able to move between the presentation modes. Specifically, a normal presentation mode, a time-saving presentation mode, a potential probability presentation mode, and a probability variable presentation mode are provided, which correspond to a normal state, a time-saving state, a potential probability state, and a probability variable state, respectively. In each presentation mode, the background display as the background of the decorative pattern variation display screen is displayed with a different background presentation, so that the player can understand what game state he or she is currently in.

The presentation control board 30 (presentation control CPU 30a) has a function unit (presentation state transition control means) that controls transition between multiple types of presentation modes. The presentation control board 30 (presentation control CPU 30a) is configured to grasp the current game state and control transition between multiple types of presentation modes in a manner that maintains consistency with the game state managed by the main control board 20 based on a specific presentation control command sent from the main control board 20 (main control CPU 20a), specifically, a presentation control command including game state information managed by the main control board 20. Examples of the specific presentation control command as described above include a variation pattern designation command, a decorative pattern designation command, and a game state designation command sent when a change occurs in the game state.

(Preview performance)
Next, the advance notice performance will be explained. The performance control board 30 is configured to be able to control the appearance of various "advance notice performances" related to the current performance mode and the big win lottery result based on the contents of the performance control command from the main control board 20, specifically, at least the variation pattern information included in the variation pattern designation command. Such advance notice performances suggest (advance notice) the expectation of whether or not a win type has been won (hereinafter referred to as "expectation of winning"), and act as "excitement performances" to stimulate the player's expectation of winning. Representative advance notice performances include "reach performances", "pseudo consecutive performances", and even "foreseeing advance notice performances". The performance control board 30 functions as an advance notice performance control means capable of controlling the execution (appearance) of these performances.

"Reach effect" refers to an effect mode that accompanies a reach state (variable display mode that accompanies a reach state: reach variation pattern), and more specifically, an effect mode that derives and displays the final game result via a reach state. Reach effects include multiple types of reach effects that are associated with the probability of winning. For example, there are some that have a relatively higher probability of winning compared to when a normal reach effect appears. Such reach effects are called 'super reach effects'. Many of these "super reaches" have a relatively longer performance time (variation time) than normal reaches to increase the expectation of winning. In addition, normal reaches and super reaches include multiple types of reach effects. In this example, super reaches include multiple types of reach effects, namely Super Reach 1, 2, 3, and 4, and the probability of winning of these Super Reach 1 to 4 has the following relationship: "Super Reach 1 < Super Reach 2 < Super Reach 3 < Super Reach 4".

"Pseudo consecutive performance" refers to a performance mode that involves a pseudo continuous change display state (pseudo consecutive change) of decorative symbols, and "pseudo consecutive change" refers to a change display mode in which, during a decorative symbol change display game, some or all of the decorative symbols are temporarily put into a temporary stop state, and then the decorative symbols are changed again from that temporary stop state, and this display action is repeated once or multiple times. In this respect, it differs from the "preview notice performance (continuous notice performance)" described below, which is deployed across multiple symbol change display games. The occurrence rate (appearance rate) of such "pseudo consecutive" is basically set so that the more pseudo changes there are, the higher the chance of winning. For example, depending on the number of pseudo changes, it is easier to select a performance that stimulates anticipation, such as a super reach.

The term "pre-reading prediction effect" (hereinafter sometimes abbreviated as "pre-reading prediction" or "pre-reading effect") refers to a presentation that notifies the player of the possibility of being controlled to an advantageous state before the display of the pattern to be judged is performed based on the results of the pre-reading judgment. Note that the "advantageous state" refers to a state that is advantageous to the player.
Specifically, the pre-reading performance of this example is performed in a performance mode that can notify the winning expectation in advance of the operation reserved ball (unconsumed operation reserved ball) that has not yet been used for the execution of the pattern change display game (special pattern change display operation) by mainly using the reserved display mode and the background performance of the pattern change display game that is executed first, before the operation reserved ball is used for the pattern change display game. In addition to the above-mentioned "reach performance", various performances such as so-called "SU (step-up) notice performance", "timer notice performance", "revival performance", and "premiere notice performance" are generated in the pattern change display game to liven up the game content.

Here, with reference to Figure 4, we will explain the "hold change preview effect" as an example of the above-mentioned look-ahead preview effect.
In the case of the gaming machine 1 of this embodiment, the upper display area in the screen of the main liquid crystal display device 36M is provided with a display area (display area for displaying decorative pattern change display performance and advance notice performance) for displaying the decorative pattern change display game, and the lower display area in the screen is provided with a reserved display area 76 (reserved display parts a1 to d1) for displaying the number of activated reserved balls on the special pattern 1 side and a reserved display area 77 (reserved display parts a2 to d2) for displaying the number of activated reserved balls on the special pattern 2 side. The presence or absence of activated reserved balls is notified by a predetermined reserved display mode. FIG. 5 shows an example in which the presence or absence of activated reserved balls is indicated by a lit state (active reserved ball present: "○ (white circle mark)" in the figure) or an unlit state (active reserved ball absent: dashed circle mark in the figure), and information on the current number of activated reserved balls is notified.

The display (reserved display) of the presence or absence of an active reserved ball is displayed in the order of occurrence (winning order), and in each reserved display area 76, 77, the leftmost active reserved ball is displayed as the active reserved ball that occurred first on the time axis (i.e., the oldest) among all the active reserved balls in the reserved display. In addition, on the left side of the reserved display areas 76, 77, a changing display area 78 is provided to show the active reserved ball currently being used in the special pattern change display game. In the case of this embodiment, the changing display area 78 is configured so that an image of the game running reserved K icon currently being used in the game is displayed on the seat J icon. In other words, when the change display of the special pattern 1 or special pattern 2 starts, the oldest reserved a1 or a2 icon (icon image) displayed in the reserved display area 76, 77 is moved to the icon of the seat J in the changing display area 78 as the game running reserved K icon, and this state is maintained for a specified display time.

When an activated reserved ball is generated, the main control board 20 transmits a "reserved addition command" to the performance control board 30, which specifies the pre-reading judgment information related to the jackpot lottery result and the number of activated reserved balls at the time of the pre-reading judgment (the number of existing activated reserved balls, including the activated reserved ball generated this time) (see steps S1309 to S1312 in Figure 28).
In this embodiment, the above-mentioned reserve addition command is composed of two bytes, and the reserve addition command is composed of upper byte data that enables the number of reserved balls in operation at the time of the look-ahead judgment to be identified, and lower byte data that enables the look-ahead judgment information to be identified.

As can be understood from the above description, in this embodiment, when a winning entry occurs in the starting hole 34 or the starting hole 35 and a new reserved ball is generated, a jackpot lottery is performed for the symbol variation display game related to the reserved ball as a pre-reading judgment for the reserved ball. As will be described later, the main control board 20 reserves and stores information representing the result of the jackpot lottery performed as such a pre-reading judgment in a corresponding storage area of the main control RAM 20c.
The information on the winning lottery result obtained at the time of the look-ahead judgment is used to select (draw) the pattern variation pattern in the pattern variation display game, and can be said to be "variation pattern selection information". Therefore, it can be said that the main control board 20 performs the look-ahead judgment and reserves and stores the "variation pattern selection information" obtained as a result in a specified area of the main control RAM 20c.

When the performance control board 30 receives the above-mentioned pending addition command sent by the main control board 20, it performs performance control processing related to the "pre-reading preview performance" as part of the display control processing related to the above-mentioned pending display, based on the look-ahead judgment information contained therein. Specifically, it performs a "pre-reading preview lottery" to draw whether or not the look-ahead preview performance can be executed, and if the draw is successful, it causes the look-ahead preview performance to appear.

Here, the pre-reading judgment information is specifically game information obtained by pre-reading and judging the jackpot lottery result (jackpot lottery result at the start of the variation) executed when the operating reserved ball is provided to the pattern variation display game in the main control board 20 and the variation pattern at the start of the variation. That is, this information includes at least information that pre-reads and judges the lottery result at the start of the variation (pre-reading winning/losing information), and can also include information that pre-reads and judges the pattern lottery result (pre-reading pattern information) and information that pre-reads and judges the variation pattern at the start of the variation (pre-reading variation pattern information). The information included in the reserved addition command to be sent to the performance control board 30 can be appropriately determined depending on the content to be notified in the pre-reading notice.
In this example, the reserve addition command is assumed to include pre-read winning/losing information, pre-read pattern information, and pre-read variation pattern information.

The "pre-reading fluctuation pattern" obtained by the pre-reading judgment when the activated pending ball occurs does not necessarily have to be the "fluctuation pattern at the start of fluctuation" obtained when the activated pending ball is actually used for the fluctuation display operation. For example, to explain a representative case where the fluctuation pattern at the start of fluctuation is a fluctuation pattern that specifies "Super Reach 1", in this case, it is possible to specify that the content specified by the pre-reading fluctuation pattern is not the type of reach performance itself, "Super Reach 1", but rather its essential "Super Reach type".

In the case of this embodiment, if the pre-reading notice lottery is won, a "pending display change" pre-reading notice performance (also referred to as a "pending change notice") is performed in which the pending icon that is the subject of the pre-reading notice among the pending icons in the pending display sections a1 to d1 and a2 to d2 is changed from the normal pending display (normal pending display mode) of white to a pending display (special pending display mode) of a pre-reading display of blue, green, red, or a danger pattern (or a special color or pattern such as rainbow).
In Fig. 5, the hatched reserved ball in the reserved display section b1 is shown as an example of a special reserved display. Here, the reserved icon blue, green, red, and danger pattern display indicate a higher probability of winning in that order, and the danger pattern reserved icon display is a premium reserved icon that indicates a very high probability of winning a jackpot.

(Direction Means)
Various effects in the gaming machine 1 are produced by the performance means arranged in the gaming machine 1. This performance means may be a stimulus transmission means capable of exerting a performance effect by appealing to human perceptions such as vision, hearing, and touch, and representative examples include light generating means (light display device 45a: light performance means) such as the decorative lamp 45 and the LED device, sound generating devices (sound generating device 46a: sound performance means) such as the speaker 46, performance display devices (display means) such as the main liquid crystal display device 36M and the sub liquid crystal display device 36S, a pressure device that transmits contact pressure to the operator's body, a wind pressure device that applies wind pressure to the player's body, and a movable body role object that exerts a visual performance effect by its operation. Here, the performance display device is a display device that appeals to the visual sense like the image display device, but differs from the image display device in that it also includes those that do not rely on images (for example, a 7-segment display device). When referred to as an image display device, it refers mainly to a type that produces a performance by displaying an image, and those that produce a performance by means other than an image, such as a 7-segment display device, are included in the concept of the performance display device.

<4. Opening/Closing Structure and Board Arrangement>

The above-mentioned configuration of Fig. 3 is actually realized via a plurality of boards. Below, some of the boards mounted on the gaming machine 1 will be selected and their arrangement will be explained. The opening and closing structure of the gaming machine 1 will also be explained in relation to the mounting positions of the boards.

FIG. 5 shows the door 6 in an open state.
When the door 6 is opened, the inner frame 2 and the game board 3 attached to the inner frame 2 are directly exposed.
The board arranged on the door 6 and the board arranged on the inner frame 2 are wired and connected by a harness serving as a transmission line H8.

The gaming machine 1 is also configured so that the inner frame 2 can be opened relative to the outer frame 4.
Fig. 6 shows the inner frame 2 in an open state. When the inner frame 2 is opened, the game board 3 attached to the inner frame 2 is also released from the outer frame 4. Fig. 6 shows the state in which the rear cover 18 attached to the position on the rear side of the game board 3 is visible. Although the game board 3 is not shown in Fig. 6, the rear side of the game board 3 is exposed when the rear cover 18 is removed (opened). In reality, the rear cover 18 is transparent or semi-transparent, so that the rear side of the game board 3 can be seen in the state shown in Fig. 6.
Furthermore, the game board 3 can be further removed from the inner frame 2.

Thus, the gaming machine 1 is broadly composed of an outer frame 4, an inner frame 2 attached to the outer frame 4, a gaming board 3 attached to the inner frame 2, and a door 6 located on the front side of the gaming board 3 and the inner frame 2. Various boards are attached to either the gaming board 3, the inner frame 2, or the door 6.

Figure 7 shows the positions of some of the boards attached to the game board 3. Note that Figure 7 shows the boards attached to the back of the play area 3a when the game board 3 is viewed from the rear side. Therefore, the right side of the figure is the left side when the game board 3 is viewed from the front side. In the figure, the outline of the frame of the game board 3 is shown with a dashed line to provide a guide for positioning.

As shown in the figure, on the back side of the game board 3, the performance control board 30 is placed slightly above the center, and the main control board 20 is placed below that. In addition, the liquid crystal control board 901 is placed so as to overlap with the performance control board 30, and the ROM board 902 and liquid crystal interface board 903 are placed nearby.

An LED connection board 700 is disposed on the left side of the rear surface of the game board 3, and a power supply module board 904 is disposed near the top of the LED connection board 700.
In addition, an upper connection board 905 is arranged above the game board 3.

A relay board 760, a decorative board 740, a left underboard relay board 720, a game board connection board 906, a lower underboard relay board 800, and a frame LED relay board 840 are arranged near the main control board 20.

In addition, LED boards 780 and 790 and a decorative board 820 are included as boards that can be attached to the movable parts (not shown) that are attached to the game board.

Figure 8 shows the positions of some of the circuit boards attached to the door 6 as viewed from the front side of the gaming machine 1. Note that the door 6, the performance button 13, the launch operation handle 15, and the upper speaker 46 are shown with dashed lines as a guide for their positions within the gaming machine 1.

A relay board 550 is provided above the door 6 .
Similarly, a side unit upper LED board 630 is provided above the door 6, a side unit upper right LED board 600 is provided at the upper right of the door 6, and a side unit lower right LED board 620 is provided below that. Note that the side unit upper right LED board 600, the side unit lower right LED board 620, and the side unit upper LED board 630 are attached inside the side unit 10 (see FIG. 1), and each board is positioned as shown in FIG. 8 when the side unit 10 is attached to the door 6.

A frame left LED board 907 is arranged at the upper left side of the door 6, and a frame left lower LED board 908 is arranged below that.
In addition, a front frame LED connection board 500 is disposed below the door 6 .
In addition, a button LED connection board 640 is arranged at the bottom right, and a button LED board 660 is arranged inside the performance button 13.

Next, we will explain the position of the circuit board attached to the inner frame 2. Figure 9 is a rear view of the gaming machine 1. Most of the rear side of the gaming machine 1 is protected by a transparent or semi-transparent rear cover 18.
Below this rear side, a power supply board 300 and a dispensing control board 29 are arranged in front and behind.
Also, an inner frame LED relay board 400 is attached to the lower right side when viewed from the rear side.

Figure 10 shows the positions of various devices placed on the door 6 and game board 3. To indicate the position of each device, the outlines of the game board 3 and door 6 are shown with dashed lines.

In FIG. 10, the devices provided within the side unit 10 of the door 6 are the side unit device 101, the side unit lower right movable object position detection switch 102, the side unit lower right movable object motor 103, the side unit upper right movable object motor 104, the side unit upper right movable object solenoid 105, the blower 106, and the photocouplers PC1F, PC2F, and PC3F, which are arranged in the positions shown in the figure. The photocouplers PC1F, PC2F, and PC3F are attached to the side unit lower right LED board 620.

In addition, in FIG. 10, the devices attached to the game board 3 are the lower back movable object upper position detection switch 120, the lower back movable object right position detection switch 121, the allocation position detection switch 122, the lower front movable object position detection switch 123, the lower front movable object motor 124, the lower back movable object left position detection switch 125, the lower back movable object left motor 126, the lower back movable object lower right position detection switch 127, the lower back movable object lower left position detection switch 128, the upper movable object left motor 129, the upper movable object left position detection switch 130, the left movable object motor 131, the upper movable object position detection switch 132, the upper movable object right motor 133, the left movable object position detection switch 134, and the lower back movable object right motor 135, which are each arranged at the positions shown in the figure.

7, 8, and 9 are merely a part of the boards provided in the gaming machine 1. In particular, they illustrate the main boards that are the subject of the following description.
Furthermore, the devices shown in FIG. 10 are merely a part of the devices provided in the gaming machine 1.

<5. Board connection configuration>
[5.1 Connection state of each board]

The connection configuration of each board arranged as described above will be explained, and the supply path of the power supply voltage will be mentioned.

FIG. 11 shows an example of a substrate arranged on the game board 3, the inner frame 2, and the door 6, respectively.
In this case, the boards mounted on the game board 3 are the main control board 20, the performance control board 30, the frame LED relay board 840, the LED connection board 700, the left underside of the board relay board 720, the decorative board 740, the relay board 760, the LED board 780, the LED board 790, the lower underside of the board relay board 800, and the decorative board 820.
The boards mounted on the inner frame 2 include a power supply board 300, a dispensing control board 29, and an inner frame LED relay board 400.
The boards mounted on the door 6 include a front frame LED connection board 500, a relay board 550, a top right LED board 600 of the side unit, a bottom right LED board 620 of the side unit, an upper LED board 630 of the side unit, a button LED connection board 640, and a button LED board 660.

Each of these boards is a part of the boards mounted on the gaming machine 1, and there are various types of boards mounted on the gaming board 3, inner frame 2, and door 6 in addition to those shown in the figure. This Figure 11 shows the connection system of selected boards for use in explaining the technology as an embodiment of the present invention, and does not show all the boards.

The power supply board 300 is a board that supplies DC voltage as operating power to each part based on an AC input power source.
The main control board 20, the performance control board 30, and the payout control board 29 are as described in Figure 3.

The front frame LED connection board 500 is a board that supplies operation control signals and power supply voltage to the LEDs, movable motors, solenoids, blowers, and other performance means provided on the door 6.

The side unit upper right LED board 600, the side unit lower right LED board 620, and the side unit upper LED board 630 are boards arranged inside the side unit 10, and constitute a drive control system for the modes of the LEDs and movable parts. These boards also constitute a detection system that transmits detection signals from the motor position sensors, touch sensors, and various other sensors to the performance control board 30.
As described above, the side unit 10 is attached to the door 6 as one of the decorative units, and the side unit 10 is detachable and replaceable with respect to the door 6. The side unit upper right LED board 600, the side unit lower right LED board 620, and the side unit upper LED board 630 are detachable together with the side unit 10.
When the side unit 10 is mounted and the relay board 550 and the transmission line H10 of the side unit upper right LED board 600 are connected, the electrical configuration is as shown in FIG.

The button LED board 660 constitutes the LED in the performance button 13 and its light emission drive system, and also comprises a circuit that transfers detection signals from various detection sensors.
The button LED connection board 640 relays control signals and power supply voltage to the button LED board 660, and also transfers detection signals from various sensors.

The inner frame LED relay board 400 relays signals between the frame LED relay board 840, which is connected to the performance control board 30, and the front frame LED connection board 500, and performs the necessary signal processing, as well as generating and supplying power supply voltage.
The frame LED relay board 840 relays the signal path between the inner frame LED relay board 400 and the performance control board 30.

The LED boards 780 and 790 are mounted with the LEDs in the game board 3 and drive the LEDs to emit light. The relay board 760 relays the light emission drive signal for the LEDs. The LED boards 780 and 790 and the relay board 760 are attached to the movable part.
The decorative board 740 relays and drives other LED boards.
The rear left relay board 720 performs relaying.
The decorative substrate 820 carries the LEDs.
The relay board 800 under the board performs relaying.
The LED connection board 700 performs various necessary signal processing for driving the emission of performance means such as LEDs and motors based on control signals from the performance control board 30.

These boards are electrically connected to each other by harnesses and cables formed by transmission lines H. "Transmission lines H" is a general term for the transmission lines H1, H2, ..., H31 shown in the figure.
In each transmission line H, the individual wiring paths that transmit signals, power supply voltages, etc. are also simply referred to as "lines."
A transmission line H refers to one or a set of multiple lines.
The transmission line H may take various forms, such as a flexible harness, a flexible substrate, a wire harness, etc. The transmission line H may be an integrated line of a plurality of lines, or individual lines may be bound together with a binder, tape, or the like.
Furthermore, when connectors are directly connected to each other, the terminals of the connectors become the transmission line H. In other words, even when there is no wire such as a harness, it is included in the "transmission line H".
That is, the transmission line H does not refer to a specific type or shape, but rather refers broadly to anything that forms electrical wiring between substrates or the like.

The power supply board 300 and the dispensing control board 29 are connected by a transmission line H1.
Furthermore, the power supply board 300 and the inner frame LED relay board 400 are connected by a transmission line H3.
These transmission lines H1, H3 are formed by harnesses or the like arranged within the inner frame 2.

The power supply board 300 and the performance control board 30 are connected by a transmission line H2.
The dispensing control board 29 and the main control board 20 are connected by transmission line H4.
The inner frame LED relay board 400 and the frame LED relay board 840 are connected by a transmission line H7.
These transmission lines H2, H4, H7 are formed by harnesses or the like that connect across the inner frame 2 and the game board 3.

The main control board 20 and the performance control board 30 are connected by a transmission line H5.
The performance control board 30 and the frame LED relay board 840 are connected by a transmission line H6.
The performance control board 30 and the LED connection board 700 are connected by a transmission line H20.
The LED connection board 700 and the rear left relay board 720 are connected by a transmission line H21.
The rear left relay board 720 and the decorative board 740 are connected by a transmission line H22.
The decorative substrate 740 and the relay substrate 760 are connected by a transmission line H23. The transmission line H23 may be a flexible cable for connection to the relay substrate 760 attached to the movable body accessory.
The relay board 760 and the LED board 780 are connected by a transmission line H24.
The LED board 780 and the LED board 790 are connected by a transmission line H25.
The LED connection board 700 and the underside relay board 800 are connected by a transmission line H30.
The underside relay board 800 and the decorative board 820 are connected by a transmission line H31.
These transmission lines H5, H6, H20, H21, H22, H23, H24, H25, H30, and H31 are formed by harnesses arranged within the game board 3.

The inner frame LED relay board 400 and the front frame LED connection board 500 are connected by a transmission line H8.
This transmission line H8 is formed by a harness or the like that connects between the inner frame 2 and the door 6.

The front frame LED connection board 500 and the relay board 550 are connected by a transmission line H9.
The relay board 550 and the side unit upper right LED board 600 are connected by a transmission line H10.
The side unit upper right LED board 600 and the side unit lower right LED board 620 are connected by a transmission line H11.
The side unit upper right LED board 600 and the side unit upper LED board 630 are connected by a transmission line H12.
The front frame LED connection board 500 and the button LED connection board 640 are connected by a transmission line H15.
The button LED connection board 640 and the button LED board 660 are connected by a transmission line H16.
These transmission lines H9, H10, H11, H12, H15, and H16 are formed by harnesses or the like arranged inside the door 6.

The power supply board 300 supplies power supply voltage to each part through transmission lines H1, H2, and H3.
FIG. 12 shows the power supply system inputs and outputs for the power supply board 300.
The power supply board 300 has connectors CN1A to CN7A mounted thereon.
The connectors CN5A, CN6A, and CN7A are connected to the transmission line ends of transmission lines H40, H41, and H42, which are not shown in FIG.

Hereinafter, connectors CN1A to CN7A, as well as connectors appearing in other figures, will be collectively referred to as "connector CN."
In this specification, the term "connector CN" refers to a connector terminal part provided on a substrate, and a terminal part for connector connection formed at an end of a transmission line H is called a "transmission line end."
The "connector CN" is connected to the "transmission line end." Alternatively, the "connector CN" may be directly connected to another connector CN of a corresponding shape.

A 24V AC power supply is supplied from the power plug 301 of the gaming machine 1 to the three-terminal connector CN5A via a transmission line H40 (AC-IN(A), AC-IN(B)).
Also, an FG (frame ground) path (FG) is formed via the ground terminal 302, the transmission line H40, and the connector CN5A. The ground terminal 302 is connected to the outside of the gaming machine main body, for example.

A transmission line H41 is connected to the two-terminal connector CN6A, forming an FG path (FG-1) via ground terminals 303 and 304. The ground terminals 303 and 304 are connected to, for example, the main body of the gaming machine.
A transmission line H42 is connected to the two-terminal connector CN7A, forming an FG path (FG-2) via ground terminals 305 and 306. The ground terminals 305 and 306 are connected to, for example, the main body of the gaming machine.

A transmission line H1-1 is connected to a connector CN1A having 14 terminals. A transmission line H1-2 is connected to a connector CN4A having 3 terminals. These two transmission lines H1-1 and H1-2 as harnesses or the like are shown as the transmission line H1 in the above-mentioned FIG.
A 35V DC voltage (DC35VA), a 12V DC voltage (DC12VA), and a 5V DC voltage (DC5VA) are supplied to the dispensing control board 29 via the transmission line H1-1, and a ground path (GND) is also formed.
Two systems of 24V DC voltage (DC24VA, DC24VB) are supplied to the dispensing control board 29 via transmission line H1-2, and an FG path (FG) is also formed.

A 35V DC voltage (DC35VA), a 12V DC voltage (DC12VA), and a 5V DC voltage (DC5VA) are supplied to the main control board 20 via the dispensing control board 29, and a ground path (GND) is also formed.

A transmission line H2 is connected to a connector CN2A having 20 terminals.
A 5V DC voltage (DC5VB), a 12V DC voltage (DC12VB), and a 35V DC voltage (DC35VB) are supplied to the performance control board 30 via the transmission line H2, and a ground path (GND) is also formed.

Based on the power supply via this transmission line H2, a 5 V DC voltage (DC5VB), a 12 V DC voltage (DC12VB), and a 35 V DC voltage (DC35VB) are supplied from the performance control board 30 to the LED connection board 700, and are used as operating power sources for the LED connection board 700 and each downstream board (the back-of-the-panel left relay board 720, the back-of-the-panel lower relay board 800, etc.).
On the other hand, the frame LED relay board 840 is a board that simply has relay wiring and does not require a power supply voltage, and no power supply voltage is supplied from the performance control board 30.

For the purpose of explanation, the expressions "upstream" and "downstream" are used, but in terms of data and control signals, the main control board 20 is the most upstream, followed by the performance control board 30, and the "downstream" is from the performance control board 30 toward the actual performance devices such as LEDs and motors.
With regard to the power supply voltage, power supply board 300 is the most upstream, and is considered to be "downstream" toward the actual performance device.

A transmission line H3 is connected to a six-terminal connector CN3A.
A 12V DC voltage (DC12VB) is supplied to the inner frame LED relay board 400 via a transmission line H3, and a ground path (GND) is also formed.
In other words, the inner frame LED relay board 400 is a board that is controlled by the performance control board 30 , but is configured to receive power supply voltage directly from the power supply board 300 .
Each board (such as the front frame LED connection board 500 ) provided on the door 6 downstream of the inner frame LED relay board 400 receives power supply voltage from the inner frame LED relay board 400 .

[5.2 Inner frame LED relay board 400]

The circuit configurations of some of the boards shown in Fig. 11 will be described below. First, the inner frame LED relay board 400 will be described with reference to Figs.
13 and 14 show the circuit configuration provided on the inner frame LED relay board 400 separately.

The inner frame LED relay board 400 is equipped with connectors CN1B, CN2B, and CN3B shown in FIG. 13, and connector CN4B shown in FIG. 14.

The connector CN1B is connected to an end of a transmission line H7 that connects to the frame LED relay board 840.
Although details about the frame LED relay board 840 are omitted, as described above, it is simply a board having relay wiring. Therefore, the connector CN1B essentially forms wiring between the performance control board 30 via the transmission line H7, the frame LED relay board 840, and the transmission line H6.

This connector CN1B has 28 terminals numbered from 1st pin to 28th pin, as indicated by the numbers "1" to "28".
For ease of explanation, the term "pin" of connector CN does not refer only to pin-shaped male terminals, but includes both male and female terminals, as well as so-called planar contact patterns and corresponding terminals.

Pins 1, 3, 5, 7, 8, 17, and 18 are ground terminals. Pin 2 is assigned as the clock signal S_IN_CLK, pin 4 is assigned as the load signal S_IN_LOAD, and pin 6 is assigned as the serial data signal S_IN_DATA.

The 9th pin is assigned as a terminal for a clear signal CLR_L, the 10th pin is assigned as a terminal for a clear signal CLR_M, the 11th pin is assigned as a terminal for a clock signal CLK_L, the 12th pin is assigned as a terminal for a clock signal CLK_M, the 13th pin is assigned as a terminal for a data signal DATA_L, the 14th pin is assigned as a terminal for a data signal DATA_M, the 15th pin is assigned as a terminal for an enable signal ENABLE_L, and the 16th pin is assigned as a terminal for an enable signal ENABLE_M.
The 19th pin to the 28th pin are assigned to the + and - terminals of the upper right speaker, the center right speaker, the lower right speaker, the upper left speaker, the center left speaker, and the lower speaker, respectively, which are the speakers 46.

Here, the serial data signal S_IN_DATA is serial data received from the front frame LED connection board 500 and transmitted from the inner frame LED relay board 400 to the performance control board 30.
The clock signal S_IN_CLK and the load signal S_IN_LOAD are supplied from the performance control board 30 to the inner frame LED relay board 400, and are further sent to the front frame LED connection board 500. These are used for the serial data transmission operation from the front frame LED connection board 500, which is downstream.

The clear signals CLR_L, CLR_M, the clock signals CLK_L, CLK_M, the data signals DATA_L, DATA_M, and the enable signals ENABLE_L, ENABLE_M are signals supplied from the performance control board 30 and used to control the drive of the performance devices.
For example, the data signals DATA_L and DATA_M are light emission drive signals and motor drive signals that indicate the gradation of an LED, and the clear signals CLR_L, CLR_M, etc., clock signals CLK_L, CLK_M, etc., enable signals ENABLE_L, ENABLE_M, etc. are signals for controlling the operation of an LED driver and a motor driver.
The suffix "_L" at the end of the names of the clock signals CLK_L, CLK_M, etc. indicates that the signal is primarily used to control the operation of an LED, and the suffix "_M" indicates that the signal is primarily used to control the operation of a motor.

The connector CN2B is connected to an end of a transmission line H8 that connects with the front frame LED connection board 500.
This connector CN2B has 30 terminals numbered from the 1st pin to the 30th pin, as indicated by the numbers "1" to "30".

The first and third pins are terminals for a 5V DC voltage (DC5VB).
The four pins from the 27th pin to the 30th pin are terminals for a 12V DC voltage (DC12VB).
The fifth, seventh, eighth, seventeenth and eighteenth pins are ground terminals.
The conductor points P1 and P2 on the housing of the connector CN2B are connected to ground. This is for the sake of the mounting strength of the connector. The conductor points P1 and P2 are not connected to a ground terminal inside the connector.
For all other connectors CN shown in the figures, the conductor points P1 and P2 on the housing are not connected to the ground terminal inside the connector.

The second pin is assigned as a terminal for a clock signal S_IN_CLK, the fourth pin as a terminal for a load signal S_IN_LOAD, and the sixth pin as a terminal for a serial data signal S_IN_DATA.
The 9th pin is assigned as a terminal for a clear signal CLR_L, the 10th pin is assigned as a terminal for a clear signal CLR_M, the 11th pin is assigned as a terminal for a clock signal CLK_L, the 12th pin is assigned as a terminal for a clock signal CLK_M, the 13th pin is assigned as a terminal for a data signal DATA_L, the 14th pin is assigned as a terminal for a data signal DATA_M, the 15th pin is assigned as a general-purpose output port, and the 16th pin is assigned as a terminal for an enable signal ENABLE_M.
The 19th to 26th pins are assigned to the + and - terminals of the upper right speaker, the center right speaker, the lower right speaker, the upper left speaker, and the center left speaker, respectively, of the speaker 46, as shown in the figure.

Connector CN3B is a connector for connecting to the lower speaker, which is one of the speakers 46 not shown in FIG. 11. The first and second pins of this connector CN3B, numbered "1" and "2", are assigned as the + and - terminals for the lower speaker, and are connected to the 27th and 28th pins of connector CN1B.

14 is connected to the transmission line end of the transmission line H3 that connects to the power supply board 300, and is connected to the connector CN3A of the power supply board 300 shown in FIG.
This connector CN4B has six terminals, from the first pin to the sixth pin, numbered "1" to "6," and is assigned in the same manner as the connector CN3A of the power supply board 300. That is, the first, second, and third pins are terminals to which a 12V direct current voltage (DC12VA) is supplied from the power supply board 300. The fourth, fifth, and sixth pins are ground terminals.

In this case, the inner frame LED relay board 400 is configured so that a 12V DC voltage (DC12VA) from the first, second, and third pins is input to the voltage regulator 401 via fuse F1B, and a 5V DC voltage (DC5VB) is obtained as the output of the voltage regulator 401. Capacitors C3B, C4B, C5B, and C6B are connected in parallel between the input terminal side of the voltage regulator 401 and ground. Capacitor C7B and resistor R24B are connected in parallel between the output terminal side of the voltage regulator 401 and ground.
That is, a 5V generating section 410 is formed which generates a 5V DC voltage (DC5VB) from a 12V DC voltage (DC12VA).

The 5V DC voltage (DC5VB) thus generated by the inner frame LED relay board 400 is supplied to the downstream board from the first and third pins of the connector CN2B in FIG.
The 12V DC voltage (DC12VB) supplied to the downstream board via pins 27 to 30 of connector CN2B is a voltage supplied from power supply board 300 via pins 1, 2, and 3 of connector CN4B in FIG. 14.

As shown in FIG. 13, an inner frame LED relay board 400 has buffer circuits 402 and 403 formed of ICs disposed thereon.
The buffer circuits 402 and 403 use ICs that function as inverters when the CONT terminal of the first pin is at L level and as buffers when it is at H level. In this case, the ICs function as buffers by applying an H level using a 5V DC voltage (DC5VB).
Furthermore, a 5V DC voltage (DC5VB) is applied to the VCC terminal of the 20th pin as an operating power source.

The buffer circuits 402 and 403 are Schmitt trigger buffers with eight CMOS circuits, which buffer the signals input from the second pin (A1 terminal) to the ninth pin (A8 terminal), i.e., perform signal compensation (repair of deteriorated H/L signal waveforms), and output the signals from the 18th pin (Y1 terminal) to the 11th pin (Y8 terminal), respectively.
That is, a signal input to the A1 terminal is buffered and output from the Y1 terminal, a signal input to the A2 terminal is buffered and output from the Y2 terminal, ... a signal input to the A8 terminal is buffered and output from the Y8 terminal.
Note that buffer processing refers to signal compensation processing such as signal amplification and waveform shaping, but since it is mainly targeted at pulse signals as digital data, it has more to do with waveform shaping. In the following, these processes will be referred to as "buffer processing" or "signal compensation".

The buffer circuit 402 performs signal compensation for the clock signal S_IN_CLK, the load signal S_IN_LOAD, and the serial data signal S_IN_DATA.
The clock signal S_IN_CLK from the second pin of the connector CN1B is input to the A3 terminal of the buffer circuit 402, output from the Y3 terminal, and supplied to the second pin of the connector CN2B.
The load signal S_IN_LOAD from the fourth pin of the connector CN1B is input to the A1 terminal of the buffer circuit 402, output from the Y1 terminal, and supplied to the fourth pin of the connector CN2B.
The serial data signal S_IN_DATA input from the downstream side to the sixth pin of the connector CN2B is input to the A5 terminal of the buffer circuit 402, output from the Y5 terminal, and supplied to the sixth pin of the connector CN1B.

In addition, the buffer circuit 402 has the 3rd pin (A2 terminal), 5th pin (A4 terminal), 7th pin (A6 terminal), 8th pin (A7 terminal), 9th pin (A8 terminal), 10th pin (GND terminal), and 19th pin (G terminal) connected to ground. The 11th pin (Y8 terminal), 12th pin (Y7 terminal), 13th pin (Y6 terminal), 15th pin (Y4 terminal), and 17th pin (Y2 terminal) are open.

The buffer circuit 403 performs signal compensation for the clear signals CLR_L, CLR_M, the clock signals CLK_L, CLK_M, the data signals DATA_L, DATA_M, the 15th pin for the enable signal ENABLE_L, and the 16th pin for the enable signal ENABLE_M.
Each of these signals input from the 9th pin to the 16th pin of the connector CN1B is input to one of the A1 terminal to A8 terminal of the buffer circuit 402, output from the Y1 terminal to the Y8 terminal, and supplied to the 9th pin to the 16th pin of the connector CN2B.
Furthermore, the buffer circuit 403 has a 10th pin (GND terminal) and a 19th pin (G terminal) connected to ground.

As described above, the inner frame LED relay board 400 has the following configuration.
The clock signal S_IN_CLK and load signal S_IN_LOAD supplied from the performance control board 30 (frame LED relay board 840) to connector CN1B are compensated by the buffer circuit 402 and transmitted downstream via connector CN2B.
The serial data signal S_IN_DATA supplied from the downstream front frame LED connection board 500 to the connector CN2B is compensated by the buffer circuit 402 and transmitted to the upstream side by the connector CN1B.
- The clear signals CLR_L, CLR_M, clock signals CLK_L, CLK_M, data signals DATA_L, DATA_M, and enable signals ENABLE_L, ENABLE_M supplied from the performance control board 30 (frame LED relay board 840) to connector CN1B are compensated by the buffer circuit 403 and transmitted downstream via connector CN2B.

- Relays the audio signal to the speaker and transmits it directly to the downstream board or speaker unit.
- No power supply voltage is supplied from the connector CN1B (transmission line H7) connected to the performance control board 30 (frame LED relay board 840).
A 12V DC voltage (DC12V) is received from the power supply board 300 via the connector CN4B, and is converted into a 12V DC voltage (DC12VB) that is supplied to the downstream side via the fuse F1B.
A 12V DC voltage (DC12V) is used to generate a 5V DC voltage (DC5VB) for use in the inner frame LED relay board 400 and downstream, which is used as the operating power source for the buffer circuits 402 and 403 and is also supplied to the downstream side.

In addition to the above, as shown in FIGS. 13 and 14, resistors R1B to R26B, chip resistors RA1B and RA2B, and capacitors C1B to C17B are connected to the inner frame LED relay board 400 at required locations.
For example, for the clock signal S_IN_CLK, the load signal S_IN_LOAD, the clear signals CLR_L, CLR_M, the clock signals CLK_L, CLK_M, the data signals DATA_L, DATA_M, and the enable signals ENABLE_L, ENABLE_M, resistors R25B, R26B, R8B, R9B, R10B, R11B, R12B, R13B, R14B, and R15B are inserted as damping resistors on the input side (connector CN1B side), and resistors R3B, R2B, and chip resistors RA1B and RA2B are inserted as damping resistors on the output side (connector CN2B side).
In this case, if the wiring distance between the connector and the damping resistor is LA, and the wiring distance between the damping resistor and the buffer circuits 402 and 403 is LB, then:
L A < L B
In other words, the damping resistor is arranged closer to the connector (CN1B or CN2B) than the buffer circuits 402 and 403. This improves the signal noise reduction performance.

[5.3 Front Frame LED Connection Board 500]

The front frame LED connection board 500 will be described with reference to Figures 15, 16, 17, 18, 19, and 20. These figures show the circuit configuration provided on the front frame LED connection board 500 separately.

The front frame LED connection board 500 is equipped with the following connectors: connectors CN2C, CN5C, CN6C, and CN8C in FIG. 15, connectors CN1C and CN4C in FIG. 16, connector CN3C in FIG. 17, connectors CN7C and CN9C in FIG. 18, and connector CN10C in FIG. 20.

The connector CN2C in FIG. 15 is connected to an end of a transmission line H8 that connects with the connector CN2B of the inner frame LED relay board 400 in FIG.
Therefore, this connector CN2C has 30 terminals, numbered "1" to "30," from the 1st pin to the 30th pin, and the terminal assignments are the same as those of the above-mentioned connector CN2B. Conductor points P1 and P2 on the housing of connector CN2C are also connected to ground. This is for the mounting strength of the connector, and conductor points P1 and P2 are not connected to the ground terminal inside the connector.
Although not mentioned again, conductor points P1 and P2 on the housings of connectors CN1C, CN3C, CN4C, CN7C, CN8C, CN9C, and CN10C described below are also connected to ground for mounting strength.

Connector CN5C is a connector for connecting to the center right speaker, which is one of speakers 46. The first and second pins of this connector CN3B, numbered "1" and "2", are assigned as the + and - terminals for the center right speaker, and are connected to the 20th and 22nd pins of connector CN2C.

Connector CN6C is a connector for connecting to the center left speaker, which is one of speakers 46. The first and second pins of this connector CN6B, numbered "1" and "2", are assigned as the + and - terminals for the center left speaker, and are connected to the 24th and 26th pins of connector CN2C.

Connector CN8C is a connector for connecting to the upper right and upper left speakers, which are one of the speakers 46. The first and second pins of this connector CN6B, numbered "1" and "2", are assigned as the + and - terminals for the upper right speaker, and are connected to the 19th and 21st pins of connector CN2C. The third and fourth pins, numbered "3" and "4", are assigned as the + and - terminals for the upper left speaker, and are connected to the 23rd and 25th pins of connector CN2C.

A connector CN1C in FIG. 16 is a connector that is connected to an LED board not shown in FIG.
Connector CN4C is also connected to an LED board in the handle (not shown).

The connector CN1C has 13 terminals numbered "1" through "13", from the first pin to the thirteenth pin.
The first and sixth pins are ground terminals, the second pin is a terminal for the clock signal CLK, the third pin is a terminal for a 5V DC voltage (DC5V), the fourth pin is a terminal for the data signal DATA, the fifth pin is a terminal for the reset signal RESET, and the seventh pin is a terminal for a 12V DC voltage (DC12V).

Pins 8 to 13 are input terminals for R, G, and B LED light emission drive currents (17-R6, 17-G6, 17-B6, 17-R7, 17-G7, 17B-7) supplied from an LED driver provided on a downstream LED board (not shown) to which connector CN1C is connected.
This LED light emission drive current (17-R6, 17-G6, 17-B6, 17-R7, 17-G7, 17B-7) is supplied directly to another downstream LED board in the handle (not shown) via the second pin to the seventh pin of the connector CN4C.

That is, the LED board (not shown) and the LED board inside the handle are connected to the downstream side of the front frame LED connection board 500 by connectors CN1C and CN4C, and an LED driver is mounted on the LED board. The LED driver operates using the clock signal CLK, 5V DC voltage (DC5V), data signal DATA, reset signal RESET terminal, and 12V DC voltage (DC12V) from connector CN1C to drive the LEDs on the LED board and also generate LED light emission drive currents (17-R6, 17-G6, 17-B6, 17-R7, 17-G7, 17B-7) for the LEDs on the LED board inside the handle. The LED light emission drive currents (17-R6, 17-G6, 17-B6, 17-R7, 17-G7, 17B-7) are supplied to the LEDs on the LED board inside the handle via the front frame LED connection board 500.

In addition, since these serve as the path for the LED light emission drive current (17-R6, 17-G6, 17-B6, 17-R7, 17-G7, 17B-7), Zener diodes D8C to D15C are connected to the second to seventh pins of the connector CN4C as protection circuits.
A 12V DC voltage (DC12VB) is applied to the first pin of the connector CN4C, and the power supply voltage is supplied to the LED board in the handle (not shown).

Such a configuration is used so that two LED boards are connected downstream of the front frame LED connection board 500 and an LED driver is provided on only one of them.
That is, the front frame LED connection board 500 outputs a clock signal CLK, a 5V DC voltage (DC5V), a data signal DATA, a reset signal RESET, and a 12V DC voltage (DC12V) for the operation of the LED driver, and returns the LED light emission drive current from the LED driver, relaying it and sending it to the other LED board.

In this case, only one LED driver is needed to drive the two downstream LED boards. In particular, when controlling light emission with a common LED drive control signal, it is necessary to send the LED drive control signal to only one of the LED boards, which can simplify the wiring configuration. In other words, it is not necessary to send the clock signal CLK, 5V DC voltage (DC5V), data signal DATA, reset signal RESET, and 12V DC voltage (DC12V) to both LED boards.
In addition, by relaying the LED light emission drive currents (17-R6, 17-G6, 17-B6, 17-R7, 17-G7, 17B-7), a harness for transmitting these currents between two downstream LED boards is not required.

17 is connected to an end of a transmission line H9 that connects with the downstream relay board 550.
This connector CN3C has 22 terminals numbered from 1st pin to 22nd pin, as indicated by the numbers "1" to "22".

The five pins, 1st pin, 3rd pin, 11th pin, 13th pin, and 18th pin, are used as ground terminals.
The second pin is a terminal for a 5V DC voltage (DC5VB).
The three pins, 5th pin, 7th pin, and 9th pin, are terminals for a 12V DC voltage (DC12VB).

The fourth pin is assigned as the serial data signal S_IN_DATAx, the sixth pin as the load signal S_IN_LOAD, and the eighth pin as the clock signal S_IN_CLK.

The 10th pin is assigned as the enable signal ENABLE_L, the 12th pin is the clear signal CLR_P, the 14th pin is the reset signal RESET_P, the 15th pin is the clock signal CLK_M, the 16th pin is the data signal DATA_P, the 17th pin is the reset signal RESET_M, the 19th pin is the data signal DATA_M, the 20th pin is the general-purpose drive signal 1, the 21st pin is the enable signal ENABLE_M, and the 22nd pin is the general-purpose drive signal 2.

18 is connected to a board (not shown) for detecting the cross key 15a, the enter key 15b, and the volume and light intensity buttons (not shown). This connector CN7C has nine terminals, pins 1 to 9, indicated by "1" to "9", with the first pin being a ground terminal and sense signals SENS0 to SENS7, which are detection signals for the operation of the cross key 15a, etc., being input to each of pins 2 to 9.
The sense signals SENS0 to SENS7 from the second pin to the ninth pin are pulled up by a 5V DC voltage (DC5VB) via chip resistors RA3C and RA4C.

The connector CN9C is connected to a touch sensor (not shown) provided on the firing operation handle 15. This connector CN9C has a two-terminal configuration indicated by "1" and "2", the first pin of which receives the sense signal SENS14 from the touch sensor, and the second pin of which serves as a ground terminal.
The sense signal SENS14 is pulled up by a 5V DC voltage (DC5VB) via a resistor R26C.

11. The connector CN10C in FIG. 20 is connected to an end of a transmission line H15 that connects with the button LED connection board 640 in FIG.
This connector CN10C has 20 terminals, numbered from the first pin to the twentieth pin, and labeled "1" through "20."

The five pins, 2nd pin, 4th pin, 12th pin, 13th pin, and 19th pin, are used as ground terminals.
The eighth pin is a terminal for a 5V DC voltage (DC5VB).
The sixth pin is a terminal for 12V DC voltage (DC12VB).
The fifth and seventh pins are terminals for a 12V motor drive voltage (MOT12V).

The first pin is assigned as the motor drive signal MOTφ/2, the third pin is assigned as the motor drive signal MOTφ/1, the ninth pin is assigned as the motor drive signal MOTφ2, the tenth pin is assigned as the motor drive signal DCMOT3, and the eleventh pin is assigned as the motor drive signal MOTφ1.

The 14th pin is assigned as a terminal for a clear signal CLR_L, the 16th pin is assigned as a terminal for a clock signal CLK_L, and the 18th pin is assigned as a terminal for a data signal DATA_L.
The 15th, 17th and 20th pins are terminals to which sense signals SENS8, SENS9 and SENS11, which are detection signals from the downstream side, are input.
The sense signals SENS8, SENS9, and SENS11 are pulled up by a 5V DC voltage (DC5VB) via a chip resistor RA5C.

The power supply voltage in this front frame LED connection board 500 will be described.
The front frame LED connection board 500 is equipped with, as ICs, buffer circuits 501, 502, 503, 507, and 508 which are Schmitt trigger buffers containing eight circuits similar to the buffer circuit 402 previously described with reference to FIG. 13, and buffer circuits 504, 512, and 513 which are triple buffer gates.
The power supply voltage for these components is a 5V DC voltage (DC5VB) supplied from the first pin of the connector CN2C.

In addition, the parallel/serial (hereinafter "P/S") conversion circuits 505 and 506 shown in FIG. 18 are mounted as ICs, and the power supply voltage for these is also 5 V DC (DC5VB) supplied from the first pin of the connector CN2C.

The LED driver 509 shown in Figure 19 is also mounted as an IC, and the power supply voltage for this is 12 V DC voltage (DC12VB) supplied from pins 27 to 30 of connector CN2C.

Furthermore, motor drivers 510 and 511 shown in FIG. 19 are mounted as ICs, and these use a 12V motor drive voltage (MOT12V) and a 12V direct current voltage (DC12VS) as power supply voltages.
The 12V motor drive voltage (MOT12V) is used as a power supply voltage for driving the motor, and the 12V direct current voltage (DC12VS) is used as a power supply voltage for the motor drivers 510, 511 and the like.

The 12V motor drive voltage (MOT12V) is separated from the 12V DC voltage (DC12VB). As shown in FIG. 15, a capacitor C11 is inserted between the 27th pin to the 30th pin of the connector CN2C and ground, and the anode side of a Schottky barrier diode D18C is connected to the positive electrode side of the capacitor C11. A resistor R27C, capacitors C12C and C13C, and a chip varistor 515 are connected in parallel between the cathode side of the Schottky barrier diode D18C and ground. With this configuration, the 12V motor drive voltage (MOT12V) is separated as a power supply voltage with overvoltage protection.
That is, a power supply isolation/protection circuit 520 is formed to isolate the 12V motor drive voltage (MOT12V) from the 12V direct current voltage (DC12VA).

The 12V DC voltage (DC12VS) is isolated from the 12V DC voltage (DC12VB) using a power supply isolation/protection circuit 521 consisting of a diode D19C, resistor R34C, and capacitor C21C shown in FIG. 19.

The flow of various signals in the front frame LED connection board 500 will be described below.
To connector CN2C in Figure 15, clear signals CLR_L, CLR_M, clock signals CLK_L, CLK_M, data signals DATA_L, DATA_M, a general-purpose output port signal (general-purpose signal HANYOU), and an enable signal ENABLE_M are transmitted from the inner frame LED relay board 400.
These signals are input to terminals A1 to A8 of the buffer circuit 501 and are compensated for.
It should be noted that the clear signals CLR_L, CLR_M supplied from the inner frame LED relay board 400 are shown as reset signals RESET_L, RESET_M within the front frame LED connection board 500.

The clock signal CLK_L, data signal DATA_L, and reset signal RESET_L are compensated by the buffer circuit 501, and then supplied to the buffer circuit 504 in FIG. 16 via the chip resistor RA1C. Then, after being buffered, they are output from the connector CN1C to an LED board (not shown).

The clock signal CLK_L, general-purpose signal HANYOU, data signal DATA_L, and reset signal RESET_L, which have been signal-compensated by buffer circuit 501 in FIG. 15, are supplied to the A5 terminal, A6 terminal, A7 terminal, and A8 terminal of buffer circuit 502 in FIG. 17. The signal-compensated outputs of the Y5 terminal, Y6 terminal, Y7 terminal, and Y8 terminal of buffer circuit 502 are output from connector CN3C to relay board 550 as clock signal CLK_P, enable signal ENABLE_L (from general-purpose signal HANYOU), data signal DATA_P, and reset signal RESET_P.

In other words, downstream of the relay board 550, the signals for LED control, etc. output from the upstream inner frame LED relay board 400 are compensated by the buffer circuits 501 and 502 and then transmitted.

The clock signal CLK_P is output from the connector CN3C via a constant voltage/protection circuit made up of Zener diode D5C and resistor R19C, the enable signal ENABLE_L is output from a constant voltage/protection circuit made up of Zener diode D4C and resistor R15C, the data signal DATA_P is output from a constant voltage/protection circuit made up of Zener diode D6C and resistor R20C, and the reset signal RESET_P is output from the connector CN3C via a constant voltage/protection circuit made up of Zener diode D7C and resistor R21C.

The clock signal CLK_L, data signal DATA_L, and reset signal RESET_L that have been signal compensated by the buffer circuit 501 in FIG. 15 are supplied to the buffer circuit 512 in FIG. 20. After being amplified, they are output from the connector CN10C to the button LED connection board 640 as the clock signal CLK_L, data signal DATA_L, and clear signal CLR_L (reset signal RESET_L).

Therefore, downstream of the button LED connection board 640, the signals for LED control, etc. output from the upstream inner frame LED relay board 400 are compensated by the buffer circuits 501 and 512 and then transmitted.

19. The clock signal CLK_L, the data signal DATA_L, and the general-purpose signal HANYOU_L that have been signal-compensated by the buffer circuit 501 in FIG. 15 are supplied to an LED driver 509 in FIG.
The LED driver 509 is a device that outputs a light emission drive current according to a clock signal CLK_L and a data signal DATA_L, and in this case is used mainly as a serial/parallel (S/P) conversion circuit for driving a motor.
The LED driver 509 has output terminals LEDR1, LEDG1, LEDB1...LEDR8, LEDG8, LEDB8 for light emission drive current and can output drive current for 24 systems, but in this case, seven terminals are used: output terminals LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3. As shown in the figure, the other output terminals are connected to ground.
The outputs (currents 23-R1, 23-G1, 23-B1, 23-R2, 23-G2, 23-B2, 23-R3) of the output terminals LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3 are buffered in a buffer circuit 508 and then supplied to input terminals IN1, IN2, IN3, IN4 of a motor driver 510 and input terminals IN1, IN3, IN4 of a motor driver 511.

The output terminals LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, and LEDR3 are connected to a 5V DC voltage (DC5VB) via chip resistors RA6C and RA7C to pass currents 23-R1, 23-G1, 23-B1, 23-R2, 23-G2, 23-B2, and 23-R3.

The motor driver 510 outputs motor drive signals MOT1-1, MOT1-/1, MOT1-2, and MOT1-/2 from output terminals OUT1, OUT2, OUT3, and OUT4 based on signals at input terminals IN1, IN2, IN3, and IN4.
The motor driver 511 outputs motor drive signals MOT3-1, MOT3-3, and MOT3-4 from output terminals OUT1, OUT3, and OUT4 based on signals at input terminals IN1, IN3, and IN4.

The motor drive signals MOT1-1, MOT1-/1, MOT1-2, MOT1-/2, and MOT3-1 are supplied to the connector CN10 in FIG. 20 and output to the button LED connection board 640 as the motor drive signals MOTφ1, MOTφ/1, MOTφ2, MOTφ/2, and DCMOT3 as described above.
The motor drive signals MOT3-3 and MOT3-4 are supplied to the connector CN3C in FIG. 17 and output to the relay board 550 as the above-mentioned general drive signals 1 and 2.

The above is a circuit system within the front frame LED connection board 500 that uses the clock signal CLK_L-, the data signal DATA_L-, and the general-purpose signal HANYOU_L- to generate motor drive signals for the downstream button LED connection board 640 and onwards.

The clock signal CLK_M, data signal DATA_M, enable signal ENABLE_M, and clear signal CLR_M (reset signal RESET_M) input from connector CN2C in FIG. 15 are signal compensated by buffer circuit 501, and then supplied to the A1 terminal, A3 terminal, A5 terminal, and A7 terminal of buffer circuit 503 in FIG. 17 via chip resistor RA2C. The signal-compensated outputs of the Y1 terminal, Y3 terminal, Y5 terminal, and Y7 terminal of buffer circuit 503 are then output from connector CN3C to relay board 550 as clock signal CLK_M, data signal DATA_M, enable signal ENABLE_M, and reset signal RESET_M.

Therefore, downstream of the relay board 550, the signal for motor control from the upstream inner frame LED relay board 400 is compensated by the buffer circuits 501 and 503 and then transmitted.

The clock signal CLK_M is output from the connector CN3C via a constant voltage/protection circuit made up of Zener diode D12C and resistor R22C, the enable signal ENABLE_M is output from a constant voltage/protection circuit made up of Zener diode D16C and resistor R24C, the data signal DATA_M is output from a constant voltage/protection circuit made up of Zener diode D14C and resistor R23C, and the reset signal RESET_M is output from the connector CN3C via a constant voltage/protection circuit made up of Zener diode D17C and resistor R25C.

The clock signal S_IN_CLK and the load signal S_IN_LOAD input from the connector CN2C in Fig. 15 are supplied to the A3 terminal and the A2 terminal of the buffer circuit 502 in Fig. 17. The signal-compensated outputs from the Y3 terminal and the Y2 terminal of the buffer circuit 502 are output from the connector CN3C to the relay board 550 as the clock signal S_IN_CLK and the load signal S_IN_LOAD.
Therefore, the signal for serial data transmission is compensated by the buffer circuits 501 and 502 and then transmitted downstream from the relay board 550 .

The clock signal S_IN_CLK is output from the connector CN3C via a constant voltage/protection circuit consisting of a Zener diode D3C and resistor R11C, and the load signal S_IN_LOAD is output from the connector CN3C via a constant voltage/protection circuit consisting of a Zener diode D2C and resistor R9C.

The serial data signal S_IN_DATAx input from the downstream relay board 550 via connector CN3C in FIG. 17 is supplied to the A1 terminal of the buffer circuit 502. The signal-compensated output of the Y1 terminal of the buffer circuit 502 is then input to the SI terminal (serial input terminal) of the P/S conversion circuit 505 in FIG. 18.

The P/S conversion circuit 505 and the P/S conversion circuit 506 in the figure are CMOS 8-bit shift registers, which have 8-bit parallel input/output, serial input, and serial output, and perform parallel-serial conversion of data.
When the P/S CONT terminal is low, the eight terminals Q/D1 to Q/D8 become parallel outputs, and data from the SI terminal is stored in each register at the rising edge of the CK terminal input waveform and is output to the Q/D1 to Q/D8 terminals. Also, by setting the CLR/LOAD terminal to low, each register is reset asynchronously to the CK terminal input.
When the P/S CONT terminal is high, the eight terminals Q/D1 to Q/D8 become parallel inputs, and when the CLR/LOAD terminal is low, the input data of terminals Q/D1 to Q/D8 are stored in each register asynchronously to the CK terminal input.

In this example, in the P/S conversion circuits 505 and 506, a 5V DC voltage (DC5VB) is applied to the P/S CONT terminal, which sets the P/S CONT terminal to H, and the eight terminals Q/D1 to Q/D8 are used as parallel inputs.
15 are buffered by a buffer circuit 513 and then input to P/S conversion circuits 505 and 506. That is, the clock signal S_IN_CLK is input to the CK terminal, and the load signal S_IN_LOAD is input to the CLR/LOAD terminal.

Of the parallel input terminals Q/D1 to Q/D8 of the P/S conversion circuit 505, a sense signal SENS8 is input to the Q/D1 terminal, a sense signal SENS9 to the Q/D2 terminal, a sense signal SENS11 to the Q/D4 terminal, and a sense signal SENS14 to the Q/D7 terminal.
The Q/D3 terminal, Q/D5 terminal, Q/D6 terminal, and Q/D8 terminal are connected to ground, meaning that each input is "0" (L level).
Sense signals SENS8, SENS9, and SENS11 are detection signals of a switch sensor that detects button operation and a sensor that detects the rotational position and origin position of a movable body inside the button, which are input to connector CN10C in FIG. 20 from downstream button LED connection board 640.
The sense signal SENS14 is a detection signal of the touch sensor inputted from the connector CN9C in FIG.

The P/S conversion circuit 505 converts the serial data signal S_IN_DATAx and sense signals SENS8, SENS9, SENS11, and SENS14 input as described above into serial data and outputs it as serial data signal SDT1 from the Q8C terminal. This serial data signal SDT1 is input to the SI terminal of the P/S conversion circuit 506.

At the Q/D1 terminal to Q/D8 terminal which are the parallel input terminals of the P/S conversion circuit 506, a sense signal SENS0 is input to the Q/D1 terminal, a sense signal SENS1 to the Q/D2 terminal, a sense signal SENS2 to the Q/D3 terminal, a sense signal SENS3 to the Q/D4 terminal, a sense signal SENS4 to the Q/D5 terminal, a sense signal SENS5 to the Q/D6 terminal, a sense signal SENS6 to the Q/D7 terminal, and a sense signal SENS7 to the Q/D8 terminal.
These sense signals SENS0 to SENS7 are detection signals of the cross key 15a and the like, which are input to the connector CN7C in FIG.
The sense signals SENS0 to SENS7 from the connector CN7C are compensated by a buffer circuit 507 and then input to the above-mentioned terminals of the P/S conversion circuit 506.

The P/S conversion circuit 506 converts the serial data signal SDT1 from the P/S conversion circuit 505, which is input to the SI terminal, and the sense signals SENS0 to SENS7 into serial data, and outputs it from the Q8 terminal as the serial data signal SDT2. This serial data signal SDT2 is input to the buffer circuit 513 via a filter made up of resistor R35C and capacitor C27C, and is buffered. This output is sent upstream from the connector CN2C in FIG. 15 as the serial data signal S_IN_DATA from the front frame LED connection board 500.

As described above, the front frame LED connection board 500 has the following configuration.
Figure 21 summarizes the flows of clock signals CLK_L, CLK_M, clear signals CLR_L, CLR_M (reset signals RESET_L, RESET_M), data signals DATA_L, DATA_M, general-purpose signal HANYOU, and enable signal ENABLE_M supplied from the upstream inner frame LED relay board 400 to the connector CN2C.

The clock signal CLK_L, the clear signal CLR_L (reset signal RESET_L), the data signal DATA_L, and the general-purpose signal HANYOU are transmitted to the downstream side via buffer circuits 501 and 502 by connector CN3C as a clock signal CLK_P, a reset signal RESET_P, a data signal DATA_P, and an enable signal ENABLE_L.
The clock signal CLK_L, the clear signal CLR_L (reset signal RESET_L), and the data signal DATA_L are transmitted to the downstream side as the clock signal CLK, the reset signal RESET, and the data signal DATA by the connector CN1C via the buffer circuit 504.
The clock signal CLK_L, the clear signal CLR_L (reset signal RESET_L), and the data signal DATA_L are transmitted to the downstream side as the clock signal CLK_L, the clear signal CLR_L, and the data signal DATA_L by the connector CN10C via a buffer circuit 512.
The clock signal CLK_L, the data signal DATA_L, and the general-purpose signal HANYOU are supplied to an LED driver 509 and used to generate a motor drive current.

- The clock signal CLK_M, the clear signal CLR_M (reset signal RESET_M), the data signal DATA_M, and the enable signal ENABLE_M are transmitted downstream by the connector CN3C via the buffer circuits 501 and 503 as the clock signal CLK_M, the reset signal RESET_M, the data signal DATA_M, and the enable signal ENABLE_M.

- Motor drive signals MOTφ1, MOTφ/1, MOTφ2, MOTφ/2, and DCMOT3 are generated by the LED driver 509, buffer circuit 508, and motor drivers 510 and 511, which are used as an S/P conversion circuit, and are transmitted downstream from connector CN10C.

Figure 22 also summarizes the flow of the serial data signal S_IN_DATA, the clock signal S_IN_CLK, the load signal S_IN_LOAD, and the sense signals SENS0 to SENS7, SENS8, SENS9, SENS11, and SENS14.

The clock signal S_IN_CLK and the load signal S_IN_LOAD are transmitted downstream from the connector CN3C via a buffer circuit 502.
The clock signal S_IN_CLK and the load signal S_IN_LOAD are supplied to the P/S conversion circuits 505 and 506 via a buffer circuit 513 and are used for the parallel/serial conversion process.

- The serial data signal S_IN_DATAx input to the connector CN3C from the downstream side is input to the P/S conversion circuit 505 via the buffer circuit 502, where it is converted into serial data together with the sense signals SENS8, SENS9, SENS11, and SENS14, and input to the P/S conversion circuit 506 as the serial data signal SDT1. The sense signals SENS0 to SENS7 input to the connector CN7C from the downstream side are input to the P/S conversion circuit 506 via the buffer circuit 507. In the P/S conversion circuit 506, the serial data signal SDT1 from the P/S conversion circuit 505 and the sense signals SENS0 to SENS7 are converted into serial data together, and the serial data signal SDT2 is output. This serial data signal SDT2 is transmitted to the upstream side from the connector CN2C via the buffer circuit 513 as the serial data signal S_IN_DATA from the front frame LED connection board 500.

The front frame LED connection board 500 further has the following configuration.
・Relays the audio signal to the speaker and transmits it to the speaker unit.
- The connector CN2C receives 12V DC voltage (DC12VB) and 5V DC voltage (DC5VB) as operating power sources.
・The 12V motor drive voltage (MOT12V) and 12V DC voltage (DC12VS) used to generate the motor drive signal are separated from the 12V DC voltage (DC12VB). By separating the power supplies according to application, such as the 12V DC voltage (DC12VB) for the LED and LED driver, the 12V motor drive voltage (MOT12V) for motor drive, and the 12V DC voltage (DC12VS) for the motor driver, the adverse effects of noise are prevented.
A 12V DC voltage (DC12VB) and a 5V DC voltage (DC5VB) are supplied to the downstream side as operating power supply voltages.

In addition to the above, as shown in Figures 15 to 20, in the front frame LED connection board 500, electronic elements such as resistors R1C, R2C..., chip resistors RA1C, RA2C..., capacitors C1C, C2C..., diodes (including Zener diodes and Schottky barrier diodes) D1C, D2C..., etc. are connected to required locations.
As damping resistors for signal lines such as the clear signals CLR_L, CLR_M, the clock signals CLK_L, CLK_M, the data signals DATA_L, DATA_M, the general-purpose output port signal (general-purpose signal HANYOU), and the enable signal ENABLE_M, resistors R8C, R10C, R12C, R13C, R14C, R16C, R17C, and R18C are inserted on the connector CN2C side in Fig. 15, and further chip resistors RA1C and RA2C are inserted. In other words, the waveform is shaped by inserting damping resistors near the connector CN2C and before the signal branch.
As shown in the figure, taps TP1C to TP14C are provided and are used for connection to required locations.
Although not shown, a capacitor for reducing power supply noise, etc. is appropriately disposed between the DC 5V or DC 12V power supply line and ground.

[5.4 Relay board 550]

23 shows the configuration of the relay board 550. The relay board 550 has connectors CN1D and CN2D mounted thereon.

The connector CN1D is connected to an end of a transmission line H9 that connects with the connector CN3C of the front frame LED connection board 500 in FIG.
Therefore, this connector CN1D has 22 terminals numbered "1" to "22", from the 1st pin to the 22nd pin, and the terminal assignment is the same as that of the above-mentioned connector CN3C. Conductor points P1 and P2 on the housing of connector CN1D are also connected to ground for mounting strength.

The connector CN2D is connected to an end of a transmission line H10 that connects the connector CN2D to the upper right LED board 600 of the downstream side unit.
This connector CN2D has 20 terminals, numbered from the first pin to the twentieth pin, as indicated by the numbers "1" to "20."

The four pins, the 3rd pin, the 9th pin, the 11th pin, and the 16th pin, are used as ground terminals.
The first pin is a terminal for a 5V DC voltage (DC5VB).
The two pins, the 5th pin and the 7th pin, are terminals for a 12V DC voltage (DC12VB).

The second pin is assigned as the terminal for the serial data signal S_IN_DATAx, the fourth pin is assigned as the terminal for the load signal S_IN_LOAD, and the sixth pin is assigned as the terminal for the clock signal S_IN_CLK.

The 8th pin is assigned as the enable signal ENABLE_L, the 10th pin is the clock signal CLK_P, the 12th pin is the reset signal RESET_P, the 13th pin is the clock signal CLK_M, the 14th pin is the data signal DATA_P, the 15th pin is the reset signal RESET_M, the 17th pin is the data signal DATA_M, the 18th pin is the general-purpose drive signal 1, the 19th pin is the enable signal ENABLE_M, and the 20th pin is the general-purpose drive signal 2.

In this relay board 550, the 12V DC voltage (DC12VB) assigned to the three terminals, the 5th pin, the 7th pin, and the 9th pin, of the connector CN1D is consolidated into two terminals, the 5th pin and the 7th pin, on the connector CN2D side and transferred to the downstream side.
In addition, while the connector CN1D has five ground terminals, namely the 1st pin, the 3rd pin, the 11th pin, the 13th pin, and the 18th pin, the connector CN2D has four ground terminals, namely the 3rd pin, the 9th pin, the 11th pin, and the 16th pin.
This reduces the number of terminals of the downstream connector CN2D.
The connectors CN1D and CN2D are different types of connectors. The connector CN2D has a higher rated current per pin, which allows the number of power supply terminals and ground terminals of the connector CN2D to be reduced.
Furthermore, connector CN2D is easier to insert and remove than connector CN1D, has thicker terminals, and has a larger housing.

[5.5 Side unit upper right LED board 600]

The side unit upper right LED board 600 will be described with reference to Figures 24, 25, 26, 27, 28, and 29. These figures show the circuit configuration provided on the side unit upper right LED board 600 separately.

The side unit upper right LED board 600 is equipped with the following connectors: connector CN1E in FIG. 24, connector CN7E in FIG. 25, connectors CN2E and CN3E in FIG. 26, and connectors CN4E, CN5E, and CN6E in FIG. 28.

24 is connected to an end of a transmission line H10 that connects with the connector CN2D of the relay board 550 in FIG.
Therefore, this connector CN1E has 20 terminals numbered "1" to "20", from the first pin to the twentieth pin, and the terminal assignment is the same as that of the above-mentioned connector CN2D.

The connector CN7E in Fig. 25 is connected to the sensor 101S (see Fig. 55) in the side unit device 101 shown in Fig. 10, and a sense signal SENS2X is input to the third pin. This sensor 101S is, for example, a sensor that detects the operation of the player of the side unit device 101. The sense signal SENS2X of the sensor 101S is pulled up by a 5V DC voltage (DC5V) via a resistor R64E.
A 12V DC voltage (DC12VB) is applied to the first pin as a power supply voltage on the sensor 101S side of the side unit device 101. The second pin is used as a ground terminal.

The connector CN2E in FIG. 26 is a six-terminal connector to which the transmission line end of the transmission line H12 that connects to the LED board 630 on the downstream side unit is connected.
The first to sixth pins of this connector CN2E are assigned as a ground terminal, a terminal for a clock signal CLK, a terminal for a data signal DATA, a terminal for a reset signal RESET, a ground terminal, and a terminal for a 12V DC voltage (DC12VB).

The connector CN3E is connected to an end of a transmission line H11 that connects the connector CN3E to the lower right LED board 620 of the downstream side unit.
This connector CN3E has 16 terminals, numbered from the 1st pin to the 16th pin, which are numbered from "1" to "16".

The first pin is a terminal for a 5V DC voltage (DC5VB).
The 8th and 13th pins are used as ground terminals.
The 15th pin is a terminal for a 12V motor drive voltage (MOT12V). A Zener diode D11E is connected between the 15th pin and ground as a protection circuit.

The second pin is assigned as a terminal for the clock signal CLK, the third pin is assigned as a terminal for the sense signal SENS1X, the fourth pin is assigned as a terminal for the data signal DATA, the fifth pin is assigned as a terminal for the sense signal SENS_A, the sixth pin is assigned as a terminal for the reset signal RESET, the seventh pin is assigned as a terminal for the sense signal SENS_B, and the ninth pin is assigned as a terminal for the sense signal SENS_C.
As shown in FIG. 25, the sense signal SENS1X is pulled up by a 5V DC voltage (DC5V) via a resistor R13E.
The sense signals SENS_A, SENS_B, and SENS_C are also pulled up by a 5V DC voltage (DC 5V) via resistors R29E, R27E, and R21E, respectively.

In addition, the 10th pin of the connector CN3E in FIG. 26 is assigned as a terminal for the motor drive signal MOT1-/2, the 12th pin is assigned as a terminal for the motor drive signal MOT1-/1, the 14th pin is assigned as a terminal for the motor drive signal MOT1-2, and the 16th pin is assigned as a terminal for the motor drive signal MOT1-1.
Zener diodes D10E, D12E, D13E, and D14E are connected between the 10th pin, the 12th pin, the 14th pin, and the 16th pin and the ground, respectively, as protection circuits.

The connector CN4E in FIG. 28 is connected to the upper right movable motor 104 of the side unit (see FIG. 10). The first pin of this connector CN4E is a terminal for the 12V motor drive voltage (MOT12V), and the second pin is a terminal for the vibration control signal L_VIB.

The connector CN5E is connected to the side unit upper right movable solenoid 105 (see Figure 10). The first pin of this connector CN5E is a terminal for the 12V motor drive voltage (MOT12V), and the second pin is a terminal for the solenoid control signal L_SOL_01.

The connector CN6E is connected to the blower 106 on the side unit (see Figure 10). The first pin of this connector CN6E is a terminal for the 12V motor drive voltage (MOT12V), and the second pin is a terminal for the blower control signal L_BRO.

In addition, conductor points P1 and P2 on the housings of connectors CN2E, CN3E, CN4E, CN5E, CN6E, and CN7E are connected to ground for mounting strength.

The power supply voltage in the side unit upper right LED board 600 will be described.
The side unit upper right LED board 600 is equipped with, as ICs, a buffer circuit 601 in Fig. 25, a buffer circuit 604 in Fig. 26, and a buffer circuit 607 in Fig. 28. These are eight-circuit Schmitt trigger buffers similar to the buffer circuit 402 previously described in Fig. 13.
A 5V DC voltage (DC5V) is used as the power supply voltage for these. The 5V DC voltage (DC5V) is the voltage on the positive electrode side of a capacitor C1E via a fuse F1E for a 5V DC voltage (DC5VB) supplied from a first pin of a connector CN1E in FIG. 24.

Furthermore, P/S conversion circuits 602 and 603 in FIG. 25 are mounted as ICs, and the power supply voltage for these is also 5V DC (DC5V). P/S conversion circuits 602 and 603 are ICs similar to P/S conversion circuit 505 in FIG. 18.

Furthermore, an LED driver 605 in FIG. 27 and an LED driver 606 in FIG. 28 are mounted as ICs, and a 12 V DC voltage (DC12VB) supplied from the fifth and seventh pins of the connector CN1E is used as the power supply voltage for these.
In this case, the 12V DC voltage (DC12VB) is taken out as a voltage on the positive electrode side of a capacitor C2E via the fifth and seventh pins of a connector CN1E in FIG. 24 and a fuse F2E.

Motor drivers 608 and 609 (Figure 28) are also installed as ICs, and these use a 12V motor drive voltage (MOT12V) and a 12V DC voltage (DC12VS) as their power supply voltages.

The 12V motor drive voltage (MOT12V) is separated from the 12V direct current voltage (DC12VB).
29, the anode side of a Schottky barrier diode D8E is connected to the line of a 12V direct current voltage (DC12VB). A resistor R23E, capacitors C10E and C11E, and a chip varistor 611 are connected in parallel between the cathode side of the Schottky barrier diode D8E and the ground. With this configuration, the 12V motor drive voltage (MOT12V) is separated as a power supply voltage with overvoltage protection.
As shown in the figure, the 12V DC voltage (DC12VS) is separated from the 12V DC voltage (DC12VB) by using a circuit consisting of a diode D7E, a resistor R17E, and a capacitor C8E.

The flow of various signals in the side unit upper right LED board 600 will be described below.
A load signal S_IN_LOAD, a clock signal S_IN_CLK, an enable signal ENABLE_L (reset signal RESET_M), a clock signal CLK_P, a reset signal RESET_P, and a data signal DATA_P are input to connector CN1E in FIG. 24 from relay board 550, and these signals are supplied to buffer circuit 601 in FIG. 25 via damping resistors R66E, R9E, R11E, and R12E for signal compensation.
In addition, in the signal paths of these signals, as shown in FIG. 24, protection circuits are provided including a resistor R3E and a Zener diode D2E, a resistor R6E and a Zener diode D3E, a resistor R66E and a Zener diode D15E, a resistor R9E and a Zener diode D6E, a resistor R11E and a Zener diode D5E, and a resistor R12E and a Zener diode D15E.

The clock signal CLK_P, data signal DATA_P, and reset signal RESET_P are compensated by a buffer circuit 601, and then output as a clock signal CLK_A, a data signal DATA_A, and a reset signal RESET_A, and input to a buffer circuit 604 in Fig. 26. In this case, the clock signal CLK_A is input to terminals A1 and A5, the data signal DATA_A is input to terminals A2 and A6, and the reset signal RESET_A is input to terminals A3 and A7.
The signals that have been buffered and output from the Y1 terminal, Y2 terminal, and Y3 terminal are output from the connector CN2E as the clock signal CLK, the data signal DATA, and the reset signal RESET via the damping resistors R18E, R19E, and R20E.
Furthermore, signals that have been buffered and output from the Y5 terminal, Y6 terminal, and Y7 terminal are output from the connector CN3E as the clock signal CLK, the data signal DATA, and the reset signal RESET via the damping resistors R24E, R25E, and R26E.

That is, the clock signal CLK_A, data signal DATA_A, and reset signal RESET_A shown in Fig. 26 are each branched into two systems before being input to the buffer circuit 604, and each is buffered. Then, each is output from connectors CN2E and CN3E to separate boards as the clock signal CLK, the data signal DATA, and the reset signal RESET. Therefore, the buffer circuit 604 performs buffering while branching into two systems, and appropriate buffering can be performed after each branching.
Also, the clock signal CLK, data signal DATA, and reset signal RESET output from connectors CN2E and CN3E in this way are originally the clock signal CLK_P, data signal DATA_P, and reset signal RESET_P input from connector CN1E in Fig. 24. As described above, these are buffered by buffer circuit 601 in Fig. 25, output as clock signal CLK_A, data signal DATA_A, and reset signal RESET_A, and branched into two systems at the stage of buffer circuit 604 in Fig. 26. In other words, by buffering even before branching, attenuation in the transmission path up to that point is compensated for before branching. A stable signal supply is achieved when distributing a common signal to two boards.

The clock signal CLK_A, the data signal DATA_A, and the reset signal RESET_A output from the buffer circuit 601 in FIG. 25 are also supplied to an LED driver 605 in FIG.
The LED driver 605 outputs a light emission drive current according to a clock signal CLK_A, a data signal DATA_A, and a reset signal RESET_A.
The LED driver 605 has output terminals LEDR1, LEDG1, LEDB1...LEDR8, LEDG8, LEDB8 for light emission drive current and can output drive current for 24 systems, but in this case, 14 terminals are used: output terminals LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, LEDG3, LEDB3, LEDR4, LEDG4, LEDB4, LEDR5, LEDG5. As shown in the figure, the other output terminals are connected to ground.

The output terminals LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, LEDG3, LEDB3, LEDR4, LEDG4, LEDB4, LEDR5, and LEDG5 are connected to each of the 14 LED circuits formed as the light-emitting unit 612, and pass light-emitting drive currents (25-R1, 25-G1, 25-B1...25-R5, 25-G5, 25-B5).
As shown in the figure, each LED circuit of the light-emitting unit 612 is composed of two or three LEDs (LED1, LED2, ...) connected in series and a resistor element. The LED circuits of each system are connected in parallel, and a 12 V DC voltage (DC12VB) is applied to the anode side of each.

In this configuration, the clock signal CLK_P, data signal DATA_P, and reset signal RESET_P input from the connector CN1E in Fig. 24 are buffered by a buffer circuit 601 in Fig. 25 and then branched. The clock signal CLK_A, data signal DATA_A, and reset signal RESET_A after the buffering process are supplied as one branch to an LED driver 605 in Fig. 27. The other branch is supplied to a buffer circuit 604 in Fig. 26, where it is further branched and, after buffering, is transmitted to downstream boards from connectors CN2E and CN3E.
In this case, the signal for controlling the light emission drive is buffered in the buffer circuit 601 and then branched for transmission to the LED driver and the downstream board, thereby ensuring stable transmission and making the buffer circuit configuration more efficient.

28. The clock signal CLK_A, the data signal DATA_A, and the reset signal RESET_M output from the buffer circuit 601 in FIG. 25 are supplied to an LED driver 606 in FIG.
The LED driver 606 is a device that outputs a light emission drive current according to a clock signal CLK_A, a data signal DATA_A, and a reset signal RESET_M, and in this case, it mainly functions as a serial/parallel conversion circuit for driving a motor. The LED driver 606 has output terminals LEDR1, LEDG1, LEDB1...LEDR8, LEDG8, LEDB8 for the light emission drive current, and can output drive currents for 24 systems, but in this case, seven terminals are used: output terminals LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, and LEDG3. As shown in the figure, the other output terminals are connected to ground.
The outputs (currents 30-G1, 30-B1, 30-R2, 30-G2, 30-B2, 30-R3, 30-G3) of the output terminals LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, LEDG3 are buffered in a buffer circuit 607 and then supplied to input terminals IN2, IN3, IN4 of a motor driver 608 and input terminals IN1, IN2, IN3, IN4 of a motor driver 609.

The output terminals LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, and LEDG3 are connected to a 5V DC voltage (DC5V) via resistors R60E, R61E, R62E, R56E, R57E, R58E, and R59E. This is to allow currents 30-G1, 30-B1, 30-R2, 30-G2, 30-B2, 30-R3, and 30-G3 to flow using 5V DC voltage (DC5V) as the power source.

The motor driver 608 outputs a blower control signal L_BRO, a solenoid control signal L_SOL01, and a vibration control signal L_VIB from output terminals OUT2, OUT3, and OUT4 based on the signals at input terminals IN2, IN3, and IN4. These blower control signal L_BRO, solenoid control signal L_SOL01, and vibration control signal L_VIB are supplied to connectors CN6E, CN5E, and CN4E, respectively.

The motor driver 609 outputs motor drive signals MOT1-1, MOT1-2, MOT1-/1, and MOT1-/2 from output terminals OUT1, OUT2, OUT3, and OUT4 based on signals from input terminals IN1, IN2, IN3, and IN4. These motor drive signals MOT1-1, MOT1-2, MOT1-/1, and MOT1-/2 are supplied to a connector CN3E in FIG.
Therefore, the circuit from the LED driver 605 to the motor driver 609 forms a circuit system within the side unit upper right LED board 600 that generates a motor drive signal for the downstream side unit lower right LED board 620 .

The load signal S_IN_LOAD and clock signal S_IN_CLK input from the connector CN1E in FIG. 24 are compensated in the buffer circuit 601 in FIG. 25 via damping resistors R3E and R6E, and then input to the CLR/LOAD terminal and CK terminal of each of the P/S conversion circuits 602 and 603, thereby controlling the parallel/serial conversion process.
In the P/S conversion circuits 602 and 603, when a direct current voltage of 5V (DC 5V) is applied to the P/S CONT terminal, the P/S CONT terminal is set to H, and the eight terminals Q/D1 to Q/D8 are set as parallel inputs.

At the Q/D1 terminal to Q/D8 terminal which are parallel input terminals of the P/S conversion circuit 603, a sense signal SENS_C is input to the Q/D1 terminal, a sense signal SENS_B is input to the Q/D2 terminal, a sense signal SENS_A is input to the Q/D4 terminal, a sense signal SENS1X is input to the Q/D4 terminal, and a sense signal SENS2X is input to the Q/D5 terminal.
The Q/D6, Q/D7, and Q/D8 terminals are connected to ground.
The sense signals SENS_A, SENS_B, SENS_C, and SENS1X are input from a connector CN3E. The sense signal SENS2X is input from a connector CN7E.

The P/S conversion circuit 603 converts the sense signals SENS_A, SENS_B, SENS_C, SENS1X, and SENS2X input as described above into serial data (serial data signal SDT3) and outputs it from the Q8C terminal. This serial data signal SDT3 is input to the SI terminal of the P/S conversion circuit 602.

Of the parallel input terminals Q/D1 to Q/D8 of the P/S conversion circuit 602, a direct current voltage of 5V (DC 5V) is applied to the Q/D1, Q/D2 and Q/D8 terminals, and the rest are connected to ground.
The P/S conversion circuit 602 converts the serial data signal SDT3 from the P/S conversion circuit 603 input to the SI terminal and the logic (H/L) of the Q/D1 to Q/D8 terminals together into serial data (serial data signal SDT4) and outputs it from the Q8 terminal. This serial data signal SDT4 is input to the buffer circuit 601 and buffered. This output is transmitted upstream from the connector CN1E via the damping resistor R1E in FIG. 24 as the serial data signal S_IN_DATAx from the upper right LED board 600 of the side unit.

As described above, the side unit upper right LED board 600 has the following configuration.
An enable signal ENABLE_L (reset signal RESET_M), a clock signal CLK_P, a reset signal RESET_P, and a data signal DATA_P are input, and are buffered by a buffer circuit 601. The signals after buffering are used for LED light emission, for generating a motor drive signal, or for transfer downstream.

A clock signal S_IN_CLK and a load signal S_IN_LOAD are supplied to P/S conversion circuits 602 and 603 via a buffer circuit 601 and are used for parallel/serial conversion processing.
・The various sense signals SENS_A, SENS_B, SENS_C, SENS1X, and SENS2X are all converted into serial data to generate the serial data signal S_IN_DATAx. This serial data signal S_IN_DATAx is transmitted upstream. As described above, this serial data signal S_IN_DATAx is further converted into serial data together with the sense signals SENS8, SENS9, SENS11, and SENS1 in the front frame LED connection board 500, and is transmitted to the performance control board 30 via the inner frame LED relay board 400 as the serial data signal S_IN_DATA.

Connector CN1E receives 12V DC voltage (DC12VB) and 5V DC voltage (DC5VB) as operating power sources.
The 12V motor drive voltage (MOT12V) and 12V DC voltage (DC12VS) used to generate the motor drive signal are separated from the 12V DC voltage (DC12VB).
A 12V DC voltage (DC12VB) and a 5V DC voltage (DC5VB) are supplied to the downstream side as operating power supply voltages.

In the side unit upper right LED board 600, in addition to the above-mentioned components, as shown in FIGS. 24 to 29, electronic elements such as resistors R1E, R2E..., capacitors C1E, C2E..., diodes (including Zener diodes) D1E, D2E..., etc. are connected to required locations.
As shown in the figure, taps TP1E, TP2E, . . . are provided and used for connection to required points.
Although not shown, a capacitor for reducing power supply noise, etc. is appropriately disposed between the DC 5V or DC 12V power supply line and ground.

[5.6 Side unit lower right LED board 620]

The side unit lower right LED board 620 will be described with reference to Figures 30 and 31. These figures show the circuit configuration provided on the side unit lower right LED board 620 separately.

The side unit lower right LED board 620 is equipped with connectors CN1F, CN3F, and CN4F in Figure 30 and connector CN2F in Figure 31.

The connector CN3F in FIG. 30 is connected to an end of a transmission line H11 that connects with the connector CN3E of the upper right LED board 600 of the side unit in FIG.
Therefore, this connector CN3F has 16 terminals numbered from the 1st pin to the 16th pin, with the terminals assigned in the same manner as the above-mentioned connector CN3E.

The connector CN1F is connected to the side unit lower right movable motor 103 shown in FIG.
A 12V motor drive voltage (MOT12V) is applied to pins 3 and 4. Motor drive signals MOT1-/2, MOT1-/1, MOT1-2, and MOT1-1 input from connector CN3F are output from pins 1, 2, 5, and 6.

The connector CN4F is connected to the side unit lower right movable object position detection switch 102 shown in FIG.
The first pin is a terminal for a 12 V DC voltage (DC12VB), the second pin is a terminal for ground, and the third pin is an input terminal for a sense signal SENS1X from a connected position detection switch.

The connector CN2F in FIG. 31 is connected to an LED board 625 (not shown in FIG. 11, see FIG. 55) arranged in the side unit 10. The first pin is a terminal for a 12V direct current voltage (DC12VB). The second to fifth pins are terminals for the light emission drive signal.

In addition, conductor points P1 and P2 on the housings of connectors CN1F, CN2F, CN3F, and CN4F are connected to ground for mounting strength.

The power supply voltage in the side unit lower right LED board 620 will be described.
Photocouplers PC1F, PC2F, and PC3F are mounted on the side unit lower right LED board 620.
A 5V direct current voltage (DC5V) is used as the power supply voltage for these components. The 5V direct current voltage (DC5V) is supplied from the first pin of the connector CN3F.

The side unit lower right LED board 620 is equipped with an LED driver 621 as shown in FIG. 31 as an IC, and the power supply voltage for this is a 12 V DC voltage (DC12VB) supplied from the 11th pin of the connector CN1E.
Also, the 12V motor drive voltage (MOT12V) output from the connector CN1F in FIG. 30 is supplied from the 15th pin of the connector CN3F.

The flow of various signals in the side unit lower right LED board 620 will be described.
A clock signal CLK, a data signal DATA, and a reset signal RESET are input to the connector CN3F from the side unit upper right LED board 600, and these signals are supplied to the LED driver 621 in FIG.
The LED driver 621 outputs a light emission drive current according to a clock signal CLK, a data signal DATA, and a reset signal RESET.

The LED driver 621 has output terminals LEDR1, LEDG1, LEDB1...LEDR8, LEDG8, LEDB8 for the light emission drive current and can output 24 drive currents, but in this case, 12 terminals, LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, LEDG3, LEDB3, LEDR4, LEDG4, LEDB4, are used to drive the LED emission. In addition, 4 terminals, LEDR7, LEDG7, LEDB7, LEDR8, are used to drive the LED emission of an LED board (not shown) connected to connector CN2F. As shown in the figure, the other output terminals are connected to ground.

The output terminals LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, LEDG3, LEDB3, LEDR4, LEDG4, and LEDB4 are connected to the 12 LED circuits formed as the light-emitting unit 622, respectively, and pass light-emitting drive currents (27-R1, 27-G1, 27-B1...27-R4, 27-G4, 27-B4).
As shown in the figure, each LED circuit of the light emitting unit 622 is composed of one or three LEDs connected in series and a resistor element. The LED circuits of each system are connected in parallel, and a 12V DC voltage (DC12VB) is applied to the anode side of each.
The output terminals LEDR7, LEDG7, LEDB7, and LEDR8 are connected to four systems of the light emission drive unit 623. The light emission drive unit 623 outputs four systems of light emission drive currents (27-R7, 27-G7, 27-B7, . . . 27-R8) from the connector CN2F.

Sense signals SENS_A, SENS_B, and SENS_C are obtained by photocouplers PC1F, PC2F, and PC3F in Fig. 30. These are transmitted to the upper right LED board 600 of the side unit from a connector CN3F.
In addition, the sense signal SENS1X obtained from the connector CN4F is also transmitted to the upper right LED board 600 of the side unit from the connector CN3F.
These sense signals SENS_A, SENS_B, SENS_C, and SENS1X are converted into serial data as described above.

In addition, in the side unit lower right LED board 620, as shown in Figures 30 and 31, electronic elements such as resistors R1F, R2F, . . . and capacitors C1F, C2F, .
As shown in the figure, taps TP1F, TP2F, etc. are provided and used for connection to required points.

[5.7 Side unit upper LED board 630]

The side unit LED board 630 will be described with reference to FIG.
A connector CN1T is mounted on the side unit LED board 630.
The connector CN1T is connected to an end of a transmission line H12 that connects with the connector CN2E of the upper right LED board 600 of the side unit in FIG.

Therefore, this connector CN1T has six terminals, from the first pin to the sixth pin, numbered "1" to "6", and the terminal assignment is the same as that of the above-mentioned connector CN2E.
In addition, conductor points P1 and P2 on the housing of connector CN1T are connected to ground for mounting strength.

The LED board 630 on the side unit is equipped with an LED driver 631 as an IC, and the power supply voltage for this is a 12V DC voltage (DC12VB) supplied from the sixth pin of the connector CN1T.

The flow of various signals will now be described.
A clock signal CLK, a data signal DATA, and a reset signal RESET are input to the connector CN1T from the side unit upper right LED board 600, and these signals are supplied to an LED driver 631.
The LED driver 631 outputs a light emission drive current according to a clock signal CLK, a data signal DATA, and a reset signal RESET.

The LED driver 631 has output terminals LEDR1, LEDG1, LEDB1...LEDR8, LEDG8, LEDB8 for the light emission drive current, and can output 24 drive currents. In this case, the nine output terminals LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, LEDG3, LEDB3 are used to drive the LED light emission. As shown in the figure, the other output terminals are connected to ground.

The output terminals LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, LEDG3, and LEDB3 are connected to the nine LED circuits formed as the light-emitting unit 632, respectively, and pass light-emitting drive currents (27-R1, 27-G1, 27-B1...27-R3, 27-G3, 27-B3).
As shown in the figure, each LED circuit of the light emitting unit 632 is composed of two LEDs connected in series and a resistor element. The LED circuits of each system are connected in parallel, and a 12V DC voltage (DC12VB) is applied to the anode side of each.

In addition to the above, as shown in FIG. 32, electronic elements such as resistors R1T, R2T, . . . , capacitors C1T, C2T, .
As shown in the figure, taps TP1T, TP2T, . . . are provided and used for connection to required points.

5.8 Button LED Connection Board 640

The button LED connection board 640 will be described with reference to FIG.
The button LED connection board 640 is equipped with the following connectors: CN1G, CN2G, CN3G, CN4G, CN5G, CN6G, and CN8G.

The connector CN1G is connected to an end of a transmission line H15 that connects with the connector CN10C of the front frame LED connection board 500 in FIG.
Therefore, this connector CN1E has 20 terminals numbered "1" to "20", from the first pin to the twentieth pin, and the terminal assignment is the same as that of the above-mentioned connector CN10C.

The connector CN2G is connected to an end of a transmission line H16 that connects to the button LED board 660 shown in FIG.
A 12 V DC voltage (DC12VB) is applied to the third and seventh pins as the power supply voltage for the button LED board 660. The first and sixth pins are used as ground terminals.
The second pin, the fourth pin, and the fifth pin are terminals for a clock signal CLK, a data signal DATA, and a reset signal RESET, respectively.

The connector CN3G is connected to a motor (not shown).
The motor drive signals MOTφ1, MOTφ/1, MOTφ2, and MOTφ/2 input from the connector CN1G are output from the sixth pin, second pin, fifth pin, and first pin of the connector CN3G.
Also, a 12V motor drive voltage (MOT12V) input from a connector CN1G is applied to the third and fourth pins as a 12V motor drive voltage (MOT12VA) shown in the figure.

The connector CN4G is connected to a vibration device (not shown). A 12V motor drive voltage (MOT12VA) is applied to the first pin as the power supply voltage for the vibration device, and the motor drive signal DCMOT3 input from the connector CN1G is output to the second pin as the drive signal for the vibration device. A DC motor is used for the vibration device.

The connector CN5G is connected to a push button sensor in the performance button 13.
The first pin is a terminal for a 12 V DC voltage (DC12VB), the second pin is a terminal for ground, and the third pin is an input terminal for a sense signal SENS8 from a connected push button sensor.

The connector CN6G is connected to the rotation origin sensor.
The first pin is a terminal for a 12 V DC voltage (DC12VB), and the third pin is a terminal for ground. The second pin is an input terminal for a sense signal SENS9 from the connected rotation origin sensor.

Connector CN8G is connected to a rotation effect light sensor.
The first pin is a terminal for a 12 V DC voltage (DC12VB), the third pin is a terminal for ground, and the second pin is an input terminal for a sense signal SENS11 from the connected rotation performance light sensor.

In addition, conductor points P1 and P2 on the housing of each connector CN1G, CN2G, CN3G, CN4G, CN5G, CN6G, and CN8G are connected to ground for mounting strength.

This button LED connection board 640 is equipped with a buffer circuit 641. A 5V direct current voltage (DC5V) is used as the power supply voltage for this. The 5V direct current voltage (DC5V) is supplied from the 8th pin of the connector CN1G.

The flow of various signals in the button LED connection board 640 will be described.
The clock signal CLK_L, the clear signal CLR_L, and the data signal DATA_L supplied from the upstream front frame LED connection board 500 to the connector CN1G are input to the buffer circuit 641 via the chip resistor RA1G and buffered. They are then sent to the connector CN2G via the chip resistor RA2G and transmitted to the downstream button LED board 660.
A capacitor C1G is inserted between the 5V DC voltage (DC5V) of the buffer circuit 641 and ground.

Although not shown, in the button LED connection board 640, a capacitor for reducing power supply noise, etc. is appropriately arranged between the 5V DC or 12V DC power supply line and ground.

5.9 Button LED Board 660

The button LED board 660 will be described with reference to Figures 34 and 35. These figures show the circuit configuration provided on the button LED board 660 separately.

The button LED board 660 has the connector CN1H of FIG.
The connector CN1H is connected to an end of a transmission line H16 that connects with the connector CN2G of the button LED connection board 640 in FIG.
Therefore, this connector CN1H has seven terminals, from the first pin to the seventh pin, numbered "1" to "7," and the terminal assignment is the same as that of the above-mentioned connector CN2G.
Furthermore, conductor points P1 and P2 on the housing of connector CN1H are connected to ground for mounting strength.

This button LED board 660 is supplied with a 12V DC voltage (DC12VB) as a power supply voltage input to a connector CN1H.
The button LED board 660 is equipped with an LED driver 661 in FIG. 34 and an LED driver 663 in FIG. 35 as ICs, and a 12V direct current voltage (DC12VB) is used as the power supply voltage for these.
The power supply voltage for the light emitting units 664 and 662 is also 12V DC (DC12VB).

The flow of various signals in the button LED board 660 will be described.
A clock signal CLK, a data signal DATA, and a reset signal RESET are input to the connector CN1H from the side unit upper right LED board 600, and these signals are supplied to the LED driver 661 via a chip resistor RA1H in FIG.
The LED driver 661 outputs a light emission drive current according to a clock signal CLK, a data signal DATA, and a reset signal RESET.

The LED driver 661 drives 24 systems of LED light emission using output terminals LEDR1, LEDG1, LEDB1, . . . LEDR8, LEDG8, LEDB8 of light emission drive current.
That is, the output terminals LEDR1, LEDG1, LEDB1 . . . LEDR8, LEDG8, LEDB8 are connected to the 24 LED circuits formed as the light-emitting unit 662, respectively, and pass light-emitting drive currents (19-R1, 19-G1, 19-B1 . . . 19-R8, 19-G8, 19-B8).
As shown in the figure, each LED circuit of the light emitting unit 662 is composed of two or three LEDs connected in series and a resistor element. The LED circuits of each system are connected in parallel, and a 12V DC voltage (DC12VB) is applied to the anode side of each.

The clock signal CLK, the data signal DATA, and the reset signal RESET are also supplied to an LED driver 663 in FIG.
The LED driver 663 drives six systems of LED light emission using three terminals each of light emission drive current output terminals LEDR1, LEDG1, LEDB1 . . . LEDR6, LEDG6, LEDB6.
That is, the output terminals LEDR1, LEDG1, LEDB1 . . . LEDR6, LEDG6, LEDB6 are connected to six LED circuits formed as the light emitting unit 664, respectively, and pass light emission drive currents (20-R1, 20-G1, 20-B1 . . . 20-R6, 20-G6, 20-B6).
As shown in the figure, each LED circuit of the light-emitting unit 664 is composed of two or three LEDs connected in series and a resistor element. A Zener diode is connected in parallel to each LED. The LED circuits of each system are connected in parallel, and a 12V DC voltage (DC12VB) is applied to the anode side of each.

In addition to the above, as shown in FIGS. 34 and 35 , in the side unit lower right LED board 620, electronic elements such as resistors R1H, R2H..., capacitors C1H, C2H..., diodes (including Zener diodes) D1H, D2H..., etc. are connected to required locations.
As shown in the figure, taps TP1H, TP2H, . . . are provided and used for connection to required points.

[5.10 LED connection board 700]

Next, the board arranged on the game board 3 side will be described.
First, the LED connection board 700 will be described with reference to Figures 36, 37, 38, 39, 40, and 41. These figures show the circuit configurations provided on the LED connection board 700 separately.
As shown in FIG. 11, the LED connection board 700 is a board that is connected to the performance control board 30 on the game board 3.

The LED connection board 700 is equipped with the following connectors: connector CN1J in FIG. 36, connectors CN5J and CN6J in FIG. 37, connectors CN2J, CN3J, CN4J and CN12J in FIG. 38, connector CN10J in FIG. 39, connectors CN7C and CN11J in FIG. 40, and connectors CN8J and CN9J in FIG. 41.

The connector CN1J in FIG. 36 is connected to the transmission line end of the transmission line H20 that connects to the performance control board 30 as shown in FIG.
This connector CN1J has 40 terminals, numbered from the 1st pin to the 40th pin, as indicated by the numbers "1" to "40".

The 1st pin, 2nd pin, 8th pin, 9th pin, 10th pin, 16th pin, 18th pin, 19th pin, 20th pin, 22nd pin, 29th pin, 31st pin, 32nd pin, 33rd pin, 34th pin, 39th pin, and 40th pin of the connector CN1J are connected to ground.
The fourth and sixth pins are terminals for a 5V DC voltage (DC5VB).
Pins 12, 14, 24, 26, 28, and 30 are terminals for a 12 V DC voltage (DC12VB).
The 11th, 17th, 35th, and 37th pins are unused.

The third pin is assigned as a terminal for a clock signal P_S_IN_CLK, the fifth pin as a terminal for a serial data signal P_S_IN_DATA, and the seventh pin as a terminal for a load signal P_S_IN_LOAD.
The serial data signal P_S_IN_DATA is serial data transmitted from the LED connection board 700 to the performance control board 30, and the clock signal P_S_IN_CLK and the load signal P_S_IN_LOAD are signals supplied from the performance control board 30 for transmitting the serial data signal P_S_IN_DATA.

The thirteenth pin is assigned as a terminal for a clock signal P_S_OUT_CLK, and the fifteenth pin is assigned as a terminal for a serial data signal P_S_OUT_DATA.
The serial data signal P_S_OUT_DATA is serial data transmitted from the performance control board 30 together with the clock signal P_S_OUT_CLK.

Pin 21 is assigned as a terminal for a clear signal M_S_CLR (reset signal RESET_M), pin 23 is assigned as a terminal for a clock signal M_S_OUT_CLK (clock signal CLK_M), pin 25 is assigned as a terminal for a serial data signal M_S_OUT_DATA (serial data signal DATA_M), and pin 27 is assigned as a terminal for an enable signal M_S_ENABLEP (latch signal LATCH_M).
The serial data signal M_S_OUT_DATA is serial data transmitted from the performance control board 30 together with the clock signal M_S_OUT_CLK.

In addition, conductor points P1 and P2 on the housing of connector CN1J and connectors CN2J, CN3J, CN4J, CN5J, CN6J, CN7J, CN8J, CN9J, CN10J, CN11J, and CN12J described below are connected to ground for mounting strength.

The connector CN5J in Fig. 37 is connected to a motor for a movable object (not shown). A 18V DC voltage (MOT18VA) that serves as the power supply voltage for the motor is applied to the third and fourth pins.
The first pin is assigned as a terminal for the motor drive signal MOT6-/2, the second pin is assigned as a terminal for the motor drive signal MOT6-/1, the fifth pin is assigned as a terminal for the motor drive signal MOT6-2, and the sixth pin is assigned as a terminal for the motor drive signal MOT6-1.

The connector CN6J in Fig. 37 is also connected to a motor for another movable object (not shown). A 18V DC voltage (MOT18VA) that serves as the power supply voltage for the motor is applied to the third and fourth pins.
The first pin is assigned as a terminal for the motor drive signal MOT7-/2, the second pin is assigned as a terminal for the motor drive signal MOT7-/1, the fifth pin is assigned as a terminal for the motor drive signal MOT7-2, and the sixth pin is assigned as a terminal for the motor drive signal MOT7-1.

The connector CN2J in Fig. 38 is connected to the position detection switch of the role object. A 12V DC voltage (DC12VB) is applied to the first pin as the power supply voltage for the position detection switch. The third pin is used as a ground terminal.
A sense signal SENSv0, which is a detection signal of the lower depth movable right position detection switch 121 (see FIG. 10), is input to the second pin of this connector CN2J. The sense signal SENSv0 is pulled up by a 5V DC voltage (DC5V) via a resistor R5J.

Connector CN4J is also connected to the position detection switch of the role, with the first pin being a terminal for 12 V DC voltage (DC12VB) which serves as the power supply voltage for the position detection switch, and the third pin being a ground terminal.
A sense signal SENSv1, which is a detection signal of the lower depth movable left position detection switch 125 (see FIG. 10), is input to the second pin of this connector CN4J. The sense signal SENSv1 is pulled up by a 5V DC voltage (DC5V) via a resistor R29J.

The connector CN12J is also connected to the position detection switch of the role, with the first pin being a terminal for 12 V DC voltage (DC12VB) which serves as the power supply voltage for the position detection switch, and the third pin being a ground terminal.
A sense signal SENSv9, which is a detection signal of the lower depth movable upper position detection switch 120 (see FIG. 10), is input to the second pin of this connector CN12J. The sense signal SENSv9 is pulled up by a 5V DC voltage (DC5V) via a resistor R31J.

The connector CN3J is connected to the power supply module board 904 in FIG. 7. The first, second, and fourth pins are used as terminals for the 18V DC voltage Vout, the seventh, ninth, and tenth pins are used as terminals for the 35V DC voltage (DC35V), and the fifth, sixth, and eighth pins are used as terminals for the ground.

The connector CN10J in Fig. 39 is connected to a relay board (not shown). As indicated by the numbers "1" to "32", the connector has 32 terminals, from the 1st pin to the 32nd pin. The 1st pin is a terminal to which a 12V DC voltage (DC12VB) is applied via a fuse F6J, the 2nd pin is a terminal to which a 5V DC voltage (DC5V) is applied via a fuse F9J, and the 3rd, 4th, and 5th pins are terminals to which a 12V motor drive voltage (MOT12V) is applied.
The 9th pin, the 13th pin, the 17th pin, the 21st pin, the 25th pin, the 27th pin, the 29th pin, the 30th pin, the 31st pin, and the 32nd pin are connected to ground.

The seventh pin is assigned as a terminal for the motor drive signal MOT1-/2, the eighth pin is assigned as a terminal for the motor drive signal MOT1-/1, the tenth pin is assigned as a terminal for the motor drive signal MOT1-2, and the twelfth pin is assigned as a terminal for the motor drive signal MOT1-1.
The 14th pin is assigned as a terminal for the motor drive signal MOT2-/2, the 16th pin is assigned as a terminal for the motor drive signal MOT2-/1, the 18th pin is assigned as a terminal for the motor drive signal MOT2-2, and the 20th pin is assigned as a terminal for the motor drive signal MOT2-1.
Pin 22 is assigned as a terminal for the motor drive signal MOT3-/2, pin 24 is assigned as a terminal for the motor drive signal MOT3-/1, pin 26 is assigned as a terminal for the motor drive signal MOT3-2, and pin 28 is assigned as a terminal for the motor drive signal MOT3-1.

The 7th pin is a terminal for a clock signal CLK_B, and the 11th pin is a terminal for a data signal DATA_B. The 15th pin is a terminal for a sense signal SENSv2, the 19th pin is a terminal for a sense signal SENSv3, and the 23rd pin is a terminal for a sense signal SENSv4.
The sense signal SENSv2 is, for example, a detection signal of the upper movable object position detection switch 132 in FIG.

The connector CN7J in Fig. 40 is connected to an LED board (not shown). The first pin is a terminal for a 12V DC voltage (DC12VB). The fifth and sixth pins are terminals for an 18V LED drive voltage (LED18V). The fourth, seventh, and eighth pins are connected to ground.
The second pin is a terminal for a clock signal CLK_E, and the third pin is a terminal for a data signal DATA_E.

Connector CN11J is connected to the end of the transmission line H30 that connects to the underside relay board 800 shown in Figure 11. It has a 16-terminal configuration from the 1st pin to the 16th pin, as indicated by the numbers "1" to "16".

The fourth and sixth pins are terminals to which a 12V direct current voltage (DC12VB) is applied via a fuse F10J, and the seventh and ninth pins are terminals to which a 12V motor drive voltage (MOT12V) is applied via a fuse F11J.
The 1st pin, the 15th pin, and the 16th pin are connected to ground.

The third pin is a terminal for the motor drive signal MOT4-/2, the fifth pin is a terminal for the motor drive signal MOT4-/1, the eleventh pin is a terminal for the motor drive signal MOT4-2, and the thirteenth pin is a terminal for the motor drive signal MOT4-1.
The 14th pin is a terminal for a sense signal SENSv7, which is, for example, a detection signal of the lower front movable position detection switch 123 shown in FIG.
The second pin, the eighth pin, the tenth pin, and the twelfth pin are terminals for light emission drive currents 13-B7, 13-R8, 13-G8, and 13-B8.

The connector CN9J in Fig. 41 is connected to an LED board (not shown). The first pin is a terminal for a 12V DC voltage (DC12VB). The tenth pin is a terminal for a 5V DC voltage (DC5V). The fourth and ninth pins are connected to ground.
The second pin is a terminal for a clock signal CLK_D, and the third pin is a terminal for a data signal DATA_D.
The eighth, seventh, sixth and fifth pins are terminals for light emission drive currents 13-B7, 13-R8, 13-G8 and 13-B8.
The 14th pin is a terminal for a sense signal SENSv8. The sense signal SENSv8 is, for example, a detection signal from the distribution position detection switch 122 in FIG.

Connector CN8J is connected to the end of the transmission line H21 that connects to the rear left relay board 720 shown in Figure 11. It has a 24-terminal configuration from pin 1 to pin 24, as indicated by the numbers "1" to "24".

The first to fourth pins are terminals to which an 18V motor drive voltage (MOT18VB) is applied via fuse F12J, the fifth and ninth pins are terminals to which a 12V DC voltage (DC12VB) is applied via fuse F7J, and the eleventh pin is a terminal to which a 5V DC voltage (DC5VB) is applied via fuse F8J.
The 7th, 13th, 14th, 19th, and 20th pins are connected to ground.

The 15th pin is a terminal for a clock signal CLK_C, and the 17th pin is a terminal for a data signal DATA_C.
The 6th and 8th pins are the terminals for the motor drive signal MOT5-/2, the 10th and 12th pins are the terminals for the motor drive signal MOT5-/1, the 16th and 18th pins are the terminals for the motor drive signal MOT5-2, and the 22nd and 24th pins are the terminals for the motor drive signal MOT5-1. In this case, the motor to be driven is a high torque motor and is driven by an 18V motor drive voltage (MOT18VB). Since the power consumption is high, the motor drive signals MOT5-/2, MOT5-/1, MOT5-2, and MOT5-1 each use two pins/lines.
The 21st pin is a terminal for a sense signal SENSv6, and the 23rd pin is a terminal for a sense signal SENSv5. The sense signal SENSv6 is, for example, a detection signal of the lower-rear movable object lower-left position detection switch 128 in FIG.

The power supply voltage in this LED connection board 700 will be described.
The LED connection board 700 is mounted with, as ICs, buffer circuits 703 and 704 in FIG. 36 which are Schmitt trigger buffers containing eight circuits similar to the buffer circuit 402 previously described in FIG. 13, a buffer circuit 705 in FIG. 39 which is a triple buffer gate, and buffer circuits 707 and 708 in FIG. 41.
As the power supply voltage for these components, a 5V DC voltage (DC5V) based on a 5V DC voltage (DC5VB) from a connector CN1J is used as shown in FIG.

Furthermore, P/S conversion circuits 701 and 702 in FIG. 36 are mounted as ICs, and the power supply voltage for these is also 5V DC (DC5V). 5V DC (DC5VB) is taken from the positive electrode side of capacitor C4J via connector CN1J and fuse F1J. Note that P/S conversion circuits 701 and 702 are the same IC as P/S conversion circuit 505 in FIG. 18.

The 12V DC voltage (DC12VB) output downstream from connectors CN2J, CN4J, CN7J, CN8J, CN10J, CN11J, and CN12J is taken from the positive terminal of capacitor C5J via connector CN1J and fuse F2J.

Furthermore, the LED connection board 700 is equipped with motor drivers 710 to 713 shown in FIG. 37 as ICs, and a 12V motor drive voltage (MOT12V) and a 12V direct current voltage (DC12VS) are used as the power supply voltages for these.
Furthermore, motor drivers 714, 715, and 716 are mounted, and as the power supply voltages for these, a 18V motor drive voltage (MOT18VA) and a 12V direct current voltage (DC12VS) are used.

The 12V motor drive voltage (MOT12V) is isolated from the 12V DC voltage (DC12VB) by power isolation/protection circuit 790.
36, the anode side of a Schottky barrier diode D5J is connected to pins 12, 14, 24, 26, 28, and 30 of the connector CN1J. A resistor R6J, capacitors C14J and C15J, and a chip varistor 709 are connected in parallel between the cathode side of the Schottky barrier diode D5J and the ground. With this configuration as the power supply isolation/protection circuit 790, the 12V motor drive voltage (MOT12V) is isolated as a power supply voltage with overvoltage protection.

The 12V DC voltage (DC12VS) is separated from the 12V DC voltage (DC12VB) using the circuit shown in Figure 38, which consists of a diode D1J, a resistor R1J, and a capacitor C3J.

The 18V motor drive voltage (MOT18VA), the 18V motor drive voltage (MOT18VB), and the 18V LED drive voltage (LED18V) are also separated from the 18V DC voltage Vout input from the connector CN3J as shown in FIG.
The anode side of a Schottky barrier diode D7J is connected via a fuse F3J to the first, second, and fourth pins to which an 18V DC voltage Vout is applied. A resistor R7J and capacitors C17J and C18J are connected in parallel between the cathode side of the Schottky barrier diode D7J and ground. With this configuration, an 18V motor drive voltage (MOT18VA) is obtained.
Similarly, the anode side of a Schottky barrier diode D9J is connected via a fuse F4J to the first, second, and fourth pins to which the 18V DC voltage Vout is applied. A resistor R8J and capacitors C20J and C21J are connected in parallel between the cathode side of the Schottky barrier diode D9J and ground. With this configuration, the 18V motor drive voltage (MOT18VB) is obtained.
Similarly, the anode side of a Schottky barrier diode D11J is connected via a fuse F5J to the first, second, and fourth pins to which the 18V DC voltage Vout is applied. A resistor R9J and capacitors C23J and C24J are connected in parallel between the cathode side of the Schottky barrier diode D11J and ground. With this configuration, an 18V LED drive voltage (LED 18V) is obtained.

The flow of various signals in the LED connection board 700 will be described below.
36 receives a clock signal P_S_OUT_CLK and a serial data signal P_S_OUT_DATA from the performance control board 30. These signals are used for operation control downstream of the LED connection board 700.

The clock signal P_S_OUT_CLK and the serial data signal P_S_OUT_DATA are input to the A5 terminal and the A7 terminal of the buffer circuit 703 as shown in FIG. 36 as the clock signal CLK_P and the serial data signal DATA_P, and are compensated for.
The signals are then output from terminals Y5 and Y7 of the buffer circuit 703, and input to the buffer circuit 706 in Fig. 40 for buffering as shown by the clock signal CLK_A and the serial data signal DATA_A. The signals are then transmitted from the connector CN7J to the downstream side as shown by the clock signal CLK_E and the serial data signal DATA_E.

In addition, the clock signal CLK_A and serial data signal DATA_A output from the Y5 terminal and Y7 terminal of the buffer circuit 703 are also input to the buffer circuit 705 in Figure 39 and buffered, and are transmitted downstream from the connector CN10J as the clock signal CLK_B and the serial data signal DATA_B.
The clock signal CLK_A and the serial data signal DATA_A are also input to the buffer circuit 707 in FIG. 41 for buffering, and are then transmitted downstream from the connector CN9J as the clock signal CLK_D and the serial data signal DATA_D.
Furthermore, the clock signal CLK_A and the serial data signal DATA_A are also input to the buffer circuit 708 in FIG. 41 for buffering, and are then transmitted from the connector CN8J to the downstream rear left relay board 720 as the clock signal CLK_C and the serial data signal DATA_C.

A clear signal M_S_CLR (reset signal RESET_M), a clock signal M_S_OUT_CLK (clock signal CLK_M), a serial data signal M_S_OUT_DATA (serial data signal DATA_M), and an enable signal M_S_ENABLEP (latch signal LATCH_M) are transmitted from the performance control board 30 to connector CN1J in Figure 36.
These are used for controlling the motor drive.
These signals are input to the A7, A1, A3, and A5 terminals of the buffer circuit 704 for signal compensation, and then input to the motor drivers 710 to 716 in FIG.
That is, in each of the motor drivers 710 to 716, the reset signal RESET_M is input to a RESET terminal, the latch signal LATCH_M is input to a LATCH terminal, the clock signal CLK_M is input to an SCLK terminal, and the serial data signal DATA_M is input to an SDIN terminal.

In response to these inputs, the motor drivers 710 to 713 each generate a 12V motor drive signal.
That is, the motor driver 710 generates motor drive signals MOT1-/2, MOT1-/1, MOT1-2, and MOT1-1 to be output from the connector CN10J.
The motor driver 711 generates motor drive signals MOT2-/2, MOT2-/1, MOT2-2, and MOT2-1 to be output from the connector CN10J.
The motor driver 712 generates motor drive signals MOT3-/1, MOT3-2, and MOT3-1 to be output from the connector CN10J.
The motor driver 713 generates motor drive signals MOT4-/2, MOT4-/1, MOT4-2, and MOT4-1 to be output from the connector CN11J.

Similarly, the motor drivers 714 to 716 each generate an 18V motor drive signal in response to the input of a reset signal RESET_M, a latch signal LATCH_M, a clock signal CLK_M, and a serial data signal DATA_M.
That is, the motor driver 714 generates motor drive signals MOT5-/2, MOT5-/1, MOT5-2, and MOT5-1 to be output from the connector CN8J.
The motor driver 715 generates motor drive signals MOT6-/2, MOT6-/1, MOT6-2, and MOT6-1 to be output from the connector CN5J.
The motor driver 716 generates motor drive signals MOT7-/2, MOT7-/1, MOT7-2, and MOT7-1 to be output from the connector CN6J.

A clock signal P_S_IN_CLK and a load signal P_S_IN_LOAD are transmitted from the performance control board 30 to the connector CN1J in Figure 36.
The clock signal P_S_IN_CLK and the load signal P_S_IN_LOAD are input to the A3 terminal and A2 terminal of the buffer circuit 703 and are compensated for. Then, the signals are input from the Y3 terminal and Y2 terminal of the buffer circuit 703 to the CK terminal and CLR/LOAD terminal of the P/S conversion circuits 701 and 702 via the chip resistor RA1J.
In the P/S conversion circuits 701 and 702, a 5V DC voltage (DC 5V) is applied to the P/S CONT terminal, setting the P/S CONT terminal to H, and the eight terminals Q/D1 to Q/D8 are set as parallel inputs. The P/S conversion circuits 701 and 702 perform parallel-serial conversion in response to the clock signal P_S_IN_CLK and the load signal P_S_IN_LOAD.

A sense signal SENSv8 from a connector CN9J in Fig. 41 is input to a Q/D1 terminal of the P/S conversion circuit 701. As shown in Fig. 36, this sense signal SENSv8 is pulled up by a 5V DC voltage (DC5V) via a resistor R23J.
38. The Q/D2 terminal of the P/S conversion circuit 701 receives the sense signal SENSv9 from the connector CN12J in FIG.
The input to the Q/D3 terminals through the Q/D7 terminals is set to the ground level "0" (L level), and the Q/D8 terminal is set to the 5V level "1" (H level).
The P/S conversion circuit 702 converts the above parallel inputs into serial data (serial data signal SDT5) and outputs it from the Q8C terminal. This serial data signal SDT5 is input to the SI terminal of the P/S conversion circuit 702.

Sense signals SENSv0 to SENSv7 are input to eight terminals, Q/D1 terminal to Q/D8 terminal, of the P/S conversion circuit 702. Sense signal SENSv0 is input from connector CN2J. Sense signal SENSv1 is input from connector CN4J. Sense signals SENSv2 to SENSv4 are input from connector CN10J. Sense signals SENSv5 and SENSv6 are input from connector CN8J. Sense signals SENSv5 and SENSv7 are input from connector CN11J.
The sense signals SENSv2 to SENSv7 are pulled up by a 5V DC voltage (DC5V) via resistors R24J, R2J and chip resistor RA3J, respectively.

The P/S conversion circuit 702 converts the serial data signal SDT5 from the P/S conversion circuit 701, which is input to the SI terminal, and the sense signals SENSv0 to SENSv7 into serial data (serial data signal SDT6) and outputs it from the Q8C terminal. This serial data signal SDT6 is input to the A1 terminal of the buffer circuit 703 and buffered. The Y1 output is then supplied to the third pin of the connector CN1J via the chip resistor RA1J, and is sent to the upstream performance control board 30 as the serial data signal P_S_IN_DATA from the LED connection board 700.

As described above, the LED connection board 700 has the following configuration.
The sense signals SENSv0 to SENSv9 input from the downstream side are converted into serial data, and transmitted as a serial data signal P_S_IN_DATA from the connector CN1J to the upstream side via the buffer circuit 703.
The clock signal P_S_OUT_CLK and the serial data signal P_S_OUT_DATA transmitted from the performance control board 30 are transferred downstream via a buffer circuit 703 and a buffer circuit (705, 706, 707, or 708).

- The clear signal M_S_CLR (reset signal RESET_M), clock signal M_S_OUT_CLK (clock signal CLK_M), serial data signal M_S_OUT_DATA (serial data signal DATA_M), and enable signal M_S_ENABLEP (latch signal LATCH_M) sent from the performance control board 30 are supplied to motor drivers 710-716 via buffer circuit 704, and motor drive signals (MOT1-/2, MOT1-/1, MOT1-2, MOT1-1...MOT7-/2, MOT7-/1, MOT7-2, MOT7-1) are generated and sent downstream (to the motors).

- Connector CN1J receives 12V DC voltage (DC12VB) and 5V DC voltage (DC5VB) as operating power sources.
The 18V DC voltage Vout is received through the connector CN3J and used as the operating power source for the 18V system (the operating power source for high-brightness LEDs and high-torque motors).
- 12V DC voltage (DC12VB), 5V DC voltage (DC5V), 12V motor drive voltage (MOT12V), 18V motor drive voltage (MOT18V), and 18V LED drive voltage (LED18V) are supplied to the downstream side as operating power supply voltages.

In the LED connection board 700, as shown in FIGS. 36 to 41, in addition to those mentioned above, electronic elements such as resistors R1J, R2J..., chip resistors RA1J, RA2J..., capacitors C1J, C2J..., diodes (including Zener diodes and Schottky barrier diodes) D1J, D2J..., etc. are connected to required locations.
As shown in the figure, taps TP1J, TP2J, . . . are provided and used for connection to required points.
Although not shown, a capacitor for reducing power supply noise, etc. is appropriately disposed between the DC 5V or DC 12V power supply line and ground.

[5.11 Back left relay board 720]

42 shows the configuration of the rear left relay board 720. The rear left relay board 720 has connectors CN1K and CN2K mounted thereon.

The connector CN1K is connected to an end of a transmission line H21 that connects with the connector CN8J of the LED connection board 700 in FIG.
Therefore, this connector CN1K has 24 terminals numbered from 1st pin to 24th pin, as indicated by the numbers "1" to "24", and the terminal assignment is the same as that of the above-mentioned connector CN8J.

The connector CN2K is connected to the end of the transmission line H22 which connects to the downstream decorative board 740.
This connector CN1B has 22 terminals, numbered from the first pin to the twenty-second pin, as indicated by the numbers "1" to "22."

The fourth, seventh and tenth pins are used as ground terminals.
The sixth pin is a terminal for a 5V direct current voltage (DC5V).
The 8th and 9th pins are terminals for a 12V DC voltage (DC12VB).
Pins 11, 12, 13, and 14 are terminals for an 18V motor drive voltage (MOT18VB).

The fifth pin is a terminal for a clock signal CLK_C, and the third pin is a terminal for a data signal DATA_C.
The 15th and 16th pins are terminals for the motor drive signal MOT5-/2, the 17th and 18th pins are terminals for the motor drive signal MOT5-/1, the 19th and 20th pins are terminals for the motor drive signal MOT5-2, and the 21st and 22nd pins are terminals for the motor drive signal MOT5-1.
The second pin is a terminal for a sense signal SENSv6, and the first pin is a terminal for a sense signal SENSv5.

In addition, conductor points P1 and P2 on the housings of connectors CN1K and CN2K are connected to ground for mounting strength.

In this rear left relay board 720, the ground terminals of the 7th, 13th, 14th, 19th, and 20th pins of the connector CN1K are converted into three terminals of the 4th, 7th, and 10th pins on the connector CN2K side, converting the connector from 24 terminals to 22 terminals. This reduces the number of terminals of the downstream connector CN2D.

5.12 Decorative Substrate 740

The decorative substrate 740 will be described with reference to FIG.
The decorative board 740 is mounted with connectors CN1L, CN2L, CN3L, CN4L, CN5L, and CN6L.

The connector CN1L is connected to the transmission line end of the transmission line H22 which connects with the connector CN2K of the rear left relay board 720 in FIG.
Therefore, this connector CN1L has 22 terminals numbered from the 1st pin to the 22nd pin, as indicated by the numbers "1" to "22", and the terminal assignment is the same as that of the above-mentioned connector CN2K.
The conductor points P1 and P2 on the housings of the connectors CN1K to CN6K are connected to ground for mounting strength.

The connector CN2L is connected to a position detection switch for a movable object (not shown).
The first pin is a terminal for a 12 V DC voltage (DC12VB), and the third pin is a terminal for ground. The second pin is an input terminal for a sense signal SENSv5 from a connected position detection switch.

The connector CN3L is connected to another position detection switch of a movable object (not shown).
The first pin is a terminal for a 12 V DC voltage (DC12VB), and the third pin is a terminal for ground. The second pin is an input terminal for a sense signal SENSv6 from a connected position detection switch.

Connector CN4L is connected to the end of the transmission line H23, which connects to the relay board 760 shown in FIG. 11. It has a 14-terminal configuration, from the 1st pin to the 14th pin, as indicated by the numbers "1" to "14."

The first, second and third pins are terminals to which a 12V DC voltage (DC12VB) is applied, and the twelfth, thirteenth and fourteenth pins are terminals to which a 5V DC voltage (DC5V) is applied.
The fourth pin, the fifth pin, the seventh pin, the eighth pin, the tenth pin, and the eleventh pin are connected to ground.
The sixth pin is a terminal for a clock signal CLK_C, and the ninth pin is a terminal for a data signal DATA_C.
A flexible cable (eg, a flexible flat cable) is connected to the connector CN4L as the transmission line H23. Since the rated current of a flexible cable is small, the number of power supply terminals and ground terminals is made greater than that of the connector CN1L.

The connector CN5L is connected to a motor of a movable object (not shown).
The third and fourth pins are terminals to which an 18V motor drive voltage (MOT18V) is applied.
The first pin is a terminal for the motor drive signal MOT5-/2, the second pin is a terminal for the motor drive signal MOT5-/1, the fifth pin is a terminal for the motor drive signal MOT5-2, and the sixth pin is a terminal for the motor drive signal MOT5-1.

The connector CN6L is connected to a movable LED board (not shown).
The first and second pins are terminals to which a 12V DC voltage (DC12VB) is applied.
The third pin to the twenty-fourth pin are used as light emission drive current terminals for 22 systems, namely, light emission drive currents 09-R1, 09-G1, 09-B1, . . . 09-R8, and 09-G8.

This decorative board 740 is equipped with a buffer circuit 741, which is a triple buffer gate. A 5V direct voltage (DC5V) is used as the power supply voltage for this. The 5V direct voltage (DC5V) is supplied from the sixth pin of the connector CN1L.

The LED driver 742 is also installed, and the power supply voltage for it is 12V DC voltage (DC12VB). The 12V DC voltage (DC12VB) is supplied from the 8th and 9th pins of the connector CN1L.

The 18V motor drive voltage (MOT18V) supplied downstream from connector CN5L is obtained from pins 11 to 14 of connector CN1L.

The flow of various signals in the decorative substrate 740 will be described.
The clock signal CLK_C and the data signal DATA_C supplied from the upstream rear left relay board 720 to the connector CN1L are input to the buffer circuit 741 and buffered. Then, they are sent to the connector CN4L and transmitted to the downstream relay board 760.

The clock signal CLK_C and the data signal DATA_C are also supplied to an LED driver 742 .
The LED driver 742 drives 22 systems of LED light emission using light emission drive current output terminals LEDR1, LEDG1, LEDB1, . . . LEDR7, LEDG7, LEDR8, and LEDG8.
These output terminals LEDR1, LEDG1, LEDB1... LEDR7, LEDG7, LEDR8, LEDG8 are connected to the 3rd pin to the 24th pin of the connector CN6L, and are configured to pass light emission drive current (09-R1, 09-G1, 09-B1... 09-R6, 09-G6, 09-B6) to 22 LED circuits in a movable LED board (not shown).

As described above, the decorative substrate 740 has the following configuration.
The clock signal CLK_C and the data signal DATA_C transmitted from the upstream are transferred to the downstream side via the buffer circuit 703.
The clock signal CLK and the data signal DATA are also used by the LED driver 742. The LED driver 742 drives the light emitting parts of the other LED boards to emit light.

- The connector CN1L receives 12V DC voltage (DC12VB) and 5V DC voltage (DC5V) as operating power sources.
- 12V DC voltage (DC12VB) and 18V motor drive voltage (MOT18VB) are supplied to the downstream side as operating power supply voltages.

In addition to the above, in the decorative board 740, as shown in FIG. 43, electronic elements such as resistors R1L, R2L, . . . and capacitors C1L, C2L, .
As shown in the figure, taps TP1L and TP2L are provided and are used for connection to required points.

[5.13 Relay board 760]

44 shows the configuration of the relay board 760. The relay board 760 has connectors CN1M, CN2M, and CN3M mounted thereon.

The connector CN1M is connected to the transmission line end of the transmission line H23 which connects with the connector CN4L of the decorative board 740 in FIG.
Therefore, this connector CN1M has 14 terminals numbered from the 1st pin to the 14th pin, with the terminals assigned in the same manner as the above-mentioned connector CN4L.

The connector CN2M is connected to an LED board (not shown).
The fourth and sixth pins are used as ground terminals.
The fifth pin is a terminal for a 5V direct current voltage (DC5V).
The first pin is a terminal for 12V DC voltage (DC12VB).
The second pin is a terminal for a clock signal CLK, and the third pin is a terminal for a data signal DATA.

The connector CN3M is connected to an end of a transmission line H24 that connects to the downstream LED board 780.
This connector CN1B has six terminals, numbered from the first pin to the sixth pin, as indicated by the numbers "1" to "6."
The fourth and sixth pins are used as ground terminals.
The fifth pin is a terminal for a 5V direct current voltage (DC5V).
The first pin is a terminal for 12V DC voltage (DC12VB).
The second pin is a terminal for a clock signal CLK, and the third pin is a terminal for a data signal DATA.

In addition, conductor points P1 and P2 on the housings of connectors CN1M, CN2M, and CN3M are connected to ground for mounting strength.

This relay board 760 is equipped with a buffer circuit 761, which is a Schmitt trigger buffer with eight CMOS circuits, similar to the buffer circuit 402 in FIG. 13. A 5V DC voltage (DC5V) is used as the power supply voltage for this. The 5V DC voltage (DC5V) is supplied from the 12th, 13th, and 14th pins of the connector CN1M.

The clock signal CLK_C and the data signal DATA_C supplied from the upstream decorative board 740 to the connector CN1M are input to the A1 and A2 terminals of the buffer circuit 761 and are compensated for. They are then output from the Y1 and Y2 terminals and transmitted to the downstream side as the clock signal CLK and the data signal DATA by the connector CN2M.
The clock signal CLK_C and the data signal DATA_C are also input to the A5 terminal and A6 terminal of the buffer circuit 761, where they are compensated for. Then, they are output from the Y5 terminal and Y6 terminal, and transmitted to the downstream LED board 780 as the clock signal CLK and the data signal DATA by the connector CN3M.

Therefore, the decorative board 740 buffers the clock signal CLK_C and the data signal DATA_C and then transmits them to the two downstream LED boards (the LED board 780 and an LED board not shown).

5.14 LED board 780

45 shows the configuration of the LED board 780. The LED board 780 has connectors CN1N and CN2N mounted thereon.

The connector CN1N is connected to the transmission line end of the transmission line H24 that connects with the connector CN3M of the relay board 760 in FIG.
Therefore, this connector CN1N has six terminals, from the first pin to the sixth pin, numbered "1" to "6," and the terminal assignment is the same as that of the above-mentioned connector CN3M.

The connector CN2N is connected to an LED board (not shown).
The first pin is a terminal for 12V DC voltage (DC12VB).
The fourth pin is a ground terminal.
The second pin is a terminal for a clock signal CLK, and the third pin is a terminal for a data signal DATA.

In addition, conductor points P1 and P2 on the housings of connectors CN1N and CN2N are connected to ground for mounting strength.

The LED board 780 is equipped with a buffer circuit 781, which is a triple buffer gate. A 5V DC voltage (DC5V) is used as the power supply voltage for this. The 5V DC voltage (DC5V) is supplied from the 5th pin of the connector CN1N.

An LED driver 782 is also installed, and a 12V DC voltage (DC12VB) is used as the power supply voltage for this. The 12V DC voltage (DC12VB) is supplied from the first pin of the connector CN1N.

The flow of various signals in the LED board 780 will be described.
The clock signal CLK and the data signal DATA supplied from the upstream relay board 760 to the connector CN1N are input to the buffer circuit 781 and buffered. Then, they are sent to the connector CN2N and transmitted to the downstream LED board 790.

The clock signal CLK and the data signal DATA are also supplied to an LED driver 782 .
The LED driver 782 drives 22 systems of LED light emission using output terminals LEDR1, LEDG1, LEDB1, . . . LEDR7, LEDG7, LEDB7, and LEDR8 for light emission drive current.
These output terminals LEDR1, LEDG1, LEDB1 . . . LEDR7, LEDG7, LEDB7, LEDR8 are connected to the 22 LED circuits formed as the light-emitting unit 783, respectively, and pass light-emitting drive currents (03-R1, 03-G1, 03-B1 . . . 03-G7, 03-B7, 03-R8).
As shown in the figure, each LED circuit of the light-emitting unit 783 is composed of two or three LEDs (LED1, LED2, ...) connected in series and a resistor element. The LED circuits of each system are connected in parallel, and a 12 V DC voltage (DC12VB) is applied to the anode side of each.

As described above, the LED board 780 has the following configuration.
The clock signal CLK and the data signal DATA transmitted from the upstream are transferred to the downstream side via a buffer circuit 781.
The clock signal CLK and the data signal DATA are also used by an LED driver 782 to drive the light emitting unit 783 to emit light.

- The connector CN1N receives 12V DC voltage (DC12VB) and 5V DC voltage (DC5V) as operating power sources.
- 12V DC voltage (DC12VB) is supplied to the downstream side as the operating power supply voltage.

In addition to the above, electronic elements such as resistors R1N, R2N, . . . and capacitors C1N, C2N, .
As shown in the figure, taps TP1N and TP2N are provided and are used for connection to required points.

Incidentally, the LED board 790 downstream of this LED board 780 is not shown in the drawings, but roughly speaking, it is configured by removing the buffer circuit 781 and the connector CN2N from the LED board 780. That is, the LED board 790 has an LED driver and a light emitting unit, and is configured to drive LED light emission based on the input clock signal CLK and data signal DATA.
The LED board 790 is equipped with an LED driver and an LED, but does not have a buffer circuit. Therefore, only a 12V DC voltage (DC12VB) is supplied from the connector CN2N to the LED board 790, and a 5V DC voltage (DC5V) is not supplied. In other words, the 5V DC voltage (DC5V) is supplied to the LED board 780, which is provided with a buffer circuit, based on the 5V DC voltage (DC5VB) from the performance control board 30 (see the sixth pin of the connector CN1J in FIG. 36).

[5.15 Back-of-board relay board 800]

46 shows the configuration of the board back bottom relay board 800. The board back bottom relay board 800 has connectors CN1Q, CN2Q, CN3Q, and CN4Q mounted thereon.

The connector CN1Q is connected to an end of a transmission line H30 that connects with the connector CN11J of the LED connection board 700 in FIG.
Therefore, this connector CN1Q has 16 terminals numbered from the 1st pin to the 16th pin, with the terminals assigned in the same manner as the above-mentioned connector CN11J.

Connector CN2Q is connected to a movable motor 830 (see FIG. 58).
The third and fourth pins are terminals to which a 12V motor drive voltage (MOT12V) is applied.
The first pin is a terminal for the motor drive signal MOT4-/2, the second pin is a terminal for the motor drive signal MOT4-/1, the fifth pin is a terminal for the motor drive signal MOT4-2, and the sixth pin is a terminal for the motor drive signal MOT4-1.

The connector CN3Q is connected to the end of the transmission line H31 which connects to the downstream decorative board 820.
This connector CN3Q has ten terminals, from the first pin to the tenth pin, numbered "1" to "10."
The first pin to the sixth pin are terminals for a 12V DC voltage (DC12VB).
The seventh, eighth, ninth and tenth pins are terminals for light emission drive currents 13-B7, 13-R8, 13-G8 and 13-B8.
This connector CN3Q is connected to a flexible cable (e.g., a flexible flat cable) as the transmission line H31, and has a smaller rated current, so it has a larger number of power supply terminals than other connectors. For example, the number of terminals (6) for 12V DC voltage (DC12VB) of connector CN3Q is greater than the number of terminals (2) for 12V DC voltage (DC12VB) of connector CN1Q.

The connector CN4Q is connected to a position detection switch 831 (see FIG. 58).
The first pin is a terminal for a 12 V DC voltage (DC12VB), and the second pin is a terminal for ground. The second pin serves as an input terminal for a sense signal SENSv7 from a connected position detection switch.

In addition, conductor points P1 and P2 on the housings of connectors CN1Q, CN2Q, CN3Q, and CN4Q are connected to ground for mounting strength.

In this lower relay board 800, signals and voltages supplied by connector CN1Q are distributed downstream by connectors CN2Q, CN3Q, and CN4Q.
Connector CN1Q inputs 12V DC voltage (DC12VB) through two terminals, pins 4 and 6, while connector CN3Q transmits 12V DC voltage (DC12VB) downstream through six terminals, pins 1 to 6. As a result, the number of terminals downstream (total number of terminals of connectors CN2Q, CN3Q, and CN4Q) is greater than the number of terminals upstream (number of terminals of connector CN1Q).

5.16 Decorative Substrate 820

The decorative substrate 820 will be described with reference to FIG.
A connector CN1S is mounted on the decorative substrate 820.
The connector CN1S is connected to the transmission line end of the transmission line H31 which connects with the connector CN3Q of the lower relay board 800 in FIG.
Therefore, this connector CN1S has ten terminals, from the first pin to the tenth pin, numbered "1" to "10", and the terminal assignment is the same as that of the above-mentioned connector CN3Q.

The decorative board 820 is provided with a light-emitting section 821 equipped with four LED circuits, which are driven to emit light by light-emitting drive currents 13-B7, 13-R8, 13-G8, and 13-B8 via the connector CN1S. A 12V DC voltage (DC12VB) is applied to the anode side of the LED of the light-emitting section 821 via the connector CN1S.
This decorative substrate 820 is disposed inside a movable body (not shown) and serves as a substrate for emitting LED light from the movable body portion.

<6. Explanation of noteworthy configuration>

Below, we will explain the noteworthy configurations of the gaming machine 1 that have been explained so far.

6.1 Serial Data Signal Between Inner Frame 2 and Door 6

The gaming machine 1 of the embodiment has the following (configuration A1-1).
(Configuration A1-1)
The gaming machine 1 comprises an inner frame 2 (frame member), a door 6 (door member) that is capable of being opened and closed relative to the inner frame 2, a number of detection means attached to the door 6, and a first board attached to the door 6, and the first board is configured to convert each detection signal of the number of detection means into a serial data signal and transmit it to another board.

In the case of this (Configuration A1-1) concept, examples equivalent to the first board include the front frame LED connection board 500, the side unit upper right LED board 600, and the LED connection board 700.
The detection signals are the sense signals SENS0 to SENS14, the sense signals SENS_A, SENS_B, SENS_C, the sense signals SENSv0 to SENSv9, etc., and therefore the multiple detection means are the devices that generate these sense signals, specifically, switches such as position detection switches, operation means for performance such as the performance button 13, the cross key 15a, the decision button 15b, sensors such as touch sensors, etc.

The first substrate converts a plurality of detection signals from various detection means such as switches, buttons, sensors, etc. into a serial data signal and outputs the serial data signal, thereby making it possible to reduce the number of wirings for sense signals.
This also makes it possible to prevent the number of wirings from becoming huge even if a large number of sensors, switches, etc. are provided on the door 6. In other words, it is possible to avoid complicating the wiring configuration while arranging a wealth of presentation means and detection means on the door 6 closest to the player.

A specific example will be given below. The front frame LED connection board 500 shown in Figures 15 to 22 converts data into serial data using P/S conversion circuits 505 and 506, as explained mainly in Figures 18 and 22. The resulting serial data signal S_IN_DATA is then transmitted to the inner frame LED relay board 400 via transmission line H8.
This makes it possible to reduce the number of wires in the transmission line H8. In particular, the front frame LED connection board 500 combines the serial data signal and the sense signals SENS8, SENS9, SENS11, and SENS14 from the side unit upper right LED board 600, and further combines the sense signals SENS0 to SENS7 into serial data, which significantly reduces the number of wires.

24 to 29 converts the sense signals SENS_A, SENS_B, SENS_C, SENS1X, and SENS2X into serial data using P/S conversion circuits 602 and 603 in Fig. 25. The resulting serial data signal S_IN_DATAx is sent to the relay board 550 via the transmission line H10, and is then transmitted to the front frame LED connection board 500 via the transmission line H9.
This allows the number of wires in the transmission lines H9 and H10 to be reduced.

Also, the LED connection board 700 shown in Figures 36 to 41 converts the sense signals SENSv0 to SENSv9 into serial data using the P/S conversion circuits 701 and 702 in Figure 36. The resulting serial data signal P_S_IN_DATA is then transmitted to the performance control board 30 via the transmission line H20.
This allows the number of wires in the transmission line H20 to be reduced.

In addition to the configuration A1-1, the gaming machine 1 of the embodiment also has the following configuration A1-2.
(Configuration A1-2)
The other board that transmits the serial data signal is a board attached to the inner frame 2 (frame member).

In the case of this (configuration A1-2) concept, an example of the first board is the front frame LED connection board 500, and the other board is the inner frame LED relay board 400.
The front frame LED connection board 500 and the inner frame LED relay board 400 are electrically connected by a transmission line H8 when the door 6 is open as shown in FIG.
In this case, by the front frame LED connection board 500 converting the signals into serial data as described above, a large amount of detection signals can be transmitted with a small number of wires in the harness (transmission line H8) that connects the wiring of the opening and closing part of the door 6. This makes it possible to avoid excessive wiring in the moving part. Furthermore, by reducing the number of wires, it becomes easy to improve the flexibility of the harness and improve its durability and reliability, making it easier to realize suitable wiring in the moving part.

The gaming machine 1 of the embodiment has the following (configuration A2-1).
(Configuration A2-1)
The gaming machine 1 comprises an inner frame 2 (frame member), a door 6 (door member) that is capable of being opened and closed relative to the inner frame 2, a plurality of first detection means attached to the door 6, a first board attached to the door 6, and a second board attached to the door 6 below the first board, and the first board is configured to convert each detection signal of the plurality of detection means into a serial data signal and transmit it to the second board.
The plurality of first detection means and the first substrate are attached, for example, to the upper region of the door 6 .

In the case of the concept of this (Configuration A2-1), an example corresponding to the first substrate and the second substrate can be considered as follows.
First board: Side unit upper right LED board 600
Second board: Front frame LED connection board 500
It should be noted that "transmitting toward the second board" includes both transmitting directly to the second board and transmitting to the second board via another board.

Another example of the first detection means is a detection means such as a sensor that generates sense signals SENS1X, SENS2X, SENS_A, SENS_B, and SENS_C. These detection means are disposed in the upper region of the door 6. The upper region of the door 6 refers to the range in the vertical direction of the door 6 that is above the bottom line UL of the game board 3 shown in FIG. 10, for example.

The sense signals SENS_A, SENS_B, SENS_C are detection signals obtained by photocouplers PC1F, PC2F, PC3F arranged on the side unit lower right LED board 620 in Fig. 30. The sense signals SENS_A, SENS_B, SENS_C are input from a connector CN3E to a connector CN3E of the side unit upper right LED board 600 in Fig. 26.
FIG. 10 shows photocouplers PC1F, PC2F, and PC3F, which are used as sensors for determining the operating state of a movable object moved by the movable object motor 103 at the lower right of the side unit.

The sense signal SENS1X is a detection signal generated by the side unit lower right movable position detection switch 102 shown in FIG. 10. This sense signal SENS1X is input from the connector CN3E via the connectors CN4F and CN3F in FIG. 30 to the connector CN3E of the side unit upper right LED board 600 in FIG. 26.

The sense signal SENS2X is input to the side unit upper right LED board 600 from the connector CN7E in FIG. 25. The connector CN7E is connected to the sensor of the side unit device 101 shown in FIG. 10.

The detection means (photocouplers PC1F, PC2F, PC3F, side unit lower right movable position detection switch 102, sensor of side unit device 101) that generate these sense signals SENS1X, SENS2X, SENS_A, SENS_B, SENS_C are all located at the top of the door (above the bottom line UL).

The side unit upper right LED board 600, which is an example of a board equivalent to the first board, is configured to aggregate sense signals SENS1X, SENS2X, SENS_A, SENS_B, and SENS_C from the detection means arranged in the upper region of the door 6, convert them into serial data, and transmit them via the relay board 550 to the front frame LED connection board 500, which is equivalent to the second board.

By converting multiple sense signals SENS1X, SENS2X, SENS_A, SENS_B, and SENS_C that are located close to each other in this way into serial data, multiple detection signals from various detection means such as sensors, switches, and buttons located on the top of the door 6 can be efficiently converted into serial data signals, improving the wiring efficiency for detection signals from various locations and reducing the number and length of wiring.

In the configuration with the relay board 550 as shown in FIG. 11, the side unit upper right LED board 600 transmits the serial data signal S_IN_DATAx to the front frame LED connection board 500 via the relay board 550, but of course it may also be configured so that the signal is transmitted directly from the side unit upper right LED board 600 to the front frame LED connection board 500.

Furthermore, the "top of the door 6" is not defined as being above the bottom line UL described above, but rather, for example, may mean above the center line of the door 6 in the vertical direction, and in this case, a configuration can be considered in which the detection signals from multiple detection means at the top of the door 6 are collected together and converted into serial data on a board at the top.
Furthermore, the "left part of the door 6" may mean the part to the left of the center line in the left-right direction of the door 6, and in this case, a configuration may be considered in which the detection signals from the multiple detection means on the left part of the door 6 are collected together and converted into serial data on a board on the left part.
Furthermore, the "right side of the door 6" may mean the part to the right of the center line in the left-right direction of the door 6, and in this case, a configuration may be considered in which the detection signals of the multiple detection means on the right side of the door 6 are collected together and converted into serial data on a board on the right side.

In addition to (Configuration A2-1), the gaming machine 1 of the embodiment has the following (Configuration A2-2).
(Configuration A2-2)
The gaming machine 1 comprises a third board attached to an inner frame 2 (frame member) and one or more second detection means attached to a door 6 (door member) below the first detection means, and the second board is configured to convert the detection signal of the second detection means and the serial data signal from the first board together into a serial data signal and transmit it to the third board.

in this case,
First board: Side unit upper right LED board 600
Second board: Front frame LED connection board 500
Third board: inner frame LED relay board 400
It can be thought that:
In other words, in addition to the side unit upper right LED board 600, which corresponds to the first board, performing serialization, the front frame LED connection board 500, which corresponds to the second board, also performs serialization and transmits it to the inner frame LED relay board 400.

An example of the second detection means is a detection means such as a switch that generates the sense signals SENS0 to SENS7, SENS8, SENS9, SENS11, and SENS14.
These detection means are arranged below the detection means generating the above-mentioned sense signals SENS1X, SENS2X, SENS_A, SENS_B, SENS_C.

The sense signals SENS0 to SENS7 are detection signals generated by detection means such as operation detection switches such as the cross key 15a and the decision button 15b. The sense signals SENS0 to SENS7 are input to the front frame LED connection board 500 from the connector CN7C in FIG. 18.

The sense signals SENS8, SENS9, and SENS11 are input from the button LED connection board 640 to the front frame LED connection board 500.
The sense signal SENS8 is a detection signal generated, for example, by a push button sensor in the performance button 13.
The sense signal SENS9 is a detection signal generated, for example, by a rotation origin sensor in the performance button 13.
The sense signal SENS11 is a detection signal generated, for example, by a rotation effect light sensor in the effect button 13.

The sense signal SENS14 is a detection signal generated by a touch sensor (not shown) provided on the firing operation handle 15 and input to the front frame LED connection board 500 via connector CN9C.

The front frame LED connection board 500 converts these sense signals SENS0 to SENS7, SENS8, SENS9, SENS11, and SENS14 into serial data together with the serial data signal S_IN_DATAx from the side unit upper right LED board 600 by the P/S conversion circuits 505 and 506 in Fig. 18. Then, the serial data signal S_IN_DATA from the front frame LED connection board 500 is output to the performance control board 30.
Therefore, multiple detection signals from various detection means such as sensors, switches, buttons, etc. present in the upper area of the door are collected by the side unit upper right LED board 600, and the detection signals from the detection means below these are collected by the front frame LED connection board 500, which is positioned below the side unit upper right LED board 600.

By converting the signals detected by the detectors at the top and bottom of the door into serial data in stages in this way, it is possible to efficiently convert the signals detected by the detectors at the top and bottom of the door into serial data, improving the efficiency of wiring for the detection signals from each location and reducing the number of wires and the length of the wires.
This also makes it possible to transmit a large amount of detection signals using a small number of wires in the harness (transmission line H8) that connects the wiring of the door opening and closing parts.
This makes it possible to improve the reliability of the wiring in the movable portion even when a large number of detection means are mounted on the door 6.

In this example, multiple detection means such as switches that generate sense signals SENS0 to SENS7, SENS8, SENS9, SENS11, and SENS14 are given as examples of the second detection means, but even if there is only one second detection means (configuration A2-2), it is still useful.
For example, the front frame LED connection board 500 could be configured to combine one sense signal with the serial data signal S_IN_DATAx from the side unit upper right LED board 600 to convert it into serial data, and output it as the serial data signal S_IN_DATA to the performance control board 30.

In addition to the (configuration A2-1) or (configuration A2-2), the gaming machine 1 of the embodiment has the following (configuration A2-3).
(Configuration A2-3)
The second board includes a first buffer circuit that performs buffering processing on the serial data signal from the first board, a conversion means that converts the serial data signal output from the first buffer circuit and a detection signal of the second detection means together into a serial data signal, a second buffer circuit that performs buffering processing on the serial data signal obtained by the conversion means, and an output means that transmits the serial data signal output from the second buffer circuit to the third board.

An example corresponding to the first buffer circuit, the second buffer circuit, the output means, and the conversion means can be considered as follows.
First buffer circuit: the buffer circuit 502 shown in FIG. 17 and FIG. 22
Second buffer circuit: the buffer circuit 513 shown in FIGS.
Output means: Connector CN2C shown in FIG. 15
Conversion means: A circuit portion including a P/S conversion circuit 505 and a P/S conversion circuit 506 shown in FIG.

In this case, signal compensation for attenuation of the transmitted serial data signal S_IN_DATAx can be performed by the buffer circuit 502, improving the stability of the serial data signal S_IN_DATAx from downstream. In this state, the signals can be collectively converted into serial data by the P/S conversion circuits 505 and 506. Furthermore, by performing buffering in the buffer circuit 513, signal compensation for the transmission of the serial data signal S_IN_DATA can be performed.
As a result of the above, stable data can be secured before being converted into serial data, and the signal quality of the serial data sent to the performance control board 30 can be maintained.

The gaming machine 1 of the embodiment has the following (configuration A3-1).
(Configuration A3-1)
The gaming machine 1 comprises an inner frame 2 (frame member), a door 6 (door member) that is capable of being opened and closed relative to the inner frame 2, a decorative unit attached to the door 6, a plurality of first detection means attached to the decorative unit, a first board attached to the decorative unit, and a second board attached to a portion of the door 6 outside the decorative unit, and the first board is configured to convert each detection signal of the plurality of first detection means into a serial data signal and transmit it to the second board.
The decorative unit is replaceably attached to, for example, the door 6.

In the case of this (Configuration A3-1) concept, the side unit 10 can be given as an example equivalent to the decorative unit.
An example of the first board is the side unit upper right LED board 600, and an example of the second board is the front frame LED connection board 500.
The front frame LED connection board 500 is provided on the door 6, but not within the side unit 10.
The side unit upper right LED board 600, which is the first board, transmits the serial data signal S_IN_DATAx to the front frame LED connection board 500, which is the second board (via the relay board 550). Of course, a configuration in which the signal is transmitted directly without the relay board 550 being present may also be used.

The first detection means corresponds to a detection means that generates a plurality of detection signals SENS_A, SENS_B, SENS_C, SENS1X, and SENS2X and is attached to the side unit 10.
The detection means for generating the sense signals SENS_A, SENS_B, and SENS_C are the photocouplers PC1F, PC2F, and PC3F shown in FIGS.
The detection means for generating the sense signal SENS1X is the side unit lower right movable object position detection switch 102 (see FIG. 10) connected to the connector CN4F in FIG.
The detection means for generating the sense signal SENS2X is the side unit device 101 (see Figure 10) connected to the connector CN7E in Figure 25. These photocouplers PC1F, PC2F, PC3F, the side unit lower right movable object position detection switch 102, and the side unit device 101 are provided within the side unit 10.

In the case where the side unit 10 is replaceable with respect to the door 6, a circuit board and a sensor, switch, button, etc. as detection means are also provided within the side unit 10, and signal transmission is performed between the circuit board on the door 6 side.
In this case, the side unit upper right LED board 600 (first board) disposed in the side unit 10 converts a plurality of sense signals SENS_A, SENS_B, SENS_C, SENS1X, SENS2X from various first detection means such as switches, buttons, and sensors of the side unit 10 into a serial data signal S_IN_DATAx, and outputs it to the front frame LED connection board 500 of the door 6 via the relay board 550. This makes it possible to effectively reduce the number of wires in the harness as the transmission lines H10 and H9. In particular, since the transmission line H9 is a harness for a portion that is separated when the side unit 10 is replaced, it is desirable in terms of configuration to reduce the number of wires and simplify the wiring.
This also makes it possible to prevent the number of wires from becoming huge even if a large number of sensors, switches, etc. are provided in the side unit 10. Even when the side unit 10 is configured to perform performance operations and various corresponding detection operations, the number of wires can be prevented from becoming excessive.

The decorative unit provided on the door 6 is not limited to the side unit 10, but also includes units such as the performance button 13. In other words, anything that is provided on the door 6, is replaceable with respect to the door 6, and performs decoration or performance operations is considered to be a decorative unit here.
For example, the effect button 13 is configured as a decorative unit attached to the door 6. It is also possible to configure the detection signals of the multiple detection means in this effect button unit to be converted into serial data by, for example, the button LED board 660 inside, and to transmit them to a board outside the effect button unit (for example, the button LED connection board 640 or the front frame LED connection board 500).

In addition to (Configuration A3-1), the gaming machine 1 of the embodiment has the following (Configuration A3-2).
(Configuration A3-2)
The door 6 (door member) is provided with one or more second detection means attached to a portion outside the decorative unit, and the second board is configured to convert the detection signal of the second detection means and the serial data signal from the first board together into a serial data signal and transmit it to a third board attached to the inner frame 2 (frame member).

In this case (Configuration A3-2), an example of the third substrate is the inner frame LED relay substrate 400.
The second detection means may be a detection means such as a switch that generates the sense signals SENS0 to SENS7, SENS8, SENS9, SENS11, and SENS14. That is, the second detection means may be an operation detection switch such as the cross key 15a, the decision button 15b, the performance button 13, a rotation origin sensor in the performance button 13, a rotation performance light sensor in the performance button 13, a touch sensor provided on the firing operation handle 15, etc.

The front frame LED connection board 500 converts the sense signals SENS0 to SENS7, SENS8, SENS9, SENS11, and SENS14 from these second detection means and the serial data signal S_IN_DATAx from the side unit upper right LED board 600 into a serial data signal S_IN_DATA and transmits it to the inner frame LED relay board 400 attached to the inner frame 2.
By continuously converting the detection signals inside the door 6 into serial data using the side unit upper right LED board 600 and the front frame LED connection board 500, the number of wires required to transmit from the door 6 to the inner frame 2 can be reduced.
In particular, in the harness (transmission line H8: see FIG. 5) that connects the wiring of the opening and closing part of the door 6, a large amount of detection signals can be transmitted with a small number of wires. This improves the reliability of the wiring in the moving part.

[6.2 Number of power lines on the transmission line H (part 1)]

The gaming machine 1 of the embodiment has the following (configuration B1).
(Configuration B1)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and supplied with a first power supply voltage, and a third board connected to the second board by a second transmission line and supplied with the first power supply voltage, wherein the number of lines in the second transmission line used to transmit the first power supply voltage is greater than the number of lines in the first transmission line used to supply the first power supply voltage.

In the case of this (Configuration B1), the following corresponding example (Specific Example 1) is assumed with reference to FIG.
(Specific Example 1)
First substrate: power supply substrate 300
Second board: inner frame LED relay board 400
Third board: Front frame LED connection board 500
First transmission line: Transmission line H3
Second transmission line: Transmission line H8
First power supply voltage: 12V DC voltage (DC12VB)

Following this example, Figure 48 shows the transmission of power supply voltage between the power supply board 300, inner frame LED relay board 400, and front frame LED connection board 500.

A 12V DC voltage (DC12VB) is supplied from the power supply board 300 via a transmission line H3 to the inner frame LED relay board 400. The transmission line H3 transmits a 12V DC voltage (DC12VB) using three lines as shown in the figure (see connector CN3A in FIG. 12 and connector CN4B in FIG. 14).
The transmission line H3 is composed of six lines, the remaining three of which are used as ground.

As shown in FIG. 48, the inner frame LED relay board 400 supplies a 12V DC voltage (DC12VB) to the front frame LED connection board 500 via transmission line H8. As shown in the figure, the transmission line H8 transmits a 12V DC voltage (DC12VB) using four lines (see connector CN2B in FIG. 13 and connector CN2C in FIG. 15).

As described above, in the inner frame LED relay board 400, the 5V generator 410 (see FIG. 14) generates a 5V DC voltage (DC5VB) using a 12V DC voltage (DC12VB) and supplies the 5V DC voltage (DC5VB) via the transmission line H8 to the front frame LED connection board 500. As shown in the figure, the transmission line H8 transmits the 5V DC voltage (DC5VB) using two lines (see connector CN2B in FIG. 13 and connector CN2C in FIG. 15).
Furthermore, five lines in the transmission line H8 are used for ground.

The front frame LED connection board 500 also supplies the supplied 12V DC voltage (DC12VB) and 5V DC voltage (DC5VB) further downstream.
The connector CN1C transmits a 12V DC voltage (DC12VB) and a 5V DC voltage (DC5VB) downstream using one line each, and uses two lines for ground (see FIG. 16).
The transmission line H9 from the connector CN3C transmits a 12V DC voltage (DC12VB) to the relay board 550 (and further to the side unit upper right LED board 600) through three lines, and transmits a 5V DC voltage (DC5VB) through one line (see FIG. 17). Five lines are used for ground.
Connector CN4C transmits 12V DC voltage (DC12VB) downstream via a single line (see FIG. 16).

A connector CN10C transmits a 12V DC voltage (DC12VB) and a 5V DC voltage (DC5VB) to the button LED connection board 640 via a transmission line H15 (see FIG. 20). Five lines are used for ground.
In addition, in the front frame LED connection board 500, as described above, the power supply isolation/protection circuit 520 (see FIG. 15) separates the 12V motor drive voltage (MOT12V) from the 12V DC voltage (DC12VB) and supplies it to the button LED connection board 640 via the transmission line H15.
A 12V DC voltage (DC12VS) is separated by a power supply isolation/protection circuit 521 (see FIG. 19) and used as the power supply voltage for motor drivers 510 and 511 inside the board.

Now, looking at the 12V DC voltage (DC12VB), while the transmission line H3 uses three lines for the 12V DC voltage (DC12VB) between the power supply board 300, the inner frame LED relay board 400, and the front frame LED connection board 500, the transmission line H8 uses four lines. In other words, it has a configuration equivalent to the above-mentioned (configuration B1).

The downstream transmission line H8 has more lines using 12V DC voltage (DC12VB) than the upstream transmission line H3, making this a favorable configuration when it is desired to miniaturize the downstream connector.

Specifically, in the inner frame LED relay board 400, connectors CN1B and CN4B are used for connection to the upstream side, and connectors CN2B and CN3B are used for connection to the downstream side. Examples of connectors CN1B, CN2B, and CN4B, excluding connector CN3B which is only for speaker connection, are shown in Figures 49, 50, and 51.
Although each figure shows an example of a top-type in which the transmission line end is inserted from above while the connector is attached to the board, a side-type in which the transmission line end is inserted from the side may also be used.

The connector CN1B in FIG. 49 has, for example, the following specifications.
Number of pins: 28
・ Plane width S1: 30.0 mm
・ Plane vertical size S2: 8.3 mm
Height size S3: 9.6 mm
Rated current: 3A
Rated voltage: 250V
・Terminal pitch: 2mm
Contact diameter: 0.7 mm

The connector CN2B in FIG. 50 has, for example, the following specifications.
Number of pins: 30
・ Plane width S1: 26.2 mm
・ Plane vertical size S2: 7.4 mm
Height size S3: 5.55 mm
Rated current: 2A
Rated voltage: 100V
・Terminal pitch: 1.5mm
Contact diameter: 0.65 mm

The connector CN4B in FIG. 51 has, for example, the following specifications.
Number of pins: 6
・ Plane width S1: 17.5 mm
・ Plane vertical size S2: 6.4 mm
Height size S3: 8.8 mm
Rated current: 3A
Rated voltage: 250V
・Terminal pitch: 2.5mm
Contact diameter: 0.9 mm

From the above, it can be seen that the downstream connector CN2B is miniaturized.
The contact diameter is the pin terminal diameter in the case of a male connector, and the corresponding pin terminal diameter in the case of a female connector.

Regarding various signals transmitted between the upstream side and the transmission line H7 and the connector CN1B, and 12V DC voltage (DC12VB) supplied by the transmission line H3 and the connector CN4B, when the connector CN2B and the transmission line H8 are used for communication with the downstream side, it is generally considered that the connector CN2B and the transmission line H8 require the same rated current and rated voltage. The connector sizes are also assumed to be approximately the same.
In contrast, in this embodiment, 4 pins and 4 lines are applied to the connector CN2B and the transmission line H8 for 12V DC voltage (DC12VB). This reduces the current burden on each pin, making it possible to use the connector CN2B, which is small and has a small rated current, as described above. The ability to use a small connector is effective in expanding the layout margin on the inner frame LED relay board 400, improving design freedom, or miniaturizing the board.

This also allows the connector CN2C of the front frame LED connection board 500 to be small and have a low rated current, achieving the same effect.

Incidentally, the following (Specific Example 2) is also considered as a specific example corresponding to the above (Configuration B1).
(Specific Example 2)
First board: LED connection board 700
Second board: Lower relay board 800
Third substrate: decorative substrate 820
First transmission line: transmission line H30
Second transmission line: transmission line H31
First power supply voltage: 12V DC voltage (DC12VB)

As shown in FIG. 46, the connector CN1Q (and transmission line H30) of the under-board relay board 800 uses two lines for 12V DC voltage (DC12VB), while the connector CN3Q (and transmission line H31) uses six lines for 12V DC voltage (DC12VB).
The downstream transmission line H31 has a greater number of lines using 12V direct current voltage (DC12VB) than the upstream transmission line H30, which is an advantageous configuration when it is desired to miniaturize the downstream connector.

Specifically, an example of the connectors CN1Q and CN3Q of the lower relay board 800 is shown in FIG. 52 and FIG.
Although each figure shows an example of a side type in which the transmission line end is inserted from the side while the connector is mounted on the board, a top type in which the transmission line end is inserted from above may also be used.

The connector CN1Q in FIG. 52 has, for example, the following specifications.
Number of pins: 16
・ Plane width S1: 10.2 mm
・ Plane vertical size S2: 5.1 mm
Height size S3: 6.1 mm
Rated current: 1.0A
Rated voltage: 50V
・Terminal pitch: 1mm

The connector CN3Q in FIG. 53 has, for example, the following specifications.
Number of pins: 10
・ Plane width S1: 10.9 mm
・ Plane vertical size S2: 4.5 mm
・Height size S3: 2.0 mm
Rated current: 0.5A
Rated voltage: 50V
・Terminal pitch: 0.5 mm

From the above, it can be seen that the downstream connector CN3Q is miniaturized.
That is, by using 6 pins and 6 lines for 12V DC voltage (DC12VB) in the connector CN3Q and the transmission line H31, the current burden on each pin is reduced, making it possible to use the connector CN3Q, which is small and has a small rated current, as described above. The ability to use a small connector is effective in expanding the layout margin on the board, improving the design freedom, or miniaturizing the board in the under-board relay board 800.

This also allows the connector CN1S of the decorative board 820 to be small and have a low rated current, achieving the same effect.

The gaming machine 1 of the embodiment has the following (configuration B2-1).
(Configuration B2-1)
The gaming machine 1 comprises an inner frame 2 (frame member), a door 6 (door member) that is openable and closable relative to the inner frame 2, a first board attached to the inner frame 2, a second board attached to the inner frame 2 and connected to the first board by a first transmission line to receive a first power supply voltage, and a third board attached to the door 6 and connected to the second board by a second transmission line to receive the first power supply voltage, wherein the number of lines in the second transmission line used to transmit the first power supply voltage is greater than the number of lines in the first transmission line for supplying the first power supply voltage.

In this case, the examples corresponding to the first board, the second board, the third board, the first transmission line, the second transmission line, and the first power supply voltage are the same as those in (Specific Example 1) of (Configuration B1) above.

In this case, the third board, the front frame LED connection board 500, is placed on the door 6, and the second board, the inner frame LED relay board 400, is placed on the inner frame 2, so that the second transmission line, the transmission line H8, becomes a harness that connects the opening and closing parts of the door 6 as shown in Figure 5.
The connectors CN2B and CN2C that connect both ends of the transmission line H8 both have the specifications shown in Fig. 50. As described above, these are relatively small connectors.

The ability to miniaturize the connectors CN2B, CN2C that form both ends of the opening and closing portion of the door 6 is extremely effective in forming a space that does not interfere with the opening and closing operation.
It is desirable for the connectors CN2B and CN2C to be exposed in the opening and closing space in order to avoid applying excessive force to the transmission line H8. However, if the connectors CN2B and CN2C are large in size, it is likely to restrict not only the arrangement of the board on which the connectors CN2B and CN2C are mounted, but also the arrangement of the peripheral components, and it is likely to form unnecessary protrusions when the door 6 is opened and closed. Since the connector connection part is an electrically vulnerable part, it is desirable to avoid a structure that protrudes and is easily subjected to external pressure. This further restricts the design freedom.

In this embodiment, by increasing the number of lines used to transmit 12V direct current (DC12VB) compared to transmission line H3, the connectors CN2B and CN2C can be made smaller for the reasons explained above (configuration B1). This makes them suitable as connectors for use in the opening and closing parts of the door 6, improving design freedom and reducing electrical vulnerability by reducing protrusions.

In addition to (Configuration B2-1), the gaming machine 1 of the embodiment has the following (Configuration B2-2).
(Configuration B2-2)
The connector used for the second transmission line has a smaller outer size than the connector used for the first transmission line.

That is, as described above as the sizes S1, S2, and S3, the housing size of the connector CN2B is smaller than the housing size of the connector CN1B.
That is, the downstream connector CN2B uses a small connector with a narrow terminal pitch, which is advantageous for reducing the size of the downstream board.

The gaming machine 1 of the embodiment has the following (configuration B3).
(Configuration B3)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and supplied with a first power supply voltage, and a third board having a board area smaller than the first board and the second board and connected to the second board by a second transmission line and supplied with the first power supply voltage, wherein the number of lines in the second transmission line used to transmit the first power supply voltage is greater than the number of lines in the first transmission line for supplying the first power supply voltage.

The examples corresponding to the first substrate, the second substrate, the third substrate, the first transmission line, the second transmission line, and the first power supply voltage are the same as those in (Specific Example 1) of (Configuration B1) above.

In this case, the front frame LED connection board 500 which is the third board is smaller in size than the inner frame LED relay board 400 which is the second board and the power supply board 300 which is the first board.
Fig. 8 shows the front frame LED connection board 500, and Fig. 9 shows the inner frame LED relay board 400 and the power supply board 300. Since Fig. 8 and Fig. 9 are drawn to the same scale, it can be seen by comparison that the front frame LED connection board 500 has a smaller board area (the area of the mounting surface on the board surface) than the inner frame LED relay board 400 and the power supply board 300.
That is, the front frame LED connection board 500 has a relatively small space for arranging electronic components.

In this embodiment, therefore, the number of lines for 12V DC voltage (DC12VB) is made greater in connector CN2B and transmission line H8 of the inner frame LED relay board 400 than in the upstream transmission line H3, making it possible to miniaturize connector CN2B and, in turn, connector CN2C. This makes it possible to reduce the connector mounting area in the front frame LED connection board 500 and reduce the burden on the board layout. In other words, it is possible to realize the front frame LED connection board 500 as a small board.

In particular, since the front frame LED connection board 500 is disposed on the door 6, it is desirable for the board and mounting parts to be as light as possible in order to reduce the weight of the door 6. This is also advantageous in that respect.
In addition, sensors, motors, and performance button units tend to be concentrated under the door 6, so it is desirable to have boards and components that are as small as possible. In that respect, too, the present configuration is advantageous.
Of course, the fact that a small connector can be used for the connector CN2C also makes it possible to keep the height size S3 of the board with components mounted thereon small.

Although the third substrate is smaller in substrate area than the first and second substrates, the volume including the substrate thickness may be smaller than the first and second substrates.
Furthermore, the spatial volume required for the arrangement of the electronic components, including the height when mounted, of the third substrate may be smaller than those of the first and second substrates.

The gaming machine 1 of the embodiment has the following (configuration B4).
(Configuration B4)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and supplied with a first power supply voltage, and a third board arranged inside a movable body and connected to the second board by a second transmission line and supplied with the first power supply voltage, wherein the number of lines in the second transmission line used to transmit the first power supply voltage is greater than the number of lines in the first transmission line used to supply the first power supply voltage.

In this case, the examples corresponding to the first board, the second board, the third board, the first transmission line, the second transmission line, and the first power supply voltage can be the same as (Specific Example 2) of (Configuration B1) above.

The third substrate, a decorative substrate 820, is attached inside a movable body (not shown) located at the lower front, and is a substrate on which a number of LEDs are mounted as shown in Figure 47, and which emits light from the LEDs in the movable body.
Therefore, the transmission line H31 serves as a member for electrically connecting the movable parts.

The connector CN3Q of the second board, the under-board relay board 800, is small as shown in Fig. 53. Therefore, the connector CN1S of the decorative board 820 is also the connector shown in Fig. 53.

In other words, in this embodiment, by making the number of lines used to transmit 12 V direct current voltage (DC12VB) greater than the number of transmission lines H3, the connectors CN3Q and CN1S can be made smaller for the reasons explained in (Specific Example 2) of (Configuration B1) above.
This makes the connector CN1S suitable for mounting on a board inside a movable body. It is desirable for the decorative board 820 to be mounted on the movable body to be small, and therefore it is desirable for the parts to be mounted, especially the connectors that occupy a large area, to be small.
Therefore, (Configuration B4) allows the decorative substrate 820 mounted on the movable body to have an appropriate substrate size.
In addition, the miniaturization of the CN1S connector allows for greater freedom in mounting LEDs, making it suitable for designing light-emitting positions for performance purposes.

Also, although the connector CN1S is a tall component on the board, a relatively low connector CN1S can be used. In the case of a movable object, it is desirable to use a board that is as low in height as possible. This is due to the desire to prevent it from interfering with movement and the desire to place it inside the movable object as much as possible. For this reason, it is effective for the connector to have a low height size S3. In this sense, a side-type connector such as that shown in Figure 53 is more desirable than a top-type connector.

The gaming machine 1 of the embodiment has the following (configuration B5).
(Configuration B5)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and supplied with a first power supply voltage, and a third board connected to the second board by a second transmission line and supplied with the first power supply voltage, wherein the number of lines in the second transmission line used to transmit the first power supply voltage is greater than the number of lines in the first transmission line used to supply the first power supply voltage, and the second transmission line is formed of a flexible cable.

In this case, the examples corresponding to the first board, the second board, the third board, the first transmission line, the second transmission line, and the first power supply voltage can be the same as (Specific Example 2) of (Configuration B1) above.

Moreover, flexible cable refers to FFC (flexible flat cable) or FPC (flexible printed circuit board).
In particular, in this case, a flexible cable is used for the transmission line H31 connecting the second board, the under-board relay board 800, and the third board, the decorative board 820.
As can be seen from the assignment of the connector CN1S in FIG. 47, the flexible cable of the transmission line H31 transmits only 12V DC voltage (DC12VB) and light emission drive currents 13-B7, 13-R8, 13-G8, and 13-B8.
A flexible cable is also used for the transmission line H23 that connects the decorative board 740 and the relay board 760 attached to the movable body accessory. As can be seen from the pin assignment of the connector CN4L in Fig. 43, the transmission line H23 transmits 12V DC voltage (DC12VB), 5V DC voltage (DC5V), the clock signal CLK_C, and the data signal DATA_C.

As described above, the transmission line H used in various places is not limited to a flexible cable and may be, for example, a bundle of multiple conductive wires. In this embodiment, however, the transmission line H31 is a flexible cable.
Of course, since the decorative substrate 820 is arranged on a movable member and the transmission line H31 moves within a predetermined stroke range, it is preferable to use a flexible cable.

However, in the case of a flexible cable, the amount of current that can be passed through a single line is small.
Therefore, the 12V DC voltage (DC12VB) received from the transmission line H30 via two lines at the connector CN1Q in the lower panel relay board 800 is supplied to the decorative board 820 using six lines at the connector CN3Q and the transmission line H31. This ensures sufficient power supply even when a flexible cable is used, and achieves appropriate LED illumination on the decorative board 820.
In addition, in the decorative board 740, a 12V DC voltage (DC12VB) received from the transmission line H22 through two lines by the connector CN1L is supplied to the relay board 760 using three lines by the connector CN4L and the transmission line H23. Similarly, a 5V DC voltage (DC5V) received from one line by the connector CN1L is supplied to the relay board 760 using three lines by the connector CN4L and the transmission line H23. This allows sufficient power to be supplied to the relay board 760 and beyond even when a flexible cable is used.
43 and 44, in the transmission line H23, the clock signal CLK_C and the data signal DATA_C are transmitted through a single line. In other words, when a flexible cable is used, the number of lines for power supply is greater than that of a normal harness, but the clock and control data signals are transmitted through a single line.

This (Configuration B5) is also effective when a flexible cable is used for the transmission line H8. In other words, it can also be applied as (Specific Example 1) of the above (Configuration B1).

The gaming machine 1 of the embodiment has the following (configuration B6-1).
(Configuration B6-1)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and supplied with a first power supply voltage, and a third board connected to the second board by a second transmission line and supplied with the first power supply voltage, wherein the number of lines in the second transmission line used to transmit the first power supply voltage is greater than the number of lines in the first transmission line for supplying the first power supply voltage, the second board generates a second power supply voltage using the first power supply voltage, and the third board is also supplied with the second power supply voltage by the second transmission line.

Examples corresponding to the first substrate, the second substrate, the third substrate, the first transmission line, the second transmission line, and the first power supply voltage can be similar to (Specific Example 1) of (Configuration B1) above.
An example of the second power supply voltage may be a 5V direct current voltage (DC5VB).

In this case, the inner frame LED relay board 400, which is the second board, is equipped with a 5V generation unit 410 (see FIG. 14), and generates a 5V DC voltage (DC5VB) from a 12V DC voltage (DC12VB).
This 5V DC voltage (DC5VB) is supplied to the front frame LED connection board 500 via a transmission line H8 from a connector CN2B in FIG.

As described above (Configuration B1), for 12V DC voltage (DC12VB), the transmission line H8 uses more lines than the transmission line H3, which allows the connectors CN2B and CN2C to be smaller, and also transmits a separate 5V DC voltage (DC5VB).

When downstream boards after the front frame LED connection board 500 provided on the door 6 use not only 12 V DC voltage (DC12VB) but also 5 V DC voltage (DC5VB), the inner frame LED relay board 400 located upstream can generate and supply 5 V DC voltage (DC5VB), thereby making the wiring and circuit configuration for power supply more efficient.
In other words, it is no longer necessary to transmit 5V DC voltage (DC5VB) from the power supply board 300 to the inner frame LED relay board 400, and further, it is no longer necessary to adopt a configuration for generating 5V DC voltage (DC5VB) from 12V DC voltage (DC12VB) for each board of the door 6.

In addition to (Configuration B6-1), the gaming machine 1 of the embodiment has the following (Configuration B6-2).
(Configuration B6-2)
A buffer circuit is mounted on the second substrate, and the second power supply voltage is used as a power supply voltage for the buffer circuit.

An example of the buffer circuit here is the buffer circuits 402 and 403 in FIG.
The buffer circuits 402 and 403 operate using the 5V DC voltage (DC5VB) generated by the 5V generating unit 410 of the inner frame LED relay board 400 as a power supply voltage.

In other words, the 5V generation unit 410 is provided in the inner frame LED relay board 400 to generate a 5V DC voltage (DC5VB) by using the 5V DC voltage (DC5VB) at the inner frame LED relay board 400 and downstream thereof.
In other words, since a 5V DC voltage (DC5VB) is used downstream of the inner frame LED relay board 400, the 5V DC voltage (DC5VB) is generated on the board that is the most upstream within the range in which the 5V DC voltage (DC5VB) is used.Then, the 5V DC voltage (DC5VB) is transmitted to downstream boards that use that power supply voltage.

For example, the 5V DC voltage (DC5VB) generated by the inner frame LED relay board 400 is used by the front frame LED connection board 500, the relay board 550, the side unit upper right LED board 600, the side unit lower right LED board 620, and the button LED connection board 640.
Although each figure shows "5V DC voltage (DC5V)" in some places, as is clear from the circuit configuration, the 5V DC voltage (DC5V) is also the 5V DC voltage (DC5VB) generated by the inner frame LED relay board 400.
On the other hand, since the button LED board 660 does not use a 5V power supply, a direct current voltage of 5V (DC5V) is not supplied thereto (see FIG. 34).

This allows the wiring and circuit configuration for supplying 5V DC voltage (DC5VB) to be made more efficient.
That is, the 5V DC voltage (DC5VB) is distributed from upstream to downstream in the range of the boards that use the 5V DC voltage (DC5VB). Therefore, there is no need to generate or relay the 5V DC voltage (DC5VB) in the boards that are not used upstream of the inner frame LED relay board 400. Of course, there is no need to adopt a configuration in which the 5V DC voltage (DC5VB) is generated from the 12V DC voltage (DC12VB) for each board of the door 6.

[6.3 Connector structure]

The gaming machine 1 of the embodiment has the following (configuration C1).
(Configuration C1)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line, and a third board connected to the second board by a second transmission line, and a first connector connecting the first transmission line on the second board and a second connector connecting the second transmission line on the second board are different types of connectors.

In the case of this (Configuration C1), the following corresponding example (Specific Example 3) is assumed.
(Specific Example 3)
First board: Frame LED relay board 840
Second board: inner frame LED relay board 400
Third board: Front frame LED connection board 500
First transmission line: Transmission line H7
Second transmission line: Transmission line H8
First connector: Connector CN1B
Second connector: Connector CN2B

In this case, the connectors CN1B and CN2B are shown in Figures 49 and 50, and their specifications are as described above, and different types of connectors are used. In particular, the connector CN2B connecting the downstream side is smaller than the connector CN1B connecting the upstream side.
That is, in the frame LED relay board 840 , inner frame LED relay board 400, and front frame LED connecting board 500, which are electrically connected from upstream to downstream, the upstream connector CN1B and the downstream connector CN2B of the inner frame LED relay board 400 are of different types, which makes it possible to reduce the size of the downstream board, which is advantageous for arranging components such as boards on the downstream side.

In particular, on the downstream side, it is desirable to place the boards for controlling and relaying these devices in a position close to the most downstream devices, such as motors, sensors, and LED boards. Naturally, this is often also close to movable objects. In that case, it is desirable for the board area to be as small as possible. Therefore, being able to reduce the board size on the downstream side leads to increased design freedom. It also makes it possible to realize boards that are suitable for use with complex performance device structures.

Note that specific examples equivalent to (Configuration C1) are not limited to the above (Specific Example 3). For example, the following boards (and connectors) can be given as examples equivalent to a second board equipped with different types of first and second connectors.

Front frame LED connection board 500 (upstream connector CN2C and other downstream connectors)
Relay board 550 (upstream connector CN1D and downstream connector CN2D)
Side unit upper right LED board 600 (upstream connector CN1E and other downstream connectors)
Side unit lower right LED board 620 (upstream connector CN3F and other downstream connectors)
Button LED connection board 640 (upstream connector CN1G and other downstream connectors)
LED connection board 700 (upstream connector CN1J and other downstream connectors)
Decorative board 740 (upstream connector CN1L and other downstream connectors)
Relay board 760 (upstream connector CN1M and other downstream connectors)
LED board 780 (upstream connector CN1N and downstream connector CN2N)
- Under-board relay board 800 (upstream connector CN1Q and other downstream connectors)

When any one of these is considered to be a second substrate, the upstream side can be considered to be a first substrate, and the downstream side can be considered to be a third substrate.
In each of these examples, the use of a small connector on the downstream side can be advantageous for the arrangement of components such as boards on the downstream side.

The gaming machine 1 of the embodiment has the following (configuration C2).
(Configuration C2)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line, and a third board connected to the second board by a second transmission line, and the second connector connecting the second transmission line on the second board has a greater number of pins than the first connector connecting the first transmission line on the second board.

Examples corresponding to the first board, second board, third board, first transmission line, second transmission line, first connector, and second connector can be similar to (Specific Example 3) of (Configuration C1) above.

The connector CN1B has 28 pins, and the connector CN2B has 30 pins (see FIG. 13). Their specifications are also as described above.
In this case, the increase in the number of pins on the downstream side is mainly due to the increase in the number of pins assigned to the 12 V DC voltage (DC12VB) as described above and the start of transmission of the 5 V DC voltage (DC5VB).
Increasing the number of pins reduces the current burden on each pin, which allows the connector CN2B to be smaller than the connector CN1B, for example by using a connector with a lower rated current.
This is therefore advantageous in reducing the size of the downstream substrate, and the same effects as those of the above (Configuration C1) can be obtained.

The gaming machine 1 of the embodiment has the following (configuration C3).
(Configuration C3)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line, and a third board connected to the second board by a second transmission line, and the second connector connecting the second transmission line on the second board has a smaller rated current than the first connector connecting the first transmission line on the second board.

Examples corresponding to the first board, second board, third board, first transmission line, second transmission line, first connector, and second connector can be similar to (Specific Example 3) of (Configuration C1) above.

As described above, the rated current of connector CN1B is 3A, and the rated current of connector CN2B is 2A.
That is, the downstream connector CN2B is small and has a small rated current, which is advantageous for reducing the size of the downstream board, and provides the same effects as those of the above (configuration C1).
In order to use a connector with a smaller rated current, the 12V direct current voltage (DC12VB) is transmitted over a larger number of lines, as described above.

Note that a specific example equivalent to (Configuration C3) is not limited to the above (Specific Example 3), and various examples are envisaged, as in the case of (Configuration C1).

The gaming machine 1 of the embodiment has the following (configuration C4-1).
(Configuration C4-1)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line, and a third board connected to the second board by a second transmission line, and the second connector connecting the second transmission line on the second board has a narrower terminal pitch than the first connector connecting the first transmission line on the second board.

Examples corresponding to the first board, second board, third board, first transmission line, second transmission line, first connector, and second connector can be similar to (Specific Example 3) of (Configuration C1) above.

As described above, the terminal pitch of connector CN1B is 2 mm, and the terminal pitch of connector CN2B is 1.5 mm.
That is, the downstream connector CN2B is a small one with a narrow terminal pitch, which is advantageous for reducing the size of the downstream board, and provides the same effects as those of the above (configuration C1).
In order to use a small connector with a narrow terminal pitch, the 12V direct current voltage (DC12VB) is transmitted over a larger number of lines, as described above.

In addition to (Configuration C4-1), the gaming machine 1 of the embodiment has the following (Configuration C4-2).
(Configuration C4-2)
A second connector that connects the second transmission line to the second substrate has a smaller contact diameter than a first connector that connects the first transmission line to the second substrate.

As described above, the contact diameter of the connector CN1B is 0.7 mm, and the contact diameter of the connector CN2B is 0.65 mm.
That is, the downstream connector CN2B is small in size with a narrow terminal pitch and a small contact diameter, which is advantageous for reducing the size of the downstream board and provides the same effects as those of the above (configuration C1).

Note that specific examples equivalent to (Configuration C4-1) and (Configuration C4-2) are not limited to the above-mentioned (Specific Example 3), and various examples are envisaged, similar to the case of (Configuration C1).

The gaming machine 1 of the embodiment has the following (configuration C5).
(Configuration C5)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line, and a third board connected to the second board by a second transmission line, and a second connector connecting the second transmission line on the second board has a smaller housing size than a first connector connecting the first transmission line on the second board.

Examples corresponding to the first board, second board, third board, first transmission line, second transmission line, first connector, and second connector can be similar to (Specific Example 3) of (Configuration C1) above.

As described above with respect to the sizes S1, S2, and S3, the housing size of the connector CN2B is smaller than the housing size of the connector CN1B.
That is, the downstream connector CN2B is small and has a narrow terminal pitch, which is advantageous for reducing the size of the downstream board and provides the same effects as those of the above (configuration C1).

Note that a specific example equivalent to (Configuration C5) is not limited to the above-mentioned (Specific Example 3), and various examples are envisaged, similar to the case of (Configuration C1).

6.4 Wiring Path

The gaming machine 1 of the embodiment has the following (configuration D1-1).
(Configuration D1-1)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and receiving a signal for controlling the driving of a presentation means, and a third board connected to the second board by a second transmission line and receiving a signal for controlling the driving of the presentation means, wherein the distance between the first board and the third board is shorter than the distance between the first board and the second board, and the third board has a smaller board surface area than the second board.

In the case of this (Configuration D1-1), the following corresponding example (Specific Example 4) is assumed.
(Specific Example 4)
First substrate: relay substrate 550
Second board: Side unit upper right LED board 600
Third board: Side unit upper LED board 630
First transmission line: transmission line H10
Second transmission line: transmission line H12

Figure 54 shows the wiring paths between the front frame LED connection board 500, relay board 550, side unit upper right LED board 600, and side unit upper LED board 630. Note that Figure 54 shows the wiring paths of the transmission lines H9, H10, and H12 in the board arrangement described in Figure 8 with dashed lines, and also shows the connectors CN3C, CN1D, CN2D, CN1E, CN2E, and CN1T used to connect these.

The harness serving as a transmission line H9 connected to the connector CN3C of the front frame LED connection board 500 located at the lower left of the door 6 runs upward along the left side of the door 6, and is turned to the right near the upper end to reach the connector CN1D of the relay board 550.
The harness serving as the transmission line H10 connected to the connector CN2D of the relay board 550 serves as a route that runs from the upper end of the door 6 along the upper right corner to the connector CN1E of the side unit upper right LED board 600 attached to the side unit 10.
The harness serving as the transmission line H12 connected to the connector CN2E of the upper right LED board 600 of the side unit travels back along the path of the transmission line H10 to reach the connector CN1T of the upper LED board 630 of the side unit.

In FIG. 54, attention will now be focused on relay board 550 which is the first board, side unit upper right LED board 600 which is the second board, and side unit upper LED board 630 which is the third board.
First, the relay board 550 and the side unit LED board 630 are positioned so that they overlap in the front-to-back direction (the side unit LED board 630 is on the front side (player side)).
The relay board 550 and the side unit upper right LED board 600 are located at separate positions, near the upper end and near the right end of the door 6.
Apparently, the distance between the relay board 550 and the upper side unit LED board 630 is shorter than the distance between the relay board 550 and the upper right LED board 600 of the side unit.

As is also clear from this figure, the third board, the side unit upper LED board 630, has a smaller board surface area than the second board, the side unit upper right LED board 600.

In other words, considering the side unit upper right LED board 600 and the side unit upper LED board 630, the side unit upper LED board 630 is downstream, but the board area is made smaller on the downstream side.
The more downstream the board, the smaller the board area is desired. The more downstream the board is, the closer it is to be positioned to motors, sensors, movable parts, etc., and because LEDs are mounted on the board and it is closer to the front of the gaming machine 1 on the player side, a board with a large area is likely to cause disadvantages and inconveniences. For example, the board positioning may limit the movement of movable objects or decorations.
In the above (Configuration D1-1), the area of the side unit upper LED board 630 is made smaller than that of the side unit upper right LED board 600, so that the configuration is adapted to the circumstances of the downstream board. This improves the freedom of layout and design.

In addition to the above (Configuration D1-1), the gaming machine 1 of the embodiment has the following (Configuration D1-2).
(Configuration D1-2)
The third substrate is attached at a position on the wiring path of the first wiring.

54, the side unit LED board 630, which is the third board, is located on the path of the transmission line H10, which is the first wiring. Therefore, the path of the transmission line H12 is set so as to return along the path of the transmission line H10.
Such a wiring path setting is extremely effective in reducing the size of the side unit LED board 630 .

The side unit upper right LED board 600, to which signals are transmitted from the relay board 550, is the most upstream of the boards in the side unit 10. For example, a side unit upper LED board 630 and a side unit lower right LED board 620 are present downstream.
Furthermore, the side unit upper right LED board 600 includes the side unit upper right movable motor 104 connected to the above-mentioned connector CN4E, the side unit upper right movable solenoid 105 connected to connector CN5E, a blower 106 connected to connector CN6E, and a sensor in the side unit device 101 connected to connector CN7E.

In other words, when considering the circuit board that serves as the base point for each part in the side unit, the circuit configuration becomes complex, and the board area is inevitably large. The number of lines for wiring also increases, and the size and number of connectors CN also tend to increase.
Therefore, the role of the base board within the side unit 10 is assigned to the board in the upper right corner of the frame where a relatively large area can be secured. In other words, it is the side unit upper right LED board 600. Assuming that the game surface is approximately circular, it is easy to place a board with a large area in the corner of the frame. The upper right corner is also approximately the center of the side unit 10.

Then, signals are transmitted to each part in the side unit 10. In this case, there is a member that is arranged at a position on the wiring path of the transmission line H10, which is the first wiring. That is, the side unit LED board 630, which is the third board.
With this configuration, firstly, it is possible to shorten the total wiring length to each part in the side unit 10. The parts are the side unit upper LED board 630, the side unit lower right LED board 620, the side unit upper right movable motor 104, the side unit upper right movable solenoid 105, the blower 106, the side unit device 101, etc.

Since wiring to each of these components is routed from the side unit upper right LED board 600 located approximately in the center of the side unit 10, the wiring can be performed with short wire lengths in the direction in which each component is arranged.
Let us assume that the LED board 630 on the side unit, which is closest to the relay board 550, is used as the base point. At first glance, this seems to be desirable in terms of the positional relationship with the relay board 550. However, if wiring is performed to each part using the LED board 630 on the side unit, which is closest to the relay board 550, as the base point, parallel wiring will be formed from the LED board 630 on the side unit to each of the above-mentioned parts. In this case, for example, many wires will overlap around the upper right corner of the door 6, and as a result, the total wiring length will be long. Furthermore, the increase in the number of wires to be wired makes it difficult to store the wires.
By using the upper right LED board 600 of the side unit as the base point, and as a result creating a state in which the sender/return paths overlap as in the transmission line H12, the total wiring length can be shortened and the concentration of wiring wires can be alleviated.

Furthermore, it is possible to promote miniaturization of the side unit LED board 630. As the most downstream board, the side unit LED board 630 only needs to receive the signals and power supply voltage required for its own operation via the connector CN1T, and a small connector can be used. In addition, no other connectors are required, and the circuit configuration is simple. For example, in the case of the example in FIG. 32, it is only necessary to mount the LED driver 631 and the light emitting unit 632, resulting in a simple configuration.
These factors can promote miniaturization of the side unit LED board 630, making it suitable as a downstream board and promoting the above-mentioned effects such as freedom of design.

In other words, (configuration D1-2) the fact that the third substrate is attached at a position on the wiring path of the first wiring means that the second substrate becomes the starting point for wiring to components including the third substrate, which can be more advantageous for improving wiring efficiency and miniaturizing the third substrate than simply wiring in order of proximity.

The gaming machine 1 of the embodiment has the following (configuration D2-1).
(Configuration D2-1)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and receiving a signal for controlling the driving of a presentation means, and a third board connected to the second board by a second transmission line and receiving a signal for controlling the driving of the presentation means, wherein the distance between the first board and the third board is shorter than the distance between the first board and the second board, and the third board has a smaller number of electrical components than the second board.

In this case as well, the above (Specific Example 4) is assumed as a corresponding example.
As mentioned above, the distance between the relay board 550 (first board) and the upper right LED board 600 (second board) of the side unit is shorter than the distance between the relay board 550 (first board) and the upper right LED board 600 (second board) of the side unit.

The electrical components to be compared in terms of numerical size can be thought of as all electrical components. Examples include electrical components such as IC chips, resistors, capacitors, LEDs, connectors, etc.

Alternatively, the electrical components may be considered as electrical components (excluding passive elements) that receive a power supply voltage and consume power. Specifically, for the side unit upper right LED board 600, these are LED drivers 605, 606, motor drivers 608, 609, buffer circuits 604, 607, and the LED of the light-emitting unit 612 (see Figures 27 and 28). For the side unit upper LED board 630, these are the LED driver 631 and the LED of the light-emitting unit 632 (see Figure 32).

Alternatively, the electrical component may be an LED as an electrical component that directly performs a performance operation (an electrical component that is subject to performance operation control).
Therefore, for the side unit upper right LED board 600, it becomes the LED of the light emitting portion 612 (see FIG. 27), and for the side unit upper LED board 630, it becomes the LED of 632 (see FIG. 32).

In any case, the side unit upper LED board 630 (third board) has fewer electrical components mounted thereon than the side unit upper right LED board 600 (second board).
This allows the area of the side unit LED board 630 to be reduced, thereby achieving the effects described in (Configuration D1-1) of downsizing the downstream board and improving the freedom of design.

In addition to the above (Configuration D2-1), the gaming machine 1 of the embodiment has the following (Configuration D2-2).
(Configuration D2-2)
The third substrate is attached at a position on the wiring path of the first transmission line. This provides the effect described above in (Configuration D1-2).

In addition to the above (Configuration D2-1), the gaming machine 1 of the embodiment has the following (Configuration D2-3).
(Configuration D2-3)
The third substrate has a smaller substrate surface area than the second substrate, thereby obtaining the effect described above in (Configuration D1-1).

The gaming machine 1 of the embodiment has the following (configuration D3-1).
(Configuration D3-1)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and receiving a signal for controlling the driving of a presentation means, and a third board connected to the second board by a second transmission line and receiving a signal for controlling the driving of the presentation means, wherein the distance between the first board and the third board is shorter than the distance between the first board and the second board, and the third board consumes less power in the on-board circuitry than the second board.

In this case as well, the above (Specific Example 4) is assumed as a corresponding example.
As mentioned above, the distance between the relay board 550 (first board) and the upper right LED board 600 (second board) of the side unit is shorter than the distance between the relay board 550 (first board) and the upper right LED board 600 (second board) of the side unit.

As described above, the side unit upper right LED board 600 has a greater number of components than the side unit upper LED board 630 and consumes a greater current than the side unit upper LED board 630 .
Comparing the circuit configurations, it is clear that the side unit upper right LED board 600 consumes more current due to the difference in the number of LEDs between the light-emitting unit 612 and the light-emitting unit 632 and the difference in the number of LED drivers installed.
In other words, the side unit LED board 630 adopts a circuit configuration that reduces power consumption. This allows the side unit LED board 630 to have a smaller board area. This provides the effect described in (Configuration D1-1) of downsizing the downstream board and improving the freedom of design.

In addition to the above (Configuration D3-1), the gaming machine 1 of the embodiment has the following (Configuration D3-2).
(Configuration D3-2)
The third substrate is attached at a position on the wiring path of the first transmission line. This provides the effect described above in (Configuration D1-2).

The gaming machine 1 of the embodiment has the following (configuration D4-1).
(Configuration D4-1)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and receiving a signal for controlling the drive of a presentation means, and a third board connected to the second board by a second transmission line and receiving a signal for controlling the drive of the presentation means, wherein the distance between the first board and the third board is shorter than the distance between the first board and the second board, and the signals for controlling the drive of the presentation means transmitted by the first transmission line include a signal for motor drive control, and the signals for controlling the drive of the presentation means transmitted by the second transmission line do not include a signal for motor drive control.

In this case as well, the above (Specific Example 4) is assumed as a corresponding example.
As mentioned above, the distance between the relay board 550 (first board) and the upper right LED board 600 (second board) of the side unit is shorter than the distance between the relay board 550 (first board) and the upper right LED board 600 (second board) of the side unit.

The signals for driving and controlling the performance means that are transmitted over the transmission line H10 and received by the side unit upper right LED board 600, which is the second board, are, for example, the enable signal ENABLE_L, clock signal CLK_P, and reset signal RESET_P shown in FIG. 24. As described in detail in FIGS. 24 to 29, these signals are used to control the LED driver 605 (FIG. 27) and the LED driver 606 and motor drivers 608 and 609 (FIG. 28). In other words, they include signals for LED light emission and motor drive control.

The signals for driving and controlling the performance means that are transmitted over the transmission line H12 and received by the third board, the side unit LED board 630, are, for example, the clock signal CLK, data signal DATA, and reset signal RESET shown in FIG. 32. These signals are used to control the LED driver 631.

In other words, the signals for controlling the drive of the presentation means transmitted over transmission line H10 include signals for controlling the drive of the presentation means, but the signals for controlling the drive of the presentation means transmitted over transmission line H12 do not include signals for controlling the motor drive.
This means that the second board, the side unit upper right LED board 600 (or a downstream board other than the side unit upper LED board 630), has a motor driver, while the third board, the side unit upper LED board 630, does not have a motor driver.
A relatively large current is used to drive a motor. Also, a large number of lines are required due to the circumstances of motor drive such as three-phase drive and four-phase drive. For this reason, it is difficult to miniaturize the board that has the motor driver.
Conversely, by making the side unit LED board 630 a board that does not mount a motor driver, miniaturization is promoted and it is easy to miniaturize the board at the most downstream. And by miniaturization, the effect described above (configuration D1-1) can be obtained.

In addition to the above (Configuration D4-1), the gaming machine 1 of the embodiment has the following (Configuration D4-2).
(Configuration D4-2)
The third substrate is attached to a position on the wiring path of the first transmission line. This provides the effect described above in (Configuration D1-2).

[6.5 Number of power sources for transmission line H (part 2)]

The gaming machine 1 of the embodiment has the following (configuration E1).
(Configuration E1)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and supplied with a first power supply voltage, and a third board connected to the second board by a second transmission line and supplied with the first power supply voltage, the third board having a smaller board surface area than the second board, and the number of lines in the second transmission line used to transmit the first power supply voltage is less than the number of lines in the first transmission line for supplying the first power supply voltage.

In the case of this (Configuration E1), the following corresponding example (Specific Example 5) is envisioned.
(Specific Example 5)
First substrate: relay substrate 550
Second board: Side unit upper right LED board 600
Third board: Side unit upper LED board 630
First transmission line: transmission line H10
Second transmission line: transmission line H12
First power supply voltage: 12V DC voltage (DC12VB)

Here, the third board, the side unit upper LED board 630, has a smaller board surface area than the second board, the side unit upper right LED board 600. Figure 8 shows the side unit upper LED board 630 and the side unit upper right LED board 600, and the difference in the board surface area is clear from the figure.

As can be seen from the assignment of the connector CN1E in FIG. 24, the transmission line H10 uses two lines for 12V DC voltage (DC12VB).
On the other hand, as can be seen from the assignment of the connector CN2E in FIG. 26 and the connector CN1T in FIG. 32, the transmission line H12 uses one line for 12V DC voltage (DC12VB).

In other words, the number of cables for transmitting 12V DC voltage (DC12VB) to the side unit upper right LED board 600 on the side unit upper LED board 630 has been reduced. This means that the side unit upper LED board 630 can use a connector CN1T with fewer terminals.

The mounting area of each board is often limited by the arrangement of surrounding components. For example, in this embodiment, the area of the LED board 630 on the side unit is made small due to the arrangement of surrounding components, but in this case, by making the connector CN1T smaller, it becomes easier to secure the arrangement area for the components in FIG. 32, i.e., the LED and the LED driver 631.
In this way, when it is desired to reduce the substrate area on the downstream side or when it is unavoidable to reduce the substrate area (configuration E1), this is effective.

The gaming machine 1 of the embodiment has the following (configuration E2-1).
(Configuration E2-1)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and supplied with a first power supply voltage, and a third board connected to the second board by a second transmission line and supplied with the first power supply voltage, the third board having a smaller number of electrical components than the second board, and the number of lines in the second transmission line used to transmit the first power supply voltage is smaller than the number of lines in the first transmission line used to supply the first power supply voltage.

In this case as well, the above (Specific Example 5) is assumed as a corresponding example.
The electrical components may be considered to be all electrical components, but more preferably, all or most of the electrical components that consume power based on the power supply voltage of the 12V direct current voltage (DC12VB) system, which is the first power supply voltage.
Specifically, the side unit upper right LED board 600 includes LED drivers 605 and 606, motor drivers 608 and 609, and an LED of a light emitting section 612 (see FIGS. 27 and 28).
The side unit LED board 630 includes an LED driver 631, an LED of a light emitting section 632, and the like (see FIG. 32).

Also, the LEDs may be considered the only main electrical components that consume power based on the power supply voltage of the 12V direct current voltage (DC12VB) system. When comparing the number of LEDs in the light-emitting unit 612 and the light-emitting unit 632, the number of LEDs in the LED board 600 on the upper right of the side unit is clearly greater.

In other words, the side unit upper right LED board 600 consumes a large amount of power in the 12V DC voltage (DC12VB) system itself, while also supplying it to the downstream side unit upper LED board 630. In this case, the side unit upper LED board 630 is configured to consume relatively little power.

Because of this configuration, there is no problem even if the number of lines used for transmitting 12V DC voltage (DC12VB) in the transmission line H12 is made smaller than the number of lines used for transmitting 12V DC voltage (DC12VB) in the transmission line H10. In other words, since the amount of current transmitted is also reduced, there is no problem due to transmission over a single line.
Therefore, the number of lines is reduced, the connector on the downstream board is made smaller, and the configuration is advantageous for mounting on a board with a relatively small board area.

In addition to the above (Configuration E2-1), the gaming machine 1 of the embodiment has the following (Configuration E2-2).
(Configuration E2-2)
The third substrate has a substrate surface area smaller than that of the second substrate.

As described above, the side unit LED board 630, which is the downstream third board, has a relatively small area. In this case, it is very useful in terms of design to be able to reduce the size of the connector CN1T.

The gaming machine 1 of the embodiment has the following (configuration E3).
(Configuration E3)
The gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and supplied with a first power supply voltage, and a third board connected to the second board by a second transmission line and supplied with the first power supply voltage, the third board having less power consumption in its mounted circuit than the second board, and the number of lines in the second transmission line used to transmit the first power supply voltage is less than the number of lines in the first transmission line used to supply the first power supply voltage.

In this case as well, the above (Specific Example 5) is assumed as a corresponding example.
As described above, the side unit upper right LED board 600 has a greater number of components than the side unit upper LED board 630 and consumes a larger current than the side unit upper LED board 630.
Comparing the circuit configurations, it is clear that the side unit upper right LED board 600 consumes more current due to the difference in the number of LEDs between the light-emitting unit 612 and the light-emitting unit 632 and the difference in the number of LED drivers installed.

Because of this configuration, there is no problem even if the number of lines used for transmitting 12V DC voltage (DC12VB) in the transmission line H12 is made smaller than the number of lines used for transmitting 12V DC voltage (DC12VB) in the transmission line H10. In other words, since the amount of current transmitted is also reduced, there is no problem caused by transmission over a single line.
Therefore, the number of lines is reduced, the connector on the downstream board is made smaller, and the configuration is advantageous for mounting on a board with a relatively small board area.

The gaming machine 1 of the embodiment has the following (configuration E4).
(Configuration E4)
Gaming machine 1 comprises a first board, a second board connected to the first board by a first transmission line and supplied with a first power supply voltage, and a third board connected to the second board by a second transmission line and supplied with the first power supply voltage, wherein signals for driving and controlling the presentation means transmitted over the first transmission line include a signal for motor drive control, and signals for driving and controlling the presentation means transmitted over the second transmission line do not include a signal for motor drive control, and the number of lines used for transmitting the first power supply voltage in the second transmission line is less than the number of lines for supplying the first power supply voltage in the first transmission line.

In this case as well, the above (Specific Example 5) is assumed as a corresponding example.
The signals for driving and controlling the performance means that are transmitted over the transmission line H10 and received by the side unit upper right LED board 600, which is the second board, are, for example, the enable signal ENABLE_L, the clock signal CLK_P, and the reset signal RESET_P shown in Fig. 24. As described in detail in Figs. 24 to 29, these signals are used to control the LED driver 605 (Fig. 27) and the LED driver 606 and the motor drivers 608 and 609 (Fig. 28). In other words, they include signals for LED light emission and motor drive control.

The signals for driving and controlling the performance means that are transmitted over the transmission line H12 and received by the third board, the side unit LED board 630, are, for example, the clock signal CLK, data signal DATA, and reset signal RESET shown in FIG. 32. These signals are used to control the LED driver 631.

In other words, the signals for driving and controlling the performance means transmitted over transmission line H10 include signals for driving and controlling the motor, but the signals for driving and controlling the performance means transmitted over transmission line H12 do not include signals for driving and controlling the motor.

This means that the second board, the side unit upper right LED board 600 (or a downstream board other than the side unit upper LED board 630), has a motor driver, while the third board, the side unit upper LED board 630, does not have a motor driver.
A relatively large current is used to drive the motor. Also, a large number of lines are required due to the circumstances of motor drive such as three-phase drive and four-phase drive. If the side unit LED board 630 is equipped with a motor driver or is a board that relays individual motors, a large number of lines are required to transmit 12V DC voltage (DC12VB) in the transmission line H12.
In this example, no motor drive control signal is transmitted to the side unit LED board 630. In other words, the side unit LED board 630 is not provided with a motor drive function. This simplifies the circuit in the side unit LED board 630 and reduces the size of the connector, making it possible to facilitate the miniaturization of the side unit LED board 630, which is disposed at the most downstream position and relatively forward.

[6.6 Power supply path]

The gaming machine 1 of the embodiment has the following (configuration F1).
(Configuration F1)
The gaming machine 1 comprises an inner frame 2 (frame member), a door 6 (door member) that is attached to the inner frame 2 so as to be able to be opened and closed, a game board 3 (replacement member) that is attached to the inner frame 2 so as to be able to be replaced, a presentation control board 30 attached to the game board 3, and a power supply board 300 attached to the inner frame 2, and signals for controlling the driving of the presentation means provided on the inner frame 2 or the door 6 are output from the presentation control board 30, and the power supply voltage for driving the presentation means provided on the inner frame 2 or the door 6 is supplied from the power supply board 300 without passing through the game board 3.

In the case of this (Configuration F1), a corresponding specific example is assumed as follows.
Performance means: LEDs, motors, blowers, etc., provided on the door 6. If LEDs, etc., are provided on the inner frame 2, this is also included.
Signals for driving and controlling the performance means: clear signals CLR_L, CLR_M, clock signals CLK_L, CLK_M, data signals DATA_L, DATA_M, enable signals ENABLE_L, ENABLE_M input to the inner frame LED relay board 400 in FIG.
Power supply voltage for driving the performance means: 12V direct current voltage (DC12VB).

As mentioned above, in practice, not only 12V DC voltage (DC12VB) but also 12V DC voltage (DC12V), 5V DC voltage (DC5VB, DC5V), and 12V motor drive voltage (MOT12V, MOT12VA) are used to operate the various presentation means on the door 6, but all of these are voltages based on the 12V DC voltage (DC12VB) supplied from the power supply board 300 to the inner frame LED relay board 400. Therefore, the 12V DC voltage (DC12VB), including these, becomes the power supply voltage for driving the presentation means.

As described above, the clear signals CLR_L, CLR_M, clock signals CLK_L, CLK_M, data signals DATA_L, DATA_M, and enable signals ENABLE_L, ENABLE_M from the performance control board 30 are transmitted from the inner frame LED relay board 400 to each board of the downstream door 6, and the operation of each LED and motor is carried out accordingly.
In addition, a 12V direct current voltage (DC 12V) from the power supply board 300 and a voltage based on it are supplied to each board of the downstream door 6 starting from the inner frame LED relay board 400, and are used as the power supply voltage for operating each LED and motor.
In other words, the performance means of door 6 is configured to operate using the power supply voltage supplied via transmission line H3 in response to a drive signal supplied from the performance control board 30 via transmission lines H6 and H7 shown in Figure 11.

With this configuration, it is no longer necessary to supply the power supply voltage from the power supply board 300 to the door 6 side via the performance control board 30, thereby making it possible to improve the efficiency of the power supply wiring.
In particular, wiring efficiency is improved by sending the drive signal and power supply voltage together to the front frame LED connection board 500 of the door 6 via the inner frame LED relay board 400, which is arranged in the inner frame 2 like the power supply board 300. In terms of the power supply wiring to the door 6, this also eliminates unnecessary wiring around the game board 3.

The gaming machine 1 of the embodiment has the following (configuration F2).
(Configuration F2)
The gaming machine 1 comprises an inner frame 2 (frame member), a door 6 (door member) that is attached to the inner frame 2 so as to be able to be opened and closed, a game board 3 (replacement member) that is attached to the inner frame 2 so as to be replaceable, a presentation control board 30 attached to the game board 3, and a power supply board 300 attached to the inner frame 2, and signals for driving and controlling the presentation means provided on the inner frame 2 or the door 6 are output from the presentation control board 30, and a power supply voltage for driving the presentation means provided on the inner frame 2 or the door 6 is supplied from the power supply board 300 without passing through the game board 3, and signals for driving and controlling the presentation means provided on the game board 3 are output from the presentation control board 30, and a power supply voltage for driving the presentation means provided on the game board 3 is supplied from the presentation control board 30.

In the case of this (Configuration F2), the corresponding concrete examples are the same as those of F1 above, but the presentation means include presentation means provided on the inner frame 2 or the door 6, and presentation means provided on the game board 3.
The presentation means provided on the game board 3 are LEDs, motors, etc. that are driven by the respective boards on the game board 3 of FIG.
The power supply voltage for driving the presentation means provided on the game board 3 is a 5V DC voltage (DC5V), a 12V DC voltage (DC12VB), or a 35V DC voltage (DC35V) supplied to the connector CN1J in FIG.

In this case, the same effect as that described above (Configuration F1) can be obtained with regard to the wiring to the performance means of the door 6.
In addition, the efficiency of wiring to the performance means of the game board 3 is improved. That is, since the performance control board 30 is provided on the game board 3, the power supply voltage and the signal for drive control are sent together on the performance control board 30 to the LED connection board 700 via the transmission line H20, so that unnecessary power supply wiring can be eliminated. This allows the wiring within the game board 3 to be performed efficiently.

The gaming machine 1 of the embodiment has the following (configuration F3).
(Configuration F3)
The gaming machine 1 comprises an inner frame 2 (frame member), a door 6 (door member) that is attached to the inner frame 2 so as to be able to open and close, a game board 3 (replacement member) that is attached to the inner frame 2 so as to be able to be replaced, a presentation control board 30 attached to the game board 3, a power supply board 300 attached to the inner frame 2, a first board attached to the inner frame 2, and a second board attached to the door 6, and the first board inputs a signal for controlling the operation of a presentation means provided on the inner frame 2 or the door 6 from the presentation control board 30, and inputs a power supply voltage for driving the presentation means from the power supply board 300 without passing through the game board 3, and outputs a signal for controlling the operation of the presentation means and a power supply voltage for driving the presentation means to the second board via a connector arranged on the first board.

In the case of this (Configuration F3), a corresponding specific example is as follows:
Performance means: LEDs, motors, blowers, etc., provided on the door 6. If LEDs, etc., are provided on the inner frame 2, this is also included.
First board: inner frame LED relay board 400
Second board: Front frame LED connection board 500
Signals for driving and controlling the performance means: clear signals CLR_L, CLR_M, clock signals CLK_L, CLK_M, data signals DATA_L, DATA_M, enable signals ENABLE_L, ENABLE_M input to the inner frame LED relay board 400 in FIG.
Power supply voltage for driving the performance means: 12V direct current voltage (DC12VB).
Connector: Connector CN2B of FIG.

This not only provides the same effect as the above (configuration F1) with respect to the wiring to the performance means of the door 6, but also makes the downstream wiring from the inner frame LED relay board 400 more efficient. That is, the signal wiring from the performance control board 30 (frame LED relay board 840) and the power supply wiring from the power supply board 300 are collected together with the connector CN2B and connected to the downstream front frame LED connection board 500 with the transmission line H8. This makes it unnecessary to use multiple connectors for the front frame LED connection board 500. In addition, since this transmission line H8 is the wiring for the opening and closing part between the inner frame 2 and the door 6, collecting it with a pair of connectors (CN2B, CN2C) is preferable because the wiring is less likely to be disturbed when opening and closing.
As shown in Figs. 13 and 14, the inner frame LED relay board 400 is connected to the upstream side using two connectors CN1B and CN4B.
The connector CN1B is used for wiring with the game board 3, and the connector CN4B is used for wiring within the inner frame 2. Therefore, it is preferable to use a different connector. In this case, the above-mentioned improvement in wiring efficiency is realized in the sense that signals are transmitted collectively to the downstream front frame LED connection board 500 through a single connector CN2B.

6.7 Separation of power supply voltage systems

The gaming machine 1 of the embodiment has the following (configuration G1-1).
(Configuration G1-1)
The gaming machine 1 has a board on which a first circuit for performing a light-emitting effect and a second circuit for performing a movable body effect are provided, and the board is provided with a first power supply line that supplies a power supply voltage of a predetermined level input from another board to the first circuit as a first power supply voltage, and a second power supply line that supplies the power supply voltage as a second power supply voltage to a performance motor driven by the second circuit, and the first power supply line and the second power supply line are separated via a protection circuit.

In the case of this (Configuration G1-1), the following corresponding example (Specific Example 6) is assumed.
(Specific Example 6)
Circuit board: Side unit upper right LED circuit board 600
First circuit: a circuit including the LED driver 605, the light emitting unit 612, and electrical components such as resistors, capacitors, connectors, and other conductor patterns provided for light emission (see FIG. 27 and FIG. 56)
Second circuit: Motor drivers 608, 609, and a circuit using electrical components and conductor patterns such as resistors, capacitors, connectors, etc., provided together with these for the purpose of creating movable bodies (see FIGS. 28 and 56)
Motors for performance: Side unit lower right movable motor 103, side unit upper right movable motor 104, etc. (see Figures 28 and 55)
First power supply line: power supply line PLa (see FIG. 56)
Second power supply line: power supply line PLc (see FIG. 56)
First power supply voltage: 12V DC voltage (DC12VB)
Second power supply voltage: 12V motor drive voltage (MOT12V)
Protection circuit: power supply isolation/protection circuit 670 (see FIG. 29 and FIG. 55)

Here, in order to explain this configuration, the power supply system between the upper right LED board 600 of the side unit and its upstream and downstream boards will be described with reference to Figs.
Figure 55 shows, in a format similar to that of Figure 48, the transmission of power supply voltage between the relay board 550, the side unit upper right LED board 600, the side unit lower right LED board 620, the side unit upper LED board 630, and the downstream most motor, etc.

The connector CN1D of the relay board 550 is connected to the connector CN3C of the front frame LED connection board 500 in FIG. 48 by a transmission line H9.
In this case, a 5V DC voltage (DC5VB) is supplied from the front frame LED connection board 500 through one line, and a 12V DC voltage (DC12VB) is supplied through three lines. Five lines are used for ground.

As shown in FIG. 55, the relay board 550 supplies 5V DC voltage (DC5VB) to the side unit upper right LED board 600 via a single line and 12V DC voltage (DC12VB) via two lines via a transmission line H10. Four lines are used for ground (see connector CN2D in FIG. 23 and connector CN1E in FIG. 24).

The side unit upper right LED board 600 also supplies the supplied 12V DC voltage (DC12VB) and 5V DC voltage (DC5VB) further downstream.
In the transmission line H12 from the connector CN2E, a single line transmits 12V DC voltage (DC12VB) to the downstream LED board 630 on the side unit. In this transmission line H12, two lines are used for ground (see FIG. 26).

Further, a transmission line H11 from the connector CN3E transmits a 12V DC voltage (DC12VB), a 5V DC voltage (DC5VB), and a motor drive voltage (MOT12V) to the side unit lower right LED board 620 via one line each. Here, two lines are used for ground (see FIG. 26).
Also, a 12V DC voltage (DC12VB) is transmitted through one line from the connector CN7E to the sensor 101S of the side unit device 101. Here, one line is used for ground (see FIG. 25).

Here, the motor drive voltage (MOT12V) is separated from the 12V DC voltage (DC12VB) at the side unit upper right LED board 600. As described above, the power supply separation/protection circuit 670 (see FIG. 29 ) separates the 12V motor drive voltage (MOT12V) using the 12V DC voltage (DC12VB) and supplies it to the side unit lower right LED board 620 via the transmission line H11.
In addition, the separated motor drive voltage (MOT12V) is transmitted from connector CN4E to the side unit upper right movable motor 104, from connector CN5E to the side unit upper right movable solenoid 105, and from connector CN6E to the blower 106 (see Figure 28).

In addition, in the side unit upper right LED board 600, a power supply isolation/protection circuit 671 (see Figure 29) isolates the 12V DC voltage (DC12VS) and uses it as the power supply voltage for the motor drivers 608 and 609 inside the board.

The side unit lower right LED board 620 supplies the supplied 12V DC voltage (DC12VB), 5V DC voltage (DC5VB), and motor drive voltage (MOT12V) to downstream devices.
That is, a single line from connector CN4F transmits a 12V DC voltage (DC12VB) to the side unit lower right movable object position detection switch 102. Here, one line is used as a ground. In addition, two lines from connector CN1F transmit a motor drive voltage (MOT12V) to the side unit lower right movable object motor 103. In addition, a single line from connector CN2F transmits a 12V DC voltage (DC12VB) to the LED board 625 (see FIG. 30 for the above).

FIG. 56 shows a power supply system in the side unit upper right LED board 600 that is separated from a 12V DC voltage (DC12VB).
A power supply line PLa is formed for the 12V DC voltage (DC12VB) input to the connector CN1E, and the voltage is supplied to the LED drivers 605 and 606, the light emitting unit 612, and the connectors CN2E, CN3E, and CN7E.

The motor drive voltage (MOT12V) is separated by the power supply isolation/protection circuit 670 (see FIG. 29) in FIG. 56, and a power supply line PLc is formed. As a result, the motor drive voltage (MOT12V) is used as a reference voltage by the motor drivers 608 and 609, and is supplied from the connectors CN4E, CN5E, and CN6E to downstream devices such as the side unit upper right movable motor 104, solenoid 105, and blower 106, as shown in FIG. 55.

The power supply isolation/protection circuit 671 (see FIG. 29) in FIG. 56 isolates the 12V DC voltage (DC12VS) and forms the power supply line PLb. This allows the 12V DC voltage (DC12VS) to be supplied to the motor drivers 608 and 609 as the operating voltage.

From Figure 56, it can be understood that specific example 6 corresponds to configuration G1.

In addition, the above-mentioned (Configuration G1-1) may also be considered to correspond to the following example (Specific Example 7).
(Specific Example 7)
Board: Front frame LED connection board 500
First circuit: a circuit made up of electrical components such as wiring, resistors, and capacitors related to signals for light emission, provided for light emission by the LED board downstream of the connectors CN1C, CN3C, CN4C, and CN10C. Second circuit: a circuit made up of motor drivers 510, 511, and electrical components and conductor patterns such as resistors, capacitors, and connectors provided together with these for the purpose of producing a movable body. Performance motor: a motor (not shown) connected via the connector CN10, the transmission line H15, and the connectors CN1G and CN3G (FIG. 33) of the button LED connection board 640. First power supply line: a power supply line PLp (see FIG. 57).
Second power supply line: power supply line PLr (see FIG. 57)
First power supply voltage: 12V DC voltage (DC12VB)
Second power supply voltage: 12V motor drive voltage (MOT12V)
Protection circuit: Power supply isolation/protection circuit 520

The transmission of power supply voltage between the front frame LED connecting board 500 and the upstream inner frame LED relay board 400, and the downstream relay board 550 and button LED connecting board 640 is as shown in Figures 48 and 55.
FIG. 57 shows a power supply system in the front frame LED connection board 500 that is separated from the 12 V DC voltage (DC12VB).
A 12V DC voltage (DC12VB) input to the connector CN2C forms a power supply line PLp as is, and is supplied to the LED driver 509 and the connectors CN1C, CN3C, CN4C, and CN10C.

The motor drive voltage (MOT12V) is separated by the power supply isolation/protection circuit 520 (see FIG. 15) in FIG. 57, and a power supply line PLr is formed. As a result, the motor drive voltage (MOT12V) is used as a reference voltage by the motor drivers 510 and 511, and is supplied from the connector CN10C to the button LED connection board 640 via the transmission line H15 (see FIG. 48). This motor drive voltage (MOT12V) is supplied to the motor of the vibration device from the connector CN4G of the button LED connection board 640 (see FIG. 33).

The power supply isolation/protection circuit 521 (see FIG. 19) in FIG. 57 isolates the 12V DC voltage (DC12VS) and forms a power supply line PLq. This allows the 12V DC voltage (DC12VS) to be supplied to the motor drivers 510 and 511 as an operating voltage.

From Figure 57, it can be understood that specific example 7 corresponds to configuration G1.

That is, in this type (Configuration G1-1), the LED power supply system and the motor power supply system are separated via a protection circuit, which has the effect of stabilizing the power supply voltage for the LED system, making it difficult for power supply noise caused by motor drive to be mixed in, and making it difficult for voltage fluctuations caused by motor drive to have an effect.
The LED is driven to emit light very frequently, but the motor is driven occasionally with a large current consumption. It is possible to prevent the light emission from becoming unstable due to the influence of the motor power supply voltage system.

In addition, in both the side unit upper right LED board 600 of specific example 6 and the front frame LED connection board 500 of specific example 7, the motor drive voltage (MOT12V) is separated from the supplied 12V direct current voltage (DC12VB). In other words, the power supply system is not branched into two systems on the upstream board. This makes it possible to reduce the number of power supply systems between the upstream boards, and to design with fewer harnesses and connector pins.

In addition to the above (Configuration G1-1), the gaming machine 1 of the embodiment has the following (Configuration G1-2).
(Configuration G1-2)
One or both of the first power supply voltage and the second power supply voltage are outputted to the outside of the substrate.

In the case of this (structure G1-2), the above specific examples 6 and 7 can also be mentioned.
As can be seen from Figures 56 and 57, both the side unit upper right LED board 600 of specific example 6 and the front frame LED connection board 500 of specific example 7 output a 12V direct current voltage (DC12VB) and a motor drive voltage (MOT12V) from the connector CN to downstream boards and devices.
Therefore, it is possible to use different power sources for the downstream motor and LED board.

In addition, the gaming machine 1 of the embodiment has the following (configuration G1-3) in addition to the above (configuration G1-1) or (configuration G1-2).
(Configuration G1-3)
The protection circuit is a protection circuit using a diode for preventing a reverse current from flowing from the second power supply line to the first power supply line.

The sixth and seventh concrete examples are power supply isolation/protection circuits 670 and 520, which correspond to the protection circuits, and both of them use diodes D8E (see FIG. 29) and D18C (see FIG. 15) for preventing reverse current.
This prevents the light emission operation from becoming unstable due to reverse current from the motor power supply voltage system (power supply lines PLc, PLr, which are the second power supply lines) which has a large current flow, and also makes it possible to easily separate one power supply voltage system into two power supply voltage systems using the diode.

In addition to the above (Configuration G1-3), the gaming machine 1 of the embodiment has the following (Configuration G1-4).
(Configuration G1-4)
The diode is a Schottky barrier diode.

The above-mentioned diodes D8E and D18C are Schottky barrier diodes. As they are Schottky barrier diodes with a small forward voltage drop, the motor drive voltage (MOT12V), which is the second power supply voltage, can be efficiently extracted from the 12V DC voltage (DC12VB), which is the input power supply voltage, making them suitable for use as a motor power supply with a relatively large current consumption.

The gaming machine 1 of the embodiment has the following (configuration G2-1).
(Configuration G2-1)
The gaming machine 1 has a substrate on which a first circuit for performing a light-emitting effect and a second circuit for performing a movable body effect are provided, and the substrate is provided with a first power supply line that supplies a power supply voltage of a predetermined level input from another substrate to the first circuit as a first power supply voltage, and a second power supply line that supplies the power supply voltage to the second circuit as a second power supply voltage, and the first power supply line and the second power supply line are separated via a protection circuit.

In the case of this (Configuration G2-1), the following corresponding example (Specific Example 8) is assumed.
(Specific Example 8)
Circuit board: Side unit upper right LED circuit board 600
First circuit: LED driver 605, light emitting unit 612, and a circuit consisting of electrical parts and conductor patterns such as resistors, capacitors, connectors, etc. provided together with these for light emission. Second circuit: Motor drivers 608, 609, and a circuit consisting of electrical parts and conductor patterns such as resistors, capacitors, connectors, etc. provided together with these for movable body performance. First power supply line: Power supply line PLa (see FIG. 56).
Second power supply line: power supply line PLb (see FIG. 56)
First power supply voltage: 12V DC voltage (DC12VB)
Second power supply voltage: 12V DC voltage (DC12VS)
Protection circuit: Power supply isolation/protection circuit 671

In the case of this (Configuration G2-1), the following corresponding example (Specific Example 9) is also envisioned.
(Example 9)
Board: Front frame LED connection board 500
First circuit: a circuit including electrical components such as wiring, resistors, and capacitors related to signals for light emission, provided for light emission by the LED board downstream of the connectors CN1C, CN3C, CN4C, and CN10C. Second circuit: a circuit including motor drivers 510 and 511, and electrical components and conductor patterns including resistors, capacitors, and connectors provided together with these for the purpose of producing movable bodies. First power supply line: power supply line PLp (see FIG. 57).
Second power supply line: power supply line PLq (see FIG. 57)
First power supply voltage: 12V DC voltage (DC12VB)
Second power supply voltage: 12V DC voltage (DC12VS)
Protection circuit: Power supply isolation/protection circuit 521

In this configuration (G2-1), the power supply voltage for the LED system is stabilized by separating the power supply system for the LED and the power supply system for the motor driver. In other words, it is made difficult for power supply noise caused by the motor drive to be mixed in, and the influence of voltage fluctuations caused by the motor drive is made difficult.
LEDs are driven to emit light very frequently, but the motor driver and its peripheral circuits that drive the motor are susceptible to the effects of the large current consumption by the motor. This can prevent the light emission from becoming unstable due to the effects of the power supply voltage system of the motor driver.

In addition, both the side unit upper right LED board 600 of specific example 8 and the front frame LED connection board 500 of specific example 9 separate the 12V DC voltage (DC12VS) from the supplied 12V DC voltage (DC12VB). In other words, the power supply system is not branched into two systems on the upstream board. This makes it possible to reduce the number of power supply systems between the upstream boards, and to design with fewer harnesses and connector pins.

In addition to the above (Configuration G2-1), the gaming machine 1 of the embodiment has the following (Configuration G2-2).
(Configuration G2-2)
The substrate outputs the first power supply voltage to another substrate.

In the case of this (structure G2-2), the above specific examples 6 and 7 can also be mentioned.
As can be seen from Figures 56 and 57, both the side unit upper right LED board 600 of specific example 6 and the front frame LED connection board 500 of specific example 7 output a 12V DC voltage (DC12VB) from the connector CN to the downstream board.
In the case of the side unit upper right LED board 600, the downstream board is the side unit lower right LED board 620 or the side unit upper LED board 630. In the case of the front frame LED connection board 500, it is the relay board 550 (or the side unit upper right LED board 600 via the relay board 550) or the button LED connection board 640.
Therefore, even on downstream boards, it is possible to use a 12V direct current voltage (DC12VB), which is less susceptible to the influence of the power supply voltage system of the motor driver.

Furthermore, the gaming machine 1 of the embodiment has the following (Configuration G 2 -3) in addition to the above (Configuration G 2 -1) or (Configuration G 2 -2).
(Configuration G2-3)
The protection circuit is a protection circuit using a diode for preventing a reverse current from flowing from the second power supply line to the first power supply line.

The specific examples 8 and 9 mentioned above include power supply separation/protection circuits 671 and 521, which correspond to the protection circuit, but both of them use diodes D7E (see FIG. 29) and D19C (see FIG. 19) for preventing reverse current.
This prevents the light emission operation from becoming unstable due to reverse current from the motor driver power supply voltage system (power supply lines PLb, PLq, which are the second power supply lines), and enables one power supply voltage system to be easily divided into two power supply voltage systems by the diode.

The diodes D7E and D19C may be Schottky barrier diodes.

The gaming machine 1 of the embodiment has the following (configuration G3-1).
(Configuration G3-1)
The gaming machine 1 has a board on which a first circuit for performing a movable object presentation is provided, and the board is formed with a first power supply line that supplies a power supply voltage of a predetermined level input from another board to the first circuit as a first power supply voltage, and a second power supply line that supplies the power supply voltage as a second power supply voltage to a presentation motor driven by the first circuit, and the first power supply line and the second power supply line are separated via a protection circuit.

In the case of this (Configuration G3-1), the following corresponding example (Specific Example 10) is envisioned.
(Example 10)
Circuit board: Side unit upper right LED circuit board 600
First circuit: motor drivers 608, 609, and a circuit consisting of electrical components and conductor patterns such as resistors, capacitors, connectors, etc., provided together with these for the purpose of producing movable bodies. Performance motors: side unit lower right movable motor 103, side unit upper right movable motor 104, etc. First power supply line: power supply line PLb (see FIG. 56)
Second power supply line: power supply line PLc (see FIG. 56)
・Predetermined level of power supply voltage: 12V DC voltage (DC12VB)
First power supply voltage: 12V DC voltage (DC12VS)
Second power supply voltage: Motor drive voltage (MOT12V)
Protection circuit: power supply isolation/protection circuit 670, 671

In the case of this (Configuration G3-1), the following corresponding example (Specific Example 11) is also envisioned.
(Specific Example 11)
Board: Front frame LED connection board 500
First circuit: a circuit consisting of motor drivers 510 and 511, and electrical components such as resistors, capacitors, connectors, and other conductor patterns provided together with these for the purpose of producing a movable body. Performance motor: a motor (not shown) connected via connector CN10, transmission line H15, and connectors CN1G and CN3G (FIG. 33) of button LED connection board 640. First power supply line: power supply line PLq (see FIG. 57).
Second power supply line: power supply line PLr (see FIG. 57)
・Predetermined level of power supply voltage: 12V DC voltage (DC12VB)
First power supply voltage: 12V DC voltage (DC12VS)
Second power supply voltage: Motor drive voltage (MOT12V)
Protection circuit: power supply isolation/protection circuits 520, 521

In this type (configuration G2-1), the motor power supply system and the motor driver power supply system are separated via a protection circuit, stabilizing the power supply voltages of each. In other words, it prevents reverse current and power supply noise from being introduced into the motor driver power supply system due to high current drive from the motor system.

In addition, both the side unit upper right LED board 600 in Example 10 and the front frame LED connection board 500 in Example 11 separate the 12V DC voltage (DC12VS) and the motor drive voltage (MOT12V) from the supplied 12V DC voltage (DC12VB). In other words, the power supply system is not branched into three systems on the upstream board. This makes it possible to reduce the number of power supply systems between the upstream boards, and to design with fewer harnesses and connector pins.

In addition to the above (Configuration G3-1), the gaming machine 1 of the embodiment has the following (Configuration G3-2).
(Configuration G3-2)
One or both of the first power supply voltage and the second power supply voltage are outputted to the outside of the substrate.

In the case of this (Configuration G3-2), the above specific examples 10 and 11 can also be mentioned.
As can be seen from Figures 56 and 57, both the side unit upper right LED board 600 in Example 10 and the front frame LED connection board 500 in Example 11 output the motor drive voltage (MOT12V) from the connector CN to downstream boards and devices. Therefore, the motor drive voltage on the downstream side is also an independent power supply voltage system, and the impact on other power supply systems can be reduced.

In addition, a configuration example in which a 12V DC voltage (DC12VS) is supplied to a motor driver in a downstream board is also conceivable. For example, a 12V DC voltage (DC12VS) may be supplied from the front frame LED connection board 500 to the side unit upper right LED board 600 via the relay board 550, and used as a power supply voltage for the motor drivers 608 and 609.

In addition to the above-mentioned (Configuration G3-1) or (Configuration G3-2), the gaming machine 1 of the embodiment has the following (Configuration G3-3).
(Configuration G3-3)
As the protection circuit, a protection circuit using a first diode for preventing a reverse current from the first power supply line, and a protection circuit using a second diode for preventing a reverse current from the second power supply line are provided.

In the case of the side unit upper right LED board 600 of specific example 10, a power supply isolation/protection circuit 671 using a first diode D7E (see FIG. 29) from the power supply line PLb, and a power supply isolation/protection circuit 670 using a second diode D8E (see FIG. 29) from the power supply line PLc are provided.
In the case of the front frame LED connection board 500 of concrete example 11, a power supply isolation/protection circuit 521 using a first diode D19C (see FIG. 19) from the power supply line PLq, and a power supply isolation/protection circuit 520 using a second diode D18C (see FIG. 15) from the power supply line PLr are provided.

This prevents the power supply for the motor driver, etc. from becoming unstable due to reverse current from the power supply lines PLc, PLr (second power supply lines) of the 12V motor drive voltage (MOT12V), which is the power supply for the motor with a large current.
In addition, it is possible to prevent other power supply systems from becoming unstable due to reverse current from the power supply lines PLb, PLq (first power supply lines) of the 12V direct current voltage (DC12VS), which is the power supply voltage for the motor driver.
In this case, one power supply voltage system can be easily divided into two power supply voltage systems by the first and second diodes.

In addition to the above (Configuration G3-3), the gaming machine 1 of the embodiment has the following (Configuration G3-4).
(Configuration G3-4)
The second diode is a Schottky barrier diode.

That is, the diode D8E (see FIG. 29) and the diode D18C (see FIG. 15) are Schottky barrier diodes.
Because it is a Schottky barrier diode with a small forward voltage drop, the second power supply voltage, the motor drive voltage (MOT12V), can be efficiently extracted from the input power supply voltage, 12V direct current voltage (DC12VB), making it suitable as a motor power supply with relatively large current consumption.

In addition to the above (Configuration G3-3), the gaming machine 1 of the embodiment has the following (Configuration G3-5).
(Configuration G3-5)
The second diode is a Schottky barrier diode, and the first diode has a forward voltage higher than that of the second diode.

That is, the diode D7E (see FIG. 29) and the diode D19C (see FIG. 19) are normal diodes having a higher forward voltage than a Schottky barrier diode, for example, a normal PN diode.
In the case of Schottky barrier diodes, the low forward voltage means good current efficiency, but the layout area on the board is relatively large. This can be disadvantageous for alignment on the board and can easily lead to an increase in board area. Therefore, a general diode with a small area is used on the motor driver side, which consumes less current than the motor. This prevents the required area from increasing, realizes efficient board layout, and is advantageous for application on small boards.

The gaming machine 1 of the embodiment has the following (configuration G4-1).
(Configuration G4-1)
The gaming machine 1 has a first electrical component related to a first presentation, a second electrical component related to a second presentation, and a first board, and the first board is provided with a first power supply line that supplies a power supply voltage of a predetermined level input from an external board to the first electrical component as a first power supply voltage, and a second power supply line that supplies the power supply voltage to the second electrical component as a second power supply voltage, the first power supply line and the second power supply line being separated via a protection circuit, and only one of the first power supply voltage and the second power supply voltage is output from the first board to the second board.

In the case of this (Configuration G4-1), the following corresponding example (Specific Example 12) is envisioned. Note that the first and second effects can be any of the following effects: a light-emitting effect by an LED, a movable body effect by a motor/solenoid, etc., an image display effect on an LCD panel, a vibration effect, an air blower effect, an audio effect, etc., but in the following example, the first effect is a light-emitting effect and the second effect is a movable body effect.

(Specific Example 12)
First board: front frame LED connection board 500
Second board: relay board 550 and side unit upper right LED board 600
・First electrical component: Electrical components related to light emission (circuit components and devices)
・Second electrical component: Electrical components related to the moving object performance (circuit components and devices)
First power supply line: power supply line PLp
Second power supply line: power supply line PLr or PLq
First power supply voltage: 12V DC voltage (DC12VB)
Second power supply voltage: motor drive voltage (MOT12V), or 12V DC voltage (DC12VS)
Protection circuit: power supply isolation/protection circuit 520 or 521

In this configuration (G4-1), the power supply system is separated in the front frame LED connection board 500, which is the upstream board, via a power supply separation/protection circuit 520 or a power supply separation/protection circuit 521. For example, the power supply line PLp and the power supply line PLr (or PLq) are separated. Then, only the 12V DC voltage (DC12VB) of the power supply line PLp is output to the downstream relay board 550 (and the side unit upper right LED board 600).
In other words, the necessary power supply system is formed within the board, while one system of power supply voltage is supplied to the downstream second board, thereby simplifying the wiring between the boards (for example, the transmission lines H9 and H10).

This configuration is particularly advantageous when the boards are spaced apart. The front frame LED connection board 500, relay board 550, and side unit upper right LED board 600 are spaced apart, at the bottom left and top right of the gaming machine 1, as shown in Figure 8, so the transmission line H9 must be long. In such cases, it is useful to be able to reduce the number of power supply systems.

Incidentally, in this (configuration G4-1), the second board can also be considered as a button LED connection board 640. This is an example in which a second power supply voltage is sent to the second board.
In this case, the front frame LED connection board 500 outputs only the motor drive voltage (MOT12V) of the power supply line PLr to the downstream button LED connection board 640 .
That is, in this case as well, a single system of power supply voltage is supplied to the second board on the downstream side, making it possible to simplify the wiring between the boards (for example, the transmission line H15).

In addition to the above (Configuration G4-1), the gaming machine 1 of the embodiment has the following (Configuration G4-2).
(Configuration G4-2)
In the second substrate, the one power supply voltage supplied from the first substrate is separated into a plurality of power supply lines via a protection circuit.

The second board of this (configuration G4-2) corresponds to the upper right LED board 600 of the side unit.
The side unit upper right LED board 600 inputs a 12V DC voltage (DC12VB) from the front frame LED connection board 500, which is the first board, and separates it into multiple power supply lines PLa, PLb, and PLc via power supply isolation/protection circuits 670 and 671.

In other words, even though the transmission lines H9 and H10 are a single power supply system, if a motor drive voltage (MOT12V) or 12V DC voltage (DC12VS) is required downstream, the power supply is branched off on the downstream board.
This makes it possible to supply power from only one power supply system via the transmission lines H9 and H10, regardless of the downstream configuration.
This is useful when there is a downstream board in a part (side unit 10 in this example) that can be replaced for each model. In the side unit 10, there are models with and without a motor, and models without a motor naturally do not need a power supply for the motor. Considering this, the transmission lines H9 and H10 only need to transmit one system of power, but this is not possible for models with a motor. Therefore, for models with a motor, the motor drive voltage (MOT12V) and 12V DC voltage (DC12VS) are separated as necessary even on the second board (side unit upper right LED board 600).
In other words, by separating the same type of power supply voltage as that separated on the first board (front frame LED connection board 500) on the second board as well, simplification of the transmission lines H9 and H10 is achieved.

In addition to the above (Configuration G4-1) or (Configuration G4-2), the gaming machine 1 of the embodiment also has the following (Configuration G4-3).
(Configuration G4-3)
The second board is provided with a power supply line for driving a motor, the power supply line being isolated via a protection circuit from the one power supply voltage supplied from the first board.

The second board of this configuration G4-3 corresponds to the side unit upper right LED board 600, and separates the motor drive voltage (MOT12V) of the power supply line PLc via a power supply isolation/protection circuit 670.
When obtaining the motor drive voltage (MOT), the power supply isolation/protection circuit 670 prevents backflow, thereby preventing the influence of power supply noise caused by the motor drive from affecting other power supply systems.

The gaming machine 1 of the embodiment has the following (configuration G5-1).
(Configuration G5-1)
The gaming machine 1 has a first electrical component related to a first presentation, a second electrical component related to a second presentation, and a first board, and the first board is formed with a first power supply line that supplies a power supply voltage of a predetermined level input from an external board to the first electrical component as a first power supply voltage, and a second power supply line that supplies the power supply voltage to the second electrical component as a second power supply voltage, the first power supply line and the second power supply line being separated via a protection circuit, and both the first power supply voltage and the second power supply voltage being output from the first board to the second board.

In the case of this (configuration G5-1), the following corresponding example (specific example 13) is envisioned. Note that the first and second effects can be any of the following effects: a light-emitting effect by an LED, a movable body effect by a motor/solenoid, etc., an image display effect on an LCD panel, a vibration effect, an air blower effect, an audio effect, etc., but in the following example, the first effect is a light-emitting effect and the second effect is a movable body effect.

(Specific Example 13)
First board: Side unit upper right LED board 600
Second board: Side unit lower right LED board 620
・First electrical component: Electrical components related to light emission (circuit components and devices)
・Second electrical component: Electrical components related to the moving object performance (circuit components and devices)
First power supply line: power supply line PLa
Second power supply line: power supply line PLc
First power supply voltage: 12V DC voltage (DC12VB)
Second power supply voltage: Motor drive voltage (MOT12V)
Protection circuit: Power supply isolation/protection circuit 670

In this configuration (G5-1), both the 12V DC voltage (DC12VB) and the motor drive voltage (MOT12V) separated by the power supply isolation/protection circuit 670 in the upper right LED board 600 of the side unit are supplied to the lower right LED board 620 of the downstream side unit (see FIG. 55).
The side unit upper right LED board 600 forms a power supply line PLa for 12V direct current voltage (DC12VB) and a power supply line PLc for motor drive voltage (MOT12V), which respectively supply power to the first electrical component and the second electrical component. This configuration can also be used in the downstream side unit lower right LED board 620.
This eliminates the need to provide a circuit for power supply separation (power supply separation/protection circuit 670) on the side unit lower right LED board 620 side, simplifying the circuit configuration on the board.

Furthermore, a configuration that transmits both a 12V direct current voltage (DC12VB) and a motor drive voltage (MOT12V) is an effective configuration between boards that are relatively close to each other or between boards that are included in the same unit.
The side unit upper right LED board 600 and the side unit lower right LED board 620 are boards arranged in close positions as shown in FIG. 8, and the length of the transmission line H11 is also short. In addition, both of these are boards arranged inside the side unit 10, and are usually handled as a unit of the side unit 10. In other words, even if the side unit upper right LED board 600 and the side unit lower right LED board 620 have a slightly complicated wiring configuration or a large number of lines, this is not a major disadvantage. On the contrary, the advantage of only having to provide the power supply separation/protection circuit 670 for power supply separation on the side unit upper right LED board 600 side is greater. For this reason, the separated multiple power supply systems are transmitted downstream as they are, and the multiple power supply systems can be used as they are on the downstream board as well.
In addition, the power supply isolation/protection circuit 670 prevents power supply noise from the motor power supply system from flowing into the 12V DC voltage (DC12VB) for light emission, stabilizing the LED light emission operation. This effect of stabilizing the LED light emission operation can also be obtained on the side of the lower right LED board 620 of the side unit.

Note that such a (Configuration G5-1) differs from the above-mentioned (Configuration G4-1) in the above points. An example of applying (Configuration G4-1) was the front frame LED connection board 500 and the relay board 550 (and the side unit upper right LED board 600), but this is more effective when the boards are spaced apart as described above.
On the other hand, (Configuration G5-1) is a suitable configuration for substrates that are close to each other or substrates that are handled together.

In addition to the above (Configuration G5-1), the gaming machine 1 of the embodiment has the following (Configuration G5-2).
(Configuration G5-2)
The second electric component consumes a larger current than the first electric component.

In the above-mentioned specific example 13, the first electric component is an electric component related to light emission performance, and the second electric component is an electric component related to movable body performance. In this case, the first electric component is an LED, an LED driver, and their peripheral circuit components, and the second electric component is a device such as a motor or a solenoid, a motor driver, and their peripheral circuit components. In other words, the second electric component consumes a large amount of power.
By separating the power supply system for such a second electric component as a power supply line PLa, the influence on the operation of the first electric component can be reduced.

In addition to the above (Configuration G5-1) or (Configuration G5-2), the gaming machine 1 of the embodiment has the following (Configuration G5-3).
(Configuration G5-3)
The second substrate also has the first electrical component and the second electrical component.

The side unit lower right LED board 620, which corresponds to the second board, has an LED light emitting unit 622 and an LED driver 621, which correspond to the first electrical component (see FIG. 31). It also has a connector CN1F, which corresponds to the second electrical component. In this case, the connector CN1F forms a circuit for the side unit lower right movable motor 103.
In this way, the side unit lower right LED board 620 is a board that uses both 12V DC voltage (DC12VB) and motor drive voltage (MOT12V), and is suitable for transmitting these.

Incidentally, the configurations described above from (Configuration G1-1) to (Configuration G5-3) also have the aspect of dividing the power supply system according to its use.
For example, the side unit upper right LED board 600 uses the supplied 12V DC voltage (DC12VB) for both LED light emission drive and motor drive.
At this time, the 12V motor drive voltage (MOT12V) and the 12V DC voltage (DC12VS) are separated from the 12V DC voltage (DC12VB) as shown in Fig. 29. The 12V motor drive voltage (MOT12V) and the 12V DC voltage (DC12VS) are prevented from affecting the 12V DC voltage (DC12VB) by the diode D7E and the Schottky barrier diode D8E.

The 12V motor drive voltage (MOT12V) and the 12V direct current voltage (DC12VS) are used in the motor drivers 608 and 609 in FIG.
On the other hand, as shown in FIG. 27, an LED driver 605 drives a light emitting section 612 to emit light using a 12 V direct current voltage (DC12VB).
Thus, the 12V DC voltage (DC12VB) is the power supply voltage for the LEDs and the LED drivers.
The 12V motor drive voltage (MOT12V) is a power supply voltage for driving the motor.
The 12V direct current voltage (DC12VS) is the power supply voltage for the motor driver.
By dividing the 12V power supply system according to the purpose, mutual influence is avoided. For example, in the past, if the LED power supply voltage was directly used for a motor driver, the motor driver could break down. Therefore, to avoid such a situation, the power supply system is divided according to the purpose.

In addition, even when a large current is consumed momentarily due to the motor drive of the movable part, the LED light emission is not affected, and the LED light emission is stabilized, while the number of lines for the power supply voltage in the transmission line H10 can be reduced.

[6.8 Number of power lines and ground lines]

The gaming machine 1 of the embodiment has the following (configuration H1-1).
(Configuration H1-1)
The gaming machine 1 has a first board on which a circuit related to the drive control of the presentation device and an output connector are provided, a second board on which a circuit related to the drive control of the presentation device and an input connector are provided, and wiring that electrically connects the output connector and the input connector, and each of the connectors and wiring is configured to include a power supply terminal of a first system, a power supply terminal of a second system different from the first system, a ground terminal, and a drive signal terminal, and when the number of power supply terminals of the first system is N, the number of power supply terminals of the second system is M, and the number of ground terminals is L, the relationship N+M>L is satisfied.

In this (Configuration H1-1), the following corresponding example (Specific Example 14) is assumed.
(Specific Example 14)
First board: LED connection board 700
Second board: Lower relay board 800
Output side connector: Connector CN11J (see FIG. 40)
Input side connector: Connector CN1Q (see FIG. 46)
・Wiring: Transmission line H30
- First system power terminal: 4th pin, 6th pin (number N = 2)
- Second power supply terminal: Pin 7, Pin 9 (number of pins M = 2)
Ground terminal: 1st pin, 15th pin, 16th pin (number of pins L = 3)
Circuits related to driving and controlling the performance devices: Electrical components, wiring, etc. constituting the LED driving circuit system from the LED connection board 700 to the decorative board 820

In this configuration (H1-1), the number of ground lines (terminals) is made smaller than the number of power lines (terminals) in accordance with the current consumption on the downstream side.
FIG. 58 shows the LED connection board 700, the underside relay board 800, and the transmission of the power supply system downstream thereof.
A 12V DC voltage (DC12VB) is transmitted as the first system power supply voltage through two lines from the connector CN11J of the LED connection board 700 to the connector CN1Q of the lower panel relay board 800, and a motor drive voltage (MOT12V) is transmitted as the second system power supply voltage through two lines. The number of ground lines is three.

Downstream from the lower panel relay board 800, 12V DC voltage (DC12VB) is transmitted via six lines to the decorative board 820 via connector CN3Q and transmission line H31.
Also, a motor drive voltage (MOT12V) is transmitted to the movable motor 830 from the connector CN2Q.
In addition, a 12V DC voltage (DC12VB) is transmitted from connector CN4Q to position detection switch 831.

Now consider the transmission line H30 and the connectors CN11J and CN1Q at both ends of the line.
As a basic design, if there are four power lines, there should also be four ground lines, but as shown in the figure, there are three ground lines.
This is because a plurality of types of power supply voltages are supplied in a number sufficient to satisfy the respective current consumptions, but the number of ground lines only needs to be equal to the total current consumption.
In addition, the under-board relay board 800 and the LED connection board 700 are multi-layered boards, and also have a layer in which the ground is commonly formed as a so-called solid ground, which is a wide area of conductor. The multiple pins assigned to the ground in the connector CN11J and the connector CN1Q are connected to a common ground in the board. Therefore, one pin and line assigned to the ground is not a dedicated ground for each power supply. Unless otherwise specified, it is possible to imagine a form in which the ground pin of such a connector is connected to a common ground in other boards as well.

Let's assume that one line can handle 1A (ampere).
Here, the maximum current consumption on the downstream side is considered. In this case, it is the sum of the maximum current used by the decorative substrate 820, the maximum current used by the movable motor 830, and the maximum current used by the position detection switch 831.
For example, if the sum of the current consumption of the decorative board 820 and the position detection switch 831 in the 12V DC voltage (DC12VB) system is 1.3A, and the current consumption of the movable motor 830 in the motor drive voltage (MOT12V) system is 1.6A, then each power supply system requires two lines. For this reason, four lines are provided, two for each system.
However, in this case, the ground only needs to be for a total of 2.9 A, so the number of lines for the ground only needs to be three.

In other words, for the LED connection board 700, transmission line H30, and under-panel relay board 800, the number of lines for the two types of power supply voltages is set to four according to the respective current consumption, while for ground, the number of lines is set to three based on the total maximum current consumption.
This reduces the number of lines required for power supply.
In addition, the number of wirings between the boards is reduced, and the number of terminals of the connector CN is reduced, thereby achieving cost reduction and space saving.

In the above (Configuration H1-1), the following corresponding example (Specific Example 15) is also envisioned.
(Specific Example 15)
First board: inner frame LED relay board 400
Second board: Front frame LED connection board 500
Output connector: Connector CN2B (see FIG. 13)
Input side connector: Connector CN2C (see FIG. 15)
・Wiring: Transmission line H8
First system power supply terminals: pins 27, 28, 29, and 30 (number N=4)
- Second power supply terminal: 1st pin, 3rd pin (number of pins M = 2)
Ground terminals: 5th pin, 7th pin, 8th pin, 17th pin, 18th pin (number of pins L = 5)
Circuits related to driving and controlling the performance devices: Electrical components, wiring, etc. constituting the LED driving circuit system from the inner frame LED relay board 400 to the front frame LED connection board 500

In this case, by knowing the current consumption on the downstream side, the number of power lines (number of terminals) for the combined 12V DC voltage (DC12VB) of the first system and 5V DC voltage (DC5VB) of the second system is six, but the number of ground lines (number of terminals) is reduced to five.

In other words, for the inner frame LED relay board 400, transmission line H8, and front frame LED connection board 500, the number of lines for the two types of power supply voltages is set according to the respective current consumption, making up six lines, while for ground, the number of lines is set based on the total maximum current consumption, making up five lines.
This reduces the number of lines required for power supply.
In addition, the number of wirings between the boards is reduced, and the number of terminals of the connector CN is reduced, thereby achieving cost reduction and space saving.
5, the transmission line H8 constitutes the wiring between the inner frame 2 and the door 6, and is a wiring that moves with the opening and closing of the door 6 and is also exposed to the outside. Therefore, the effect of being able to reduce the number of lines is significant.
In addition, since the connector CN2B and CN2C are located at the opening and closing portion of the door 6, there are likely to be restrictions on the placement and height of the components depending on the operation. For this reason, it is desirable to reduce the size of both connectors CN2B and CN2C, and it is extremely effective from the design perspective to be able to reduce the number of terminals of connectors CN2B and CN2C.

Now, consider the following (Specific Example 16), which has three power supply systems.
(Specific Example 16)
First board: Side unit upper right LED board 600
Second board: Side unit lower right LED board 620
Output connector: Connector CN3E (see FIG. 26)
Input side connector: Connector CN3F (see Figure 30)
・Wiring: Transmission line H11
- Power supply terminal for the first system (DC12VB): Pin 11 (number of pins = 1)
- Power terminal for the second system (MOT12V): Pin 15 (number of pins = 1)
- Power supply terminal for the third system (5V DC): Pin 1 (number of pins = 1)
- Ground terminal: Pin 8, Pin 13 (number of pins = 2)

The same idea as above is also adopted for the side unit lower right LED board 620 in Figure 30, with three lines used for three types of power supply voltages (5V DC voltage (DC5VB), 12V DC voltage (DC12VB), motor drive voltage (MOT12V)) and two lines for ground. This also achieves the effect of reducing the number of lines.

Therefore, the technology realized in specific examples 14 and 15 can also be described as having wiring that electrically connects the first substrate, the second substrate, the output side connector and the input side connector in (configuration H1-1), and in other words, when the number of all power supply terminals of the multiple systems is X and the number of ground terminals is L, the connectors and the wiring satisfy the relationship X>L.

In addition to the above (Configuration H1-1), the gaming machine 1 of the embodiment has the following (Configuration H1-2).
(Configuration H1-2)
The number of the ground terminals is the smallest number among integers greater than the sum of the maximum current consumption of the first power supply and the maximum current consumption of the second power supply divided by the rated current value of the connector terminal.

In other words, in accordance with specific example 14, the sum of the maximum current consumption of each system is 2.9 A, and the rated current value of the connector terminal is 1 A, so 2.9 ÷ 1 = 2.9, and the number of ground terminals is set to "3", which is the smallest number among integers larger than that.
This is the most efficient wiring configuration.
The same can be considered for the case of Example 15.

In addition, even when the first, second, and third power supply systems are provided as in Example 16, the wiring efficiency is maximized by setting the number of ground terminals to the smallest integer number greater than the sum of the maximum current consumption of the power supply systems divided by the rated current value of the connector terminal.

In addition, the gaming machine 1 of the embodiment has the following (Configuration H1-3) in addition to the above (Configuration H1-1) or (Configuration H1-2).
(Configuration H1-3)
The first power supply and the second power supply are separated from each other on the first substrate via a protection circuit.

In the case of the concrete example 14, as shown in Fig. 36, the 12V motor drive voltage (MOT12V) is separated from the 12V DC voltage (DC12VB) by the power supply separation/protection circuit 790. This separates the 12V motor drive voltage (MOT12V) as a power supply voltage with overvoltage protection and backflow prevention. Therefore, the LED light-emitting circuit system in the LED connection board 700, the under-panel relay board 800, and the decorative board 820 is separated from power supply noise caused by the motor drive voltage system, and stable light-emitting operation is performed.

In addition, the gaming machine 1 of the embodiment has the following (Configuration H1-4) in addition to the above (Configuration H1-3).
(Configuration H1-4)
The protection circuit is constructed using a Schottky barrier diode.

The above-mentioned power supply isolation/protection circuit 790 uses a Schottky barrier diode D5J. As this is a Schottky barrier diode with a small forward voltage drop, it can efficiently extract the motor drive voltage (MOT12V) from the 12V DC voltage (DC12VB), making it suitable as a motor power supply with a relatively large current consumption.

The gaming machine 1 of the embodiment has the following (configuration H2-1).
(Configuration H2-1)
The gaming machine 1 has a first board on which a circuit related to the drive control of the presentation device and an output connector are provided, a second board on which a circuit related to the drive control of the presentation device and an input connector are provided, and wiring that electrically connects the output connector and the input connector, and each of the connectors and wiring is configured to include a power supply terminal of a first system, a power supply terminal of a second system different from the first system, a ground terminal, and a drive signal terminal, and if the number of power supply terminals of the first system is N, the number of power supply terminals of the second system is M, and the number of ground terminals is L, then the relationship N+M>L is satisfied, and the power supply of the first system and the power supply of the second system have different voltages.

Such a (Configuration H2-1) corresponds to the above-mentioned (Specific Example 15).
In other words, in the inner frame LED relay board 400, transmission line H8, and front frame LED connection board 500, two different power supply voltages, a 12V DC voltage (DC12VB) for the first system and a 5V DC voltage (DC5VB) for the second system, are connected to six lines by setting the number of lines according to the respective consumption currents, while for ground, the number of lines is set to five based on the total maximum consumption current.
This reduces the number of lines required for power supply, the number of wiring between boards, and the number of terminals of the connector CN, thereby reducing costs and saving space. As mentioned above, the transmission line H8 constitutes the wiring between the inner frame 2 and the door 6, and moves when the door 6 is opened or closed, and since it is an exposed wiring, these effects are extremely effective in design and also lead to operational stability.
In particular, since an increase in the number of lines is unavoidable to some extent in order to transmit two types of power supply systems with different voltages, it is significant that the number of ground lines can be reduced, thereby reducing the overall number of lines and terminals.

In addition to the above (Configuration H2-1), the gaming machine 1 of the embodiment has the following (Configuration H2-2).
(Configuration H2-2)
The number of the ground terminals is the smallest number among integers greater than the sum of the maximum current consumption of the first power supply and the maximum current consumption of the second power supply divided by the rated current value of the connector terminal.

In other words, in accordance with concrete example 15, if the sum of the maximum current consumption of the first and second systems is, for example, 4.8 A and the rated current value of the connector terminal is 1 A, then 4.8÷1=4.8, and the number of ground terminals is set to "5", which is the smallest integer number larger than 4.8. This is the most efficient wiring configuration.

6.9 Buffers and signal branching

The gaming machine 1 of the embodiment has the following (Configuration J1). Figure 59 shows the configuration of the "substrate" of this (Configuration J1).
(Configuration J1)
The gaming machine 1 has a first electrical component EP related to a first performance, and is equipped with a first board that relays a performance control signal to other boards, and the first board has a first buffer circuit BF1 that buffers the input performance control signal and supplies it to the first electrical component EP, and a second buffer circuit BF2 that branches and inputs the performance control signal output from the first buffer circuit BF1 and supplied to the first electrical component EP, buffers it, and converts it into a performance control signal that is supplied to other boards.

In this (Configuration J1), the following corresponding example (Specific Example 17) is assumed.
(Example 17)
・Performance control signals: Clock signal CLK_P (CLK_A), data signal DATA_P (DATA_A), reset signal RESET_P (RESET_A)
First board: Side unit upper right LED board 600
Other boards: Side unit LED board 630
First electric component EP: LED driver 605, light emitting unit 612, etc. (see FIG. 27)
First buffer circuit BF1: Buffer circuit 601 (see FIG. 25)
Second buffer circuit BF2: Buffer circuit 604 (see FIG. 26)

The signal paths of the performance control signals, i.e., the clock signal CLK_P (CLK_A), the data signal DATA_P (DATA_A), and the reset signal RESET_P (RESET_A), in the side unit upper right LED board 600 previously shown in Figures 24 to 29 are simplified and shown in Figure 60.

The clock signal CLK_P, data signal DATA_P, and reset signal RESET_P input to connector CN1E are first buffered by buffer circuit 601 at the input stage. The clock signal CLK_A, data signal DATA_A, and reset signal RESET_A, which are the outputs of buffer circuit 601, are branched and supplied to buffer circuit 604, LED driver 605, and LED driver 606.

The LED driver 605 drives the light emitting unit 612 to emit light based on the clock signal CLK_A, the data signal DATA_A, and the reset signal RESET_A, realizing the light emission effect.

The buffer circuit 604 branches the clock signal CLK_A, the data signal DATA_A, and the reset signal RESET_A into two systems, which are input to different terminals: one system of A1, A2, and A3 terminals, and the other system of A5, A6, and A7 terminals (see FIG. 26).
The clock signal CLK_A, data signal DATA_A, and reset signal RESET_A input to the A1, A2, and A3 terminals are buffered and supplied to the connector CN2E from the Y1, Y2, and Y3 terminals, and then supplied to the LED board 630 on the side unit via the transmission line H12 as the clock signal CLK, data signal DATA, and reset signal RESET.

The clock signal CLK_A, data signal DATA_A, and reset signal RESET_A input to the A5, A6, and A7 terminals of the buffer circuit 604 are buffered and supplied to the connector CN3E from the Y5, Y6, and Y7 terminals, and are then supplied as the clock signal CLK, data signal DATA, and reset signal RESET to the lower right LED board 620 of the side unit via the transmission line H11.

The LED driver 606 converts the serial data of the clock signal CLK_A, data signal DATA_A, and reset signal RESET_A into parallel data and supplies it to the motor drivers 608 and 609 via the buffer circuit 607. The motor drive signals MOT1-1, MOT1-2, MOT1-/1, and MOT1-/2 generated by the motor drivers 608 and 609 are output from the connector CN3E, and drive the motor connected to the downstream side unit lower right LED board 620.

As can be seen more clearly from FIG. 60, the above (structure J1) has the structure of FIG. 59 as a specific example 17.
That is, the side unit upper right LED board 600 relays a performance control signal to the downstream side unit upper LED board 630, and also drives the LEDs for light emission itself (equipped with an LED driver 605). In this case, the performance control signal from the upstream is buffered by the buffer circuit 601, then branched to the LED driver 605 and the downstream side unit upper LED board 630, and further buffered by the buffer circuit 604 before being supplied downstream.

Therefore, the buffer circuit 601 compensates for signal attenuation up to the input, realizing stable operation of the LED driver 605. Furthermore, by compensating the signal with the buffer circuit 604 at the output stage before relaying the signal downstream, a stable signal can be transmitted to the downstream side as well.
In particular, in the case of the side unit upper right LED board 600, the performance control signal is supplied from the front frame LED connection board 500 over a long line and via the relay board 550. Since attenuation due to the long line length on the route and passing through the four connectors CN3C, CN1D, CN2D, and CN1E is relatively large, signal compensation by the buffer circuit 601 is an appropriate process.
Furthermore, after branching inside, the signal compensation of the buffer circuit 604 becomes an appropriate process to perform stable signal transmission from the connector CN2E of the output stage to the LED board 630 on the downstream side unit.

Note that damping resistors Rd1 and Rd2 are shown in Fig. 59. That is, the performance control signal is input to the first buffer circuit BF1 via the damping resistor Rd1.
In addition, the performance control signal output from the second buffer circuit BF2 is output via a damping resistor Rd2.

In the case of the above-mentioned specific example 17, the damping resistors R9E, R11E, and R12E shown in FIG. 24 correspond to the damping resistor Rd1.
Moreover, the damping resistors R18E, R19E, and R20E shown in FIG. 26 correspond to the damping resistor Rd2.

The clock signal CLK_P, data signal DATA_P, and reset signal RESET_P are subjected to noise reduction and suppression of overshoot and undershoot in the waveform as serial data by damping resistors R9E, R11E, and R12E, and then buffered by the buffer circuit 601. This allows signal compensation while maintaining the quality of the waveform, which is advantageous in terms of suppressing signal degradation.
In addition, the clock signal CLK_A, data signal DATA_A, and reset signal RESET_A are buffered by the buffer circuit 604, and then output after noise reduction and suppression of overshoot and undershoot in the waveform as serial data by damping resistors R18E, R19E, and R20E. This is advantageous in terms of maintaining the waveform quality of the performance control signal transferred downstream and suppressing signal degradation.

The gaming machine 1 of the embodiment has the following (Configuration J2-1). Figure 61 shows the configuration of the "first board" of this (Configuration J2-1).
(Configuration J2-1)
The first board has a first electrical component EP related to a first performance, and is equipped with a first board that relays a performance control signal to a plurality of other boards, the first board has a first buffer circuit BF1 that buffers the performance control signal input from an input connector CNin and supplies it to the first electrical component EP, the performance control signal output from the first buffer circuit BF1 and supplied to the first electrical component EP is branched and wired to become a plurality of systems of performance control signals that are relayed to the plurality of other boards, the first board has a plurality of second buffer circuits BF21, BF22 that buffer the plurality of systems of performance control signals, and a plurality of output connectors CNout1, CNout2 that output the plurality of performance control signals output from the plurality of second buffer circuits BF21, BF22 to the other boards that are different from each other.

In this (Configuration J2-1), the following corresponding example (Specific Example 18) is assumed.
(Specific Example 18)
Input connector CNin: Connector CN1E
Multiple output connectors CNout1, CNout2: connectors CN2E, CN3E
・Performance control signals: Clock signal CLK_P (CLK_A), data signal DATA_P (DATA_A), reset signal RESET_P (RESET_A)
First board: Side unit upper right LED board 600
Multiple other boards: Side unit lower right LED board 620, side unit upper LED board 630
First electric component EP: LED driver 605, light emitting unit 612, etc. (see FIG. 27)
First buffer circuit BF1: Buffer circuit 601 (see FIG. 25)
Second buffer circuits BF21 and BF22: buffer circuit 604 (see FIG. 26)

As can be clearly seen from Figure 60, this specific example 18 has the configuration of Figure 61 as the above (configuration J2-1).

In other words, the side unit upper right LED board 600 relays performance control signals to the downstream side unit upper LED board 630 and side unit lower right LED board 620, and also drives the LEDs to emit light (it is equipped with an LED driver 605).
In this case, the performance control signal from upstream connector CN1E is buffered by buffer circuit 601, then branched off for LED driver 605 and downstream, and further buffered by buffer circuit 604 having the functions of first and second buffer circuits BF21, BF22, before being supplied downstream from connectors CN2E, CN3E.

As a result, the buffer circuit 601 compensates for signal attenuation up to the input, realizing stable operation of the LED driver 605. Furthermore, by performing signal compensation in the output stage with the buffer circuit 604 before relaying downstream, a stable signal can also be transmitted downstream. In particular, in the case of the side unit upper right LED board 600, considering that the performance control signal is supplied from the front frame LED connection board 500 via a long wire and via the relay board 550, attenuation due to the long wire and passing through the four connectors CN3C, CN1D, CN2D, and CN1E is relatively large, so signal compensation by the buffer circuit 601 is appropriate processing.

Furthermore, after being branched internally, the performance control signal is branched to multiple downstream boards, and the signal compensation of the buffer circuit 604 is performed appropriately to ensure stable signal transmission from the output stage connectors CN2E and CN3E to the downstream side unit upper LED board 630 and side unit lower right LED board 620.

In addition, the buffer circuit 601 performs buffering at the stage of the common performance control signal before branching, which is efficient in compensating for attenuation in the transmission path up to that point, and also has the aspect of enabling the circuit configuration to be made more efficient.

In addition to the above (Configuration J2-1), the gaming machine 1 of the embodiment has the following (Configuration J2-2).
(Configuration J2-2)
The performance control signal input from the input connector CNin is input to a first buffer circuit BF1 via a damping resistor Rd1.

In the case of the above-mentioned specific example 18, the damping resistors R9E, R11E, and R12E shown in FIG. 24 correspond to the damping resistor Rd1.
The clock signal CLK_P, data signal DATA_P, and reset signal RESET_P are subjected to noise reduction and suppression of overshoot and undershoot in the waveform as serial data by damping resistors R9E, R11E, and R12E, and then buffered by the buffer circuit 601. This allows signal compensation while maintaining the quality of the waveform, which is advantageous in terms of suppressing signal degradation.

In addition to the above (Configuration J2-1) and (Configuration J2-2), the gaming machine 1 of the embodiment has the following (Configuration J2-3).
(Configuration J2-3)
The performance control signals output from the second buffer circuits BF21 and BF22 are supplied to the output connectors CNout1 and CNout2 via damping resistors Rd2 and Rd3.

In the case of the above-mentioned specific example 18, the damping resistors R18E, R19E, and R20E shown in FIG. 26 correspond to the damping resistor Rd2, and the damping resistors R24E, R25E, and R26E correspond to the damping resistor Rd3.
The clock signal CLK_A, data signal DATA_A, and reset signal RESET_A are buffered by the buffer circuit 604, and then output from the connectors CN2E and CN3E after noise reduction and suppression of overshoot and undershoot in the waveform as serial data by the damping resistors R18E, R19E, R20E, R24E, R25E, and R26E. This is advantageous in terms of maintaining the waveform quality of the performance control signal transferred downstream and suppressing signal degradation.

The gaming machine 1 of the embodiment has the following (Configuration J3-1). Figure 62 shows the configuration of the "first board" of this (Configuration J3-1).
(Configuration J3-1)
The first board has a first electric component EP related to a first performance, and is equipped with a first board that relays a performance control signal to a plurality of other boards, the first board has a first buffer circuit BF1 that buffers a performance control signal input from an input side connector CNin and supplies it to the first electric component EP, the performance control signal output from the first buffer circuit BF1 and supplied to the first electric component EP is branched and wired to become a plurality of systems of performance control signals that are relayed to the plurality of other boards, the first board has a plurality of second buffer circuits BF21, BF22 that buffer the plurality of systems of performance control signals, and a plurality of output side connectors CNout1, CNout2 that output the plurality of performance control signals output from the plurality of second buffer circuits BF21, BF22 to different other boards, and the plurality of second buffer circuits BF21, BF22 are formed of one-chip circuits that receive the plurality of systems of performance control signals at separate terminals, buffer them each, and output them from separate terminals.

In this (Configuration J3-1), the above-mentioned (Specific Example 18) is assumed, and the buffer circuit 604 (see FIG. 26) is a one-chip circuit having the functions of the second buffer circuits BF21, BF22.
This provides the same effects as those achieved by the above (Configuration J2-1), and furthermore, by using a single chip configuration, it is possible to reduce the board area and facilitate the layout design.
As shown in Fig. 60, the buffer circuit 604 branches the clock signal CLK_A, data signal DATA_A, and reset signal RESET_A into two systems, one for the A1, A2, and A3 terminals and the other for the A5, A6, and A7 terminals. In other words, the input terminals of the chip are effectively used to branch into two systems, and buffer processing is performed on the performance control signals of each system. This simplifies the configuration for branching, and appropriate signal compensation is performed in each system.

44, the clock signal CLK_C and the data signal DATA_C are buffered and then transmitted to the two downstream LED boards from the connectors CN2M and CN3M. This is also an example of branching into two systems using the input terminal of the buffer circuit 604.

In addition to the above (Configuration J3-1), the gaming machine 1 of the embodiment has the following (Configuration J3-2).
(Configuration J3-2)
The performance control signal input from the input connector CNin is input to a first buffer circuit BF1 via a damping resistor Rd1.
This provides the same effect as the above-mentioned (Configuration J2-2).

In addition to the above (Configuration J3-1) and (Configuration J3-2), the gaming machine 1 of the embodiment has the following (Configuration J3-3).
(Configuration J3-3)
The performance control signals output from the second buffer circuits BF21, BF22 are supplied to the output connectors CNout1, CNout2 via damping resistors Rd2, Rd3.
This provides the same effect as the above-mentioned (Configuration J2-3).

6.10 Power supply by electrical components

The gaming machine 1 of the embodiment has the following (configuration K1-1).
(Configuration K1-1)
The gaming machine 1 has a board on which a first electrical component and a second electrical component related to a first presentation are provided, the first electrical component operates using a first voltage as a power supply voltage and has a terminal for outputting a second voltage lower than the first voltage, and the second electrical component is configured to operate using the second voltage as a power supply voltage.

In this (Configuration K1-1), the following corresponding example (Specific Example 19) is assumed. Each component part of the specific example 14 is explained in FIG.
(Specific Example 19)
Substrate: LED substrate 780A
First electrical component: LED driver 782
Second electrical component: buffer circuit 781
First voltage: 12V DC voltage (DC12VB)
Second voltage: Reference voltage Vref of 5V
- Terminal that outputs the second voltage: Terminal VREF

63 shows the configuration of an LED board 780A. This LED board 780A is a modified example of the LED board 780 shown in FIG.
In this case, the connector CN1N' has four terminals, from the first pin to the fourth pin, numbered "1" to "4", and the terminal assignment is as follows: the first pin is a terminal for 12V DC voltage (DC12VB), the second pin is a terminal for the clock signal CLK, the third pin is a terminal for the data signal DATA, and the fourth pin is a ground terminal.
Needless to say, the terminal configuration of the upstream board will also be changed accordingly.

As can be seen by comparing with FIG. 45, FIG. 63 is an example in which a 5V DC voltage (DC5V) is not supplied. However, a buffer circuit 781 that uses a 5V DC voltage (DC5V) as a power supply voltage is installed in the same way as in FIG. 45.

The LED driver 782 uses a 12 V DC voltage (DC12VB) as the power supply voltage, but the terminal VREF is configured to output a 5 V reference voltage Vref. The reference voltage Vref is used to set the LED driver 782, and in this case is applied to the terminals CTLSCT, RESET, A0, and A1.

The terminal CTLSCT is a serial bus communication setting terminal, and the terminal voltage (L/H) is used to select whether a 3-wire serial bus signal or a 2-wire serial bus signal is set as an input signal.
The terminal RESET is a reset signal input terminal, which is reset at the L level.
Terminals A0, A1, A2, A3, and A4 are slave address setting terminals, which are used to set a 5-bit slave address for the LED driver 782. In the case of this LED driver 782, for example, a reference voltage Vref is applied to terminals A0 and A1, and terminals A2, A3, and A4 are connected to ground, thereby setting a slave address of "11000."

In the case of FIG. 63, this reference voltage Vref is used as the power supply voltage for the buffer circuit 781 .
This realizes an efficient power supply configuration and eliminates the need for input of multiple power supply voltage systems. Since there is no need to input a 5V direct current voltage (DC5V), the input side connector CN1N' can also be simplified.

In addition to the above (Configuration K1-1), the gaming machine 1 of the embodiment has the following (Configuration K1-2).
(Configuration K1-2)
The first electrical component is an LED driver, and a first voltage is used to drive an LED.

In the nineteenth specific example, the first electric component is the LED driver 782, which drives the LED of the light-emitting unit 783 to emit light. The LED of the light-emitting unit 783 is driven to emit light by a first voltage of 12 V DC (DC12VB).
As a result, the LED board 780A in FIG. 63 is capable of operating the LED driver 782, driving the light emitting section 783 to emit light, and operating the buffer circuit 781 with only the input of a 12 V DC voltage (DC12VB), making it ideal for efficient power supply configuration.

In addition, the gaming machine 1 of the embodiment has the following (configuration K1-3) in addition to the above (configuration K1-1) and (configuration K1-2).
(Configuration K1-3)
The first voltage is supplied to the substrate from another substrate, and the second voltage is not supplied to the substrate.

As described in the explanation of the connector CN1N' in Fig. 63, only 12V DC voltage (DC12VB) is supplied from the upstream board, and 5V DC voltage (DC5V) is not supplied. This is a configuration that can simplify the power supply wiring.

In addition, the gaming machine 1 of the embodiment has the following (configuration K1-4) in addition to the above (configuration K1-1), (configuration K1-2), and (configuration K1-3).
(Configuration K1-4)
The first electrical component is a driver circuit of a performance device and is one of a plurality of driver circuits to which different slave addresses are set, and the first electrical component uses the second voltage to set its own slave address.

The LED driver 782, which is the first electric component, is configured to apply the reference voltage Vref, which is the second voltage, to the terminals A1 and A2 in order to set the slave address. In other words, the voltage used to set the address of the LED driver 782 is used as the power supply voltage in the buffer circuit 781. This configuration promotes the efficiency of the power supply configuration.

The gaming machine 1 of the embodiment has the following (configuration K2).
(Configuration K2)
The gaming machine 1 has a board on which a first electrical component and a second electrical component related to a first presentation are provided, the first electrical component operates using a first voltage as a power supply voltage and has a terminal for outputting a second voltage lower than the first voltage, the second electrical component is configured to operate using the second voltage as a power supply voltage, the first electrical component is a driver circuit for a presentation device, and the second electrical component is a buffer circuit that performs buffering on a presentation control signal to be output to another board.

The above-mentioned specific example 19 corresponds to this (Configuration K2).
The LED board 780A in Fig. 63 has a role as a relay board for the downstream LED board 790 and also a role as a board that drives LED light emission. In such a case, 12V DC voltage (DC12VB) is used to drive the LED driver 782 and to emit light from the light emitting unit 783, and the reference voltage Vref as the second voltage is used in the buffer circuit 781 for signal compensation of the performance control signal to the downstream. This simplifies the power supply configuration with a board that has both the functions of a relay board for the performance control signal and a driving board for the performance.

The gaming machine 1 of the embodiment has the following (configuration K3).
(Configuration K3)
The gaming machine 1 has a board on which a first electrical component to which a performance control signal supplied from another board is input and a second electrical component to which the performance control signal is branched and input in parallel to the first electrical component are provided, the first electrical component operates using a first voltage as a power supply voltage and has a terminal for outputting a second voltage lower than the first voltage, and the second electrical component is configured to operate using the second voltage as a power supply voltage.

The above-mentioned specific example 19 corresponds to this (Configuration K3).
The LED board 780A in Fig. 63 is a board that branches the clock signal and data signal DATA, which are input performance control signals, and supplies them to an LED driver 782, while also transmitting them downstream via a buffer circuit 781. In this case, a 12V DC voltage (DC12VB) is used to drive the LED driver 782, and a reference voltage Vref as a second voltage is used in the buffer circuit 781 for signal compensation of the performance control signal to the downstream. This simplifies the power supply configuration in a board that branches the performance control signal and processes it in parallel.

6.11 Connectors and signal wiring

The gaming machine 1 of the embodiment has the following (configuration L1-1).
(Configuration L1-1)
Gaming machine 1 comprises a first board, a second board, a first connector arranged on the first board for transmitting signals between the first board and the second board, a second connector arranged on the second board for transmitting signals between the first board and the second board, and a transmission line connecting the first connector and the second connector, wherein digital signals for controlling performance and analog signals used for performance are transmitted between the first connector and the second connector, and the assignment of pins of the first connector and the second connector is such that, when a specific pin assigned for ground is taken as the boundary, all digital signals are assigned to pins existing in one direction from the boundary, and all analog signals are assigned to pins existing in the other direction from the boundary.

In this (configuration L1-1), the following corresponding example (specific example 20) is assumed.
(Example 20)
First board: inner frame LED relay board 400
Second board: Front frame LED connection board 500
First connector: Connector CN2B
Second connector: Connector CN2C
・Prescribed pins: 17th pin, 18th pin

FIG. 64 shows the assignment of connector terminals (pins) for the connector CN2B of the inner frame LED relay board 400 and the connector CN2C of the front frame LED connection board 500, which are connected by a transmission line H8.
The assignment of the 30-pin terminals was explained in FIG. 13 for connector CN2B and in FIG. 15 for connector CN2C, and FIG. 64 shows the assignment state as a physical arrangement.

As shown in FIG. 50, the connectors CN2B and CN2C each have 30 pins arranged in two rows of 15 pins each.
The pin numbers from the 1st pin to the 30th pin described with reference to FIG. 13 and FIG. 15 are assigned alternately to each column as shown in FIG.
In FIG. 64, one square is treated as a pin, and assigned signals and the like are shown.

The 5th, 7th, 8th, 17th, and 18th pins are ground terminals, but the 17th and 18th pins are located in the approximate center of the terminal arrangement in the connectors CN2B and CN2C. In other words, they are adjacent pins in a direction perpendicular to the row direction.

If we consider pins 17 and 18 as the boundary, the pins on the right side of Fig. 64 are used to assign + and - terminals to the upper right speaker, center right speaker, upper left speaker, and center left speaker, respectively. In other words, the speaker signals (analog audio signals supplied to the speakers) that pass through connectors CN2B and CN2C are all collected at the terminals to the right of pins 17 and 18, which are the boundary, in the diagram.

In addition, the clear signals CLR_L, CLR_M, clock signals CLK_L, CLK_M, data signals DATA_L, DATA_M, enable signals ENABLE_L (general-purpose signal HANYOU), ENABLE_M, clock signal S_IN_CLK, load signal S_IN_LOAD, and serial data signal S_IN_DATA are assigned to the pins on the left side of the drawing in Fig. 64. In other words, all digital signals passing through connectors CN2B and CN2C are collected at the terminals to the left of pins 17 and 18, which are the boundaries.

In addition, a 5V DC voltage (DC5VB) and a 12V DC voltage (DC12VB) are transmitted via connector CN2B, transmission line H8, and connector CN2C.
The 5V DC voltage (DC5VB) is assigned to the first and third pins, which are located in the left corner in FIG.
The 12V DC voltage (DC12VB) is assigned to four pins from the 27th pin to the 30th pin, which are located at the right corner in FIG.

In the connectors CN2B and CN2C, pin assignment is performed in such a multi-row pin configuration.
That is, in the path of connector CN2B, transmission line H8, and connector CN2C, the digital signal and analog signal are separated into one and the other at pins 17 and 18. This reduces the mixing of noise into the analog signal (for example, the audio signal supplied to the speaker) due to the effect of the pulse as a digital signal, realizing a good performance.

Although FIG. 64 shows an example of a connector with two rows of pins, the present invention can be similarly applied to a connector with three or more rows of pins.
Furthermore, this technique can also be applied to configurations in which pins (including contacts) are arranged in a single row, as in Figures 51 and 53. In other words, when a specific pin assigned for ground is set as the boundary, all digital signals are assigned to pins on one side of the boundary pin, and all analog signals are assigned to pins on the other side of the boundary pin.

In addition to the above (Configuration L1-1), the gaming machine 1 of the embodiment has the following (Configuration L1-2).
(Configuration L1-2)
The first connector and the second connector have pins arranged in a plurality of rows, and the predetermined pins are a plurality of pins adjacent to each other in a direction perpendicular to the row direction.

64 as specific example 20. In a multiple-row pin configuration, such as a two-row pin configuration, pins assigned to ground are arranged in a direction perpendicular to the row direction, so that digital signals and analog signals can be appropriately separated into one and the other.

In addition to the above (configuration L1-1) or (configuration L1-2), the gaming machine 1 of the embodiment also has the following (configuration L1-3).
(Configuration L1-3)
The predetermined pin is connected to a solid ground formed on one or both of the first substrate and the second substrate.

For example, as in the above-mentioned specific example 20, if the first board is the inner frame LED relay board 400 and the second board is the front frame LED connection board 500, a solid ground (GND plane) is formed on both or one of the inner frame LED relay board 400 and the front frame LED connection board 500.
A solid ground is formed on both the inner frame LED relay board 400 and the front frame LED connection board 500, and the 17th pin, 18th pin, and the 5th pin, 7th pin, and 8th pin are connected to the solid ground of the inner frame LED relay board 400 and the front frame LED connection board 500, respectively.

In this way, by connecting the ground that is the boundary between the digital signal and the analog signal to a solid ground using connectors CN2B, CN2C, and transmission line H8, it is possible to improve the effect of shielding against noise that is mixed into the analog signal due to high-frequency pulses of the digital signal.
It is not necessary for the solid ground to be formed on both the inner frame LED relay board 400 and the front frame LED connection board 500, but it is sufficient that the solid ground is formed on at least one of them.

The pattern configuration of a board including a solid ground will be described using the front frame LED connection board 500 as an example.
The front frame LED connection board 500 is a board having a layered structure having four layers.
FIG. 65 shows electrical components arranged on a layer that will become the surface (surface layer) and identification information printed near the electrical components.

In Figure 65, the identification information actually printed on the board includes "CN1", "CN2", etc. for connectors CN, "R1", "R2", etc. for resistors, and "C1", "C2", etc. for capacitors, and these identification information with "C" added to the suffix correspond to the symbols of each component shown in Figures 15 to 20.
However, with regard to ICs, the printed identification information is "IC1" etc., but in Figures 15 to 20 these are given numerical references such as LED driver 509, buffer circuit 504 etc. and do not correspond to the identification information shown in Figure 65.

66 also shows electrical components arranged on the back layer, which is the reverse side of the front layer, and identification information printed near the electrical components. Note that the figure is a perspective view seen from the front layer side, and each electrical component and identification information is illustrated in a mirror-inverted state.
As will be described later, the hatched areas in Figures 65 and 66 indicate prohibited areas where pattern formation is prohibited. The hatched areas are not actually drawn on the substrate.

67, 68, 69, and 70 show the conductor patterns in each layer from the surface layer.
Figure 67 shows a pattern for forming wiring on the surface layer, Figure 68 shows a pattern for forming wiring in the first inner layer, which is the layer below the surface layer, Figure 69 shows a pattern for forming wiring in the second inner layer, which is the layer below the first inner layer, and Figure 70 shows a pattern for forming wiring on the back layer.

Figures 65 to 70 all show the orientation when viewed from above the surface layer, and by comparing each figure, the connection state of each electrical component and pattern can be understood.

As shown in FIG. 65, the surface layer is equipped with the following main electrical components: connectors CN1C, CN2C, CN3C, CN4C, CN5C, CN6C, CN7C, CN8C, CN9C, CN10C, buffer circuit 504, motor drivers 510, 511, LED driver 509 used as an S/P conversion circuit, diode D19C constituting power supply isolation/protection circuit 521, resistor R34C (identification information: "R34"), capacitor C21C (identification information: "C21"), etc.

The substrate shape is a nearly square rectangle with a protruding portion (top left in the drawing).
The connectors CN1C, CN2C, CN3C, CN4C, CN5C, CN6C, CN8C, and CN9C are arranged together in the lower half area of the board in the drawing.
Connectors CN7C and CN10C are disposed in the protruding portion at the upper left of the drawing.

The buffer circuit 504 performs buffer processing of the signal output from the connector CN1C (see FIG. 16), and is disposed in the vicinity of the connector CN1C .
Motor drivers 510 and 511 and a power supply isolation/protection circuit 521 are arranged in the upper left part of the rectangular area in the drawing.
An LED driver 509 used as an S/P conversion circuit is disposed in the upper right portion of the drawing.

As shown in FIG. 66, the back surface layer is equipped with the following main electrical components: buffer circuits 501, 502, 503, 507, 508, 512, 513; P/S conversion circuits 505, 506; Schottky barrier diode D18C forming power supply isolation/protection circuit 520; resistor R27C (identification information "R27"); capacitors C12C, C13C (identification information "C12", "C13"); chip varistor 515, etc.

Buffer circuits 501, 502, 503, 513 and P/S conversion circuit 505 are disposed in the lower region of the substrate in the drawing.
The P/S conversion circuit 506 and the power supply isolation/protection circuit 520 are disposed in the approximate center region in the vertical direction in the drawing. The P/S conversion circuit 506 is disposed adjacent to the P/S conversion circuit 505.
Buffer circuits 507, 508, and 512 are disposed in the upper region of the substrate in the drawing.

Fig. 67 shows the conductor pattern on the surface layer, which mainly includes wiring corresponding to the components shown in Fig. 65 and a ground pattern 536. As shown in the figure, the ground pattern 536 is a solid ground.
The portion shown as "XX+XXXX" actually displays the board management number.

FIG. 68 shows the conductor pattern of the first inner layer.
A power supply pattern 530 for a 5V DC voltage (DC5VB) is formed here.
As a 12V system, power supply patterns 531, 532, and 533 corresponding to the power supply lines PLp, PLq, and PLr described with reference to FIG. 57 are formed.
The power supply line PLp is a power supply line for a 12V DC voltage (DC12VB), the power supply line PLq is a power supply line for a 12V DC voltage (DC12VS), and the power supply line PLr is a power supply line for a 12V motor drive voltage (MOT12V).
As shown in the figure, power supply patterns 530, 531, and 533 are solid power supply patterns.

In addition, patterns 534 and 535 are formed on the first inner layer. These are wiring patterns for analog audio signals of the + and - terminals of the right center speaker, formed between connector CN2C and connector CN5C.

Figure 69 shows the conductor pattern of the second inner layer, where various wiring and a ground pattern 538 are formed. As shown, the ground pattern 538 is a solid ground.

Figure 70 shows the conductor pattern on the back surface layer, which mainly includes wiring corresponding to the components shown in Figure 66 and ground pattern 537. Ground pattern 537 is a solid ground.

Note that in Figures 67 and 68, there are some parts where the pattern appears to be cut in order to show the lead lines of the symbols, but this is merely for convenience of illustration, and it should be noted that the conductor pattern is continuous in the parts where the lead lines of the symbols are shown.

FIG. 67 shows lands 541, 542 joined to the 17th and 18th pins, which are ground terminals of connector CN2C (FIG. 65), and lands 543, 544, and 545 joined to the 5th, 7th, and 8th pins, which are also ground terminals.
As can be seen from the figure, these lands 541, 542, 543, 544, and 545 are connected to a ground pattern 536 which is a solid ground.

That is, as described above, the 17th and 18th pins and the 5th, 7th and 8th pins of the connector CN2C are connected to solid ground.
In this way, by connecting the ground (pins 17 and 18) which is the boundary between the digital signal and the analog signal to a solid ground, the effect of shielding the analog signal from noise caused by high frequency pulses is enhanced.
Although the conductor pattern for the inner frame LED relay board 400 is not shown, it is conceivable that the ground (pins 17 and 18) which is the boundary between the digital signal and analog signal of connector CN2B on the inner frame LED relay board 400 can also be connected to a solid ground.

In addition to the above (configuration L1-1), (configuration L1-2), and (configuration L1-3), the gaming machine 1 of the embodiment also has the following (configuration L1-4).
(Configuration L1-4)
The digital signal includes a serial data signal and a clock signal for performance control, and the analog signal is an audio signal to be supplied to a speaker.

The connectors CN2B, CN2C, and transmission line H8 transmit the following digital signals: serial data signal S_IN_DATA, clock signal S_IN_CLK, load signal S_IN_LOAD, clock signals CLK_L, CLK_M, clear signals CLR_L, CLR_M (reset signals RESET_L, RESET_M), data signals DATA_L, DATA_M, general-purpose signal HANYOU, and enable signal ENABLE_M.
Furthermore, the 19th to 26th pins of connectors CN2B and CN2C are assigned to the + and - terminals of the upper right speaker, center right speaker, lower right speaker, upper left speaker, and center left speaker, and transmit analog audio signals.

According to the above-mentioned configuration, the analog audio signal is separated from the digital data, particularly the high-frequency serial data signal and the clock signal.
This effectively reduces noise contamination caused by pulses as a digital signal in the speaker signal (audio signal), which is an analog signal, thereby achieving good audio presentation.

The gaming machine 1 of the embodiment has the following (configuration L2-1).
(Configuration L2-1)
The gaming machine 1 comprises a first board, and a first connector and a second connector provided on the first board. The first connector is a connector for inputting a digital signal for presentation and an analog signal for presentation. On the first board, the digital signal for presentation input from the first connector is supplied from the first connector via wiring of a first line length to a presentation control circuit that controls presentation operation, and the analog signal for presentation input from the first connector is configured to be output from the second connector via wiring of a second line length that is shorter than the first line length.

In this (configuration L2-1), the following corresponding example (specific example 21) is assumed.
(Specific Example 21)
First board: front frame LED connection board 500
・Performance control circuit: LED driver 509 (S/P conversion circuit)
First connector: Connector CN2C
Second connector: connectors CN5C, CN6C, CN8C

In the front frame LED connection board 500, digital data that becomes a high-frequency pulse input from the connector CN2C is sent to an LED driver 509 (see Figures 19 and 22) used as an S/P conversion circuit that converts the pulse timing.
Moreover, the analog signal input from the connector CN2C is sent to the connectors CN5C, CN6C, and CN8C and output to the outside of the board (FIG. 15).

As shown in FIG. 65, the connectors CN5C, CN6C, and CN8C are disposed near the connector CN2C.
As is clear from the figure, the line length from connector CN2C to connectors CN5C, CN6C, and CN8C is shorter than the line length from connector CN2C to LED driver 509 (the line length via buffer circuit 501).
Therefore, when the LED driver 509 (S/P conversion circuit) is the above-mentioned performance control circuit, and the connectors CN5C, CN6C, and CN8C are the above-mentioned second connectors, the relationship that the second line length is shorter than the first line length is satisfied.

It can be seen that this configuration is a configuration in which an analog signal supplied from the upstream side is immediately output to the outside (output to a speaker) via a relay provided by the input and output connectors and a short second line length wiring on the board between them.
Therefore, the analog signal is less susceptible to the effects of radiation noise of high frequency pulses caused by digital signals on the board.

This configuration also positions the performance control circuit (LED driver 509) at a position on the board away from the input connector CN2C (for example, the upper right position in Figure 65). This is advantageous in that it makes it easier to position the output connectors CN5C, CN6C, and CN8C near the connector CN2C, and contributes to reducing the effects of noise on the analog signal.

In addition, the front frame LED connection board 500 of the embodiment has solid ground patterns 536, 537, and 538 formed on the front layer in Fig. 67, the second inner layer in Fig. 69, and the back layer in Fig. 70, and the wiring patterns between the electronic circuit components are surrounded by the ground in the surface direction and the interlayer direction. The wiring patterns in the board, except for the wiring patterns to the connectors CN5C, CN6C, and CN8C, are transmission paths for digital signals.
In other words, an appropriate shielding effect against high-frequency noise caused by digital signals is obtained within the board, which also contributes to reducing the effects of noise on analog signals.

Furthermore, the fact that the power supply patterns 530, 531, 532, and 533 are all grouped together on the first inner layer also contributes to properly surrounding the digital signal wiring with a solid ground pattern. In other words, by not providing a solid power supply pattern on the layer on which the digital signal wiring is formed, the area of the solid ground patterns 536, 537, and 538 can be made larger.

Although the example has been described in which the performance control circuit is the LED driver 509 of the front frame LED connection board 500, the above (configuration L2-1) can also be applied to other boards.
Examples of the performance control circuit include an LED driver, a motor driver, and an S/P conversion circuit for performance control signals. Other examples of the performance control circuit include a microcomputer chip, a DSP, or a logic circuit. In the case of a board that is provided with these and relays analog signals, it is desirable to apply (configuration L2-1) to at least one of the performance control circuits.

In addition to the above (configuration L2-1), the gaming machine 1 of the embodiment has the following (configuration L2-2).
(Configuration L2-2)
The digital signal includes a serial data signal and a clock signal for performance control, and the analog signal is an audio signal to be supplied to a speaker.

The connectors CN2B, CN2C, and transmission line H8 transmit the following digital signals: serial data signal S_IN_DATA, clock signal S_IN_CLK, load signal S_IN_LOAD, clock signals CLK_L, CLK_M, clear signals CLR_L, CLR_M (reset signals RESET_L, RESET_M), data signals DATA_L, DATA_M, general-purpose signal HANYOU, and enable signal ENABLE_M.
Furthermore, the 19th to 26th pins of connectors CN2B and CN2C are assigned to the + and - terminals of the upper right speaker, center right speaker, lower right speaker, upper left speaker, and center left speaker, and transmit analog audio signals.

When relaying analog audio signals, noise from digital data, especially high-frequency serial data signals and clock signals, can affect the reproduced audio, resulting in noise. This configuration is desirable in the sense that it avoids such noise contamination on the board that relays the audio signal.

In addition to the above (configuration L2-1) or (configuration L2-2), the gaming machine 1 of the embodiment also has the following (configuration L2-3).
(Configuration L2-3)
The performance control circuit is a serial/parallel (S/P) conversion circuit.

In the front frame LED connection board 500, digital data that becomes a high frequency pulse input from the connector CN2C is sent to an LED driver 509 (see Figures 19 and 22) used as an S/P conversion circuit.
In particular, the wiring from the connector CN2C to the LED driver 509 used as an S/P conversion circuit is a wiring section where serial data is transmitted and high-frequency noise is likely to occur on the board. Considering the existence of such a path, it is particularly effective in terms of avoiding the influence of noise for the speaker signal, which is an analog signal, to be relayed by the front frame LED connection board 500 and then immediately transmitted to the outside via an extremely short wiring distance.

The gaming machine 1 of the embodiment has the following (configuration L3-1).
(Configuration L3-1)
The gaming machine 1 comprises a first board, and a first connector and a second connector provided on the first board. The first connector is a connector for inputting a digital signal for presentation and an analog signal for presentation. On the first board, the digital signal for presentation input from the first connector is supplied to a presentation control circuit which controls presentation operations, and the analog signal for presentation input from the first connector is output from the second connector. When viewed from the first connector, the second connector is positioned closer than the presentation control circuit.

The above-mentioned (Specific Example 21) is assumed as an example corresponding to this (Configuration L3-1).
65, the connectors CN5C, CN6C, and CN8C serving as the second connector are disposed at positions closer to the connector CN2C serving as the first connector than the LED driver 509. In other words, the line length of the wiring for analog signals from the connector CN2C is shorter than the wiring length for digital signals.
Therefore, the front frame LED connection board 500 can immediately output the analog signal relayed from upstream to downstream to the outside (to the speaker) via the first connector on the input side and the second connector on the output side on the board and the short wiring between them.
This makes the analog signal less susceptible to the effects of radiation noise from high-frequency pulses caused by digital signals on the board.

In addition to the above (configuration L3-1), the gaming machine 1 of the embodiment has the following (configuration L3-2).
(Configuration L3-2)
The digital signal includes a serial data signal and a clock signal for performance control, and the analog signal is an audio signal to be supplied to a speaker.

That is, it is similar to the example described in (Configuration L2-2), and is desirable in the sense that it prevents noise from high-frequency serial data signals and clock signals from being mixed in when relaying analog audio signals.

In addition, the gaming machine 1 of the embodiment has the following (configuration L3-3) in addition to the above (configuration L3-1) or (configuration L3-2).
(Configuration L3-3)
The performance control circuit is a serial/parallel (S/P) conversion circuit.

This is similar to the example described in (Configuration L2-3), and in the front frame LED connection board 500, digital data that becomes a high-frequency pulse input from the connector CN2C is sent to the LED driver 509 (see Fig. 19 and Fig. 22) used as an S/P conversion circuit. When such a configuration is provided, the above (Configuration L3-1) is particularly useful in terms of avoiding the effects of noise.

The gaming machine 1 of the embodiment has the following (configuration L4-1).
(Configuration L4-1)
The gaming machine 1 comprises a first board having a multiple-layer structure, and a first connector provided on the first board for inputting a digital signal for presentation and an analog signal for presentation. The first board is configured such that the digital signal for presentation input from the first connector is supplied from the first connector to a presentation control circuit which controls presentation operation via a first wiring of a first line length, and a second connector is provided on the first board such that the analog signal for presentation input from the first connector is supplied from the first connector via a second wiring of a second line length shorter than the first line length and formed in the same layer as a layer in which a pattern including a contact point for the analog signal terminal of the first connector is provided, and the second connector outputs the analog signal to the outside of the board.

In this (configuration L4-1), the following corresponding example (specific example 22) is assumed.
(Specific Example 22)
First board: front frame LED connection board 500
・Performance control circuit: LED driver 509 (S/P conversion circuit)
First connector: Connector CN2C
Second connector: connectors CN6C, CN8C

FIG. 67 shows two lands 546 to which terminals of a connector CN6C are joined, and four lands 548 to which terminals of a connector CN8C are joined.
67, the two lands 546 are connected to the 24th and 26th pins of the connector CN2C, respectively, and the four lands 548 are connected to the 19th, 21st, 23rd, and 25th pins of the connector CN2C, respectively. These correspond to the above-mentioned second wiring formed on the surface layer.

The digital data signals input from the upstream side by connector CN2C, that is, the clock signal CLK_L, the data signal DATA_L, the general-purpose signal HANYOU, and the enable signal ENABLE_M, are supplied to the LED driver 509 by the patterns of the front surface layer, the second inner layer, and the back surface layer, and by wiring (first wiring) using through holes or vias between them (see Figures 65, 15, and 19).

The analog signal for the effect is relayed from the input connector CN2C to the output connectors (CN8C, CN6C) via the second wiring, and is output to other boards. This second wiring is only a surface layer pattern.
That is, when the first line length of the first wiring is compared with the second line length of the second wiring, the second line length is clearly shorter.

In this way, the front frame LED connection board 500 is provided with connectors CN6C and CN8C that receive the analog signal for performance input from connector CN2C via a second line length from connector CN2C that is shorter than the first line length and is supplied by a second wiring formed in the same surface layer of Figure 67 as the layer on which the pattern including contacts for the analog signal terminals (24th pin, 26th pin, or 19th pin, 21st pin, 23rd pin, 25th pin) of connector CN2C is provided, and output to the outside of the board.

Therefore, the analog signal is relayed over an extremely short distance from the connector CN2C to the connector CN8C or the connector CN6C without crossing layers.
This makes it possible to function as a relay board for analog signals while being less susceptible to the effects of radiation noise caused by digital data.

In addition to the above (configuration L4-1), the gaming machine 1 of the embodiment has the following (configuration L4-2).
(Configuration L4-2)
The digital signal includes a serial data signal and a clock signal for performance control, and the analog signal is an audio signal to be supplied to a speaker.

That is, it is similar to the example described in (Configuration L2-2), and is desirable in the sense that it prevents noise from high-frequency serial data signals and clock signals from being mixed in when relaying analog audio signals.

In addition, the gaming machine 1 of the embodiment has the following (configuration L4-3) in addition to the above (configuration L4-1) or (configuration L4-2).
(Configuration L4-3)
The performance control circuit is a serial/parallel (S/P) conversion circuit.

This is similar to the example described in (Configuration L2-3), and in the front frame LED connection board 500, digital data that becomes a high-frequency pulse input from the connector CN2C is sent to the LED driver 509 (see Fig. 19 and Fig. 22) used as an S/P conversion circuit. When such a configuration is provided, the above (Configuration L4-1) is particularly useful in terms of avoiding the effects of noise.

[6.12 Analog signal relay and wiring]

The gaming machine 1 of the embodiment has the following (configuration M1).
(Configuration M1)
The gaming machine 1 has a first board having an input side connector for inputting a digital signal for presentation and a speaker drive signal, and the first board processes the digital signal for presentation using electronic circuit components other than wiring provided on the first board and outputs it from an output side connector to another board, and the speaker drive signal is supplied from the input side connector to the output side connector via only wiring, and output to a speaker outside the board.

In this (Configuration M1), the following corresponding example (Specific Example 23) is assumed.
(Specific Example 23)
First board: front frame LED connection board 500
Input connector: Connector CN2C
Digital signals: clear signals CLR_L, CLR_M, clock signals CLK_L, CLK_M, data signals DATA_L, DATA_M, enable signals ENABLE_L, ENABLE_M, clock signal S_IN_CLK, load signal S_IN_LOAD
Speaker drive signals: drive signals for the top right speaker, center right speaker, top left speaker, and center left speaker. Connectors on the output side for digital signals: connectors CN1C, CN3C, and CN10C.
Connectors on the output side for speaker drive signals: connectors CN5C, CN6C, CN8C
Electronic circuit components other than wiring: buffer circuits 501, 504, 502, 503, 512, LED driver 509, motor drivers 510, 511, and electronic circuit components such as resistors and capacitors.

"Wiring" refers to anything that electrically connects components on a board, such as a printed pattern, a solid pattern, a through hole, a via, a jumper wire, or a specific conductive part.
Supplying the speaker drive signal from the input connector to the output connector via only wiring means that the speaker drive signal is supplied from the input connector to the output connector on the front frame LED connection board 500 without passing through electronic circuit components such as buffer circuits 501, 504, 502, 503, 512, LED driver 509, motor drivers 510, 511, etc., or resistors, capacitors, etc.
In other words, the speaker drive signal is supplied to the output connector without any processing (excluding, of course, the effects of the resistance and capacitance of the wiring) in any electronic circuit components other than the input connector, and is output to a speaker outside the board.

The front frame LED connection board 500 serves as a relay circuit for both the speaker drive signal and the digital signal, and sends the speaker drive signal directly to the speaker (see FIG. 15).
A stable supply of digital data for presentation is achieved by carrying out the necessary signal processing (buffering, etc.) for use on downstream boards. This allows for a board that can both relay speaker signals and process digital signals, reducing the number of boards and streamlining and simplifying the board configuration of the gaming machine.
In addition, the speaker drive signal is output externally without undergoing signal processing in electronic circuit components, making it suitable for relaying purposes. This is easy to use for speaker wiring relay on various boards, and is a useful configuration for simplifying the complicated board configuration inside the gaming machine.

The gaming machine 1 of the embodiment has the following (configuration M2).
(Configuration M2)
The gaming machine 1 has a first board having an input side connector for inputting a digital signal for presentation and an analog signal for presentation, and the first board processes the digital signal for presentation using electronic circuit components other than wiring provided on the first board and outputs it from an output side connector to a plurality of other boards, and supplies the analog signal for presentation from the input side connector to an output side connector via only wiring, for output outside the board.

As an example corresponding to this (Configuration M2), the above (Specific Example 23) in which the first board is the front frame LED connection board 500 can be assumed.
The analog signals for performance correspond to the speaker drive signals, that is, the drive signals for the top right speaker, center right speaker, top left speaker, and center left speaker.
In addition, digital signals for performance are output from multiple output connectors, namely connectors CN1C, CN3C, and CN10C, to multiple other boards (the LED board mentioned in Figure 16, relay board 550, and button LED connection board 640).

Such a front frame LED connection board 500 serves as a relay circuit for both the speaker drive signal and the digital signal, and sends the speaker drive signal directly to the speaker. Meanwhile, for the digital data for performance, a stable supply can be realized by carrying out the necessary signal processing (buffer, etc.) for use on multiple downstream boards.

The gaming machine 1 of the embodiment has the following (configuration M3).
(Configuration M3)
The gaming machine 1 has a first board having an input side connector for inputting a serial data signal and a clock signal for presentation and a speaker drive signal, and the first board processes the serial data signal and the clock signal for presentation using electronic circuit components other than wiring provided on the first board, and outputs the signal from an output side connector to a plurality of other boards, and the speaker drive signal is supplied from the input side connector to an output side connector via only wiring, and output to the outside of the board.

As an example corresponding to this (Configuration M3), the above (Specific Example 23) in which the first board is the front frame LED connection board 500 can be assumed.
However, the "serial data signal" corresponds to the data signals DATA_L and DATA_M among digital signals, and the "clock signal" corresponds to the clock signals CLK_L, CLK_M, and S_IN_CLK among digital signals.
The output connectors for these serial data signals and clock signals are connectors CN1C, CN3C, and CN10C.

Such a front frame LED connection board 500 serves as a relay circuit for both the speaker drive signal and the digital signal, and sends the speaker drive signal directly to the speaker.
On the other hand, for the serial data signals and clock signals used for performance, a stable supply can be achieved by carrying out the necessary signal processing (buffering, etc.) for use on multiple downstream boards.

The gaming machine 1 of the embodiment has the following (configuration M4).
(Configuration M4)
The gaming machine 1 has a first board having an input connector for inputting a digital signal for presentation and a speaker drive signal, and the first board processes the digital signal for presentation in a buffer circuit provided on the first board and outputs it from an output connector to a plurality of other boards, and the speaker drive signal is supplied from the input connector to an output connector via only wiring, and output to the outside of the board.

As an example corresponding to this (Configuration M4), the above (Specific Example 23) in which the first board is the front frame LED connection board 500 can be assumed.
However, the buffer circuits correspond to the buffer circuits 501, 502, 503, 504, and 512.
In addition, digital signals for performance are output from multiple output connectors, namely connectors CN1C, CN3C, and CN10C, to multiple other boards (the LED board mentioned in Figure 16, relay board 550, and button LED connection board 640).

Such a front frame LED connection board 500 serves as a relay circuit for both the speaker drive signal and the digital signal, and sends the speaker drive signal directly to the speaker.
On the other hand, the digital signals for performance are buffered before being output from the output connector to multiple downstream boards. By performing buffering in this way, it becomes suitable as a relay for stably sending digital signals to multiple downstream boards.

The gaming machine 1 of the embodiment has the following (configuration M5).
(Configuration M5)
The gaming machine 1 has a first board having an input connector for inputting digital signals for presentation and speaker drive signals, and the first board processes the digital signals for presentation using electronic circuit components other than wiring provided on the first board and outputs them from the output connector to another board, and supplies a speaker drive signal from the input connector to the output connector via only wiring, and outputs it to a speaker outside the board. The assignment of pins on the input connector is such that, when a specified pin assigned for ground is taken as the boundary, all digital signals are assigned to pins located in one direction from the boundary, and all speaker drive signals are assigned to pins located in the other direction from the boundary.

As an example corresponding to this (Configuration M5), the above (Specific Example 23) in which the first board is the front frame LED connection board 500 can be assumed.
As described above in (configuration L1-1), the 17th and 18th pins shown in FIGS. 64 and 15 correspond to the "predetermined pins" of connector CN2C, which corresponds to the input side connector.

Such a front frame LED connection board 500 serves as a relay circuit for both the speaker drive signal and the digital signal, and sends the speaker drive signal directly to the speaker (see FIG. 15).
For digital data used for performance, a stable supply is achieved by carrying out the necessary signal processing (buffering, etc.) for use on downstream boards.
Furthermore, the input side connector CN2C is separated into a digital data side and a speaker side by a boundary formed by a ground terminal (see FIG. 64).
That is, in the path of connector CN2B, transmission line H8, and connector CN2C, the digital signal and analog signal are separated into one and the other at pins 17 and 18. This reduces the mixing of noise into the analog signal (for example, the audio signal supplied to the speaker) due to the effect of the pulse as a digital signal, realizing a good performance.
Therefore, as a relay board having a connector for inputting both digital data and speaker drive, it has effective noise suppression.

The gaming machine 1 of the embodiment has the following (configuration M6).
(Configuration M6)
The gaming machine 1 comprises an inner frame 2 (frame member), a door 6 (door member) that is arranged so as to be able to open and close relative to the inner frame 2, a first board attached to the inner frame 2, and a second board attached to the door 6, and digital signals for performance and speaker drive signals are transmitted from the first board to the second board, and the second board has an input side connector for inputting the digital signals for performance and the speaker drive signals, and is configured to output the digital signals for performance from an output side connector to another board after processing them using electronic circuit components other than wiring provided on the first board, and to supply the speaker drive signals from the input side connector to an output side connector via only wiring and output to a speaker outside the board.

In this (configuration M6), the following corresponding example (specific example 24) is assumed.
(Specific Example 24)
First board: inner frame LED relay board 400
Second board: Front frame LED connection board 500
In addition, the "input side connector,""digitalsignal,""speaker drive signal,""output side connector for digital signal,""output side connector for speaker drive signal," and "electronic circuit components other than wiring" on the second board are the same as those described above (Specific Example 23).

In this case, the front frame LED connection board 500, which is the second board, can achieve the same effect as the above-mentioned (configuration M1). The inner frame LED relay board 400 and the front frame LED connection board 500 are the boundary (transmission line H8) between the inner frame 2 and the door 6, and it is desirable to transmit digital signals and analog signals in a consolidated manner. In this case, the front frame LED connection board 500 serves as a relay circuit for both the speaker drive signal and the digital signal, and the speaker drive signal is sent directly to the speaker. In addition, the digital data for performance is subjected to the necessary signal processing (buffer, etc.) for use in one or more downstream boards, thereby enabling stable supply and suitable transmission as the opening and closing part of the door 6.

6.13 Pattern Configuration

The gaming machine 1 of the embodiment has the following (configuration N1-1).
(Configuration N1-1)
The gaming machine 1 has a first substrate having a multi-layer structure having a surface layer forming the surface, a back layer forming the back surface, and one or more inner layers formed between the surface layer and the back layer, and at least one of the inner layers has a conductive pattern formed to a position closer to the end of the substrate compared to the surface layer or the back layer .

In this (Configuration N1-1), the following corresponding example (Specific Example 25) is assumed.
(Specific Example 25)
First board: front frame LED connection board 500
Surface layer: Surface layer with the pattern shown in FIG. 67 Back layer: Back layer with the pattern shown in FIG. 70 Inner layer: First inner layer and second inner layer with the patterns shown in FIG. 68 and FIG. 69

Here, for ease of explanation, in Figures 65, 66, 67, 68, 69, and 70, the ends of the substrate are shown as an upper end UP, a lower end LW, a left end LS, and a right end RS in accordance with the up, down, left, and right directions in the directions shown in the figures.
Here, the shaded areas in Figures 65 and 66 (areas near the upper end UP, lower end LW, left end LS, and right end RS) indicate areas on the front and back layers that are set as regions where no conductive patterns are formed.
As shown in FIGS. 67 and 70, patterns are formed on the front and back layers so as to avoid the hatched areas in FIGS.

In contrast, in the first inner layer shown in FIG. 68, the vicinity of the upper end UP and left end LS are patterned so as to extend into the areas corresponding to the shaded areas in the front and back layers.
In the second inner layer shown in FIG. 69, the areas near the top end UP, left end LS, and right end RS are patterned so as to extend into the areas corresponding to the shaded areas in the front and back layers.
That is, the first and second inner layers have conductor patterns formed up to positions closer to the edge of the board compared to the front and back layers .

Since there is a possibility that the front and back layers may come into contact with surrounding resin or metal parts, prohibited areas where patterns are not drawn are set.
On the other hand, there is no need to consider contact with surrounding components on the inner layer, so the pattern area is made larger than that of the front and back layers, as shown in the figure.
This makes it possible to simplify the pattern layout on the inner layers, increase the degree of freedom in the layout, and form thicker wiring patterns.

In addition to the above (Configuration N1-1), the gaming machine 1 of the embodiment has the following (Configuration N1-2).
(Configuration N1-2)
In the inner layer, a pattern serving as a solid ground or a solid power supply is formed up to a position close to the edge of the board.

In the first inner layer of Figure 68, a power supply pattern 531 as a solid power supply is formed to a position close to the upper end UP and right end RS, and a power supply pattern 530 as a solid power supply is formed to a position close to the upper end UP, left end LS, and lower end LW.
These power supply patterns 530, 531 are utilized up to positions close to the ends of the substrate, which are prohibited areas on the front and back layers, to provide a solid power supply with as large an area as possible, thereby ensuring the maximum current capacity.

In addition, on the second inner layer in FIG. 69, a ground pattern 538 as a solid ground is formed up to positions close to the upper end UP, left end LS, lower end LW, and right end RS.
In this way, the ground pattern 538 is made to have as large an area as possible of a solid ground, utilizing positions close to the edges of the board that are prohibited areas on the front and back layers, thereby ensuring the current capacity of the ground.

In other words, in the front frame LED connection board 500, a solid power supply pattern and a solid ground pattern are formed by utilizing the inner surface layer, thereby making it possible to realize a solid pattern with a larger area.
In addition to the prohibited areas, it is usually considered that there are rules for the area in which patterns are formed, such as a margin of 1 mm or more. Therefore, even in inner layers in which prohibited areas are not set, it is considered that patterns are formed with a margin of 1 mm or the like as a limit until the edge of the substrate is reached.

The gaming machine 1 of the embodiment has the following (configuration N2-1).
(Configuration N2-1)
The gaming machine 1 has a first substrate having a multi-layer structure having a surface layer forming the surface, a back layer forming the back surface, and one or more inner layers formed between the surface layer and the back layer, and one of the inner layers has a first solid power supply pattern formed as wiring for a first power supply voltage and a second solid power supply pattern formed as wiring for a second power supply voltage.

In this (Configuration N2-1), the following corresponding example (Specific Example 26) is assumed.
(Specific Example 26)
First board: front frame LED connection board 500
Surface layer: surface layer with the pattern shown in FIG. 67 Back layer: back layer with the pattern shown in FIG. 70 Inner layer: first inner layer with the pattern shown in FIG. 68 First power supply voltage: 5V DC voltage (DC5VB)
Second power supply voltage: 12V DC voltage (DC12VB)
First solid power supply pattern: power supply pattern 530
Second solid power supply pattern: power supply pattern 531

In the front frame LED connection board 500, the wiring for 5V DC voltage (DC5VB) and 12V DC voltage (DC12VB) is formed as a wide solid power supply by utilizing the first inner layer as shown in FIG. 68 (power supply patterns 530, 531).

The front frame LED connection board 500 supplies power to many downstream boards and the amount of current increases, so we want to configure a solid power supply pattern. Furthermore, as mentioned above, it is equipped with 5V and 12V power wiring, and we want to make each of these multiple power supply systems into a solid power supply pattern. One issue in making each of the multiple power supply systems into a solid power supply pattern is securing the board area, but by using the inner layers of the board, we have made it possible to easily realize a solid power supply pattern regardless of the requirement for complex circuit pattern wiring.

In particular, the front frame LED connection board 500 is an intermediate board that contains a mixture of analog speaker drive signals and digital data for LED lighting effects and motor effects. In this case, it is desirable to separate the analog signals from the digital signals to reduce noise, but with a relatively small board area, it can be difficult to space components and wiring apart. By using the first inner layer for power supply wiring, it becomes possible to deal with such circumstances and design an appropriate component placement pattern.

In addition, the front frame LED connection board 500 of the embodiment has solid ground patterns 536, 537, and 538 formed on the front layer in Figure 67, the second inner layer in Figure 69, and the back layer in Figure 70, which surround the wiring patterns between each electronic circuit component in the surface direction and interlayer direction, thereby providing a shielding effect against high-frequency noise caused by digital signals.
In order to properly form such a solid ground, it is preferable to form the solid power supply pattern intensively on the first inner layer, because this creates an area surplus for forming the solid ground on other layers.

In addition to the above (Configuration N2-1), the gaming machine 1 of the embodiment has the following (Configuration N2-2).
(Configuration N2-2)
A first connector is attached to the first substrate, the first connector having a first power supply terminal assigned to the first power supply voltage transmitted from another substrate and a second power supply terminal assigned to the second power supply voltage transmitted from another substrate, and the first connector is attached to the first substrate at a position spanning the first solid power supply pattern and the second solid power supply pattern when viewed in the thickness direction of the substrate.

Considering the front frame LED connection board 500 in accordance with the above (Specific Example 26), the first connector is connector CN2C.
The first power supply terminal corresponds to pins 1 and 3 which are terminals for a 5V DC voltage (DC5VB). The second power supply terminal corresponds to pins 27, 28, 29, and 30 which are terminals for a 12V DC voltage (DC12VB).

As can be seen from Figures 65 and 68, connector CN2C is positioned so that the left side of the housing (the side with the smaller pin number) is above power supply pattern 530 and the right side of the housing (the side with the larger pin number) is above power supply pattern 531.
This makes it possible to easily realize wiring from the connector CN2C to the power supply pattern 530 of 5V DC voltage (DC5VB) and the power supply pattern 531 of 12V DC voltage (DC12VB) by using vias between layers.

In addition to the above-mentioned (Configuration N2-1) or (Configuration N2-2), the gaming machine 1 of the embodiment has the following (Configuration N2-3).
(Configuration N2-3)
On the first substrate, a power supply pattern of a third power supply voltage which is isolated from the first or second power supply voltage via a protection circuit is formed in the same layer as the first solid power supply pattern and the second solid power supply pattern.

Considering the front frame LED connection board 500 in accordance with the above (Specific Example 26), the protection circuit is power supply isolation/protection circuit 520 or power supply isolation/protection circuit 521, and the third power supply voltage is a 12V motor drive voltage (MOT12V) or a 12V direct current voltage (DC12VS).
As shown in FIG. 68, a power supply pattern 533 constituting a power supply line PLr for a 12V motor drive voltage (MOT12V) is formed on the first inner layer.
Also, on the first inner layer, a power supply pattern 532 constituting a power supply line PLq of 12V direct current voltage (DC12VS) is formed.

In this way, when three or more power supply voltages are used, a configuration in which the power supply patterns are concentrated on inner layers makes it easier to space analog and digital electronic components and to design patterns to reduce noise, which is desirable.

The gaming machine 1 of the embodiment has the following (configuration N3-1).
(Configuration N3-1)
The gaming machine 1 has a first substrate on which a first driver circuit for performing light emission effects and a second driver circuit for performing movable body effects are provided, and the first substrate is provided with a first power supply pattern for supplying a first power supply voltage of a predetermined level input from another substrate to the first driver circuit, and a second power supply pattern for supplying a second power supply voltage separated from the first power supply voltage via a protection circuit to the second driver circuit, and when the separation distance between the electrical component constituting the protection circuit and the electrical component constituting the first driver circuit is x and the separation distance between the electrical component constituting the protection circuit and the electrical component constituting the second driver circuit is y, x>y.

FIG. 71 shows a modified example of the configuration of the front frame LED connection board 500.
In the explanation so far, the LED driver 509 of the front frame LED connection board 500 performs serial/parallel conversion for driving the motor (see Figs. 57 and 19), but Fig. 71 shows an example in which the LED driver 509 is used for LED light emission.

Although FIG. 71 only shows a 12V power supply system, for example, connector CN1C supplies a 12V DC voltage (DC12VB) to light-emitting section 951 of another board 950, which serves as the power supply voltage for driving the LED in light-emitting section 951.
The LED driver 509 supplies light emission drive signals to each LED of the light emitting unit 951 of the other board 950 via a connector CN1C (although the signal lines are not shown in FIG. 71).

Even in this configuration, the front frame LED connection board 500 can form a power supply pattern on the inner layer as shown in Figure 68.

Based on the above modification, the following corresponding example (specific example 27) is assumed for the above (Configuration N3-1).
(Example 27)
First board: front frame LED connection board 500
First power supply voltage: 12V DC voltage (DC12VB)
Second power supply voltage: 12V DC voltage (DC12VS) or motor drive voltage (MOT12V)
Protection circuit: Isolation/protection circuits 520, 521
First driver circuit: LED driver 509 of FIG. 71
Second driver circuit: motor drivers 510 and 511 in FIG. 71
First power supply pattern: power supply pattern 531
Second power supply pattern: power supply patterns 532 and 533

When considering the isolation/protection circuit 520, its electrical components are the Schottky barrier diode D18C, resistor R27C, capacitors C12C and C13C, and chip varistor 515 shown in FIG.
For example, Fig. 65 shows the distance x1 between the LED driver 509 and the Schottky barrier diode D18C in Fig. 66 when viewed in the planar direction, and also shows the distance y1 between the motor driver 511 and the Schottky barrier diode D18C when viewed in the planar direction. Clearly, x1>y1. The above x>y holds even when the distance in the interlayer direction is taken into account.

Also, when isolation/protection circuit 521 is considered, its electrical components are diode D19C, resistor R34C, and capacitor C21C shown in FIG.
Comparing the distance x2 between the LED driver 509 and the diode D19C when viewed in the planar direction with the distance y2 between the motor driver 511 and the capacitor C21C when viewed in the planar direction, it is clear that x2>y2 and the above x>y holds true.

As shown in FIG. 71, similar to FIG. 57, in the front frame LED connection board 500, the motor drive voltage (MOT12V) and 12V DC voltage (DC12VS) are separated from the 12V power supply voltage (DC12VB) supplied from upstream by the power supply separation/protection circuits 520, 521, and power supply lines PLq, PLr are formed and supplied to the motor drivers 510, 511.

In other words, the motor drive voltage (MOT12V) and the 12V DC voltage (DC12VS) are wired separately from the position where they are separated from the 12V DC voltage (DC12VB) (the position of the power supply separation/protection circuits 520, 521), but by satisfying the above x>y, the wiring length of the power supply lines PLq, PLr can be shortened (see FIG. 68).

By shortening the power supply wiring after separation in this manner, the wiring resistance can be reduced, and appropriate power supply can be achieved. In addition, this is advantageous for wiring the first power supply line (PLp) and forming a solid power supply pattern.

In addition to the above (Configuration N3-1), the gaming machine 1 of the embodiment has the following (Configuration N3-2).
(Configuration N3-2)
One or both of the first power supply voltage and the second power supply voltage are output to the outside of the first substrate.

Considering the front frame LED connection board 500 in Figure 71 in line with the above (Specific Example 27), the first power supply voltage, 12V DC voltage (DC12VB), is output to the outside from connectors CN1C, CN3C, CN4C, and CN10C.
Also, when the second power supply voltage is considered as a motor drive voltage (MOT12V), it is output to the outside from a connector CN10C as shown in FIG.
Therefore, both the first power supply voltage and the second power supply voltage are outputted to the outside of the substrate.

In addition, if the second power supply voltage is considered to be a 12V direct current voltage (DC12VS), this is not output to the outside, so only the first power supply voltage is output to the outside of the board.

The front frame LED connection board 500 outputs 12V DC voltage (DC12VB) and motor drive voltage (MOT12V) from connector CN to downstream boards and devices, and this configuration makes it possible to use different power sources for downstream motors and LED boards as well.
It is also conceivable that such a configuration may be adopted for other boards, such as the side unit upper right LED board 600.

The gaming machine 1 of the embodiment has the following (configuration N4-1).
(Configuration N4-1)
The gaming machine 1 comprises a first board, a second board, and a third board, the second board comprises an input side connector that inputs a first power supply voltage, a second power supply voltage, and a performance control signal from the first board, and is connected to the first board and ground wiring, pattern wiring that supplies the first power supply voltage and the second power supply voltage to electronic components provided on the boards, and an output side connector that outputs the first power supply voltage, the second power supply voltage, and the performance control signal to the third board, and is connected to the third board and ground wiring, the input side connector being assigned to a pin that is one end to which the first power supply voltage is assigned, and a pin that is the other end to which the second power supply voltage is assigned.

In this (configuration N4-1), the following corresponding example (specific example 28) is assumed.
(Specific Example 28)
First board: inner frame LED relay board 400
Second board: Front frame LED connection board 500
Third board: relay board 550, button LED connection board 640, LED board (not shown: connection destination of connector CN1C)
Input connector: Connector CN2C
Output side connectors: Connectors CN3C, CN10C, CN1C
First power supply voltage: 5V DC voltage (DC5VB)
Second power supply voltage: 12V DC voltage (DC12VB)
・Pins on one end: 1st pin, 3rd pin ・Pins on the other end: 27th pin to 30th pin

Power supply patterns are often wider than wiring patterns for signal transmission.
When wiring multiple types of power supply systems and grounds on a board, supplying power to the circuits on the board, and transmitting power supply voltage and performance control signals to downstream boards, it becomes extremely difficult to route the power supply patterns.

Therefore, as shown in Figure 64, in the input connector CN2C, 5V DC voltage (DC5VB) is assigned to the first and third pins in the left corner of the figure, and 12V DC voltage (DC12VB) is assigned to the four pins from the 27th pin to the 30th pin in the right corner of the figure.

In this way, by inputting the power supply voltage at positions as far apart as possible, it is possible to simplify the layout of the power supply wiring. In particular, since many power supply wirings are required to supply power to each electronic circuit component, when multiple power supply voltages are input, separating them at both ends of the connector is advantageous in simplifying the pattern design.

In addition to the above (Configuration N4-1), the gaming machine 1 of the embodiment has the following (Configuration N4-2).
(Configuration N4-2)
A solid power supply pattern is formed as the first power supply voltage or the second power supply voltage.

Power supply patterns 530 and 531, which are solid power supply patterns in FIG. 68, correspond to this configuration.
By assigning the input 5V DC voltage (DC5VB) and 12V DC voltage (DC12VB) so that they are separated at both ends of connector CN2C, it becomes easy to form solid power supply patterns 530, 531 for the 5V DC voltage (DC5VB) and 12V DC voltage (DC12VB) as shown in FIG. 68.

In addition, by assigning the 5V DC voltage (DC5VB) and the 12V DC voltage (DC12VB) separately to either end of the connector CN2C, pattern formation becomes easier even when only one of them is used as a solid power supply.

[6.14 Arrangement of LEDs, LED drivers, connectors, etc.]

The gaming machine 1 of the embodiment has the following (configuration P1-1).
(Configuration P1-1)
The gaming machine 1 is provided with a first substrate having a connector, a plurality of light-emitting elements, and a light-emitting drive unit that drives the plurality of light-emitting elements to emit light based on a performance control signal input via the connector, and when the light-emitting element among the plurality of light-emitting elements that is closest to the connector is called a first light-emitting element, the light-emitting element among the plurality of light-emitting elements that is farthest from the connector is called a second light-emitting element, and the distance between the first light-emitting element and the light-emitting drive unit is called a first distance dDL1 and the distance between the second light-emitting element and the light-emitting drive unit is called a second distance dDL2, the light-emitting drive unit and the plurality of light-emitting elements are arranged on the first substrate such that first distance/(first distance+second distance)=1/3 to 2/3.

In this (Configuration P1-1), the following corresponding example (Specific Example 29) is assumed.
(Example 29)
First board: Side unit LED board 630A (described in Figures 73, 74, and 75)
Connector: Connector CN1T
・Multiple light-emitting elements: LED1 to LED10
Light emission driver: LED driver 631
First light emitting element: LED 10
Second light-emitting element: LED1

First, the LED board 630A on the side unit will be described with reference to Figures 73, 74, and 75. This LED board 630A on the side unit is another example of the LED board 630 on the side unit described in Figure 32.

Figure 75 shows the circuit configuration of the LED board 630A on the side unit, but the same parts as in Figure 32 are given the same reference numerals and their explanations are omitted. What differs from the example in Figure 32 is that 15 systems of LEDs are arranged as the light-emitting unit 632, and these are driven by the LED driver 631 (Figure 32 shows an example of 9 systems).

That is, the LED driver 631 has output terminals LEDR1, LEDG1, LEDB1...LEDR8, LEDG8, LEDB8 for the light emission drive current, which is the drive signal for the light emitting element, and can control the drive current for 24 systems. In this case, LED light emission drive is performed using 15 terminals, namely output terminals LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, LEDG3, LEDB3, LEDR4, LEDG4, LEDB4, LEDR5, LEDG5, LEDB5. As shown in the figure, the other output terminals are connected to ground.

In addition, in the light-emitting section 632, a color LED chip integrating R/G/B LEDs is mounted, and "LED1" to "LED10" in the figure indicate one color LED chip. Hereinafter, these color LED chips will be referred to as "light-emitting element LED1", "light-emitting element LED2", etc.
For example, the light emitting element LED1 is a color LED chip including three LEDs, R, G, and B, surrounded by dashed lines, and each LED emits light in response to light emission drive currents 24-R1, 24-G1, and 24-B1, respectively.

These LED chips are collectively referred to as "light-emitting element LED." Note that, although single-color LED chips may be used, such as in the LED board 780 described below, there is no distinction between single-color LED chips and color LED chips. They are collectively referred to as "light-emitting element LED" when describing each chip, and each chip is individually referred to as "light-emitting element LED1," "light-emitting element LED2," etc.

75, the light-emitting elements LED1 and LED2 are connected in series. The light-emitting elements LED3 and LED4, the light-emitting elements LED5 and LED6, the light-emitting elements LED7 and LED8, and the light-emitting elements LED9 and LED10 are also connected in series.
Therefore, in terms of color LED chip units, five systems of light emission drive are performed.

In FIG. 75, the dotted lines indicate the light-emitting element LED as a color LED chip, but as can be seen from the numbers of diode symbols corresponding to symbols such as "LED1" in the above-mentioned FIG. 27, FIG. 31, FIG. 32, FIG. 34, FIG. 45, FIG. 47, etc., they also include LEDs configured as color LED chips. In each of these figures, some single-color LED chips are also used.

FIG. 73 shows the conductor pattern on the front surface layer of such an LED board 630A on a side unit, and FIG. 74 shows the conductor pattern on the back surface layer.
The back layer in Fig. 74 is shown as a perspective view seen from the front layer side in Fig. 73, and the conductor pattern and board control number are shown in a state in which they are reversed from the state in which the back side of the board is normally viewed. The identification numbers of the parts printed on the board are omitted. The part shown as "○○+xxx△" actually displays the board control number.

73 and 74, the positions of the electronic components are indicated by symbols.
"pLED1" to "pLED10" in FIG. 73 (surface layer) indicate the positions (lands as contact points) where the light emitting elements LED1 to LED10 are disposed, respectively.
In FIG. 74 (back surface layer), "p631" indicates the position (land) where the LED driver 631 is disposed, and "pCN1T" indicates the position (land) where the connector CN1T is disposed.
The first pin side of the connector CN1T is the land on the right side of the drawing, and the sixth pin side is the land on the left side.

"pR38" in FIG. 74 is the position (land) where resistors R38T, R42T, R43T, and R44T (see FIG. 75 for these resistors) connected to the light-emitting element LED2, which is a color LED chip, are disposed.
"pR5" is a position (land) where the resistors R5T, R6T, R7T, and R8T connected to the light-emitting element LED4 are disposed.
"pR9" is a position (land) where the resistors R9T, R10T, R11T, and R12T connected to the light-emitting element LED6 are disposed.
"pR13" is a position (land) where the resistors R13T, R14T, R15T, and R16T connected to the light-emitting element LED8 are disposed.
"pR17" is a position (land) where the resistors R17T, R18T, R19T, and R20T connected to the light-emitting element LED10 are disposed.

As shown in FIGS. 73 and 74, a ground pattern 633 is formed as a solid ground on the front and back layers, and a wiring pattern for realizing the circuit configuration of FIG. 75 is also formed.
The numerous small circular parts shown on the pattern represent through holes or vias. In particular, through-hole vias (interlayer wiring) with copper foil are also included. In the following, these will be collectively referred to as through holes.

The power supply pattern 634 for 12 V DC voltage (DC12VB) is formed on the back layer continuing from the contact (land) of the sixth pin of the connector CN1T as shown in FIG. 74, but is branched off to the power supply pattern 634 on the front layer side in FIG. 73 via a through hole TH1.
The power supply pattern 634 on the front layer side is connected to the SVCC terminal of the LED driver 631 by a through hole TH2, and also to the VLED terminal of the LED driver 631 via a through hole TH3.
The LED driver 631 has an SVCC terminal, which is a 48th terminal, which is an operating power supply terminal, and a VLED terminal, which is a 30th terminal, which is a protection terminal for the LED drive output.

In FIG. 74, "pR234" adjacent to the position (land) pCN1T where the connector CN1T is arranged indicates the position (land) where the resistors R2T, R3T, and R4T (see FIG. 75) are arranged.
The clock signal CLK input to the second pin of the connector CN 1 T is input to the LED driver 631 via a resistor R 2 T and a clock wiring pattern 635 .
A data signal DATA and a reset signal RESET input to the third and fourth pins of the connector CN1T are input to the LED driver 631 via resistors R3T, R4T and signal wiring patterns 636 formed on the front and back layer sides.

Fig. 76 shows a plan view of the LED driver 631 arranged at "p631" in Fig. 74. The LED driver 631 is a square chip part.
In this example, the chip component is substantially square, but it may of course be rectangular.
In addition, the corners of the square chip housing are chamfered as shown in the figure, so strictly speaking it is an octagon, but the chamfered parts should not be considered as sides, but should be considered as a quadrangle. "Square shape" means that it is approximately a square, ignoring minor shapes such as the chamfered parts.

Under the above assumptions, the chip serving as the LED driver 631 is rectangular and has four sides. The first side is side sd1, the second side is side sd2, the third side is side sd3, and the fourth side is side sd4. Sides sd1 and sd3 are opposed to each other, and sides sd2 and sd4 are opposed to each other.
The terminals of the LED driver 631 shown in FIG. 76 are provided on side sd1 with terminals 1 (VREF) to 12 (A1), on side sd2 with terminals 13 (A2) to 24 (LEDG3), on side sd3 with terminals 25 (LEDB3) to 36 (LEDR6), and on side sd4 with terminals 37 (LEDG6) to 48 (SVCC).

Terminal 1 (VREF) is a 5V reference voltage output terminal.
The second terminal (SCLK) is an input terminal for the clock signal CLK.
Terminal 3 (SDATA) is an input terminal for the data signal DATA.
Terminal No. 4 (SDEN) is an enable signal input terminal, which is connected to ground in this example as shown in FIG.
Terminal 5 (CTLSCT) is a serial bus communication setting terminal, and the reference voltage from terminal 1, that is, the H level, is input to set the specified mode.
Terminal 6 (OUTSCT) is an output mode control terminal for the LED drive current, and in this example is set to L level by being connected to ground, and is set to a predetermined mode, for example, constant current output.
Terminal 7 (RESET) is an input terminal for the reset signal RESET.
Terminal 8 (RT1) is a resistor connection terminal for setting the reference current. In this example, resistor R1T is connected.
Terminals 9 and 31 (NC) are dummy terminals (no internal connection).
Terminal 10 (SGND) is the ground terminal.

Terminals 11 to 15 (A0 to A4) are address terminals that set the slave address. In this example, as shown in Figure 75, A0, A1, and A2 are connected to ground, and A3 and A4 are connected to a reference voltage of 5 V, so that the slave address of the LED driver 631 is "00011".

Terminals 16 to 45 (excluding terminals 30 and 31) are used to form the LED light emission drive current terminals (LEDR1 to LEDB8) and ground terminals (PGND1 to PGND4).

Terminals 46 and 47 are test terminals and are connected to ground.
As described above, terminal 48 (SVCC) is an operating power supply terminal, and terminal 30 (VLED) is a protection terminal for the LED drive output.

FIG. 77A shows the light emitting elements LED1 to LED10, connector CN1T, and LED driver 631 arranged on the side unit LED board 630A.
The light emitting elements LED1 to LED10 are arranged on the front surface layer and are indicated by solid lines, while the LED driver 631 and the connector CN1T are arranged on the back surface layer and are indicated by dashed lines. The LED driver 631 is viewed from the bottom side, so in Fig. 77A, side sd2 is on the left side and side sd4 is on the right side, which is the opposite of Fig. 76.
For ease of explanation, in FIG. 77A, the ends of the substrate are shown as an upper end UP, a lower end LW, a left end LS, and a right end RS in accordance with the top, bottom, left and right directions in the illustrated direction.

In such a side unit LED board 630A, the components corresponding to the above-mentioned (Configuration P1-1) are the multiple light-emitting elements LED1 to LED10 as described in (Specific Example 29), and the light-emitting driving unit for these is an LED driver 631.
The first light emitting element is the light emitting element LED10 that is closest to the connector CN1T, and the second light emitting element is the light emitting element LED1 that is farthest from the connector CN1T.

Here, in FIG. 77A, the first distance dDL1 in the above-mentioned (configuration P1-1) indicates the distance between the light-emitting element LED10 and the LED driver 631, and the second distance dDL2 indicates the distance between the light-emitting element LED1 and the LED driver 631.
As is clear from the figure, the second distance dDL2 is longer than the first distance dDL1, but the difference in length is not large, and at least the value of dDL1/(dDL1+dDL2) is within the range of 1/3 to 2/3.

FIG. 78A shows the relative relationship between the first distance dDL1 and the second distance dDL2.
Now, assuming that the value of the first distance dDL1 + the second distance dDL2 is the total length shown, FIG. 78A shows the cases where the value of dDL1/(dDL1 + dDL2) is 1/3 and 2/3.

The relationship between the lengths of the first distance dDL1 and the second distance dDL2 being within this range means that the LED driver 631 is positioned in the central area between the light-emitting element LED10, which is closest to the connector CN1T, and the light-emitting element LED1, which is the farthest, when the area is divided into thirds.
That is, on the substrate on which the light emitting elements LED1 to LED10 are arranged, the LED driver 631 is arranged in an area that is approximately in the center of these light emitting elements.

Around the LED driver 631, it is necessary to form wiring patterns, for example, between output terminals LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, LEDG3, LEDB3, LEDR4, LEDG4, LEDB4, LEDR5, LEDG5, LEDB5 and predetermined light-emitting elements.
In this case, the LED driver 631 is positioned approximately in the center of the multiple light emitting elements, which makes it easier to design the wiring pattern. Another advantage is that the difference in wiring length between the LED driver 631 and each light emitting element can be made relatively small.

In particular, the LED driver 631 needs to form wiring for inputting a clock signal CLK, a data signal DATA, a 12V DC voltage (DC12VB), etc. for controlling the light emission performance, as well as wiring for forming a drive current path to the many light-emitting elements LED, and the wiring is likely to become congested if many light-emitting elements are concentrated in a direction biased from the LED driver 631. In contrast, if the LED driver 631 is positioned approximately in the center of the many light-emitting elements LED, the directions in which the light-emitting elements are positioned will be scattered as viewed from the LED driver 631, which increases the degree of freedom in wiring design and makes pattern design easier.
As a result, a simple wiring pattern such as that shown in FIG. 74 and FIG. 75 can be realized.

75, the driving current wiring between the LED driver 631 and the light-emitting element LED is 15 systems, but if the number of light-emitting elements is increased and 24 systems of driving current wiring are provided by fully using the output terminals of the LED driver 631, the peripheral wiring will become even more dense. In such a case, it is particularly preferable to place the LED driver 631 approximately in the center of the many light-emitting elements LED.

In addition to the above (Configuration P1-1), the gaming machine 1 of the embodiment has the following (Configuration P1-2).
(Configuration P1-2)
On the first substrate, the light-emitting driving section and the plurality of light-emitting elements are arranged so that the ratio of first distance dDL1:second distance dDL2 becomes from 6:4 to 4:6.

The relative relationship between the first distance dDL1 and the second distance dDL2 in this case is shown in FIG. 78B.
When the value of the first distance dDL1 + the second distance dDL2 is the total length shown, Figure 78B shows the cases where the first distance dDL1 is 40% and 60% of the value of (dDL1 + dDL2).
If the relationship between the lengths of the first distance dDL1 and the second distance dDL2 is within this range, it means that the first distance dDL1:second distance dDL2 is within the range of 6:4 to 4:6. This means that the LED driver 631 is disposed in a more central area between the light-emitting element LED10, which is closest to the connector CN1T, and the light-emitting element LED1, which is the furthest. In other words, the range of arrangement of the LED driver 631 is more limited than in the case of the above (Configuration P1-1). This can enhance the effects described for (Configuration P1-1).

Furthermore, the gaming machine 1 of the embodiment has the following (configuration P1-3) in addition to the above (configuration P1-1) and/or (configuration P1-2).
(Configuration P1-3)
The light emitting drive section and the plurality of light emitting elements are configured to operate on a common power supply voltage.

In particular, the multiple light-emitting element LEDs are not all connected in parallel, but include a light-emitting system in which two or more light-emitting element LEDs are connected in series.

Conventionally, IC chips used as LED drivers in pinball game machines were powered by a 5V power supply.
When using a 5V power supply for the LED driver, the same 5V power supply is also used to drive the LEDs. However, in that case, due to the forward voltage of the LED, the limit is one LED per system. For example, it is difficult to connect multiple LEDs in series to one system to enhance the light emission effect.
Furthermore, since only one LED can be connected to one system, the total number of LED chips that can be driven is limited by the number of output terminals for the LED drive current.

In order to avoid such limitations and connect multiple LED chips in series in one system, conventional models have required a 12V power supply, for example, in addition to the 5V power supply used by the LED driver to supply drive current to the LED chips.
That is, a 12V power supply system and a 5V power supply system are provided together on a board having an LED and an LED driver.
However, this causes difficulties in designing patterns, including power supply patterns, and increases the board area.

For example, if the LED driver is located near the connector, it becomes easier to design the power supply wiring pattern, but in exchange, it becomes more difficult to design the LED drive current wiring pattern.
On the other hand, if the LED driver is placed in the center of the board (LED group), the design of the LED drive current wiring pattern can be simplified, but it becomes difficult to design the wiring patterns for two types of power supplies, the 12V power supply system and the 5V power supply system.

In this embodiment, as can be seen from Figures 73, 74, 75 and 77, the light-emitting element LED is configured in such a way that five systems (15 systems if considered separately for RGB) per chip are configured with two LEDs connected in series, and the power supply for the light-emitting unit 632 and the LED driver 631 is a common 12V direct current voltage (DC12V).
In other words, a 12V drive is adopted as the LED driver 631, and the power supply voltage applied to the light-emitting unit 632 consisting of two LED chips connected in series and the power supply voltage applied to the LED driver 631 are made common to a 12V direct current voltage (DC12V).
This increases the amount of light emitted by the light-emitting portion 632, enhancing the dramatic effect. Alternatively, by adopting a series connection of a plurality of LED chips, it becomes possible to arrange LED chips in excess of the number of output terminals of the LED driver 631.

Furthermore, by providing a single power supply system in the side unit LED board 630A, the degree of freedom in pattern design is increased and the pattern design is simplified.
Even if the LED driver is disposed in the center of the board (LED group), the power supply wiring pattern does not become complicated, and the design of the LED drive current wiring pattern becomes easy.
Furthermore, by using only one power supply system, it is not necessary to route an extra power supply system, and therefore it is not necessary to increase the board area due to the need to route the power supply pattern.

Furthermore, by using only one power supply system, the wiring pattern can be simplified.
When driving the LED with a 12V power supply voltage and the LED driver with a 5V power supply voltage, the power supply wiring from the connector to the LED and the power supply wiring from the connector to the LED driver need to be separate power supply patterns, which makes the wiring complicated.
On the other hand, by using a single power supply system, a common power supply pattern can be used from the connector CN1T to the through hole TH1 as shown in Fig. 74. In other words, the power supply pattern that supplies the power supply voltage to each LED is used to supply power to the LED driver 631. This simplifies the wiring pattern.

Furthermore, as described above in (Configuration P1-1) and/or (Configuration P1-2), the LED driver 631 is located approximately in the center of the multiple light-emitting elements on the board, and the power supply system described in (Configuration P1-3) is shared, resulting in a synergistic effect that makes it easier to design patterns and prevents the board area from expanding due to pattern wiring issues.

As shown in Fig. 74, the power supply pattern 634 connected to the sixth pin of the connector CN1T on the back layer side is configured to supply a 12V DC voltage (DC12VB) to the light-emitting elements LED10, LED8, LED6, LED4, and LED2 via positions (lands) pR17, pR13, pR9, pR5, and pR38, as can be seen by comparing Figs. 73, 74, and 75. In this way, the 12V DC voltage (DC12VB) is supplied to the light-emitting elements LED10, LED8, LED6, LED4, and LED2 by a single pattern that does not branch out within the same layer, which has the effect of preventing variation in the power supply voltage supplied to each light-emitting element LED.

73 is formed to supply a 12V DC voltage (DC12VB) to the LED driver 631. The power supply pattern 634 is branched to the front layer side at a through hole TH1 between the position (land) pR9 and the position (land) pR5 on the rear layer side.
As can be seen from each figure, this means that the power supply pattern 634 is branched at a position very close to the LED driver 631. This makes it possible to shorten the length of the power supply wiring for supplying power to the LED driver 631 after branching, which leads to simplification of the power supply wiring to the LED driver 631 and stabilization of the voltage.

Although the LED driver 631 is arranged on the back layer side, a 12V DC voltage (DC12VB) is supplied to terminal 48 (SVCC) and terminal 30 (VLED) via through holes TH1, TH2, and TH3 and the power supply pattern 634 on the front layer side. This avoids providing a power supply pattern 634 around the LED driver 631 on the back layer side, and simplifies the wiring design around the LED driver 631.

Furthermore, forming the power supply pattern 634 around the LED driver 631 on the front layer side means that it is separated as far as possible from the clock wiring pattern 635 and the signal wiring pattern 636 on the back layer side, which has the advantage of making it less susceptible to the effects of high-frequency noise due to the clock signal CLK and the data signal DATA on the power supply voltage.
74, the power supply pattern 634 on the back surface layer is formed along the upper end UP side of the substrate, and the clock wiring pattern 635 and the signal wiring pattern 636 are formed in a position close to the lower end LW side of the substrate. This also makes it difficult for the power supply voltage to be affected by high frequency noise due to the clock signal CLK and the data signal DATA.

In addition, arranging the light-emitting elements LED1 to LED10 on the front layer side and the LED driver 631 on the back layer side is a desirable configuration in that the light-emitting elements LED1 to LED10 and the LED driver 631 do not cause thermal interference with each other.
That is, when the light emitting elements LED1 to LED10 generate heat, the heat is unlikely to affect the LED driver 631. Conversely, the light emitting operation of the light emitting element LED is unlikely to become unstable due to the heat generated by the LED driver 631.

Therefore, the side unit LED board 630A has a configuration which provides the following effects: heat countermeasure effect, prevention of the effect of high frequency noise on the power supply, ease of pattern design, and stability of the power supply voltage.

The gaming machine 1 of the embodiment has the following (configuration P2-1).
(Configuration P2-1)
The gaming machine 1 is provided with a first substrate having a connector, a plurality of light-emitting elements, and a light-emitting drive unit that drives the plurality of light-emitting elements to emit light based on a performance control signal input through the connector, and on the first substrate, when the light-emitting element among the plurality of light-emitting elements that is closest to the connector is designated as a first light-emitting element, and the light-emitting element among the plurality of light-emitting elements that is farthest from the connector is designated as a second light-emitting element, the distance dCD between the connector and the light-emitting drive unit is longer than the distance dCL1 between the connector and the first light-emitting element, and the distance dCD between the connector and the light-emitting drive unit is shorter than the distance dCL2 between the connector and the second light-emitting element.

The above-mentioned (Specific Example 29) is assumed to be a corresponding example of this (Configuration P2-1).
77A, in this (configuration P2-1), the distance between the connector CN1T and the light-emitting element LED10 is indicated as a distance dCL1, the distance between the connector CN1T and the light-emitting element LED1 is indicated as a distance dCL2, and the distance between the connector CN1T and the light-emitting element LED1 is indicated as a distance dCD.
The LED driver 631, which is a light emission driving unit, is disposed between the first light emitting element (light emitting element LED10) and the second light emitting element (light emitting element LED1).

As is clear from the figure, distance dCD is longer than distance dCL1. Also, distance dCD is shorter than distance dCL2.

FIG. 78C shows the relative relationship between the distance dDL1, the distance dCD, and the distance dDL2.
The relationship between the lengths of distances dDL1, dCD, and dDL2 satisfies dCL1 < dCD < dCL2 in this manner, which means that the LED driver 631 is positioned in the area between the light-emitting element LED10, which is closest to the connector CN1T, and the light-emitting element LED1, which is the farthest from the connector CN1T.
That is, on the substrate on which the light emitting elements LED1 to LED10 are arranged, the LED driver 631 is arranged in an area within the range in which these light emitting elements are arranged.

Note that "within range" here typically refers to a case in which, in the relationship between the connector CN1T, the multiple light-emitting elements LED1 to LED10, and the LED driver 631, the connector CN1T is arranged near the end of the board, and the light-emitting elements LED1 to LED10 and the LED driver 631 are not arranged on the end of the board closest to the connector CN1T (for example, the upper right part of the board).
And "within range" means that when the relationship from connector CN1T to the light-emitting element LED1 that is the furthest from connector CN1T is projected in one dimension, as in Figure 77B, the LED driver 631 is positioned between the light-emitting element LED10 that is closest to connector CN1T and the light-emitting element LED1.

Around the LED driver 631, it is necessary to form wiring patterns, for example, between output terminals LEDR1, LEDG1, LEDB1, LEDR2, LEDG2, LEDB2, LEDR3, LEDG3, LEDB3, LEDR4, LEDG4, LEDB4, LEDR5, LEDG5, LEDB5 and predetermined light-emitting elements.
In this case, the LED driver 631 is located within the area where many light-emitting elements are arranged, which makes it easier to design the wiring pattern. Another advantage is that the difference in wiring length between the LED driver 631 and each light-emitting element can be made relatively small.

In particular, the LED driver 631 needs to form wiring for inputting a clock signal CLK, a data signal DATA, a 12V DC voltage (DC12VB), etc. to control the light emission performance, as well as wiring to form a drive current path for many light-emitting elements, and if many light-emitting elements are concentrated in a direction biased from the LED driver 631, the wiring is likely to become congested. In contrast, if the LED driver 631 is positioned within an area in which many light-emitting elements are arranged, the directions in which each light-emitting element is positioned as viewed from the LED driver 631 will be scattered, which increases the freedom of wiring design and makes pattern design easier.

75, the driving current wiring between the LED driver 631 and the light-emitting elements is 15 systems, but if the number of light-emitting elements is increased and 24 systems of driving current wiring are provided by fully using the output terminals of the LED driver 631, the peripheral wiring will become even more dense. In such a case, it is particularly preferable to place the LED driver 631 approximately in the center of the range in which the many light-emitting elements LED are arranged.

In addition to the above (Configuration P2-1), the gaming machine 1 of the embodiment has the following (Configuration P2-2).
(Configuration P2-2)
The light emitting drive section and the plurality of light emitting elements are configured to operate on a common power supply voltage.

In particular, the multiple light-emitting element LEDs are not all connected in parallel, but include a light-emitting system in which two or more light-emitting element LEDs are connected in series.

This makes it possible to obtain the same effects as those described above in (Configuration P1-3).
In particular, when (Configuration P2-1) is assumed instead of (Configuration P1-1) or (Configuration P1-2), the LED driver 631 is positioned within the range of multiple light-emitting elements on the board, and the LED driver 631 and the light-emitting element LED operate on a common power supply voltage, resulting in significant effects such as facilitating pattern design and preventing an increase in the board area due to pattern wiring conditions.

The gaming machine 1 of the embodiment has the following (configuration P3-1).
(Configuration P3-1)
The gaming machine 1 is provided with a first substrate having a connector, a plurality of light-emitting elements, and a light-emitting drive unit that drives the plurality of light-emitting elements to emit light based on a performance control signal input via the connector, and when two light-emitting elements among the plurality of light-emitting elements that are furthest apart are designated as a first light-emitting element and a second light-emitting element, and when the distance between the first light-emitting element and the light-emitting drive unit is designated as a first distance dDL1 and the distance between the second light-emitting element and the light-emitting drive unit is designated as a second distance dDL2, the light-emitting drive unit and the plurality of light-emitting elements are arranged on the first substrate so that first distance/(first distance+second distance)=1/3 to 2/3.

The above-mentioned (Specific Example 29) is assumed to be a corresponding example of this (Configuration P3-1).
In this case, among the light-emitting elements LED1 to LED10 on the side unit LED board 630A, one and the other of the two light-emitting elements that are furthest apart are the first light-emitting element and the second light-emitting element. Since the light-emitting elements LED10 and LED1 are the furthest apart, (Specific Example 29) can be assumed.
As shown in FIG. 77A, the distance between the light-emitting element LED10 and the LED driver 631 is a first distance dDL1, and the distance between the light-emitting element LED1 and the LED driver 631 is a second distance dDL2.

As a result, similar to the above-mentioned (Configuration P1-1), the positional relationship will be as shown in Figure 78A, and although repeated explanation will be avoided, (Configuration P3-1) also has an LED driver 631 arranged in an area that is approximately central to the multiple light-emitting elements LED1 to LED10 on the substrate on which these light-emitting elements are arranged.
Therefore, the effect described in (Configuration P1-1) can also be obtained by (Configuration P3-1).

Note that this (Configuration P3-1) differs from (Configuration P1-1) in that the position of the connector CN1T is not specified. For this reason, (Configuration P3-1) in particular is a desirable configuration for wiring the LED driver 631 and the multiple light-emitting elements LED1 to LED10.

Incidentally, (Specific Example 30) is also envisaged as an example corresponding to this (Configuration P3-1).
(Specific Example 30)
First board: LED board 780
Connector: Connector CN1N
・Multiple light-emitting elements: LED1 to LED22
Light emission driver: LED driver 782
First light-emitting element: LED 14
Second light-emitting element: LED 12

The circuit configuration of the LED board 780 has been described with reference to Fig. 45. The pattern of the front surface layer of this LED board 780 is shown in Fig. 79, and the pattern of the back surface layer is shown in Fig. 80.
The back layer in Fig. 80 is shown as a perspective view seen from the front layer side of Fig. 79, and is illustrated in a state of being inverted from left to right. The identification numbers of the parts printed on the board are omitted. The part shown as "XX + XX △△" actually displays the board management number.

The plurality of light emitting elements mounted on the LED board 780 are, as shown in a light emitting section 783 in FIG. 45, light emitting elements LED1 to LED12 as color LED chips and light emitting elements LED14 to LED22 as single color LED chips.
"pLED1" to "pLED22" in FIG. 79 (surface layer) indicate positions (lands as contact points) on the LED board 780 where the light emitting elements LED1 to LED22 are respectively arranged.
Also, "p782" indicates the position (land) where the LED driver 782 is disposed, "pCN1N" and "pCN2N" indicate the positions (lands) where the connectors CN1N and CN2N are disposed, and "p781" indicates the position (land) where the buffer circuit 781 is disposed.
For connector CN1N, the land on the upper left side of the drawing is the first pin side.
For connector CN2N, the land on the left side of the drawing is the first pin side.
The LED driver 782 is the same chip as the LED driver 631 shown in FIG.

As shown in FIGS. 79 and 80, a ground pattern 784 is formed as a solid ground on the front and back layers, and a wiring pattern for realizing the circuit configuration of FIG. 45 is also formed.
The numerous small circular parts shown on the pattern represent through holes or vias. This also includes through-hole vias (interlayer wiring) with copper foil. For the sake of explanation, these will also be collectively referred to as through holes.

Also, a power supply pattern 785 for 12V DC voltage (DC12VB) is formed mainly on the back surface layer from the contact (land) of the first pin of connector CN1N via a through hole TH10, as shown in FIGS.
The power supply pattern 785 on the back surface layer is connected to the SVCC terminal of the LED driver 782 by a through hole TH11, and also connected to the VLED terminal of the LED driver 631 via a through hole TH12.

In the case of the LED board 780, in order to supply a 5V direct current voltage (DC5V) to the buffer circuit 781, a power supply pattern 786 is formed on the back layer from the contact (land) of the 5th pin of the connector CN1N via the through hole TH15, and is connected to the buffer circuit 781 by the through hole TH16.

Figure 81A shows the light-emitting elements LED1 to LED22, connectors CN1N and CN2N, LED driver 782, and buffer circuit 781 arranged on the board (surface layer side) of this LED board 780.

In the case of such an LED board 780, as in the above (Specific Example 30), the two light-emitting elements LED14 and LED12 are the furthest apart among the plurality of light-emitting elements LED1 to LED22.
Therefore, considering the first light-emitting element (configuration P3-1) as the light-emitting element LED14 and the second light-emitting element as the light-emitting element LED12, the first distance dDL1, which is the distance between the light-emitting element LED14 and the LED driver 782, and the second distance dDL2, which is the distance between the light-emitting element LED12 and the LED driver 782, are shown in Figure 81A.
In this case, the value of dDL1/(dDL1+dDL2) is 0.34, which is within the range of 1/3 to 2/3.

Therefore, the LED board 780 also has the configuration P3-1, which has the effect of making it easier to design the wiring pattern between the LED driver 782 and each of the light-emitting elements LED1 to LED22.

However, in the case of the LED board 780, the power supply system requires power supply patterns 785, 786 of a 12V DC voltage (DC12VB) and a 5V DC voltage (DC5V). In this case, for the buffer circuit 781 requiring a 5V DC voltage (DC5V), the power supply pattern 786 is extremely short by arranging it very close to the connector CN1N, thereby preventing the wiring from becoming complicated due to the two power supply patterns.

The gaming machine 1 of the embodiment has the following (Configuration P3-2) in addition to the above (Configuration P3-1).
(Configuration P3-2)
On the first substrate, the light-emitting driving section and the plurality of light-emitting elements are arranged so that the ratio of first distance dDL1:second distance dDL2 becomes from 6:4 to 4:6.

In the case of the LED board 630A on the side unit of the above-mentioned (Specific Example 29), the relative relationship between the first distance dDL1 and the second distance dDL2 in this case is as shown in Fig. 78B. Although a repeated explanation will be avoided, this is similar to the above-mentioned (Configuration P1-2).
Therefore, the LED driver 631 is disposed in a more central area between the multiple light emitting elements LED1 to LED10. In other words, the range of the LED driver 631 is more limited than in the above-mentioned (Configuration P3-1). This can enhance the effects described above for (Configuration P3-1).
In addition, in the case of the LED board 780 described in FIG. 81 as (Specific Example 30), this (Configuration P3-2) does not apply.

Furthermore, the gaming machine 1 of the embodiment has the following (Configuration P3-3) in addition to the above (Configuration P3-1) and/or (Configuration P3-2).
(Configuration P3-3)
The light emitting drive section and the plurality of light emitting elements are configured to operate on a common power supply voltage.

In particular, the multiple light-emitting element LEDs are not all connected in parallel, but include a light-emitting system in which two or more light-emitting element LEDs are connected in series.

This provides the same effect as described above in (Configuration P1-3).
In particular, when (Configuration P3-1) (Configuration P3-2) is assumed instead of (Configuration P1-1) (Configuration P1-2), regardless of the connector position, the LED driver 631 is positioned toward the center of the positions of the multiple light-emitting elements LED1 to LED10 on the board, and the LED driver 631 and the light-emitting element LED operate on a common power supply voltage. This has a synergistic effect, which makes it possible to facilitate pattern design and prevent an increase in the board area due to pattern wiring conditions.

The gaming machine 1 of the embodiment has the following (configuration P4-1).
(Configuration P4-1)
The gaming machine 1 is provided with a first substrate having a connector, a plurality of light-emitting elements, and a light-emitting drive unit that drives the plurality of light-emitting elements to emit light based on a performance control signal input through the connector, the light-emitting drive unit being a rectangular chip component, and the light-emitting drive unit is arranged such that, when the shortest distance from one side (e.g., side sd1) of the light-emitting drive unit to a first end of the substrate reached by a virtual perpendicular line to the side is a first distance dE1, and the shortest distance from an opposing side of the one side (e.g., side sd3) to a second end of the substrate reached by a virtual perpendicular line to the opposing side is a second distance dE3, the light-emitting drive unit is arranged on the first substrate so that first distance/(first distance+second distance)=1/3 to 2/3.

In this (Configuration P4-1), (Specific Example 31) and (Specific Example 32) are assumed as corresponding examples.
(Specific Example 31)
First board: Side unit upper LED board 630A
Connector: Connector CN1T
・Multiple light-emitting elements: LED1 to LED10
Light emission driver: LED driver 631
・One side: Side sd1 (or side sd2)
Opposite side: side sd3 (or side sd4)

(Specific Example 32)
First board: LED board 780
Connector: Connector CN1N
・Multiple light-emitting elements: LED1 to LED22
Light emission driver: LED driver 782
・One side: Side sd1
・Opposite side: side sd3

First, the side unit LED board 630A will be described as (Specific Example 31).
As described in FIG. 76, the LED driver 631 is a square chip component.
Figure 77 shows a first distance dE1, which is the shortest distance from side sd1 of the LED driver 631 to the first end (upper end UP) of the substrate reached by a virtual perpendicular line to side sd1, and a second distance dE3, which is the shortest distance from side sd3, the opposing side, to the second end (lower end LW) of the substrate reached by a virtual perpendicular line to side sd3.

FIG. 78A shows the relative relationship between the first distance dE1 and the second distance dE3.
When the value of the first distance dE1+the second distance dE3 is the total length shown, FIG. 78A shows the cases where the value of dE1/(dE1+dE3) is 1/3 and 2/3.
The relationship between the lengths of the first distance dE1 and the second distance dE3 being within this range means that the LED driver 631 is positioned in an area that is approximately central when viewed in the direction from the upper end UP to the lower end LW of the substrate.
That is, the LED driver 631 is disposed in an area that is approximately the center when viewed in one direction on a substrate on which a large number of light emitting elements LED1 to LED10 are disposed.

By positioning the LED driver 631 approximately in the center of the board, it becomes easier to design the wiring pattern. Another advantage is that the difference in wiring length between the LED driver 631 and each light-emitting element can be made relatively small.

The LED driver 631 in particular requires wiring to form drive current paths for many light-emitting elements, in addition to wiring for inputting a clock signal CLK, a data signal DATA, and a 12V DC voltage (DC12VB) to control the light emission effects, and if many light-emitting elements are concentrated in a direction that is biased from the LED driver 631, the wiring is likely to become congested. In contrast, if the LED driver 631 is positioned approximately in the center of the board, the directions in which the light-emitting elements are positioned as viewed from the LED driver 631 will be widely scattered around, which increases the freedom of wiring design and makes pattern design easier.

In the circuit example of FIG. 75, the drive current wiring between the LED driver 631 and the light-emitting element LED is 15 lines of wiring, but if, for example, the number of light-emitting elements is increased and the output terminals of the LED driver 631 are fully used to provide 24 lines of drive current wiring, the surrounding wiring will become even more dense. In such a case, it is particularly preferable to place the LED driver 631 approximately in the center of the board.

Here, Figure 77 also shows a first distance dE2, which is the shortest distance from side sd2 of the LED driver 631 to the first end (left end LS) of the board reached by a virtual perpendicular line to side sd2, and a second distance dE4, which is the shortest distance from side sd4, the opposing side, to the second end (right end RS) of the board reached by a virtual perpendicular line to side sd4.

In this manner, even when the first distance and the second distance are considered, the relationship first distance/(first distance+second distance)=1/3 to 2/3 is satisfied.
This means that the LED driver 631 is disposed in the central area between the left end LS and the right end RS of the board.
In this respect, the above-mentioned advantage of arranging the LED driver 631 in the center of the board can be obtained.

Next, an LED board 780 will be described as (Specific Example 32).
Figure 81A shows a first distance dE1, which is the shortest distance from side sd1 of the LED driver 782 to a first end of the substrate reached by a virtual perpendicular line to side sd1, and a second distance dE3, which is the shortest distance from side sd3, the opposing side, to a second end of the substrate reached by a virtual perpendicular line to side sd3.

In this case, the relative relationship between the first distance dE1 and the second distance dE3 is also such that the value of dE1/(dE1+dE3) shown in FIG. 7A falls within the range of 1/3 to 2/3.
That is, the LED driver 631 is disposed in an area that is approximately the center when viewed in one direction on a substrate on which a large number of light emitting elements LED1 to LED10 are disposed.
Therefore, the above-mentioned effects can be obtained with the LED board 780 as well.

In addition to the above (Configuration P4-1), the gaming machine 1 of the embodiment has the following (Configuration P4-2).
(Configuration P4-2)
On the first substrate, the light-emitting driving section and the plurality of light-emitting elements are arranged so that the ratio of first distance dE1:second distance dE3 becomes from 6:4 to 4:6.

The relative relationship between the first distance dE1 and the second distance dE3 in this case is shown in FIG. 78B.
When the value of the first distance dE1 + the second distance dE3 is the total length shown, Figure 78B shows the cases where the first distance dE1 is 40% and 60% of the value of (dE1 + dE3 ).
If the relationship between the lengths of the first distance dE1 and the second distance dE3 is within this range, then the relationship between the lengths of the first distance dE1:the second distance dE3 is within the range of 6:4 to 4:6.

This means that the LED driver 631 in the side unit LED board 630A is disposed in a more central area on the board when viewed in one direction.
This also means that in the LED board 780, the LED driver 782 is disposed in a more central area on the board when viewed in one direction.
That is, the arrangement range of the LED drivers 631 and 782 is more limited than in the above-mentioned (Configuration P4-1), thereby making it possible to enhance the effects described above for (Configuration P4-1).

Furthermore, the gaming machine 1 of the embodiment has the following (configuration P4-3).
(Configuration P4-3)
The gaming machine 1 is provided with a first substrate having a connector, a plurality of light-emitting elements, and a light-emitting drive unit that drives the plurality of light-emitting elements to emit light based on a performance control signal input via the connector, the light-emitting drive unit being a rectangular chip component having a first side and a third side that are opposite sides and a second side and a fourth side that are opposite sides, where dE1 is the shortest distance from the first side to an end of the substrate plane in a direction away from the chip, dE2 is the shortest distance from the second side to an end of the substrate plane in a direction away from the chip, dE3 is the shortest distance from the third side to an end of the substrate plane in a direction away from the chip, and dE4 is the shortest distance from the fourth side to an end of the substrate plane in a direction away from the chip, where dE1/(dE1+dE3) satisfies at least one of 1/3 to 2/3 and dE2/(dE2+dE4) satisfies at least one of 1/3 to 2/3.

In this case, the above-mentioned (Specific Example 31) and (Specific Example 32) correspond to cases where either the value of dE1/(dE1+dE3) is between 1/3 and 2/3 or the value of dE2/(dE2+dE4) is between 1/3 and 2/3.
Moreover, the side unit LED board 630A or the LED board 780 can obtain the effects described above in (Configuration P4-1).

Here, a case will be described in particular where both of the following conditions are satisfied: the value of dE1/(dE1+dE3) is between 1/3 and 2/3, and the value of dE2/(dE2+dE4) is between 1/3 and 2/3.
In this case, the above-mentioned (Specific Example 31) LED board 630A on the side unit corresponds to this.

In the case of the side unit LED board 630A, both of the above are satisfied; that is, the LED driver 631 is positioned at approximately the center from the upper end UP to the lower end LW of the board, and also at approximately the center from the left end LS to the right end RS.
As a result, the positions of the multiple light emitting elements LED1 to LED10 are spread out in all directions as viewed from the LED driver 631. This creates space for wiring, making it possible to greatly facilitate pattern design.

In addition to the above (Configuration P4-3), the gaming machine 1 of the embodiment has the following (Configuration P4-4).
(Configuration P4-4)
At least one of the following is satisfied: the value of dE1:dE3 is between 6:4 and 4:6, or the value of dE2:dE4 is between 6:4 and 4:6.

The above-mentioned (Specific Example 31) and (Specific Example 32) are cases where either one of these conditions is satisfied. Then, the side unit LED board 630A or LED board 780 can achieve the effect described in the above-mentioned (Configuration P4-2).

Here, we consider a case where both of the following conditions are satisfied: the value of dE1:dE3 is between 6:4 and 4:6, and the value of dE2:dE4 is between 6:4 and 4:6. In this case, the above-mentioned (specific example 31) LED board 630A on the side unit corresponds to this case.
The side unit LED board 630A has a configuration that satisfies this condition, which means that the LED driver 631 is disposed closer to the center of the board.
Therefore, the effect of the above (Configuration P4-3) can be further enhanced.

Furthermore, the gaming machine 1 of the embodiment has the following (Configuration P4-5) in addition to some or all of the above (Configuration P4-1), (Configuration P4-2), (Configuration P4-3), and (Configuration P4-4).
(Configuration P4-5)
The light emitting drive section and the plurality of light emitting elements are configured to operate on a common power supply voltage.

In particular, the multiple light-emitting element LEDs are not all connected in parallel, but include a light-emitting system in which two or more light-emitting element LEDs are connected in series.

This provides the same effect as described above in (Configuration P1-3).
In particular, when (Configuration P4-1), (Configuration P4-2), (Configuration P4-3), and (Configuration P4-4) are considered, the LED driver 631 is positioned toward the center in one or two directions (horizontal and vertical) on the board, and the LED driver 631 and the light-emitting element LED operate on a common power supply voltage. This has a synergistic effect, which makes it possible to facilitate pattern design and prevents an increase in the board area due to pattern wiring conditions.

The gaming machine 1 of the embodiment has the following (configuration P5-1).
(Configuration P5-1)
The gaming machine 1 comprises a first substrate having a connector, a plurality of light-emitting elements, and a light-emitting drive unit which drives the plurality of light-emitting elements to emit light based on a performance control signal input through the connector, and when the direction of the straight line (longest line LL) which is the longest straight line from one end of the first substrate to the other end is defined as the longest direction (longest direction drLL), on the first substrate, the plurality of light-emitting elements are arranged discretely in the longest direction, the connector is arranged near the edge of the substrate, and the light-emitting drive unit is arranged closer to the center than the connector when viewed in the longest direction.

In this (Configuration P5-1), (Specific Example 33) and (Specific Example 34) are assumed as corresponding examples.
(Specific Example 33)
First board: Side unit upper LED board 630A
Connector: Connector CN1T
・Multiple light-emitting elements: LED1 to LED10
Light emission driver: LED driver 631

(Specific Example 34)
First board: LED board 780
Connector: Connector CN1N
・Multiple light-emitting elements: LED1 to LED22
Light emission driver: LED driver 782

In addition, when multiple light-emitting elements LED are arranged on the substrate in a dispersed manner in the longest direction, this means that the light-emitting elements LED are not all in the same position when viewed in a one-dimensional direction defined as the longest direction drLL, in other words, they are not lined up in a direction perpendicular to the longest direction.
Desirably, when the position of each light-emitting element LED is shown as a point on a one-dimensional line with the longest direction drLL as the longest direction, in the sense that the elements are scattered in the longitudinal direction on the substrate, the number of points where two or more light-emitting elements LED overlap is less than half of all the points (the state of Figure 81B described below).
More preferably, all of the plurality of light-emitting elements are at different positions when shown as points on a one-dimensional line in the longest direction drLL (the state shown in FIG. 77B described below).

First, the side unit LED board 630A will be described as (Specific Example 33).
In FIG. 77A, a longest line LL, which is the longest straight line from one end to another end in the side unit LED board 630A, is shown by a dashed line.
In FIG. 77B, the direction of the longest line LL is shown as the longest direction drLL.
The longest direction drLL in FIG. 77B is represented by a line parallel to the longest line LL in FIG. 77A.

77B shows the positions of the light emitting elements LED1 to LED10, the LED driver 631, and the connector CN1T arranged on the LED board 630A on the side unit on a one-dimensional line shown as the longest direction drLL. In other words, the positions of the components are shown as projected onto the one-dimensional line shown as the longest direction drLL.
Although the light emitting elements LED1 to LED10 are shown as points marked with ●, they are all at different positions when viewed in the longest direction drLL.

77B, it can be seen that the multiple light-emitting elements LED1 to LED10 are discretely arranged so as to spread out in the longest direction drLL on the side unit LED board 630A. In other words, they are not clustered together on the board in the longest direction drLL, but are scattered from one end to the other.
In addition, the connector CN1T is disposed near the edge of the board. In this case, among the light emitting elements LED1 to LED10, the LED driver 631, and the connector CN1T, the connector CN1T is disposed at the position closest to the edge on the right end RS side, and can be said to be near the edge.

The edge may be an edge of the substrate such as the right edge RS, or may be an edge of the pattern. The vicinity of the edge is assumed to mean at least closer to these edges than the substrate center. In other words, when the midpoint between the edge and the substrate center is specified, the edge is a region closer to the edge than the midpoint.
Or, more specifically, when the area between the edge and the center of the substrate is divided into thirds, the area may be considered to be the area located on the edge side of a point two-thirds of the way from the midpoint.

The LED driver 631 is located closer to the center of the board than the connector CN1T when viewed in the longest direction drLL. In the case of Figure 77B, it is located almost in the center.

In this way, the light-emitting elements LED1 to LED10 are arranged in a dispersed manner in the longest direction drLL and widely spread in the planar direction, the connector CN1T is arranged near the edge, and the LED driver 631 is arranged closer to the center than the connector CN1T, making it easier to design the wiring pattern. Another advantage is that the difference in wiring length between the LED driver 631 and each light-emitting element can be made relatively small.

In particular, the LED driver 631 requires wiring for inputting a clock signal CLK, a data signal DATA, a 12V DC voltage (DC12VB), etc. to control the light emission effects, as well as wiring to form a drive current path for many light-emitting elements, and if many light-emitting elements are concentrated in a direction biased from the LED driver 631, the wiring is likely to become congested. In contrast, if the LED driver 631 is positioned approximately in the center of the board for many light-emitting elements that are arranged in a diffuse manner, the directions in which each light-emitting element is positioned will be scattered as viewed from the LED driver 631, which increases the freedom of wiring design and makes pattern design easier.

In the circuit example of FIG. 75, the drive current wiring between the LED driver 631 and the light-emitting element LED is 15 lines of wiring, but if, for example, the number of light-emitting elements is increased and the output terminals of the LED driver 631 are fully used to provide 24 lines of drive current wiring, the peripheral wiring will become even more congested. In such cases, it is particularly preferable to disperse multiple light-emitting elements and place the LED driver 631 toward the center of the board.

Next, an LED board 780 as (Specific Example 34) will be described.
In FIG. 81A, a longest line LL, which is the longest straight line from one end to another end on the LED substrate 780, is shown by a dashed dotted line.
In FIG. 81B, the direction of the longest line LL is shown as the longest direction drLL.
The longest direction drLL in FIG. 81B is represented by a line parallel to the longest line LL in FIG. 81A.

In FIG. 81B, the positions of the light-emitting elements LED1 to LED22, LED driver 782, connectors CN1N, CN2N, and buffer circuit 781 arranged on the LED board 780 are shown on a one-dimensional line shown as the longest direction drLL. In other words, each component is projected onto the one-dimensional line shown as the longest direction drLL.

Note that the light-emitting elements LED1 to LED22 are shown as points marked with ●, but some of them are in the same position when viewed in the longest direction drLL. For example, the light-emitting elements LED11 and LED18, and the light-emitting elements LED10 and LED19, are in the same position when viewed in the longest direction drLL. However, of the points marked with ●, the number of points where multiple light-emitting elements LED are in the same position is less than half. In other words, they can be said to be arranged discretely when viewed overall in the longest direction drLL.

81B, it can be seen that the multiple light-emitting elements LED1 to LED22 are discretely arranged so as to spread out in the longest direction drLL on the LED board 780. In other words, they are not clustered together on the board as viewed in the longest direction drLL, but are scattered from one end to the other.
Furthermore, the connectors CN1N and CN2N are disposed near the edges of the board.
The LED driver 782 is disposed closer to the center on the board than the connectors CN1N and CN2N when viewed in the longest direction drLL.

In this manner, by satisfying the relationship that the light-emitting elements LED1 to LED22 are arranged in a diffuse manner, the connectors CN1N, CN2N are arranged near the edges, and the LED driver 782 is arranged closer to the center than the connectors CN1N, CN2N, it is possible to easily design the wiring pattern, and it has the advantage of being possible to make the difference in wiring length between the LED driver 782 and each light-emitting element relatively small.

In addition to the above (Configuration P5-1), the gaming machine 1 of the embodiment has the following (Configuration P5-2).
(Configuration P5-2)
The light emitting drive section and the plurality of light emitting elements are configured to operate on a common power supply voltage.

In particular, the multiple light-emitting element LEDs are not all connected in parallel, but include a light-emitting system in which two or more light-emitting element LEDs are connected in series.

This provides the same effect as described above in (Configuration P1-3).
In particular, in the case of (configuration P5-1), the LED driver 631 is positioned toward the center of the board in the longest direction drLL, and the LED driver 631 and the light-emitting element LED operate on a common power supply voltage. This has a synergistic effect, which makes it possible to facilitate pattern design and prevents an increase in the board area due to pattern wiring conditions.

The gaming machine 1 of the embodiment has the following (configuration P6-1).
(Structure P6-1)
The gaming machine 1 comprises a first substrate having a plurality of light-emitting elements and a light-emitting drive unit that drives the plurality of light-emitting elements to emit light based on a performance control signal, the light-emitting drive unit being a rectangular chip component having an input terminal for light-emitting drive data and a clock signal included in the performance control signal formed on a first side, and output terminals for drive signals for the light-emitting elements formed on a second side, a third side, and a fourth side, the position and orientation of the light-emitting drive unit being set so that when an area surrounding the light-emitting drive unit on the first substrate is divided into a first area facing the first side and a second area facing the second side, the third side, and the fourth side, the first area is an area in which no light-emitting elements are arranged, and all of the plurality of light-emitting elements are arranged in the second area.

In this (Configuration P6-1), (Specific Example 35) and (Specific Example 36) are assumed as corresponding examples. Note that LED drivers 631 and 782 are both chips shown in FIG. 76.

(Specific Example 35)
First board: Side unit upper LED board 630A
Connector: Connector CN1T
・Multiple light-emitting elements: LED1 to LED10
Light emission driver: LED driver 631
・Light emission drive data and clock signal input terminals: Terminal 3 (SDATA) and Terminal 2 (SCLK)
・Output terminal for light-emitting element drive signal: LED light-emitting drive current terminal (LEDR1 to LEDB8)
First side: side sd1
・Second side: Side sd2
・Third side: Side sd3
・Fourth side: side sd4

(Specific Example 36)
First board: LED board 780
Connector: Connector CN1N (or Connector CN2N)
・Multiple light-emitting elements: LED1 to LED22
Light emission driver: LED driver 782
・Light emission drive data and clock signal input terminals: Terminal 3 (SDATA) and Terminal 2 (SCLK)
・Output terminal for light-emitting element drive signal: LED light-emitting drive current terminal (LEDR1 to LEDB8)
First side: side sd1
・Second side: Side sd2
・Third side: Side sd3
・Fourth side: side sd4

In the case of the LED board 630A on the side unit described above (specific example 35), none of the light-emitting elements LED1 to LED10 are arranged in the first region (for example, the direction in which the first side sd1 in FIG. 77 faces) facing the first side sd1 of the LED driver 631, and all of these light-emitting elements LED are arranged in the second region.

In the case of the LED board 780 of (specific example 36), none of the light-emitting elements LED1 to LED22 are arranged in the first region (e.g., the direction in which the first side sd1 in FIG. 81 faces) facing the first side sd1 of the LED driver 782, and all of these light-emitting elements LED are arranged in the second region.

The first region and the second region are different regions on the substrate that do not overlap each other. In other words, the second region is the entire region on the substrate other than the first region, or a part of the region on the substrate other than the first region.
The first and second regions may be considered to be only one layer of the substrate, or may be considered to be commonly divided across the front layer, back layer, or inner layer. For example, when the LED driver and the light-emitting element LED are arranged on the same layer, the first and second regions may be considered to be at least on that layer. When the LED driver and the light-emitting element LED are arranged on different layers, the first and second regions may be considered to be commonly divided across those multiple layers.

Here, the first region where the first sides face each other is a region suitable for connection to the third terminal (SDATA) and the second terminal (SCLK) of the LED drivers 631 and 782 .
The second regions facing the second, third and fourth sides are regions suitable for connection to the terminals (LEDR1 to LEDB8) of the LED light emission drive current.

Therefore, the first area AR1 is an area where no light-emitting element LED is arranged, and the placement positions and orientations (which side faces which direction on the board) of the LED drivers 631, 782 on the board are set so that all of the multiple light-emitting element LEDs are arranged in the second area AR2, which makes it easier to design the wiring pattern and reduces unnecessary wiring portions, thereby achieving the effect of efficiently shortening the wiring length.

Here, when the first area AR1 and the second area AR2 are separated on the substrate, various examples of arrangements on the substrate are conceivable according to the definition.
Specific examples of arrangements will be described below as (Configuration P6-2), (Configuration P6-3), and (Configuration P6-4).

In the gaming machine 1 of the embodiment, it is possible to configure the first area AR1 and the second area AR2 of the above (configuration P6-1) as follows (configuration P6-2).
(Structure P6-2)
The first region is the region between a first virtual line (ILn1) perpendicular to the first side and extending from one end of the first side to the front side of the first side, and a second virtual line (ILn2) perpendicular to the first side and extending from the other end of the first side to the front side of the first side.

The square in Fig. 82A diagrammatically shows a board as the side unit LED board 630A or the LED board 780. It is assumed that an LED driver 631 (or 782) is disposed on the board.
A first virtual line ILn1 extending from one end of the first side sd1 of the LED driver 631 (or 782) toward the front side of the first side sd1 and perpendicular to the first side sd1, and a second virtual line ILn2 extending from the other end of the first side sd1 toward the front side of the first side sd1 and perpendicular to the first side sd1, are each shown by a dashed line.
The shaded area between the first virtual line ILn1 and the second virtual line ILn2 is defined as a first area AR1. The entire area (non-shaded area) around the LED driver 631 (or 782) other than the first area AR1 is defined as a second area AR2.

Considering such a first area AR1 and second area AR2, if the position and orientation of the LED driver 631 is set as shown in FIG. 83, the side unit LED board 630A will have none of the light-emitting elements LED1 to LED10 arranged in the first area AR1, and all of the light-emitting elements LED1 to LED10 arranged in the second area AR2.

Furthermore, when the position and orientation of the LED driver 782 is set as shown in FIG. 84, the LED board 780 has none of the light-emitting elements LED1 to LED22 arranged in the first area AR1, and all of the light-emitting elements LED1 to LED22 arranged in the second area AR2.

In this way, the first area AR1 directly opposite the first side sd1 is in a state where no light emitting element LED is arranged. In this case, the first area AR1 is an area where the wiring must be bent at least once in the surface direction or in the interlayer direction when performing pattern wiring to connect to the terminals of the second side sd2, the third side sd3, and the fourth side sd4. In this case, the first area AR1 is the least suitable area from the perspective of pattern design for arranging connection components to the terminals (LEDR1 to LEDB8) of the LED light emission drive current.
Therefore, the position and orientation of the LED driver 631 (or 782) are set so that the light-emitting element LED is arranged in the second area AR2, not in the first area AR1, thereby realizing ease of pattern design, simplification of wiring, and shortening of wiring length.

In the gaming machine 1 of the embodiment, it is possible to configure the first area AR1 and the second area AR2 of the above (configuration P6-1) as follows (configuration P6-3).
(Structure P6-3)
The first region is the region between a first virtual line (ILm1) formed by extending a straight line forming the first side from one end of the first side and bending the extended portion from the one end toward the front side of the first side at approximately 45 degrees, and a second virtual line (ILm2) formed by extending a straight line forming the first side from the other end of the first side and bending the extended portion from the other end toward the front side of the first side at approximately 45 degrees.

The square shape in Figure 82B also shows a schematic diagram of the board as the side unit LED board 630A or the LED board 780. An LED driver 631 (or 782) is disposed on the board.
A first virtual line ILm1 formed by bending an extension portion from one end of the first side sd1 of the LED driver 631 (or 782) toward the front side of the first side sd1 at approximately 45 degrees, and a second virtual line ILm2 formed by bending an extension portion from the other end of the first side sd1 toward the front side of the first side sd1 at approximately 45 degrees, are each indicated by a dotted line.
The shaded area between the first virtual line ILm1 and the second virtual line ILm2 is defined as a first area AR1. The entire area (non-shaded area) around the LED driver 631 (or 782) other than the first area AR1 is defined as a second area AR2.

Considering such a first area AR1 and second area AR2, in the side unit LED board 630A in which the position and orientation of the LED driver 631 are set as shown in FIG. 85, none of the light-emitting elements LED1 to LED10 are arranged in the first area AR1, and all of the light-emitting elements LED1 to LED10 are arranged in the second area AR2.
In the example of Figure 85, compared to the example of Figure 83, the position of the LED driver 631 and the positions of the light-emitting elements LED7 and LED9 are different, and this makes it an example that corresponds to (Configuration P6-1) according to the definition of (Configuration P6-3).

Furthermore, in the LED board 780 in which the position and orientation of the LED driver 782 is set as shown in FIG. 86, none of the light-emitting elements LED1 to LED22 are arranged in the first area AR1, and all of the light-emitting elements LED1 to LED22 are arranged in the second area AR2.
86 is an example that differs from the example of Fig. 84 in that the light emitting elements LED14 and LED15 are not provided. In this case, the arrangement setting of the LED driver 782 results in an example that corresponds to (Configuration P6-1) according to the definition of (Configuration P6-3).

In this way, the area between the first virtual line ILm1 and the second virtual line ILm2 at approximately 45 degrees on the front side of the first side sd1 can be said to be an area more suitable for wiring to the first side sd1 than for wiring to the terminals of the second side sd2, the third side sd3, and the fourth side sd4. In other words, it is not very suitable for placing connection components to the terminals (LEDR1 to LEDB8) of the LED light emission drive current. In other words, it is better to place other components connected to the terminals of the first side sd1 rather than placing the light emitting element LED there. In other words, it is better to leave the area empty for other components without placing the light emitting element LED.
Therefore, the position and orientation of the LED driver 631 are set so that the light-emitting element LED is arranged in the second area AR2, avoiding the first area AR1. This makes it possible to easily design the pattern, simplify the wiring, and shorten the wiring length.

In the gaming machine 1 of the embodiment, it is possible to configure the first area AR1 and the second area AR2 of the above (configuration P6-1) as follows (configuration P6-4).
(Structure P6-4)
The first region is a region on the front side of the first side with respect to a virtual straight line (ILw) including the first side.

The square in Figure 82C also shows a schematic diagram of the board as the side unit LED board 630A or the LED board 780. An LED driver 631 (or 782) is disposed on the board.
A virtual line ILw including the first side sd1 of the LED driver 631 (or 782) is indicated by a two-dot chain line, and the area on the front side of the first side sd1 from the virtual line ILw is defined as a first area AR1. Moreover, the entire area around the LED driver 631 (or 782) other than the first area AR1 (non-shaded area) is defined as a second area AR2.

Considering such a first area AR1 and second area AR2, in the side unit LED board 630A in which the position and orientation of the LED driver 631 are set as shown in FIG. 85, none of the light-emitting elements LED1 to LED10 are arranged in the first area AR1 (the area below the imaginary line ILw on the drawing), and all of the light-emitting elements LED1 to LED10 are arranged in the second area.
Although an example of the LED board 780 is not shown, for example, a configuration in which the light-emitting element LED does not exist in the region below the imaginary line ILw in FIG. 84 can be considered.
Alternatively, in a board configuration in which the LEDs are arranged as shown in FIG. 84, if the LED driver 782 remains in the position shown in the figure and the orientation of side sd1 is set to face to the left in the figure, this becomes an example that corresponds to (configuration P6-1) according to the definition of (configuration P6-4).

Dividing the first area AR1 and the second area AR2 in this manner by a virtual line ILw including the line of the first side sd1 means that all of the light-emitting elements LED can be positioned in a position that is most suitable for wiring to the terminals of the second side sd2, the third side sd3, or the fourth side sd4.
This makes it easier to design patterns, simplifies wiring, and shortens wiring lengths.

Incidentally, in Figures 82A, 82B, and 82C, the imaginary line IL45 is shown by a dotted line, dividing the second area AR2 into an area sar2 facing side sd2, an area sar3 facing side sd3, and an area sar4 facing side sd4. Here, each imaginary line IL45 is inclined at approximately 45 degrees from each side.

When the second area AR2 is subdivided by such virtual line IL45, it is also possible to set the position and orientation of the LED driver 631 (or 782) so that the light-emitting element LED connected to the terminals of the LED light emission drive current on side sd2 (LEDR1 to LEDG3) is placed in area sar2, the light-emitting element LED connected to the terminals of the LED light emission drive current on side sd3 (LEDB1 to LEDR6) is placed in area sar3, and the light-emitting element LED connected to the terminals of the LED light emission drive current on side sd4 (LEDG6 to LEDB8) is placed in area sar2.
For example, in the case of a color LED chip, it is possible to connect the 23rd terminal (LEDR3) and the 24th terminal (LEDG3) on the second side sd2 and the 25th terminal (LEDB3) on the third side sd3, but in the case of such a color LED chip, it is sufficient to connect to either area sar2 or sar3.

The gaming machine 1 of the embodiment has the following (configuration P7-1).
(Structure P7-1)
The gaming machine 1 comprises a first substrate having a plurality of light-emitting elements and a light-emitting drive unit that drives the plurality of light-emitting elements to emit light based on a performance control signal, the light-emitting drive unit being a rectangular chip component having an input terminal for light-emitting drive data and a clock signal included in the performance control signal formed on a first side, and output terminals for a drive signal for the light-emitting elements formed on a second side, a third side, and a fourth side, and the position and orientation of the light-emitting drive unit are set so that when an area surrounding the light-emitting drive unit on the first substrate is divided into a first area facing the first side and a second area facing the second side, the third side, and the fourth side, the terminal connected to the output terminal of the drive signal for all of the plurality of light-emitting elements that are directly connected to the output terminal of the drive signal via wiring is positioned in the second area.

An example corresponding to this (Configuration P7-1) is the above (Specific Example 35).
In this case, "all of the multiple light-emitting elements that are directly connected to the output terminal of the drive signal via wiring" refers to those whose cathodes or anodes as light-emitting diodes are connected to the terminals (LEDR1 to LEDB8) of the LED light emission drive current of the LED driver 631.
Moreover, the "terminal connected to the output terminal of the drive signal" is either the cathode or the anode.
75, in the case of the LED board 630A on the side unit, the light emitting elements are LED1, LED3, LED5, LED7, and LED9. In other words, the light emitting elements LED whose cathode terminals are connected to the LED driver 631 are included.

By setting the position and orientation of the LED driver 631 so that the cathode of the light-emitting element LED directly connected to the LED driver 631 is within the second region AR2, it becomes easier to design the wiring pattern, and it is possible to reduce unnecessary wiring portions and efficiently shorten the wiring length.
The anode terminal may be connected to an LED driver. In this case, the anode terminal may be located within the second area AR2.

In the case of this (Configuration P7-1), various examples of arrangements on the substrate are assumed depending on the definition of the first area AR1 and the second area AR2 on the substrate. Specific examples of arrangements are described below as (Configuration P7-2), (Configuration P7-3), and (Configuration P7-4).

In the gaming machine 1 of the embodiment, it is possible to configure the first area AR1 and the second area AR2 of the above (structure P7-1) as follows (structure P7-2).
(Structure P7-2)
The first region is the region between a first virtual line (ILn1) perpendicular to the first side and extending from one end of the first side to the front side of the first side, and a second virtual line (ILn2) perpendicular to the first side and extending from the other end of the first side to the front side of the first side.
That is, these are the first area AR1 and the second area AR2 described in FIG. 82A.

Figure 87 shows the cathode terminals TA for the light-emitting elements LED1, LED3, LED5, LED7, and LED9 on the side unit LED board 630A. All of these cathode terminals TA are disposed in the second area AR2 outside the first area defined by the first virtual line ILn1 and the second virtual line ILn2.

If a cathode terminal TA is placed in the first region AR1 directly in front of the first side sd1, when pattern wiring is performed to connect to the terminals on the second side sd2, the third side sd3, and the fourth side sd4, the wiring must be bent at least once in the surface direction or the interlayer direction. In other words, from the perspective of pattern design, this is the least suitable region for placing the cathode terminal TA.
Therefore, the LED driver 631 is arranged so that the cathode terminals TA of the light emitting elements LED1, LED3, LED5, LED7, and LED9 are located in the second area AR2, avoiding the first area AR1. This makes it possible to easily design patterns, simplify wiring, and shorten wiring lengths.

In the gaming machine 1 of the embodiment, it is possible to configure the first area AR1 and the second area AR2 of the above (structure P7-1) as follows (structure P7-3).
(Structure P7-3)
The first region is the region between a first virtual line (ILm1) formed by extending a straight line forming the first side from one end of the first side and bending the extended portion from the one end toward the front side of the first side at approximately 45 degrees, and a second virtual line (ILm2) formed by extending a straight line forming the first side from the other end of the first side and bending the extended portion from the other end toward the front side of the first side at approximately 45 degrees.

That is, these are the first area AR1 and the second area AR2 described in FIG. 82B.
As shown in FIG. 87, the cathode terminals TA of the light-emitting elements LED1, LED3, LED5, LED7, and LED9 on the side unit LED board 630A are all arranged in a second area AR2 other than the first area defined by the first virtual line ILm1 and the second virtual line ILm2.

The first area AR1 between the first virtual line ILm1 and the second virtual line ILm2 at approximately 45 degrees on the front side of the first side sd1 is more suitable for wiring to the first side sd1 than for wiring to the terminals of the second side sd2, the third side sd3, and the fourth side sd4. In other words, it is not very suitable for arranging connection components to the terminals (LEDR1 to LEDB8) of the LED light emission drive current. In other words, it is better to arrange other components connected to the terminals of the first side sd1 than to arrange the cathode terminal TA of the light emitting element LED. In other words, it is better to leave the light emitting element LED empty for other components. Therefore, the LED driver 631 is arranged so that the cathode terminal TA of the light emitting elements LED1, LED3, LED5, LED7, and LED9 is located in the second area AR2, avoiding the first area AR1. This makes it easier to design the pattern, simplifies the wiring, and shortens the wiring length.

In the gaming machine 1 of the embodiment, it is possible to configure the first area AR1 and the second area AR2 of the above (structure P7-1) as follows (structure P7-4).
(Structure P7-4)
The first region is a region on the front side of the first side with respect to a virtual straight line (ILw) including the first side.

That is, these are the first area AR1 and the second area AR2 described in FIG. 82C.
85 shows the cathode terminals TA of the light-emitting elements LED1, LED3, LED5, LED7, and LED9 on the side unit LED board 630A. The position and orientation of the LED driver 631 are set so that all of these cathode terminals TA are disposed in a second area AR2 other than the first area defined by the virtual line ILw.

In this case, the cathode terminals TA of the light-emitting elements LED1, LED3, LED5, LED7, and LED9 are placed in the most suitable positions for wiring to the terminals of the second side sd2, the third side sd3, or the fourth side sd4. This makes it possible to easily design patterns, simplify wiring, and shorten wiring lengths.

In the above examples, as shown in Figures 82A, 82B, and 82C, it is also possible to divide the area into area sar2 facing side sd2, area sar3 facing side sd3, and area sar4 facing side sd4, and to set the position and orientation of the LED driver 631 and the arrangement of the light-emitting element LED so that each cathode terminal TA faces the terminal (LEDR1 to LEDG5) of the light-emitting drive current to which it is connected.

The gaming machine 1 of the embodiment has the following (configuration P8-1).
(Configuration P8-1)
The gaming machine 1 comprises a first substrate having a plurality of light-emitting elements, a connector, and a light-emitting drive unit that drives the plurality of light-emitting elements to emit light based on a performance control signal input via the connector, the light-emitting drive unit being a rectangular chip component having an input terminal for light-emitting drive data and a clock signal included in the performance control signal formed on a first side, and output terminals for a drive signal for the light-emitting elements formed on a second side, a third side, and a fourth side, the position and orientation of the light-emitting drive unit being set so that, when an area surrounding the light-emitting drive unit on the first substrate is divided into a first area facing the first side and a second area facing the second side, the third side, and the fourth side, the connector is arranged in the first area, and the terminal connected to the output terminal of the drive signal for all of the plurality of light-emitting elements that are directly connected to the output terminal of the drive signal via wiring is arranged in the second area.

An example corresponding to this (Configuration P8-1) is the above (Specific Example 36).
In this case, "all of the multiple light-emitting elements that are directly connected to the output terminal of the drive signal via wiring" refers to those whose cathodes or anodes as light-emitting diodes are connected to the terminals (LEDR1 to LEDB8) of the LED light emission drive current of the LED driver 782.
Moreover, the "terminal connected to the output terminal of the drive signal" is either the cathode or the anode.
45, in the case of the LED board 780, the light emitting elements LED1, LED3, LED5, LED7, LED9, LED11, LED14, LED16, LED18, and LED22 are connected to the terminals (LEDR1 to LEDR8) of the LED light emission drive current of the LED driver 782. In other words, the light emitting elements LED whose cathode terminals are connected to the LED driver 782 are included.

In this way, by setting the position and orientation of the LED driver 782 so that the light-emitting element LED directly connected to the LED driver 782 is located within the second area AR2, it becomes easier to design the wiring pattern, and it is possible to reduce unnecessary wiring portions and efficiently shorten the wiring length.
The anode terminal may be connected to an LED driver. In this case, the anode terminal may be located within the second area AR2.

In addition, the connector CN1N is disposed in the first area AR1 facing the LED driver 782. Note that depending on the size of the connector CN1N, it may protrude from the area AR1, but it is sufficient that at least a part of the connector CN1N is positioned within the first area AR1.
The first side sd1 of the LED driver 782 has a second terminal (SCLK) and a third terminal (SDATA) as input terminals for the clock signal CLK and the data signal DATA for controlling the light emission effect, which are input from the connector CN1N. Therefore, by setting the position and orientation of the LED driver 782 so that the connector CN1N is disposed in the first area AR1 facing the first side sd1, it becomes easier to wire the signals for controlling the effect, and also it is possible to reduce unnecessary wiring and efficiently shorten the wiring length.

In the case of this (Configuration P8-1), various examples of arrangements on the substrate are assumed depending on the definition of the first area AR1 and the second area AR2 on the substrate. Specific examples of arrangements are described below as (Configuration P8-2), (Configuration P8-3), and (Configuration P8-4).

In the gaming machine 1 of the embodiment, it is possible to configure the first area AR1 and the second area AR2 of the above (configuration P8-1) as follows (configuration P8-2).
(Structure P8-2)
The first region is the region between a first virtual line (ILn1) perpendicular to the first side and extending from one end of the first side to the front side of the first side, and a second virtual line (ILn2) perpendicular to the first side and extending from the other end of the first side to the front side of the first side.
That is, these are the first area AR1 and the second area AR2 described in FIG. 82A.

FIG. 84 shows the cathode terminal TA or the cathode terminal TAm for the light-emitting elements LED1, LED3, LED5, LED7, LED9, LED11, LED14, LED16, LED18, and LED22 on the LED board 780.
The light emitting elements LED1, LED3, LED5, LED7, LED9, and LED11 are color LED chips, and the cathode terminals of each of the three RGB LEDs are shown diagrammatically as a cathode terminal TA.
The light emitting elements LED14, LED16, LED18, and LED22 are single-color LED chips, and the cathode terminal of the LED is shown diagrammatically as cathode terminal TAm.

In the case of FIG. 84, these cathode terminals TA, TAm are all disposed in a second area AR2 outside the first area defined by the first virtual line ILn1 and the second virtual line ILn2.
Moreover, the connector CN1N is disposed in the first area AR1.

If the cathode terminal TA or TAm is placed in the first region AR1 directly opposite the first side sd1, when performing pattern wiring to connect to the terminals on the second side sd2, the third side sd3, and the fourth side sd4, the wiring must be bent one or more times in the surface direction or the interlayer direction, which means that this is the least suitable region for placing the cathode terminal TA from the perspective of pattern design. Furthermore, if the cathode terminal TA or TAm is placed in the first region AR1, it will interfere with the wiring of the clock signal CLK, the data signal DATA, and even the reset signal RESET between the connector CN1N and the LED driver 782.
From another perspective, by arranging the connector CN1N in the first region, wiring of the clock signal CLK, the data signal DATA, and the reset signal RESET between the LED driver 782 becomes extremely easy and the wiring length can be shortened. In addition, the wiring of the clock signal CLK, etc. does not get in the way of the wiring between the light emitting element LED and the LE driver 782.

Taking all of this into consideration, by setting the position and orientation of the LED driver 782 so that the cathode terminals TA and TAm are located in the second area AR2 and the connector CN1N is located in the first area, it is possible to achieve ease of pattern design, simplification of wiring, and shortening of wiring length.

In the gaming machine 1 of the embodiment, it is considered that the first area AR1 and the second area AR2 of the above (structure P8-1) are configured as follows (structure P8-3).
(Structure P8-3)
The first region is the region between a first virtual line (ILm1) formed by extending a straight line forming the first side from one end of the first side and bending the extended portion from the one end toward the front side of the first side at approximately 45 degrees, and a second virtual line (ILm2) formed by extending a straight line forming the first side from the other end of the first side and bending the extended portion from the other end toward the front side of the first side at approximately 45 degrees.

That is, these are the first area AR1 and the second area AR2 described in FIG. 82B.
84, the first virtual line ILm1 and the second virtual line ILm2 are indicated by dashed lines. The area between the first virtual line ILm1 and the second virtual line ILm2, which are at an angle of approximately 45 degrees (the lower range in the figure), is defined as a first area AR1.
However, in the case of the example arrangement of Figure 84, the cathode terminal TA of the light-emitting element LED14 is in the first area AR1, so it no longer falls under (configuration P8-1) in the definition of this (configuration P8-3). However, this can be realized by using a different circuit configuration.
That is, the circuit is designed so that the light emitting elements LED14 and LED15 in the figure are light emitting elements that are not directly connected to the LED driver 782, or a configuration is assumed in which the light emitting elements LED14 and LED15 do not exist. In that case, by setting the position and orientation of the LED driver 782 as shown in the figure, it corresponds to (configuration P8-1) in the area definition of (configuration P8-3).
The connector CN1N is disposed in the first area AR1.

As a result, the connector CN1N is located in the first area AR1, which is between the first virtual line ILm1 and the second virtual line ILm2 at approximately 45 degrees on the front side of the first side sd1 of the LED driver 782, and the cathode terminals TA and TAm are located in the second area AR2, thereby making it possible to achieve ease of pattern design, simplification of wiring, and shortening of wiring length.

In the gaming machine 1 of the embodiment, it is possible to configure the first area AR1 and the second area AR2 of the above (configuration P8-1) as follows (configuration P8-4).
(Structure P8-4)
The first region is a region on the front side of the first side with respect to a virtual straight line (ILw) including the first side.

That is, these are the first area AR1 and the second area AR2 described in FIG. 82C.
In Fig. 84, a virtual line ILw is shown by a two-dot chain line. The range below the virtual line ILw in the drawing is defined as a first area AR1.
However, in the case of the example arrangement of Figure 84, the cathode terminals TA of the light-emitting elements LED14, LED1, LED3, LED7, and LED16 become part of the first area AR1, and therefore do not fall under (configuration P8-1) in the definition of (configuration P8-4). However, this can be realized by using a different circuit configuration.
In other words, the circuit is designed so that the light-emitting elements LED14, LED1, LED3, LED7, and LED16 in the figure are light-emitting elements that are not directly connected to the LED driver 782, or a configuration is assumed in which these light-emitting elements LED14, LED1, LED3, LED7, and LED16 do not exist.
Assuming such a configuration, by setting the position and orientation of the LED driver 782 as shown in the figure, it corresponds to (configuration P8-1) in the area definition of (configuration P8-4).
The connector CN1N is disposed in the first area AR1.

The cathode terminals TA and TAm are arranged in the second area AR2 defined by the imaginary line ILw, so that they are arranged in the most suitable position for wiring to the terminals of the second side sd2, the third side sd3, or the fourth side sd4.
In addition, by arranging the connector CN1N in the first region, wiring of the clock signal CLK, the data signal DATA, and the reset signal RESET becomes extremely easy and the wiring length can be shortened, which makes it possible to realize ease of pattern design, simplification of wiring, and shortening of wiring length.

In the above example, it is also possible to divide the area into an area sar2 facing side sd2, an area sar3 facing side sd3, and an area sar4 facing side sd4 as shown in Figures 82A, 82B, and 82C, and to set the position and orientation of the LED driver 631 and the arrangement of the light-emitting element LED so that each cathode terminal TA, TAm faces the terminal (LEDR1 to LEDR8) of the light-emitting drive current to which it is connected.

The gaming machine 1 of the embodiment has the following (configuration P9-1).
(Structure P9-1)
The gaming machine 1 comprises a first substrate having a connector and a light-emitting drive unit which drives a plurality of light-emitting elements to emit light based on a performance control signal input via the connector, the light-emitting drive unit being a rectangular chip component having an input terminal for light-emitting drive data and a clock signal contained in the performance control signal formed on a first side, and output terminals for drive signals for the light-emitting elements formed on a second side, a third side, and a fourth side, and the light-emitting drive unit is arranged on the first substrate so that the first side faces in the direction in which the connector is arranged.

An example corresponding to this (Configuration P8-1) is the above (Specific Example 36).
In this case, as can be seen from FIG. 84 etc., on the LED board 780, the LED driver 782 is arranged so that the first side sd1 faces the direction in which the connector CN1N is arranged.
The first side sd1 of the LED driver 782 has a second terminal (SCLK) and a third terminal (SDATA) as input terminals for the clock signal CLK and the data signal DATA for controlling the light emission effect, which are input from the connector CN1N. Therefore, by positioning the LED driver 782 so that the first side sd1 faces the connector CN1N, the wiring of the clock signal CLK and the data signal DATA for controlling the effect becomes easier, and the unnecessary wiring portion can be reduced, allowing the wiring length to be efficiently shortened.
In addition, the seventh terminal (RESET) on the first side is an input terminal for the reset signal RESET from the connector CN1N, and wiring for this terminal is also similarly simplified.

In addition to the above (Configuration P9-1), the gaming machine 1 of the embodiment has the following (Configuration P9-2).
(Structure P9-2)
The light emission driving section is disposed at a position closer to the connector than any of the plurality of light emitting elements.

84, the LED driver 782 is disposed at a position closer to the connector CN1N than any of the light emitting elements LED1 to LED22. Therefore, the distance between the first side sd1 and the connector CN1N is extremely short.
This allows the wiring lengths of the clock signal CLK, data signal DATA, and reset signal RESET to be extremely short, simplifying and streamlining wiring. In particular, the short wiring lengths of the high-frequency clock signal CLK and data signal DATA are suitable for suppressing radiation of high-frequency noise.

As can be seen from FIG. 45, the clock signal CLK and the data signal DATA are also supplied to the buffer circuit 781 from the connector CN1N. As shown in FIG. 84, the buffer circuit 781 is placed in a position very close to the connector CN1N. This also contributes to shortening the wiring length of the clock signal CLK, the data signal, and DATA, simplifying the wiring, and further reducing noise radiation by shortening the wiring length of high-frequency signals.

In addition, the LED driver 782 is located closer to the connector CN1N than any of the multiple light-emitting elements LEDs, so that the LED driver 782 and the connector CN1N are located close to each other on the board, and a wide area on the board can be used for arranging a large number of light-emitting elements LEDs. This increases the degree of freedom in arranging the light-emitting elements LEDs as a dramatic effect.

The gaming machine 1 of the embodiment has the following (configuration P10-1).
(Configuration P10-1)
The gaming machine 1 comprises a first substrate having a connector, a plurality of light-emitting elements, and a light-emitting drive unit that drives the plurality of light-emitting elements to emit light based on a performance control signal input through the connector, the light-emitting drive unit being a rectangular chip component having an input terminal for light-emitting drive data and a clock signal included in the performance control signal formed on a first side, and output terminals for drive signals for the light-emitting elements formed on a second side, a third side, and a fourth side, the light-emitting drive unit being arranged on the first substrate such that the first side faces in the direction in which the connector is arranged, and no light-emitting elements are arranged between the connector and the first side.

An example corresponding to this (Configuration P8-1) is the above (Specific Example 36).
84, the LED driver 782 is disposed so that the first side sd1 faces the direction in which the connector CN1N is disposed, and no light-emitting element LED is disposed between the LED driver 782 and the connector CN1N.
By arranging the LED driver 782 so that its first side sd1 faces the connector CN1N, it becomes easier to wire the clock signal CLK, data signal DATA, and reset signal RESET for performance control. In addition, unnecessary wiring can be reduced, and the wiring length can be efficiently shortened.
In addition, since there is no light-emitting element LED between the LED driver 782 and the connector CN1N, the wiring between the LED driver 782 and the light-emitting element LED and the wiring between the LED driver 782 and the connector CN1N do not get in the way of each other, resulting in a configuration that allows for simple wiring.

In addition to the above (Configuration P10-1), the gaming machine 1 of the embodiment has the following (Configuration P10-2).
(Configuration P10-2)
The light emission driving section is disposed at a position closer to the connector than any of the plurality of light emitting elements.

84, the LED driver 782 is disposed closer to the connector CN1N than any of the light-emitting elements LED1 to LED22. Therefore, the distance between the first side sd1 and the connector CN1N is extremely short. And, as described above, the light-emitting element LED is not disposed between the LED driver 782 and the connector CN1N.
Therefore, the wiring lengths of the clock signal CLK, data signal DATA, and reset signal RESET can be made extremely short, making wiring easier and more efficient. In addition, the short wiring lengths of the high-frequency clock signal CLK, data signal, and DATA are also suitable for suppressing radiation of high-frequency noise.

In addition, the LED driver 782 is located closer to the connector CN1N than any of the multiple light-emitting elements LEDs, so that the LED driver 782 and the connector CN1N are located close to each other on the board, and a wide area on the board can be used for arranging a large number of light-emitting elements LEDs. This increases the degree of freedom in arranging the light-emitting elements LEDs as a dramatic effect.

6.15 Other
The gaming machine 1 of the embodiment further has the following various configurations.

(Configuration Z1)
The LED board 780 in FIG. 45 receives a 5V DC voltage (DC5V) and a 12V DC voltage (DC12VB) as power supply voltages from the upstream relay board 760 via a connector CN1N.
A 5V DC voltage (DC5V) is used as the power supply for the buffer circuit 781, and a 12V DC voltage (DC12VB) is used as the power supply for the LED driver 782.
A 12V DC voltage (DC12VB) is output from the connector CN2N to the downstream LED board 790 (see FIG. 11).
This improves the efficiency of power supply.

(Configuration Z2)
The inner frame LED relay board 400 in Figure 13 outputs signals for performance control from the performance control board 30 to each board of the door 6, and also includes a signal for the speaker 46.

In this case, the signals for performance control are the clock signal S_IN_CLK, the load signal S_IN_LOAD, the serial data signal S_IN_DATA, the clear signal CLR_L, the clear signal CLR_M, the clock signal CLK_L, the clock signal CLK_M, the data signal DATA_L, the data signal DATA_M, the general-purpose output port, and the enable signal ENABLE_M.

The signals for speaker 46 are signals from the + and - terminals of the upper right speaker, center right speaker, lower right speaker, upper left speaker, and center left speaker, which are the 19th to 26th pins of connector CN1B.
Additionally, pins 19 to 26 of connector CN2B are also for speaker signals.

Here, the 17th and 18th pins of both connectors CN1B and CN2B are grounded.
As a result, in the system of transmission line H7, connector CN1B, connector CN2B, and transmission line H8, a ground is provided between the speaker signal, i.e., the audio signal, and the above-mentioned signal for performance control, i.e., the high-frequency signal.
This provides a shielding effect, reducing the effect of high-frequency noise generated by high-frequency signals for performance control on audio signals.
Furthermore, this means that signals for performance control and speaker signals can be transmitted over the same wiring, improving wiring efficiency.

(Configuration Z3)
Harnesses that connect to moving parts often use flexible cables that are less likely to break even when moved repeatedly, or wires that are softer than usual.
Compared to regular wire, soft wire is more durable, more expensive, and can carry roughly the same amount of current. On the other hand, flexible cables are more expensive and can carry less current.
Due to the structure of the moving body, the harness is subject to large bending, and flexible cables are used when it is necessary to control the direction of bending, etc. This is because it is difficult to control bending with soft wires.

(Configuration Z4)
The connectors CN1C and CN4C in FIG. 16 will now be described.
Downstream of the front frame LED connection board 500, there are two LED boards (an LED board not shown and an LED board inside the handle) connected to connectors CN1C and CN4C. In this case, one of the two LED boards is equipped with an LED driver. As described above, the front frame LED connection board 500 transmits a signal for LED control from the connector CN1C to the LED driver of one of the LED boards, while receiving the LED light emission drive current (17-R6, 17-G6, 17-B6, 17-R7, 17-G7, 17B-7) from the LED driver and transmitting it to the other LED board from the connector CN4C.

In other words, when there are two LED boards (second and third boards) downstream of the first board (front frame LED connection board 500) and one of them (the second board) is equipped with an LED driver, a drive control signal is sent from the first board, and part of the LED drive signal is returned from the LED driver of the second board, relayed, and sent to the other LED board (the third board).

This allows only one LED driver to drive the second and third boards, simplifying the configuration and facilitating miniaturization of downstream LED boards.
Furthermore, since light emission is controlled by a common control signal, it is only necessary to send a drive control signal from the first substrate to the second substrate, resulting in good wiring efficiency.
Furthermore, by relaying through the first board, a harness between the second board and the third board is not required.

(Configuration Z5)
As shown in Figures 36, 39, 40, and 41, the LED connection board 700 transfers the clock signal P_S_OUT_CLK (clock signal CLK_P) and serial data signal P_S_OUT_DATA (serial data signal DATA_P) transmitted from the performance control board 30 to the downstream side via a buffer circuit 703 and a buffer circuit (705, 706, 707, or 708).

That is, the clock signal CLK_P and the serial data signal DATA_P are buffered by the buffer circuit 703 to become the clock signal CLK_A and the serial data signal DATA_A.
The clock signal CLK_A and the serial data signal DATA_A are buffered by the buffer circuit 706 in FIG. 40 and are outputted from the connector CN7J as the clock signal CLK_E and the serial data signal DATA_E.
Furthermore, the clock signal CLK_A and the serial data signal DATA_A are buffered by the buffer circuit 705 in FIG. 39 and are outputted from the connector CN10J as the clock signal CLK_B and the serial data signal DATA_B.
The clock signal CLK_A and the serial data signal DATA_A are buffered by the buffer circuit 707 in FIG. 41 and are output from the connector CN9J as the clock signal CLK_D and the serial data signal DATA_D.
The clock signal CLK_A and the serial data signal DATA_A are buffered by the buffer circuit 708 in FIG. 41 and are output from the connector CN8J as the clock signal CLK_C and the serial data signal DATA_C.

In this way, the clock signal P_S_OUT_CLK and the serial data signal P_S_OUT_DATA are first buffered at the receiving stage, then branched into four systems, and buffered and output at the output stage of each system.
When an input signal is branched into multiple systems and output in this manner, stable signal transmission is achieved by performing buffer processing at the input stage and at the output stage of each of the multiple systems.

(Configuration Z6)
FIG. 72 shows the structure of a substrate 1000.
This board 1000 is an example having a connector CN1U connected to an upstream board and a connector CN2U connected to a downstream board. Of course, it is also possible to connect to a plurality of downstream boards.

In this example, connector CN1U is supplied with 12V DC voltage (DC12VB), digital signal group SA, digital signal group SB, and speaker signal group SPS from the upstream board.

The substrate 1000 is provided with a DC/DC converter 1001. The DC/DC converter 1001 receives a 12V DC voltage (DC12VB) input from a connector CN2C as a primary side, and outputs a 5V DC voltage (DC5V) as a secondary side.
The DC/DC converter 1001 is assumed to be, for example, a step-down switching converter, but may generate a 5V direct current voltage (DC5V) by, for example, resistor division.

The 12V DC voltage (DC12VB) input from the connector CN2C is used as the operating power source for the LED driver 1004 and the light emitting unit 1005, for example.
The 5V direct current voltage (DC 5V) obtained by the DC/DC converter 1001 is used as the operating power source for the buffer circuit 1002 .
In addition, a 12V DC voltage (DC12VB) is transmitted from connector CN2U to the downstream board.

The digital signal group SA includes, for example, signals that control light emission operations and motor operations for performance purposes, sensing signals, etc., and specifically, clock signals, reset/load signals, data signals (e.g., serial data signals), detection signals from various sensors, etc. are expected to be included.
This digital signal group SA may include, for example, signals transmitted from an upstream board to a downstream board via connectors CN1U and CN2U, or signals transmitted from a downstream board to an upstream board via connectors CN2U and CN1U.
Here, an example is shown in which the board 1000 transmits the digital signal group SA as a relay between the upstream side and the downstream side. That is, this is an example in which the board 1000 does not process the digital signal group SA but simply relays the signal.

The digital signal group SB is, for example, a signal that controls light emission operations and motor operations for performance purposes, and specifically, it is assumed that such signals include a clock signal, a reset/load signal, and a data signal (for example, a serial data signal).
This digital signal group SB is transmitted, for example, from the upstream board to the downstream board via connectors CN1U and CN2U, and is used as a control signal for the LED driver 1004.

Each signal in the digital signal group SB is compensated by the buffer 1002, then branched or distributed and supplied to the filter 1003 and the LED driver 1004.

Of the signals in the digital signal group SB, those to be transmitted to a downstream board are supplied from a buffer 1002 to a filter 1003. The filter 1003 is, for example, a low-pass filter, and cuts out high-frequency noise. Note that using a low-pass filter is just one example, and the type of filter and cutoff characteristics may be determined according to the type of signal.
Each signal in the digital signal group SB that has been processed by the filter 1003 is transmitted to a downstream board via the connector CN2U.
Although the filter 1003 is assumed to be a filter circuit using passive elements (resistors, capacitors, coils, etc.), a filter circuit using active elements may also be configured. In this case, a 5V DC voltage (DC5V) or a 12V DC voltage (DC12VB) can be used as the power supply voltage.

A part or all of the signals in the digital signal group SB are supplied to the LED driver 1004. The LED driver 1004 drives the LED of the light-emitting unit 1005 to emit light based on the input signal.

The speaker signal group SPS is a positive signal and a negative signal as a speaker drive signal (analog audio signal) for a certain speaker. Of course, there may be speaker drive signals for multiple speakers. This speaker signal group SPS is transmitted to a downstream speaker or a relay board to the speaker via connectors CN1U and CN2U.
In this case, the board 1000 does not perform signal processing on the speaker signal group SPS, and the board 1000 simply has the function of relaying the speaker signal group SPS.

The substrate 1000 as shown in FIG. 72 has the following features.
A power supply voltage of a different voltage (5V DC voltage (DC5V)) is generated using a certain input power supply voltage (12V DC voltage (DC12VB)), and both voltages are used as power supplies for circuit operation within the substrate 1000. Other power supply voltages may also be generated.
A power supply voltage of a different voltage (5V DC voltage (DC5V)) is generated using a certain input power supply voltage (12V DC voltage (DC12VB)), and only one of the voltages is transmitted downstream from the connector CN2U. Note that an example in which both voltages are transmitted downstream is also conceivable.

- Each signal of the digital signal group SA is relayed between upstream and downstream without being processed within the board 1000 (without passing through electronic circuit components other than wiring).

The digital signal group SB is buffered by the buffer circuit 1002 on the input side, and then filtered by the filter 1003 before being transmitted from the connector CN2U to the downstream board. This allows the signals to be transmitted downstream to be supplied to the downstream board after compensation for signal degradation (waveform shaping) and noise reduction are performed.
The digital signal group SB is input to an LED driver 1004 in the board 1000, and LED light emission is driven. In other words, the board 1000 has both functions of a board for light emission and a board for relaying. Note that, in the board 1000, each signal of the digital signal group SB may be supplied to a motor driver, an S/P conversion circuit, etc., instead of the LED driver.
Both the signal supplied to the LED driver 1004 and the signal supplied to the filter 1003 are processed by the buffer 1002, thereby compensating for signal degradation during transmission from the upstream side.

- This board inputs each signal from digital signal group SA, which simply relays signals without performing signal processing, and each signal from digital signal group SB, which performs signal processing, and relays the signals from digital signal groups SA and SB, as well as performing performance operations based on the signals from digital signal group SB.

- Each analog signal of the speaker signal group SPS is relayed from upstream to downstream (e.g., speaker) without being processed within the board 1000 (without passing through electronic circuit components other than wiring).

Any one or more of the characteristic configurations of such a board 1000 can be applied to other boards, including the above-mentioned inner frame LED relay board 400, front frame LED connection board 500, side unit upper right LED board 600, side unit lower right LED board 620, side unit upper LED board 630, button LED connection board 640, button LED board 660, button, LED connection board 700, back panel left relay board 720, decorative board 740, relay board 760, LED board 780, LED board 790, back panel lower relay board 800, decorative board 820, or boards not shown.

Moreover, any of the above-mentioned configurations from (Configuration A1-1) to (Configuration Z5) can be applied to the substrate 1000 as shown in FIG.
Alternatively, a substrate that combines one or more of the features of the substrate 1000 described above with the configurations (Configuration A1-1) to (Configuration Z5) described above is also envisioned.

The above describes the embodiments, but each of the configuration examples from (Configuration A1-1) to (Configuration Z6) can be combined in various ways, and by combining them in any way, a gaming machine 1 can be created that has the effects described in each configuration.
In addition, it is possible to combine the configurations and operations described in the embodiments.
Furthermore, the various illustrated specific examples are merely one mode for realizing each configuration. Various specific examples that are not specifically shown are also conceivable.

Furthermore, although the embodiment has been described using a pachinko gaming machine, the present invention can also be applied to reel-type gaming machines such as so-called slot gaming machines.
In the case of a reel-type gaming machine, there is also a frame member, a door member that is provided so as to be able to be opened and closed relative to the frame member, and an exchange member that is attached so as to be able to be replaced relative to the frame member.
For example, a reel type gaming machine has a frame housing as a component equivalent to the frame member, a door as a component equivalent to the door member, and a reel unit as a component equivalent to the replacement member. For example, the frame housing constitutes the main body of the reel type gaming machine, and the reel unit is attached to the frame housing directly or via sheet metal or the like by screws, etc., and is therefore replaceable. The door is attached to the frame housing so as to be openable and closable.
In such a reel-type gaming machine, the board configuration, circuit configuration, connector configuration, power supply configuration, etc., as explained in each embodiment can be adopted.

REFERENCE SIGNS LIST 1 Gaming machine 2 Inner frame 3 Gaming board 4 Outer frame 6 Door 10 Side unit 13 Performance button 15a Cross key 15b Confirmation button 20 Main control board 30 Performance control board 300 Power supply board 400 Inner frame LED relay board 500 Front frame LED connection board 501, 502, 503, 504, 507, 508, 512, 513, 601, 604, 607, 703, 704, 705, 706, 707, 708, 741, 761, 781 Buffer circuit 505, 506, 602, 603, 701, 702 P/S conversion circuit 509, 605, 606, 621, 631, 661, 663, 742, 782 LED driver 510, 511, 608, 609, 710, 711, 712, 713, 714, 715, 716 Motor driver 520, 521, 670, 671, 790 Power supply isolation/protection circuit 550 Relay board 600 Side unit upper right LED board 620 Side unit lower right LED board 630 Side unit upper LED board 640 Button LED connection board 660 Button LED board 700 LED connection board 720 Back left relay board 740 Decoration board 760 Relay board 780, 780', 790 LED board 800 Back lower relay board 820 Decoration board 840 Frame LED relay board

Claims (1)

A first substrate;
a second substrate that is mounted with a light emitting element and a light emitting drive unit that drives the light emitting element to emit light, is connected to the first substrate by a first transmission line, and receives a first power supply voltage;
a third substrate, which is a substrate equipped with a light emitting element and a light emitting drive unit that drives the light emitting element to emit light, and is connected to the second substrate by a second transmission line to receive the first power supply voltage, the third substrate being located at a distance from the first substrate that is shorter than a distance between the first substrate and the second substrate ;
Equipped with
The light emitting element and the light emitting drive unit on the second substrate are operated by the first power supply voltage supplied through a common wiring on the substrate, and a plurality of light emitting elements are connected in series to all or a part of the terminals of the light emitting drive current of the light emitting drive unit;
The light emitting element and the light emitting drive unit on the third substrate are operated by the first power supply voltage supplied through a common wiring on the substrate, and a plurality of light emitting elements are connected in series to all or a part of the terminals of the light emitting drive current of the light emitting drive unit,
The number of light emitting elements mounted on the third substrate is smaller than the number of light emitting elements mounted on the second substrate,
the number of lines used for transmitting the first power supply voltage in the second transmission line is smaller than the number of lines used for supplying the first power supply voltage in the first transmission line;
the third substrate includes a connector that serves as a terminal of the second transmission line,
The light emission driving unit of the third board drives a plurality of light emitting elements to emit light based on a performance control signal input via the connector,
When the direction of a straight line from one end to another end of the third substrate is defined as the longest direction,
In the third substrate,
The connector is disposed near an edge of the substrate;
the light-emitting drive unit is disposed closer to the center of the board than the connector is when viewed in the longest direction;
A gaming machine in which the multiple light-emitting elements are discretely arranged in a range from one end side to the other end side of the board when viewed from the light-emitting drive unit in the longest direction.

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