JP7466790B1 - Method for manufacturing semiconductor device - Google Patents

Abstract

A semiconductor device including a buffer layer in which the generation of a high resistance region is suppressed is obtained. The method for manufacturing the semiconductor device includes a step (S1a) of preparing a semiconductor substrate, a step (S2a) of introducing hydrogen into the semiconductor substrate, a step (S7a) of irradiating the semiconductor substrate with a charged particle beam, and a step (S8a) of performing activation annealing on the semiconductor substrate after the step (S7a) of irradiating the charged particle beam. The step (S2a) of introducing hydrogen is performed before the step (S8a) of performing activation annealing.

Description

The present disclosure relates to a method for manufacturing a semiconductor device.

Conventionally, semiconductor devices such as power diodes and insulated gate bipolar transistors (IGBTs) are known. Thinning of these semiconductor devices is effective in reducing losses, but may cause problems such as a decrease in the margin for snap-off and oscillation. In order to suppress the occurrence of such problems, a buffer layer is formed in the semiconductor device, for example, by proton irradiation and annealing. For example, a method for manufacturing a semiconductor device disclosed in International Publication No. 2021/181644 includes a step of irradiating an ion or electron beam so as to penetrate a semiconductor substrate doped with phosphorus or arsenic, and a step of irradiating the semiconductor substrate with hydrogen plasma to perform annealing.

International Publication No. 2021/181644

However, when a semiconductor substrate is irradiated with an ion or electron beam, extra point defects can occur, leaving behind highly resistive regions. Such highly resistive regions can cause a decrease in the breakdown voltage of the semiconductor device and the generation of leakage current, resulting in a deterioration of device characteristics.

The present disclosure has been made to solve the problems described above, and the purpose of the present disclosure is to provide a semiconductor device including a buffer layer in which the occurrence of high resistance regions is suppressed.

A method for manufacturing a semiconductor device according to the present disclosure includes the steps of preparing a semiconductor substrate, introducing hydrogen into the semiconductor substrate, irradiating the semiconductor substrate with a charged particle beam, and, after the step of irradiating the charged particle beam, performing activation annealing on the semiconductor substrate. The step of introducing hydrogen is performed before the step of performing activation annealing.

As a result of the above, a semiconductor device including a buffer layer can be obtained in which the occurrence of high resistance regions is suppressed.

1 is a cross-sectional view of a semiconductor device according to a first embodiment; 1 is a distribution diagram of carrier concentration in a semiconductor substrate not including a high-resistance region. 1 is a distribution diagram of hydrogen concentration in a semiconductor substrate not including a high-resistance region. 1 is a distribution diagram of carrier concentration in a semiconductor substrate including a high-resistance region. 1 is a distribution diagram of hydrogen concentration in a semiconductor substrate including a high-resistance region. 1 is a flowchart of a method for manufacturing a semiconductor device according to a first embodiment. 7 is a schematic distribution diagram of hydrogen concentration in a semiconductor device obtained by the semiconductor device manufacturing method shown in FIG. 6. 7 is a cross-sectional view showing a modified example of the semiconductor device obtained by the manufacturing method of the semiconductor device shown in FIG. 6. 10 is a flowchart of a method for manufacturing a semiconductor device according to a second embodiment. 1 is a diagram showing the distribution of carrier concentrations in semiconductor substrates containing different oxygen concentrations; 10 is a schematic distribution diagram of hydrogen concentration in a semiconductor device obtained by the manufacturing method of a semiconductor device shown in FIG. 9 .

Hereinafter, an embodiment of the present disclosure will be described. Note that unless otherwise specified, the same or corresponding parts in the following drawings will be given the same reference numerals, and the description thereof will not be repeated.

Embodiment 1.
<Configuration of Semiconductor Device>
1 is a cross-sectional view of a semiconductor device 100 according to a first embodiment of the present invention. The semiconductor device 100 shown in FIG. 1 is obtained by a manufacturing method of the semiconductor device 100 shown in FIG.

The semiconductor device 100 shown in FIG. 1 is, for example, a vertical diode used as a power semiconductor device, and mainly comprises a semiconductor substrate 200, a surface electrode 10, and a back electrode 11. The semiconductor substrate 200 has a first main surface 1a and a second main surface 1b. The second main surface 1b is the surface opposite to the first main surface 1a. The surface electrode 10 is connected to the first main surface 1a. The back electrode 11 is connected to the second main surface 1b.

The semiconductor substrate 200 includes a p ⁺ type anode layer 22, an n ^- type drift layer 1, an n type buffer layer 2, and an n ⁺ type cathode layer 21. As shown in FIG. 1, if the direction in which the first main surface 1a is disposed as viewed from the second main surface 1b is the first direction X, the n ⁺ type cathode layer 21, the n type buffer layer 2, the n ^- type drift layer 1, and the p ⁺ type anode layer 22 are formed in this order in the semiconductor substrate 200 from the second main surface 1b in the first direction X. Specifically, the p ⁺ type anode layer 22 is formed on the first main surface 1a. The n ⁺ type cathode layer 21 is formed on the second main surface 1b. The n ^- type drift layer 1 is formed between the p ⁺ type anode layer 22 and the n ⁺ type cathode layer 21. The n ^- type drift layer 1 is formed so as to be in contact with the p ⁺ type anode layer 22. An n ^{-type buffer layer 2 is formed between the n-} type drift layer 1 and the n ⁺ type cathode layer 21. The n-type buffer layer 2 is formed so as to be in contact with both the n ^- type drift layer 1 and the n ⁺ type cathode layer 21. The n ^- type buffer layer 2 has a higher n-type impurity concentration than the n-type drift layer 1. The n ⁺ type cathode layer 21 has a higher n-type impurity concentration than the n-type buffer layer 2.

Here, the buffer layer included in the semiconductor substrate 200 will be described. As described later, the process of forming the buffer layer includes a step of irradiating a semiconductor substrate (silicon wafer) with a charged particle beam such as a proton. Donors contribute to the formation of the buffer layer. The donors are formed by utilizing a process in which hydrogen and point defects contained in the semiconductor substrate 200, which is a silicon wafer, are combined. Point defects are localized disturbances in the crystal lattice. There are two types of point defects: a vacancy type and an interstitial silicon type. In general, when a point defect is combined with hydrogen, the dangling bond of the point defect is shielded by hydrogen. As a result, the dangling bond does not show an intraband level. On the other hand, if the shielding effect of hydrogen is insufficient and the dangling bond of the point defect remains, a shallow donor type level is formed. By utilizing this physical phenomenon, the donor formed in the silicon wafer can be controlled to form a buffer layer so as to control the carrier concentration in the semiconductor substrate 200. As a result, the change over time of the switching waveform during reverse recovery and turn-off of the power semiconductor device becomes gentle, and snap-off and oscillation can be suppressed. As described later, in the process of forming the buffer layer, a process of irradiating the semiconductor substrate with protons is often used, but for example, a process of irradiating the semiconductor substrate with a hydrogen isotope such as helium ions as a charged particle beam may also be used.

In the process of forming a buffer layer on a semiconductor substrate, an appropriate annealing process is required after irradiation with a charged particle beam. When the semiconductor substrate is annealed after irradiating the back surface (second main surface 1b) of the semiconductor substrate with a charged particle beam, the region in which donors are formed expands on the back surface side. As a result, a buffer layer having a desired thickness can be formed. However, the way in which the buffer layer expands (the thickness of the buffer layer in the first direction X) may differ depending on the type of semiconductor substrate. If the thickness of this buffer layer in the first direction X is small, a high resistance region remains on the back surface side of the semiconductor substrate. As a result, the high resistance region causes a decrease in the breakdown voltage of the semiconductor device and the generation of a leak current, leading to deterioration of the device characteristics.

Here, we explain the results of our investigation into high-resistance regions in semiconductor substrates. We measured the hydrogen concentration in the semiconductor substrates using secondary ion mass spectrometry, and the carrier concentration in the semiconductor substrates using spreading resistance measurements.

FIG. 2 is a distribution diagram of carrier concentration in a semiconductor substrate not including a high resistance region. In FIG. 2, the horizontal axis indicates the distance (unit: μm) from the back surface of the semiconductor substrate, and the vertical axis indicates the carrier concentration (unit: cm ⁻³ ) in the semiconductor substrate. FIG. 3 is a distribution diagram of hydrogen concentration in a semiconductor substrate not including a high resistance region. In FIG. 3, the horizontal axis indicates the distance (unit: μm) from the back surface of the semiconductor substrate, and the vertical axis indicates the hydrogen concentration (unit: cm ⁻³ ) in the semiconductor substrate. FIG. 4 is a distribution diagram of carrier concentration in a semiconductor substrate including a high resistance region. In FIG. 4, the horizontal axis indicates the distance from the back surface of the semiconductor substrate, and the vertical axis indicates the carrier concentration in the semiconductor substrate. FIG. 5 is a distribution diagram of hydrogen concentration in a semiconductor substrate including a high resistance region. In FIG. 5, the horizontal axis indicates the distance from the back surface of the semiconductor substrate, and the vertical axis indicates the hydrogen concentration in the semiconductor substrate. Note that the semiconductor substrate including a high resistance region and the semiconductor substrate not including a high resistance region shown in FIG. 2 to FIG. 5 were manufactured by carrying out proton irradiation and annealing treatment under the same conditions. Furthermore, since secondary ion mass spectrometry cannot detect hydrogen concentrations of 5×10 ¹⁶ cm ⁻³ or less, background signals are shown in regions in FIGS. 2 and 5 where the hydrogen concentration is 5×10 ¹⁶ cm ⁻³ or less.

As can be seen from Figures 2 and 3, in the semiconductor substrate not including a high resistance region, the hydrogen concentration was 5 x 10 ¹⁶ cm ^-3 or more in all the donor generation regions, and hydrogen was detected. On the other hand, as can be seen from Figure 4, in the semiconductor substrate including a high resistance region, a high resistance region exists in a region that is 5 μm or less away from the back surface. The carrier concentration in the high resistance region is lower than the carrier concentration in the donor generation region. Also, as can be seen from Figure 5, the region that is 5 μm or less away from the back surface is a region where hydrogen was not detected. Note that the data on the hydrogen concentration in the region that is 5 μm or less away from the back surface in Figure 5 indicates the background signal of secondary ion mass spectrometry, and the hydrogen concentration in the region is 5 x 10 ¹⁶ cm ^-3 or less. As can be seen from Figures 4 and 5, the distance from the back surface that indicates the high resistance region and the distance from the back surface where hydrogen was not detected were almost the same.

Even when the annealing temperature in the annealing process was changed, the result that the distance from the back surface of the periphery of this high resistance region (the boundary between the high resistance region and the donor generation region) and the distance from the back surface of the periphery of the region where hydrogen is not detected (the boundary between the region where hydrogen is not detected and the region where hydrogen is detected) remained almost the same. In other words, it is believed that high resistance regions occur in regions of the semiconductor substrate where the concentration of hydrogen is low. In addition, as will be described later, it was revealed that the distance from the back surface indicating the high resistance region depends on the oxygen concentration of the semiconductor substrate.

Here, a feature of the manufacturing method of the semiconductor device 100 according to the present embodiment is that a step of introducing hydrogen into the semiconductor substrate is carried out before the activation annealing step. Based on the above experimental results, a manufacturing method of the semiconductor device 100 described below can be used to obtain a semiconductor device 100 including a buffer layer 2 in which the occurrence of high resistance regions is suppressed. As a result, a power semiconductor device in which deterioration of device characteristics is prevented can be obtained.

<Method of Manufacturing Semiconductor Device 100>
FIG. 6 is a flow chart of a method for manufacturing the semiconductor device 100 according to the first embodiment. Here, as an example of a method for manufacturing the semiconductor device 100, a method for manufacturing a vertical diode as shown in FIG. 1 will be described. As shown in FIG. 6, in the method for manufacturing the semiconductor device 100 according to the present embodiment, a step (S1a) of preparing a semiconductor substrate 200 is first performed. In this step (S1a), a silicon wafer is prepared as the semiconductor substrate 200 constituting the semiconductor device 100. The silicon wafer is cut out from an n-type or n ^−-type ingot. The silicon wafer has a front surface (first main surface 1a) and a back surface opposite to the front surface. The hydrogen concentration in the silicon wafer is, for example, 1×10 ¹³ cm ⁻³ or less.

Next, a step (S2a) of introducing hydrogen is carried out. In this step (S2a), hydrogen is impregnated from the front surface to the back surface in the first direction X. Specifically, this step (S2a) includes a step of annealing the silicon wafer in at least one of a state in which the silicon wafer is in contact with a film containing hydrogen or a state in which the silicon wafer is exposed to a hydrogen atmosphere. For example, in a state in which the silicon wafer is exposed to a hydrogen atmosphere, the silicon wafer is annealed in a furnace such as a vertical furnace at a temperature range of 1000°C to 1300°C (627K to 1027K). For example, annealing the silicon wafer at 1100°C for 5 hours can impregnate the entire silicon wafer with a high concentration of hydrogen.

In this step (S2a), other methods may be used as long as hydrogen can be impregnated into the silicon wafer. Therefore, the step (S2a) of introducing hydrogen may include a step of exposing the silicon wafer to hydrogen plasma or a step of immersing the silicon wafer in a liquid containing hydrogen ions, in addition to a step of annealing the silicon wafer in at least one of a state in which the silicon wafer is in contact with a film containing hydrogen or a state in which the silicon wafer is exposed to a hydrogen atmosphere. In the step (S2a) of introducing hydrogen, hydrogen may be introduced not only from the front surface of the silicon wafer, but also from the side connecting the front surface and the back surface.

Next, a step (S3a) of forming a surface structure is performed. In this step (S3a), the surface structure of the semiconductor device 100 is formed on the first main surface 1a of the silicon wafer. Specifically, a p ⁺ type anode layer 22 is formed on the surface layer of the first main surface 1a of the silicon wafer. Furthermore, a surface electrode 10 (anode electrode) connected to the p ⁺ type anode layer is formed on the first main surface 1a.

Next, a step (S4a) of grinding the back surface is carried out. In this step (S4a), the back surface of the silicon wafer is ground. Specifically, after protecting the surface structure, the back surface of the silicon wafer is ground using a grinding means such as CMP (Chemical Mechanical Polish). As a result, the thickness of the silicon wafer is thinned to the thickness required for the semiconductor device 100. Note that the back surface of the silicon wafer after grinding is the second main surface 1b, and the region from the first main surface 1a to the second main surface 1b is the semiconductor layer.

Next, a step (S5a) of forming a first buffer layer is carried out. In this step (S5a), a first buffer layer is formed on the second main surface 1b of the silicon wafer. Specifically, an n-type layer is formed on the surface of the second main surface 1b by implanting n-type dopant ions such as phosphorus into the second main surface 1b. Note that the ion implantation may be carried out multiple times. In addition, since the first buffer layer can be substituted with the second buffer layer described later, the step (S5a) of forming the first buffer layer may be omitted.

Next, a step (S6a) of forming a back surface structure is performed. In this step (S6a), the back surface structure of the semiconductor device 100 is formed on the second main surface 1b of the silicon wafer. Specifically, an n ⁺ type cathode layer 21 is formed on the surface layer of the second main surface 1b of the silicon wafer. In addition to the n ⁺ type cathode layer 21, for example, a p ⁺ type cathode layer may be partially formed to manufacture a RFC (Relaxed Field of Cathode) diode.

Next, a step (S7a) of irradiating a charged particle beam is performed. In this step (S7a), point defects are formed in the silicon wafer. Specifically, the second main surface 1b of the silicon wafer is irradiated with a charged particle beam. The charged particle beam is, for example, protons. The protons are irradiated, for example, by using an accelerator. By using the accelerator, the protons are accelerated to several hundreds KeV to several tens MeV and irradiated onto the silicon wafer. The dose of the protons is, for example, 1×10 ¹² to 1×10 ¹⁵ cm ⁻² . Note that helium ions may be irradiated as the charged particle beam. In this way, point defects are locally formed in the silicon wafer.

Incidentally, even if the step of irradiating the charged particle beam (S7a) is not performed, the silicon wafer inherently contains some point defects. Therefore, if the silicon wafer has point defects, the step of irradiating the charged particle beam (S7a) does not need to be performed. Also, the step of irradiating the charged particle beam (S7a) may be performed before the step of performing activation annealing (S8a) described below. The step of irradiating the charged particle beam (S7a) is not limited to being performed immediately after the step of forming the back surface structure (S6a), and may be performed, for example, after the step of grinding the back surface (S4a).

Next, the activation annealing step (S8a) is performed. In this step (S8a), the silicon wafer is annealed for the purpose of at least one of forming donors and eliminating point defects. Specifically, the silicon wafer is annealed at a temperature range of 200°C to 500°C while exposed to an inert gas atmosphere such as nitrogen. In this way, hydrogen in the silicon wafer reacts with point defects to form donors. As a result, the n-type buffer layer 2 shown in FIG. 1 is formed. The layer thus formed is the second buffer layer, and the step of irradiating the charged particle beam (S7a) and the step of performing activation annealing (S8a) are collectively referred to as the step of forming the second buffer layer.

In the activation annealing step (S8a), if the annealing time is increased, the thickness of the n-type buffer layer 2 in the first direction X increases. In the activation annealing step (S8a), the annealing temperature range is preferably 200°C to 500°C. If the annealing temperature is lower than 200°C, the efficiency of donor formation decreases. If the annealing temperature is higher than 500°C, the annihilation of donors becomes significant. In this manner, structures such as the second buffer layer are formed on the silicon wafer, and the silicon wafer is used as the semiconductor substrate 200.

Next, a step (S9a) of forming an electrode on the back surface is carried out. In this step (S9a), an electrode is formed on the second main surface 1b. Specifically, a back electrode 11 (cathode electrode) is formed on the second main surface 1b. In this manner, a semiconductor device 100 including a buffer layer 2 in which the occurrence of high resistance regions as shown in FIG. 1 is suppressed can be obtained.

Here, a preferred range of hydrogen concentration in the semiconductor substrate will be described. Fig. 7 is a schematic distribution diagram of hydrogen concentration in the semiconductor device 100 obtained by the above-mentioned manufacturing method of the semiconductor device 100. In Fig. 7, the horizontal axis indicates the distance (unit: μm) from the surface of the semiconductor substrate 200, and the vertical axis indicates the hydrogen concentration (unit: cm ^-3 ) in the semiconductor substrate 200. Example 1 is a silicon wafer in which the annealing temperature is low and the annealing time is short in the step (S2a) of introducing hydrogen. Example 2 is a silicon wafer in which the annealing temperature is sufficiently high and the annealing time is sufficiently long in the step (S2a) of introducing hydrogen.

As can be seen from FIG. 7, in the silicon wafer according to the second embodiment, the hydrogen concentration in the semiconductor substrate (semiconductor layer) when the semiconductor device 100 is formed is almost constant in the first direction X from the front surface to the back surface. On the other hand, in the silicon wafer according to the first embodiment, the hydrogen concentration monotonically decreases from the front and back surfaces of the silicon wafer toward the center of the silicon wafer. Therefore, the hydrogen concentration in the semiconductor substrate (semiconductor layer) when the semiconductor device 100 is formed is monotonically decreased from the first main surface 1a toward the center in the thickness direction of the semiconductor substrate. In addition, the hydrogen concentration on the second main surface 1b side, which is the back surface of the semiconductor substrate, is lower than the hydrogen concentration on the first main surface 1a side. Thus, in the step (S2a) of introducing hydrogen, when the annealing time is sufficiently long or the annealing temperature is sufficiently high, the hydrogen concentration in the semiconductor substrate is almost constant in the first direction X from the front surface to the back surface. In order to sufficiently suppress a high resistance region in the buffer layer 2, the hydrogen concentration in the region in the semiconductor layer where the hydrogen concentration is constant is preferably 1×10 ¹⁴ cm ⁻³ or more, and more preferably 1×10 ¹⁵ cm ⁻³ or more.

The step of introducing hydrogen (S2a) may be performed before the step of performing activation annealing (S8a). The step of introducing hydrogen (S2a) may be performed, for example, before the step of irradiating a charged particle beam (S7a), or, as in the manufacturing method of the semiconductor device 100 according to the first embodiment, before the step of forming a surface structure (S3a).

However, as described below, the profile of the buffer layer 2 is affected not only by the conditions for irradiation with the charged particle beam and the conditions for activation annealing, but also by the oxygen concentration contained in the silicon wafer. As in the manufacturing method of the semiconductor device 100 according to the first embodiment, the step of introducing hydrogen is performed immediately after the step (S1a) of preparing the semiconductor substrate 200, so that the semiconductor device 100 including the buffer layer 2 in which the occurrence of high resistance regions is suppressed can be obtained regardless of the oxygen concentration in the silicon wafer. In other words, a power semiconductor device in which deterioration of device characteristics is prevented can be obtained regardless of the type of silicon wafer.

In addition, in the manufacturing method of the semiconductor device 100 described above, the process of forming a surface structure (S3a), the process of forming a first buffer layer (S5a), the process of forming a back surface structure (S6a), and the process of forming an electrode on the back surface (S9a) can be appropriately modified depending on the type of semiconductor device 100 (e.g., a diode, an IGBT, etc.).

(Configuration of Modified Example of Semiconductor Device 100)
Fig. 8 is a cross-sectional view showing a modified example of the semiconductor device 100 obtained by the manufacturing method of the semiconductor device 100 shown in Fig. 1. Fig. 8 corresponds to Fig. 1. The semiconductor device 100 shown in Fig. 8 basically has the same configuration as the semiconductor device 100 shown in Fig. 1, but differs in that the semiconductor device 100 is an IGBT.

The semiconductor device 100 shown in Fig. 8 is obtained by a manufacturing method similar to that of the semiconductor device 100 shown in Fig. 6. The semiconductor substrate 200 mainly includes a p-type contact layer 4, an n ⁺ type emitter layer 6, a p-type base layer 5, an n ^- type drift layer 1, an n-type buffer layer 2, a p ⁺ type collector layer 3, a gate electrode 8, and a gate insulating film 7. As shown in Fig. 8, in the semiconductor substrate 200, the p ⁺ type collector layer 3, the n-type buffer layer 2, the n ^- type drift layer 1, the p-type base layer 5, the p-type contact layer 4, and the n ⁺ type emitter layer 6 are formed in this order from the second main surface 1b in the first direction X.

Specifically, a plurality of p-type contact layers 4 and a plurality of n ⁺ -type emitter layers 6 are formed on the surface layer of the first main surface 1a. Between the two n ⁺ -type emitter layers 6, a trench is formed on the first main surface 1a. The trench is formed so as to reach the n ^- -type drift layer 1 via the p-type base layer 5. A gate insulating film 7 is formed so as to cover the inner surface of the trench. A gate electrode 8 is formed so as to contact the gate insulating film 7. The inside of the trench is filled with the gate electrode 8 and the gate insulating film 7. From a different perspective, the p-type contact layers 4 are configured as a pair, and the pair of p-type contact layers 4 are formed so as to sandwich the pair of n ⁺ -type emitter layers 6. The pair of n ⁺ -type emitter layers 6 are formed so as to sandwich the gate electrode 8 and the gate insulating film 7. The gate electrode 8 is arranged so as to be surrounded by the gate insulating film 7 and the interlayer insulating film 9. A p-type base layer 5 is formed between the first main surface 1a and the n ^- -type drift layer 1. A p ⁺ -type collector layer 3 is formed on the surface layer of the second main surface 1b. An n ^- type drift layer 1 is formed between a p-type base layer 5 and a p ⁺ type collector layer 3. The n ^- type drift layer 1 is in contact with the p-type base layer 5. An n-type buffer layer 2 is formed between the n ^- type drift layer 1 and the p ⁺ type collector layer 3. The n-type buffer layer 2 is in contact with the n ^- type drift layer 1 and the p ⁺ type collector layer 3. The gate electrode 8 and the gate insulating film 7 are formed so as to extend in the first direction X from the first main surface 1a to the region where the n ^- type drift layer 1 is formed. The n-type buffer layer 2 and the n ⁺ type emitter layer 6 have a higher n-type impurity concentration than the n ^- type drift layer 1. The p ⁺ type collector layer and the p-type contact layer 4 have a higher p-type impurity concentration than the p-type base layer 5.

The semiconductor device 100 shown in Figure 8 is basically obtained by a manufacturing method similar to that of the semiconductor device 100 shown in Figure 1, but the process of forming a surface structure (S3a), the process of forming a back surface structure (S6a), and the process of forming an electrode on the back surface (S9a) are different.

In the manufacturing method of the semiconductor device 100 shown in FIG. 8, in the step (S3a) of forming a surface structure, a p-type base layer 5, an n ⁺ -type emitter layer 6, and a p-type contact layer 4 are formed on the surface layer of the first main surface 1a of the silicon wafer. In addition, in order to form a trench gate, the first main surface 1a of the silicon wafer is dry etched to form a trench. A gate insulating film 7 and a gate electrode 8 are formed inside the trench. The material of the gate electrode 8 is, for example, polysilicon. An interlayer insulating film 9 and a surface electrode 10 (emitter electrode) are formed on the first main surface 1a. The material of the interlayer insulating film 9 is, for example, tetraethyl orthosilicate (TEOS).

8, in the step (S6a) of forming a back surface structure, p ⁺ type collector layer 3 is formed in a surface layer portion of second main surface 1b of the silicon wafer. In addition to p ⁺ type collector layer 3, for example, an n ⁺ type cathode layer may be partially formed to manufacture a RC (Reverse Conductive)-IGBT.

In the manufacturing method of the semiconductor device 100 shown in Fig. 8, in the step (S9a) of forming an electrode on the back surface, a back surface electrode 11 (collector electrode) is formed on the second main surface 1b of the silicon wafer. In this manner, the semiconductor device 100 having the IGBT structure as shown in Fig. 8 can be obtained.

<Action and effect>
The method for manufacturing the semiconductor device 100 according to the present disclosure includes a step (S1a) of preparing the semiconductor substrate 200, a step (S2a) of introducing hydrogen into the semiconductor substrate 200, a step (S7a) of irradiating the semiconductor substrate 200 with a charged particle beam, and, after the step (S7a) of irradiating the charged particle beam, a step (S8a) of performing activation annealing on the semiconductor substrate 200. The step (S2a) of introducing hydrogen is performed before the step (S8a) of performing activation annealing.

In this way, the semiconductor substrate 200 (silicon wafer) has a sufficient hydrogen concentration. As a result, the point defects formed in the step (S7a) of irradiating the charged particle beam are sufficiently compounded with hydrogen by the subsequent annealing process, so that a semiconductor device 100 including a buffer layer in which the occurrence of high resistance regions is suppressed can be obtained. In other words, a power semiconductor device in which deterioration of device characteristics is prevented can be obtained.

In the manufacturing method of the semiconductor device 100, the step of introducing hydrogen (S2a) includes any one of the steps of annealing the semiconductor substrate 200 in at least one of a state in which the semiconductor substrate 200 is in contact with a film containing hydrogen or a state in which the semiconductor substrate 200 is exposed to a hydrogen atmosphere, a step of exposing the semiconductor substrate 200 to hydrogen plasma, and a step of immersing the semiconductor substrate 200 in a liquid containing hydrogen ions. In this way, hydrogen can be introduced into the silicon wafer by any method.

In the manufacturing method of the semiconductor device 100, the step of introducing hydrogen (S2a) is performed before the step of irradiating the charged particle beam (S7a). In this way, it is possible to obtain a semiconductor device 100 including a buffer layer in which the occurrence of high resistance regions is suppressed regardless of the oxygen concentration in the silicon wafer. In other words, it is possible to obtain a power semiconductor device in which deterioration of device characteristics is prevented, regardless of the type of silicon wafer.

Embodiment 2.
<Method of Manufacturing Semiconductor Device 100>
Fig. 9 is a flowchart of a method for manufacturing the semiconductor device 100 according to the second embodiment. Fig. 9 corresponds to Fig. 6. The method for manufacturing the semiconductor device 100 shown in Fig. 9 basically has the same configuration as the method for manufacturing the semiconductor device 100 shown in Fig. 6, but differs in that the step of introducing hydrogen (S7b) is performed after the step of irradiating a charged particle beam (S6b).

As described in the first embodiment, the step of introducing hydrogen (S7b) may be performed before the step of performing activation annealing (S8b). However, when the step of introducing hydrogen (S7b) is performed after forming some device structure on the silicon wafer, there is a limit to the temperature and time of annealing in the step of introducing hydrogen (S7b) so as not to destroy the device structure. For example, aluminum is usually used as the surface electrode of a power semiconductor device. The melting point of aluminum is about 650°C. Therefore, for example, when an aluminum electrode is formed in the step of forming a surface structure (S2b) and then the step of introducing hydrogen (S7b) is performed, the melting point of the aluminum electrode is the upper limit of the temperature of annealing in the step of introducing hydrogen (S7b). In this case, the depth to which hydrogen penetrates in the silicon wafer is reduced. As a result, the effect of suppressing the occurrence of high resistance regions may be insufficient. In the second embodiment, a method for manufacturing a semiconductor device 100 that sets the depth to which hydrogen penetrates to a desired value is described.

As an example of a method for manufacturing the semiconductor device 100, a method for manufacturing a vertical diode as shown in FIG. 1 will be described. As shown in FIG. 9, in the method for manufacturing the semiconductor device 100 according to this embodiment, a step (S1b) of preparing a semiconductor substrate 200 is first performed. In this step (S1b), a silicon wafer constituting the semiconductor device 100 is prepared. The silicon wafer is cut from an n-type or n ^-type ingot. The silicon wafer has a front surface (first main surface 1a) and a back surface opposite the front surface. The hydrogen concentration in the silicon wafer is, for example, 1×10 ¹³ cm ^-3 or less.

Next, a step (S2b) of forming a surface structure is performed. In this step (S2b), the surface structure of the semiconductor device 100 is formed on the first main surface 1a of the silicon wafer. Specifically, a p ⁺ type anode layer 22 is formed on the surface layer of the first main surface 1a of the silicon wafer. Furthermore, a surface electrode 10 (anode electrode) connected to the p ⁺ type anode layer 22 is formed on the first main surface 1a.

Next, a step (S3b) of grinding the back surface is carried out. In this step (S3b), the back surface of the silicon wafer is ground. Specifically, after protecting the surface structure, the back surface of the silicon wafer is ground using a grinding method such as CMP (Chemical Mechanical Polish). Note that the back surface of the silicon wafer after grinding is the second main surface 1b, and the region from the first main surface 1a to the second main surface 1b is the semiconductor layer.

Next, a step (S4b) of forming a first buffer layer is carried out. In this step (S4b), a first buffer layer is formed on the second main surface 1b of the silicon wafer. Specifically, an n-type layer is formed on the surface of the second main surface 1b by implanting n-type dopant ions such as phosphorus into the second main surface 1b. Note that the ion implantation may be carried out multiple times. In addition, since the first buffer layer can be substituted with the second buffer layer described later, the step of forming the first buffer layer may be omitted.

Next, a step (S5b) of forming a back surface structure is performed. In this step (S5b), the back surface structure of the semiconductor device 100 is formed on the second main surface 1b of the silicon wafer. Specifically, an n ⁺ type cathode layer 21 is formed on the surface layer of the second main surface 1b of the silicon wafer. In addition to the n ⁺ type cathode layer 21, for example, a p ⁺ type cathode layer may be partially formed to manufacture a RFC (Relaxed Field of Cathode) diode.

Next, a step (S6b) of irradiating a charged particle beam is performed. In this step (S6b), point defects are formed in the silicon wafer. Specifically, the second main surface 1b of the silicon wafer is irradiated with a charged particle beam. The charged particle beam is, for example, protons. For example, an accelerator is used for the proton irradiation. By using the accelerator, the protons are accelerated to several hundreds KeV to several tens MeV and irradiated onto the silicon wafer. The dose of the protons is, for example, 1×10 ¹² to 1×10 ¹⁵ cm ⁻² . Note that helium ions may be irradiated as the charged particle beam. In this way, point defects are locally formed in the silicon wafer.

Incidentally, even if the step (S6b) of irradiating the charged particle beam is not performed, the silicon wafer inherently contains some point defects. Therefore, if the silicon wafer has point defects, the step (S6b) of irradiating the charged particle beam does not need to be performed. Also, the step (S6b) of irradiating the charged particle beam may be performed before the step (S8b) of performing activation annealing, which will be described later. The step (S6b) of irradiating the charged particle beam is not limited to being performed immediately after the step (S5b) of forming the back surface structure, and may be performed, for example, after the step (S3b) of grinding the back surface.

Next, a step (S7b) of introducing hydrogen is carried out. In this step (S7b), hydrogen is impregnated from the front surface to the back surface of the silicon wafer in the first direction X. Specifically, this step (S7b) includes a step of annealing the silicon wafer in at least one of a state in which the silicon wafer is in contact with a film containing hydrogen or a state in which the silicon wafer is exposed to a hydrogen atmosphere. At this time, as described above, there are limitations on the temperature and time during annealing.

In this step (S7b), hydrogen may be impregnated into the silicon wafer. Therefore, the step (S7b) of introducing hydrogen may include a step of exposing the silicon wafer to hydrogen plasma or a step of immersing the silicon wafer in a liquid containing hydrogen ions, instead of a step of annealing the silicon wafer in at least one of a state in which the silicon wafer is in contact with a film containing hydrogen or a state in which the silicon wafer is exposed to a hydrogen atmosphere. In the step (S7b) of introducing hydrogen, hydrogen may be introduced not only from the front surface of the silicon wafer, but also from the side surface connecting the front surface and the back surface.

Next, the activation annealing step (S8b) is performed. In this step (S8b), the silicon wafer is annealed for the purpose of at least one of forming donors and eliminating point defects. Specifically, the silicon wafer is annealed at a temperature range of 200°C to 500°C while exposed to an inert gas atmosphere such as nitrogen. In this way, hydrogen and point defects in the silicon wafer react to form donors. As a result, the n-type buffer layer 2 shown in FIG. 1 is formed. The layer thus formed is the second buffer layer, and the step of irradiating the charged particle beam (S6b), the step of introducing hydrogen (S7b), and the step of activation annealing (S8b) are collectively referred to as the step of forming the second buffer layer.

In the activation annealing step (S8b), the thickness of the n-type buffer layer 2 in the first direction X can be increased by lengthening the annealing time. In the activation annealing step (S8b), the annealing temperature range is preferably 200°C to 500°C. If the annealing temperature is lower than 200°C, the efficiency of donor formation decreases. If the annealing temperature is higher than 500°C, the annihilation of donors becomes significant. By forming a semiconductor layer on the silicon wafer in this manner, the silicon wafer is used as a semiconductor substrate 200.

Next, a process (S9b) of forming an electrode on the back surface is carried out. In this process (S9b), an electrode is formed on the second main surface 1b. Specifically, a back electrode 11 (cathode electrode) is formed on the second main surface 1b. In this manner, a semiconductor device 100 including a buffer layer in which the occurrence of high resistance regions as shown in FIG. 1 is suppressed can be obtained.

Here, a method for controlling the depth to which hydrogen penetrates to a desired value in the step of introducing hydrogen (S7b) will be described. FIG. 10 is a distribution diagram of carrier concentration in each of semiconductor substrates containing different oxygen concentrations. In FIG. 10, the horizontal axis indicates the distance from the back surface of the semiconductor substrate, and the vertical axis indicates the carrier concentration in the semiconductor substrate. Sample 1, Sample 2, Sample 3, and Sample 4 are semiconductor devices containing different oxygen concentrations, and the oxygen concentration in the silicon wafer is higher in the order of Sample 1, Sample 2, Sample 3, and Sample 4. In other words, Sample 1 has the highest oxygen concentration. However, all of the semiconductor devices are processed under the same conditions in the step of irradiating a charged particle beam and the step of annealing for activation. Note that the semiconductor devices related to Sample 1, Sample 2, Sample 3, and Sample 4 are all processed in the step of annealing for activation at an annealing temperature of 350° C. for 4 hours.

As can be seen from Figure 10, the distribution of carrier concentration changes when the oxygen concentration in different silicon wafers differs. The distance from the back surface to the end of the high resistance region in sample 1, which has a high oxygen concentration, is longer than the distance from the back surface to the end of the high resistance region in sample 4, which has a low oxygen concentration. In other words, the higher the oxygen concentration, the larger the range in the depth direction of the high resistance region (the distance from the back surface to the end in the depth direction of the high resistance region).

Here, the depth L of the region where the high resistance region occurs in the semiconductor device obtained by the manufacturing method of the semiconductor device not including the step of introducing hydrogen (the distance from the back surface to the end of the high resistance region in the depth direction) is expressed by the following formula (1). The depth L is the distance (unit: cm) from the second main surface 1b in the first direction X. Rp is the irradiation range (unit: cm) of the charged particle beam in the step of irradiating the charged particle beam. D ₁ is the diffusion constant (unit: cm ² /sec) of hydrogen in the step of performing activation annealing. t1 is the annealing time (unit: seconds) in the step of performing activation annealing. When the number of times of irradiation of the charged particle beam is one when forming the second buffer layer, the irradiation range of the charged particle beam at the time of the irradiation is the irradiation range Rp used in the formula (1). When the irradiation of the charged particle beam is performed multiple times, the irradiation range of the charged particle beam when the charged particle beam is irradiated to the region closest to the surface of the silicon wafer is the irradiation range Rp used in the formula (1).

The hydrogen diffusion constant _D1 is expressed by the following formula (2). _D01 is a frequency factor (unit: ^cm2 /sec). _Ea1 is the activation energy (unit: eV) of hydrogen diffusion in the activation annealing step. T1 is the annealing temperature (unit: K) in the activation annealing step. k is the Boltzmann constant (unit: eV/K).

10, from formulas (1) and (2), when the oxygen concentration contained in the silicon wafer is 1×10 ¹⁷ cm ^-3 or more, the diffusion constant D ₁ of hydrogen is expressed by the following formula (3). When the oxygen concentration contained in the silicon wafer is less than 1×10 ¹⁷ cm ^-3 and is 1×10 ¹⁵ cm ^-3 or more, the diffusion constant D ₁ of hydrogen is expressed by the following formula (4). When the oxygen concentration contained in the silicon wafer is less than 1×10 ¹⁵ cm ^-3 , the diffusion constant D ₁ of hydrogen is expressed by the following formula (5).

That is, by substituting the diffusion constant D ₁ of hydrogen into formula (1) from formula (3), formula (4), and formula (5), the depth L of the region where the high resistance region occurs can be predicted. Then, by introducing hydrogen into the silicon wafer so that the depth of the region where hydrogen is introduced is equal to or greater than this depth L, the occurrence of the high resistance region can be effectively suppressed. When the oxygen concentration contained in the silicon wafer is 1×10 ¹⁷ cm ⁻³ or more, the depth L is expressed by the formula shown in formula (6) below. When the oxygen concentration contained in the silicon wafer is less than 1×10 ¹⁷ cm ⁻³ and equal to or greater than 1×10 ¹⁵ cm ⁻³ , the depth L is expressed by the formula shown in formula (7) below. When the oxygen concentration contained in the silicon wafer is less than 1×10 ¹⁵ cm ⁻³ , the depth L is expressed by the formula shown in formula (8) below.

Based on the above discussion, the conditions in the step of introducing hydrogen will be described. FIG. 11 is a schematic distribution diagram of hydrogen concentration in the semiconductor device 100 (Example 3) obtained by the manufacturing method of the semiconductor device 100 shown in FIG. 9. In FIG. 11, the horizontal axis indicates the distance (unit: μm) from the surface (first main surface 1a) of the semiconductor substrate 200, and the vertical axis indicates the hydrogen concentration (unit: cm ⁻³ ) in the semiconductor substrate 200. The graph of Example 3 in FIG. 11 shows the hydrogen concentration originally contained in the silicon wafer in a region away from the back surface (second main surface 1b) to the front surface side (an internal region whose distance from the back surface is greater than the depth L of the region where the high resistance region occurs). On the other hand, on the back surface side, the depth of the region where hydrogen is introduced is greater than the depth L of the region where the high resistance region occurs. In this way, it is preferable to make the region where hydrogen is introduced as large as possible. Therefore, it is preferable that the depth from the back surface of the region where hydrogen is introduced is greater than the depth L of the region where the high resistance region occurs, and the hydrogen concentration in the region where hydrogen is introduced is greater than the hydrogen concentration originally contained in the silicon wafer in the region (internal region) away from the back surface to the front surface side.

From the above discussion, the preferred range of the depth of the region into which hydrogen is introduced in the step of introducing hydrogen (the distance from the back surface to the end of the region into which hydrogen is introduced that is located on the inner region side: √( _D2 ×t2)) is represented by the following formula (9). _D2 is the diffusion constant of hydrogen in the step of introducing hydrogen (unit: ^cm2 /sec). t2 is the annealing time in the step of introducing hydrogen (unit: seconds).

The hydrogen diffusion constant _D2 is expressed by the following formula (10). _D02 is a frequency factor (unit: ^cm2 /sec). _Ea2 is the activation energy of hydrogen diffusion in the hydrogen introduction step (unit: eV). T2 is the annealing temperature in the hydrogen introduction step (unit: K).

Here, when the oxygen concentration contained in the silicon wafer is 1×10 ¹⁷ cm ⁻³ or more, the hydrogen diffusion constant D ₂ in the step of introducing hydrogen is expressed by the following formula (11). When the oxygen concentration contained in the silicon wafer is less than 1×10 ¹⁷ cm ⁻³ and is 1×10 ¹⁵ cm ⁻³ or more, the hydrogen diffusion constant D ₂ in the step of introducing hydrogen is expressed by the following formula (12). When the oxygen concentration contained in the silicon wafer is less than 1×10 ¹⁵ cm ⁻³ , the hydrogen diffusion constant D ₂ in the step of introducing hydrogen is expressed by the following formula (13). Each of these formulas (11), (12), and (13) is derived by replacing T1 with T2 in each of formulas (6), (7), and (8).

Therefore, in the manufacturing method of semiconductor device 100 according to the second embodiment, the annealing time t2 and temperature T2 in the step of introducing hydrogen are preferably determined using the depth L so as to satisfy the relational expression shown in the following formula (14) when the oxygen concentration contained in the silicon wafer is 1×10 ¹⁷ cm ^-3 or more. The annealing time t2 and temperature T2 in the step of introducing hydrogen are preferably determined so as to satisfy the relational expression shown in the following formula (15) when the oxygen concentration contained in the silicon wafer is less than 1×10 ¹⁷ cm ^-3 and 1×10 ¹⁵ cm ^-3 or more. The annealing time t2 and temperature T2 in the step of introducing hydrogen are preferably determined so as to satisfy the relational expression shown in the following formula (16) when the oxygen concentration contained in the silicon wafer is less than 1×10 ¹⁵ cm ^-3 .

In this way, even if a process of introducing hydrogen is carried out after the process of irradiating the charged particle beam, it is possible to sufficiently adjust the hydrogen concentration in the semiconductor substrate 200. By adjusting the hydrogen concentration, it is possible to obtain a semiconductor device 100 including a buffer layer in which the occurrence of high resistance regions is suppressed.

The manufacturing method of the semiconductor device 100 according to the second embodiment may include a step of measuring the oxygen concentration. Specifically, the oxygen concentration contained in the silicon wafer is measured by secondary ion mass spectrometry. The oxygen concentration contained in the silicon wafer changes after the step of forming the surface structure (S2b) is performed. Therefore, it is preferable to perform the step of measuring the oxygen concentration after the step of forming the surface structure (S2b).

In the manufacturing method of the semiconductor device 100 described above, the process of forming a surface structure (S2b), the process of forming a first buffer layer (S4b), the process of forming a back surface structure (S5b), and the process of forming an electrode on the back surface (S9b) can be modified as appropriate depending on the type of semiconductor device 100.

<Action and effect>
In the manufacturing method of the semiconductor device 100, in the step (S7b) of introducing hydrogen, the depth of the region into which hydrogen is introduced in the semiconductor substrate 200 is defined as L. The Boltzmann constant is defined as k. In the step (S8b) of performing activation annealing, the annealing time is defined as t1, and the annealing temperature is defined as T1. When the oxygen concentration contained in the semiconductor substrate 200 is 1×10 ¹⁷ cm ⁻³ or more, the depth L satisfies the relational expression L=Rp-2×√{3.8×10 ⁵ ×e ^{{(−2.19)/(k×T1)}} ×t1}. When the oxygen concentration contained in the semiconductor substrate 200 is less than 1×10 ¹⁷ cm ⁻³ and is 1×10 ¹⁵ cm ⁻³ or more, the depth L satisfies the relational expression L=Rp-2×√{5.3×10 ⁻³ ×e ^{{(−1.15)/(k×T1)}} ×t1}. When the oxygen concentration contained in the semiconductor substrate 200 is less than 1×10 ¹⁵ cm ⁻³ , the depth L satisfies the relation L=Rp−2×√{9.4×10 ⁻³ ×e ^{{(−0.48)/(k×T1)}} ×t1}.

In this way, it is possible to predict the depth L of the region where a high resistance region occurs. As a result, it is possible to determine the temperature T2 and time t2 for annealing in the step (S7b) of introducing hydrogen from the depth L, and it is possible to obtain a semiconductor device 100 including a buffer layer 2 in which the occurrence of a high resistance region is suppressed.

In the manufacturing method of the semiconductor device 100, the step (S7b) of introducing hydrogen includes at least a step of annealing the semiconductor substrate 200 in at least one of a state in which the semiconductor substrate 200 is in contact with a film containing hydrogen or a state in which the semiconductor substrate 200 is exposed to a hydrogen atmosphere. In the step (S7b) of introducing hydrogen, the annealing time is t2 and the annealing temperature is T2. In this case, in the step (S7b) of introducing hydrogen, the annealing time t2 and the annealing temperature T2 satisfy the relational expression L≦√{3.8×10 ⁵ ×e ^{{(−2.19)/(k×T2)}} ×t2} when the oxygen concentration contained in the semiconductor substrate 200 is 1×10 ¹⁷ cm ⁻³ or more. The annealing time t2 and the annealing temperature T2 satisfy the relational expression L≦√{5.3× ^10-3 ×e{ ^{(-1.15)/(k×T2)}} ×t2} when the oxygen concentration contained in the semiconductor substrate 200 is less than 1× ¹⁰¹⁷ cm- ³ and is equal to or greater than 1× ¹⁰¹⁵ cm ^{-3 .} The annealing time t2 and the annealing temperature T2 satisfy the relational expression L≦√{9.4× ^10-3 ×e ^{{(-0.48)/(k×T2)}} ×t2} when the oxygen concentration contained in the semiconductor substrate 200 is less than 1×1015 ^cm -3.

In this way, the annealing temperature T2 and time t2 in the step (S7b) of introducing hydrogen from the depth L of the region where the high resistance region occurs can be determined, and a semiconductor device 100 including a buffer layer 2 in which the occurrence of the high resistance region is suppressed can be obtained.

The manufacturing method of the semiconductor device 100 includes a step of forming an element structure in the semiconductor substrate 200 and a step of measuring the oxygen concentration of the semiconductor substrate 200. The step of measuring the oxygen concentration is carried out after a step (S2b) of forming a surface structure as a step of forming the element structure.

In this way, the oxygen concentration in the silicon wafer can be measured. As a result, even if different types of silicon wafers are used, it is possible to obtain a semiconductor device 100 including a buffer layer in which the occurrence of high resistance regions is suppressed.

In addition, in the manufacturing method of the semiconductor device 100 according to the first and second embodiments, the electrode material, the film formation method, the impurity concentration in the p-type region or the n-type region, and the like may be changed to match the design conditions of the general semiconductor device 100. A MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an SBD (Schottky Barrier Diode), and a Thyristor may be manufactured by the manufacturing method of the semiconductor device 100 according to the first and second embodiments.

The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. Unless inconsistent, at least two of the embodiments disclosed herein may be combined. The basic scope of the present disclosure is indicated by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims.

1 n ^- type drift layer, 1a first main surface, 1b second main surface, 2 n type buffer layer, 3 p ⁺ type collector layer, 4 p type contact layer, 5 p type base layer, 6 n ⁺ type emitter layer, 7 gate insulating film, 8 gate electrode, 9 interlayer insulating film, 10 front surface electrode, 11 rear surface electrode, 21 n ⁺ type cathode layer, 22 p ⁺ type anode layer, 100 semiconductor device, 200 semiconductor substrate, D1, D2 hydrogen diffusion constant, L depth, X first direction.

Claims (5)

Providing a semiconductor substrate;
introducing hydrogen into the entire semiconductor substrate;
irradiating the semiconductor substrate with a charged particle beam;
and performing activation annealing on the semiconductor substrate after the step of irradiating the charged particle beam,
The method for manufacturing a semiconductor device, wherein the step of introducing hydrogen is performed before the step of irradiating with a charged particle beam . The step of introducing hydrogen includes:
2. The method for manufacturing a semiconductor device according to claim 1, comprising any one of a step of annealing the semiconductor substrate in at least one of a state in which the semiconductor substrate is in contact with a film containing hydrogen or a state in which the semiconductor substrate is exposed to a hydrogen atmosphere, a step of exposing the semiconductor substrate to hydrogen plasma, and a step of immersing the semiconductor substrate in a liquid containing hydrogen ions. Providing a semiconductor substrate;
introducing hydrogen into the semiconductor substrate;
irradiating the semiconductor substrate with a charged particle beam;
and performing activation annealing on the semiconductor substrate after the step of irradiating the charged particle beam,
The step of introducing hydrogen is carried out before the step of activating annealing;
In the step of introducing hydrogen, a depth of a region into which hydrogen is introduced into the semiconductor substrate is defined as L, a Boltzmann constant is defined as k,
In the step of irradiating the charged particle beam, an irradiation range of the charged particle beam is Rp,
In the activation annealing step, if the annealing time is t1 and the annealing temperature is T1,
The depth is
When the oxygen concentration contained in the semiconductor substrate is 1×10 ¹⁷ cm ⁻³ or more,
L = Rp - 2 x √{3.8 x 10 ⁵ x e ^{{(-2.19)/(k x T1)}} x t1}
The following relation is satisfied:
When the oxygen concentration contained in the semiconductor substrate is 1×10 ¹⁵ cm ⁻³ or more and less than 1×10 ¹⁷ cm ⁻³ ,
L = Rp - 2 x √{5.3 x 10 ^-3 x e{ ^{(-1.15)/(k x T1)}} x t1}
The following relation is satisfied:
When the oxygen concentration contained in the semiconductor substrate is less than 1×10 ¹⁵ cm ⁻³ ,
L = Rp - 2 × √{9.4 × 10 ^-3 × e ^{{(-0.48)/(k × T1)}} × t1}
The method for manufacturing a semiconductor device satisfies the following relational expression. the step of introducing hydrogen includes at least a step of annealing the semiconductor substrate in at least one of a state in which the semiconductor substrate is in contact with a film containing hydrogen and a state in which the semiconductor substrate is exposed to a hydrogen atmosphere;
In the hydrogen introduction step, when the annealing time is t2 and the annealing temperature is T2,
In the step of introducing hydrogen, the annealing time and the annealing temperature are:
When the oxygen concentration contained in the semiconductor substrate is 1×10 ¹⁷ cm ⁻³ or more,
L≦√{3.8×10 ⁵ ×e ^{{(−2.19)/(k×T2)}} ×t2}
The following relation is satisfied:
When the oxygen concentration contained in the semiconductor substrate is 1×10 ¹⁵ cm ⁻³ or more and less than 1×10 ¹⁷ cm ⁻³ ,
L≦√{5.3× ¹⁰⁻³ ×e ^{{(−1.15)/(k×T2)}} ×t2}
The following relation is satisfied:
When the oxygen concentration contained in the semiconductor substrate is less than 1×10 ¹⁵ cm ⁻³ ,
L≦√{9.4× ¹⁰⁻³ ×e ^{{(−0.48)/(k×T2)}} ×t2}
4. The method for manufacturing a semiconductor device according to claim 3 , wherein the following relational expression is satisfied: forming a device structure on the semiconductor substrate;
measuring an oxygen concentration in the semiconductor substrate;
5. The method for manufacturing a semiconductor device according to claim 3 , wherein the step of measuring the oxygen concentration is carried out after the step of forming the element structure.

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