JP7466406B2 - 半導体装置の製造方法および成膜装置 - Google Patents
半導体装置の製造方法および成膜装置 Download PDFInfo
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- JP7466406B2 JP7466406B2 JP2020139562A JP2020139562A JP7466406B2 JP 7466406 B2 JP7466406 B2 JP 7466406B2 JP 2020139562 A JP2020139562 A JP 2020139562A JP 2020139562 A JP2020139562 A JP 2020139562A JP 7466406 B2 JP7466406 B2 JP 7466406B2
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- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
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- B05D1/00—Processes for applying liquids or other fluent materials
- B05D1/32—Processes for applying liquids or other fluent materials using means for protecting parts of a surface not to be coated, e.g. using stencils, resists
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D1/00—Processes for applying liquids or other fluent materials
- B05D1/34—Applying different liquids or other fluent materials simultaneously
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D1/00—Processes for applying liquids or other fluent materials
- B05D1/60—Deposition of organic layers from vapour phase
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D1/00—Processes for applying liquids or other fluent materials
- B05D1/62—Plasma-deposition of organic layers
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- H—ELECTRICITY
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- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
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- H01J2237/32—Processing objects by plasma generation
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- H01J2237/332—Coating
- H01J2237/3321—CVD [Chemical Vapor Deposition]
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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Description
図1は、本開示の一実施形態における製造システム10の一例を示すシステム構成図である。製造システム10は、成膜装置200-1、成膜装置200-2、プラズマ処理装置300、および加熱装置400を備える。本実施形態における製造システム10は、マルチチャンバータイプの真空処理システムである。製造システム10は、成膜装置200-1、成膜装置200-2、プラズマ処理装置300、および加熱装置400を用いて、半導体装置に用いられる素子が形成される基板Wにエアギャップを形成する。成膜装置200-1および成膜装置200-2は、同様の構成である。なお、以下では、成膜装置200-1および成膜装置200-2のそれぞれを区別することなく総称する場合に成膜装置200と記載する。
図2は、本開示の一実施形態における成膜装置200の一例を示す概略図である。成膜装置200は、容器209を有する。容器209は、下部容器201、排気ダクト202、支持構造体210、およびシャワーヘッド230を有する。
図3は、本開示の一実施形態におけるプラズマ処理装置300の一例を示す概略図である。プラズマ処理装置300は、処理容器301およびマイクロ波出力装置304を備える。
図4は、本開示の一実施形態における加熱装置400の一例を示す概略図である。加熱装置400は、容器401、排気管402、供給管403、載置台404、ランプハウス405、および赤外線ランプ406を有する。
図5は、半導体装置の製造方法の一例を示すフローチャートである。例えば、搬送機構106によって、例えば図6に示されるような、異なる幅の凹部61および凹部62が形成された基板Wが成膜装置200内に搬入されることにより、図5に例示された処理が開始される。図6の例では、凹部62の幅W2は、凹部61の幅W1よりも広い。
図11は、基板Wの温度に対するD/R(デポジションレート)および除去率の関係の一例を示す図である。図11に示された実験では、基板Wが収容された成膜装置200の処理空間SP内において、イソシアネートのガスおよびアミンのガスの分圧は、それぞれ0.1[Torr]である。また、除去率とは、基板Wの温度に対して、100[nm]の膜厚のポリ尿素膜63が1分間に減少する膜厚を%で表したものである。
なお、本願に開示された技術は、上記した実施形態に限定されるものではなく、その要旨の範囲内で数々の変形が可能である。
SE 排気空間
W 基板
W1 幅
W2 幅
10 製造システム
100 制御装置
101 真空搬送室
102 ロードロック室
103 大気搬送室
104 アライメント室
105 ポート
106 搬送機構
108 搬送機構
200 成膜装置
201 下部容器
202 排気ダクト
203 排気口
209 容器
210 支持構造体
211 ステージ
214 ステージヒータ
220 ガス供給部
230 シャワーヘッド
250 ヒータ
300 プラズマ処理装置
301 処理容器
302 ステージ
302a 基台
302b エッジリング
302c 静電チャック
302d ヒータ
304 マイクロ波出力装置
307 誘電体窓
310 同軸導波管
311 ガス管
312 ガス供給部
331 排気装置
340 RF電源
400 加熱装置
61 凹部
62 凹部
63 ポリ尿素膜
64 封止膜
65 エアギャップ
Claims (6)
- 容器内に収容された、凹部が形成された基板の温度を、220[℃]以上かつ250[℃]以下の範囲内の温度に調整する温度調整工程と、
前記容器内にイソシアネートのガスおよびアミンのガスを供給することにより、前記基板の凹部にポリ尿素膜を積層する第1の積層工程と
を含む半導体装置の製造方法。 - 前記凹部に積層された前記ポリ尿素膜上に封止膜を積層する第2の積層工程と、
前記基板の温度を280[℃]より高い温度に調整することにより、前記封止膜の下層の前記ポリ尿素膜を解重合させ、前記封止膜の下層の前記ポリ尿素膜を、前記封止膜を介して脱離させることにより、前記封止膜と前記凹部との間にエアギャップを形成する脱離工程と
を含む請求項1に記載の半導体装置の製造方法。 - 前記第1の積層工程では、
前記イソシアネートのガスおよび前記アミンのガスの分圧は、それぞれ0.01[Torr]以上かつ1[Torr]以下の範囲内の圧力に調整される請求項1または2に記載の半導体装置の製造方法。 - 凹部が形成された基板が収容される容器と、
前記容器内にイソシアネートのガスとアミンのガスを供給するガス供給部と、
前記基板を加熱する加熱部と、
制御部と
を備え、
前記制御部は、
前記容器内に収容された前記基板の温度を、220[℃]以上かつ250[℃]以下の範囲内の温度に調整するように前記加熱部を制御する温度調整工程と、
前記容器内に前記イソシアネートのガスおよび前記アミンのガスを供給するように前記ガス供給部を制御することにより、前記基板の凹部にポリ尿素膜を積層する積層工程と
を実行する成膜装置。 - 前記容器内のガスを排気する排気ダクトと、
前記基板が晒されている前記容器内の空間である処理空間と、前記排気ダクト内の空間である排気空間との間に設けられた排気シールドと
を備え、
前記排気シールドは、
前記排気空間内の圧力を前記処理空間内の圧力よりも低く維持する請求項4に記載の成膜装置。 - 前記処理空間内の圧力は、前記排気シールドによって、前記排気空間内の圧力よりも1[Torr]以上高い圧力に維持される請求項5に記載の成膜装置。
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JP5560144B2 (ja) | 2010-08-31 | 2014-07-23 | 東京エレクトロン株式会社 | 半導体装置の製造方法 |
EP3048137B1 (en) * | 2013-10-29 | 2018-07-25 | Toray Industries, Inc. | Molding material, method for producing same, and master batch used in same |
KR102420087B1 (ko) * | 2015-07-31 | 2022-07-12 | 삼성전자주식회사 | 반도체 소자의 제조 방법 |
CN109642143B (zh) * | 2016-07-22 | 2021-09-24 | 3M创新有限公司 | 作为陶瓷前体的硅氧烷基粘合剂层 |
US10580875B2 (en) * | 2018-01-17 | 2020-03-03 | Globalfoundries Inc. | Middle of line structures |
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JP2006070263A (ja) | 2004-08-11 | 2006-03-16 | Rhein Chemie Rheinau Gmbh | 粉末(ポリ)尿素の調製方法 |
JP2015048411A (ja) | 2013-09-02 | 2015-03-16 | 三井化学株式会社 | 蒸着重合材料、ポリウレタンウレア膜、積層体および蒸着重合方法 |
JP2015229776A (ja) | 2014-06-03 | 2015-12-21 | 東京エレクトロン株式会社 | 成膜装置、成膜方法及び記憶媒体 |
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JP2020080397A (ja) | 2018-11-14 | 2020-05-28 | 東京エレクトロン株式会社 | デバイスの製造方法 |
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