JP7443953B2 - Method and system for removing phosphorus-doped silicon film - Google Patents

Method and system for removing phosphorus-doped silicon film Download PDF

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JP7443953B2
JP7443953B2 JP2020106427A JP2020106427A JP7443953B2 JP 7443953 B2 JP7443953 B2 JP 7443953B2 JP 2020106427 A JP2020106427 A JP 2020106427A JP 2020106427 A JP2020106427 A JP 2020106427A JP 7443953 B2 JP7443953 B2 JP 7443953B2
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由裕 竹澤
将久 渡邊
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Tokyo Electron Ltd
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Description

本開示は、リンドープシリコン膜を除去する方法、及びシステムに関する。 The present disclosure relates to a method and system for removing phosphorus-doped silicon films.

半導体製造工程において、例えば基板である半導体ウエハ(以下「ウエハ」という)に対し、リンがドープされたシリコン膜(以下「リンドープシリコン膜」)が形成されることがある。
また、半導体製造工程では、不要な膜の除去や、膜の形状の加工においてエッチング処理が行われる。エッチング処理は、ウエハにエッチングガスを供給するドライエッチングや、ウエハをエッチング液に浸漬してエッチングするウェットエッチングがあり、エッチング対象の膜にエッチングガスや、エッチング液を接触させて、化学反応によりエッチング対象の膜を除去する。
In a semiconductor manufacturing process, for example, a silicon film doped with phosphorus (hereinafter referred to as a "phosphorus-doped silicon film") is sometimes formed on a semiconductor wafer (hereinafter referred to as a "wafer") that is a substrate.
Furthermore, in the semiconductor manufacturing process, etching treatment is performed to remove unnecessary films and to process the shape of the film. Etching processes include dry etching, in which an etching gas is supplied to the wafer, and wet etching, in which the wafer is immersed in an etching solution.The film to be etched is brought into contact with an etching gas or an etching solution, and etched by a chemical reaction. Remove the target membrane.

ここでリンがドープされたシリコン膜をエッチングにより除去しようとする際、同じ基板にリンが含まれていないシリコン膜(以下「非ドープシリコン膜」という)が含まれていると、高い選択比が得られず、リンドープシリコン膜と共に非ドープシリコン膜までもエッチングされてしまう場合がある。
特許文献1には、非ドープトシリコン層の上面にドープトシリコン層を成膜したウエハにおいて、SF及びフッ化炭素ガスを含むプロセス組成を用いてドープトシリコン層及び非ドープトシリコン層をエッチングする技術が記載されている。
When attempting to remove a silicon film doped with phosphorus by etching, if the same substrate contains a silicon film that does not contain phosphorus (hereinafter referred to as "undoped silicon film"), a high selectivity will be required. In some cases, the undoped silicon film is etched along with the phosphorus-doped silicon film.
Patent Document 1 discloses that in a wafer in which a doped silicon layer is formed on the top surface of an undoped silicon layer, a doped silicon layer and an undoped silicon layer are formed using a process composition containing SF 6 and fluorocarbon gas. A technique for etching is described.

特表2009-508354号公報Special Publication No. 2009-508354

本開示は、リンドープシリコン膜と非ドープシリコン膜とを含む基板から、リンドープシリコン膜を選択性よく除去する技術を提供する。 The present disclosure provides a technique for selectively removing a phosphorus-doped silicon film from a substrate including a phosphorus-doped silicon film and an undoped silicon film.

本開示の方法は、リンがドープされたリンドープシリコン膜を除去する方法であって、
前記リンドープシリコン膜と、前記リンがドープされていない非ドープシリコン膜と、を含み、少なくとも前記リンドープシリコン膜が表面に露出する基板について、前記リンドープシリコン膜を酸化してシリコン酸化膜を形成する工程と、
前記シリコン酸化膜と前記非ドープシリコン膜とのうち、前記シリコン酸化膜を選択的にエッチングして除去する工程と、を有し、
前記シリコン酸化膜を形成する工程の前に、膜厚が10nm~100nmの範囲内になるように前記リンドープシリコン膜をエッチングする工程を含む
The method of the present disclosure is a method of removing a phosphorus-doped silicon film doped with phosphorus, the method comprising:
For a substrate that includes the phosphorus-doped silicon film and the undoped silicon film that is not doped with phosphorus, and in which at least the phosphorus-doped silicon film is exposed on the surface, the phosphorus-doped silicon film is oxidized to form a silicon oxide film. a step of forming;
selectively etching and removing the silicon oxide film between the silicon oxide film and the undoped silicon film ;
Before the step of forming the silicon oxide film, the method includes a step of etching the phosphorus-doped silicon film so that the film thickness falls within a range of 10 nm to 100 nm .

本開示によれば、リンドープシリコン膜と非ドープシリコン膜とを含む基板から、リンドープシリコン膜を選択性よく除去することができる。 According to the present disclosure, a phosphorus-doped silicon film can be selectively removed from a substrate including a phosphorus-doped silicon film and an undoped silicon film.

本開示に係る膜除去方法が適用されるウエハに係る拡大断面図である。1 is an enlarged cross-sectional view of a wafer to which a film removal method according to the present disclosure is applied. リンドープシリコン膜の除去工程を示す第1の拡大縦断面図である。FIG. 3 is a first enlarged longitudinal cross-sectional view showing a step of removing a phosphorus-doped silicon film. リンドープシリコン膜の除去工程を示す第2の拡大縦断面図である。FIG. 7 is a second enlarged longitudinal cross-sectional view showing a step of removing a phosphorus-doped silicon film. リンドープシリコン膜の除去工程を示す第3の拡大縦断面図である。FIG. 7 is a third enlarged longitudinal cross-sectional view showing the step of removing the phosphorus-doped silicon film. リンドープシリコン膜の除去工程を示す第4の拡大縦断面図である。FIG. 7 is a fourth enlarged longitudinal cross-sectional view showing a step of removing a phosphorus-doped silicon film. 本開示に係る基板処理システムを示す平面図である。FIG. 1 is a plan view showing a substrate processing system according to the present disclosure. 前記基板処理システムに設けられる縦型熱処理炉を示す縦断側面図である。FIG. 3 is a vertical side view showing a vertical heat treatment furnace provided in the substrate processing system. 酸化時間に対するシリコン酸化膜の形成膜厚に係る実験結果を示すグラフ図である。FIG. 3 is a graph showing experimental results regarding the thickness of a silicon oxide film formed with respect to oxidation time.

本開示に係るリンドープシリコン膜を除去する方法(以下「膜除去方法」という)の一実施の形態について説明する。図1は、本開示に係る膜除去方法を適用するウエハWの表面付近の構造の一例を示す。例えば、ウエハWには、モノシランガスを用いたCVD法により形成された、リンがドープされていない非ドープシリコン膜100が形成されている。 An embodiment of a method for removing a phosphorous-doped silicon film (hereinafter referred to as a "film removal method") according to the present disclosure will be described. FIG. 1 shows an example of a structure near the surface of a wafer W to which the film removal method according to the present disclosure is applied. For example, on the wafer W, an undoped silicon film 100 that is not doped with phosphorus is formed by a CVD method using monosilane gas.

非ドープシリコン膜100の上面には、リン(P)がドープされたシリコン膜(以下「Pドープシリコン膜」という)101が形成されている。Pドープシリコン膜101は、非ドープシリコン膜100の上面にモノシランガスにホスフィン(PH)ガスを添加したCVD法により得ることができる。Pドープシリコン膜101は、例えば1μm程度の膜厚で形成されている。Pドープシリコン膜101中のPの濃度は、例えば8.0×1020原子/cmである。ウエハWの表面には、上述のPドープシリコン膜101が表面に露出した状態となっている。 On the upper surface of the undoped silicon film 100, a silicon film 101 doped with phosphorus (P) (hereinafter referred to as "P-doped silicon film") is formed. The P-doped silicon film 101 can be obtained by a CVD method in which phosphine (PH 3 ) gas is added to monosilane gas on the upper surface of the undoped silicon film 100 . The P-doped silicon film 101 is formed to have a thickness of, for example, about 1 μm. The concentration of P in the P-doped silicon film 101 is, for example, 8.0×10 20 atoms/cm 3 . The above-described P-doped silicon film 101 is exposed on the surface of the wafer W.

このようなウエハWにおいて、非ドープシリコン膜100を残しつつ、Pドープシリコン膜101のみをエッチングにより除去する要請がある。しかしながらPドープシリコン膜101と非ドープシリコン膜100とは、性状が近く、Pドープシリコン膜101についてのエッチングの選択比を大きくとることが難しい。そのため例えばClガスなどのエッチングガスを用いてエッチングを行うと、上層のPドープシリコン膜101のみならず、下層の非ドープシリコン膜100側までもエッチングにより除去されてしまうおそれがある。 In such a wafer W, there is a demand for removing only the P-doped silicon film 101 by etching while leaving the undoped silicon film 100. However, the P-doped silicon film 101 and the undoped silicon film 100 have similar properties, and it is difficult to obtain a large etching selectivity for the P-doped silicon film 101. Therefore, if etching is performed using an etching gas such as Cl 2 gas, there is a risk that not only the upper P-doped silicon film 101 but also the lower non-doped silicon film 100 will be etched away.

このような事情の下、本開示に係る膜除去方法においては、Pドープシリコン膜101をエッチングする前に、当該Pドープシリコン膜101を酸化する酸化処理を行う。後述の実験結果に示すようにPドープシリコン膜101は、リンがドープされていない非ドープシリコン膜100と比較して、酸化されやすい特性を有することが分かった。そこでこの特性の違いを利用することにより、Pドープシリコン膜101を酸化する処理を行ってシリコン酸化膜102を形成したとしても、非ドープシリコン膜100は酸化されていない状態を維持することができる。シリコン酸化膜102は、非ドープシリコン膜100に対して選択性の高いエッチャントが存在するので、非ドープシリコン膜100がエッチングされることを避けつつ、シリコン酸化膜102を除去することができる。 Under these circumstances, in the film removal method according to the present disclosure, before etching the P-doped silicon film 101, oxidation treatment is performed to oxidize the P-doped silicon film 101. As shown in the experimental results described below, it was found that the P-doped silicon film 101 has a characteristic that it is more easily oxidized than the undoped silicon film 100 that is not doped with phosphorus. Therefore, by utilizing this difference in characteristics, even if the P-doped silicon film 101 is oxidized to form the silicon oxide film 102, the undoped silicon film 100 can remain unoxidized. . Since the silicon oxide film 102 includes an etchant that is highly selective to the undoped silicon film 100, the silicon oxide film 102 can be removed while avoiding etching of the undoped silicon film 100.

上述の酸化処理を実施するにあたり、Pドープシリコン膜101は、その全体を酸化してシリコン酸化膜102とすることが好ましい。一方でPドープシリコン膜101の膜厚が厚すぎると、その表面から離れた深層部分を十分に酸化できないおそれもある。さらには、Pドープシリコン膜101を酸化してシリコン酸化膜102を形成する処理には時間がかかるところ、Pドープシリコン膜101を薄くすれば、酸化処理の時間を短縮することができる。
そこで図1に示すウエハWを、まずエッチング装置に搬送し、図2に示すように例えばPドープシリコン膜101の膜厚が10~100nmの範囲内の例えば15nmになるように、エッチングを行う。なお図2では、エッチング後のPドープシリコン膜101の厚さを誇張して記載している。
In carrying out the above-described oxidation treatment, it is preferable that the entire P-doped silicon film 101 is oxidized to form the silicon oxide film 102. On the other hand, if the P-doped silicon film 101 is too thick, there is a possibility that the deep portion away from the surface cannot be sufficiently oxidized. Furthermore, although it takes time to oxidize the P-doped silicon film 101 to form the silicon oxide film 102, the time required for the oxidation process can be shortened by making the P-doped silicon film 101 thinner.
Therefore, the wafer W shown in FIG. 1 is first transferred to an etching apparatus and etched so that the thickness of the P-doped silicon film 101 is, for example, 15 nm within the range of 10 to 100 nm, as shown in FIG. Note that in FIG. 2, the thickness of the P-doped silicon film 101 after etching is exaggerated.

しかる後、Pドープシリコン膜101を酸化してシリコン酸化膜102を形成する装置、例えば熱処理装置に向けて図2に示すウエハWを搬送し、ウエハWに例えば酸素(O)ガスを供給しながら800℃で40分加熱する。酸化処理では、Oは、ウエハWの表面から深層部に向かって拡散するため、図3に示すように、Pドープシリコン膜101の酸化が徐々に進行し、所定の時間が経過すると、Pドープシリコン膜101全体が酸化されてシリコン酸化膜102が形成される。なおPドープシリコン膜101の酸化により形成されるシリコン酸化膜102は、酸化に伴って膜厚が増加するが、図示の便宜上、図3、図4では、膜厚の増加を省略して記載している。 Thereafter, the wafer W shown in FIG. 2 is transferred to a device, for example, a heat treatment device, that oxidizes the P-doped silicon film 101 to form a silicon oxide film 102, and the wafer W is supplied with, for example, oxygen (O 2 ) gas. Heat at 800℃ for 40 minutes. In the oxidation process, O2 diffuses from the surface of the wafer W toward the deep layer, so as shown in FIG. The entire doped silicon film 101 is oxidized to form a silicon oxide film 102. Note that the thickness of the silicon oxide film 102 formed by oxidizing the P-doped silicon film 101 increases with oxidation, but for convenience of illustration, the increase in film thickness is omitted in FIGS. 3 and 4. ing.

例えばPドープシリコン膜101は、加熱の開始からおよそ30分で全体が酸化され、シリコン酸化膜102が形成される。そしてシリコン酸化膜102の形成後も酸化処理を継続すると、シリコン酸化膜102側から非ドープシリコン膜100にもOが到達する。このとき非ドープシリコン膜100は、Pドープシリコン膜101と比較して酸化されにくいため、非ドープシリコン膜100の酸化はほとんど進行しない。
以上に説明したように、図2に示す構造を備えたウエハWに対し、酸化処理を行うことで、酸化しやすいPドープシリコン膜101の全層がシリコン酸化膜102になる(図4)。一方で非ドープシリコン膜100は、Pドープシリコン膜101の下層側に形成されているため、Oが直接供給されないことと、Pドープシリコン膜101と比較して酸化されにくいこととが相俟って、非ドープシリコン膜100のまま残される。
For example, the entire P-doped silicon film 101 is oxidized in approximately 30 minutes from the start of heating, and a silicon oxide film 102 is formed. If the oxidation treatment is continued even after the silicon oxide film 102 is formed, O 2 also reaches the undoped silicon film 100 from the silicon oxide film 102 side. At this time, since the undoped silicon film 100 is less likely to be oxidized than the P-doped silicon film 101, oxidation of the undoped silicon film 100 hardly progresses.
As described above, by performing oxidation treatment on the wafer W having the structure shown in FIG. 2, the entire layer of the easily oxidized P-doped silicon film 101 becomes the silicon oxide film 102 (FIG. 4). On the other hand, since the undoped silicon film 100 is formed below the P-doped silicon film 101, O 2 is not directly supplied to it, and it is less likely to be oxidized compared to the P-doped silicon film 101. Therefore, the undoped silicon film 100 is left as is.

その後、シリコン酸化膜102のエッチングを行う装置、例えばウェットエッチング装置にウエハWを搬送する。そして例えばDHF(希釈フッ化水素)によりシリコン酸化膜102のウェットエッチングを行う。DHFに対しては、シリコン酸化膜102は、エッチングされやすいが、非ドープシリコン膜100は、ほとんどエッチングされない。この選択比の差を利用してエッチングを行うことにより、図5に示すように非ドープシリコン膜100を残した状態でシリコン酸化膜102を除去することができる。
以上に説明した手法により、図1に示したウエハWにおけるPドープシリコン膜101を除去して、その下層側の非ドープシリコン膜100がエッチングされることを抑制しながら、当該非ドープシリコン膜100を露出させることができる。
Thereafter, the wafer W is transferred to a device that etches the silicon oxide film 102, for example, a wet etching device. Then, wet etching of the silicon oxide film 102 is performed using, for example, DHF (diluted hydrogen fluoride). The silicon oxide film 102 is easily etched by DHF, but the undoped silicon film 100 is hardly etched. By performing etching using this difference in selectivity, the silicon oxide film 102 can be removed while leaving the undoped silicon film 100 as shown in FIG.
By the method described above, the P-doped silicon film 101 on the wafer W shown in FIG. can be exposed.

上述の実施の形態によれば、非ドープシリコン膜100の上面にPドープシリコン膜101が形成されたウエハWから、Pドープシリコン膜101を除去するにあたって、まずPドープシリコン膜101を酸化する処理を行う。Pドープシリコン膜101は、非ドープシリコン膜100より酸化されやすいため、非ドープシリコン膜100をほとんど酸化させずにPドープシリコン膜101をシリコン酸化膜102にすることができる。その後、シリコン酸化膜102と、非ドープシリコン膜100と、のエッチング選択比の差を利用してシリコン酸化膜102をエッチングする。これにより非ドープシリコン膜100がエッチングされることを抑制しながら、Pドープシリコン膜101を除去することができる。 According to the embodiment described above, when removing the P-doped silicon film 101 from the wafer W on which the P-doped silicon film 101 is formed on the upper surface of the undoped silicon film 100, the P-doped silicon film 101 is first oxidized. I do. Since the P-doped silicon film 101 is more easily oxidized than the undoped silicon film 100, the P-doped silicon film 101 can be turned into the silicon oxide film 102 without substantially oxidizing the undoped silicon film 100. Thereafter, the silicon oxide film 102 is etched using the difference in etching selectivity between the silicon oxide film 102 and the undoped silicon film 100. Thereby, the P-doped silicon film 101 can be removed while suppressing the undoped silicon film 100 from being etched.

ここで本開示に係る膜除去方法は、ウエハWの表面にPドープシリコン膜101と、非ドープシリコン膜100と、がいずれも露出している構成において、Pドープシリコン膜101を除去する方法に適用してもよい。Pドープシリコン膜101と、非ドープシリコン膜100と、酸化しやすさには大きく差がある。そのため、Pドープシリコン膜101と、非ドープシリコン膜100との双方が表面に露出している場合であっても、Pドープシリコン膜101を選択的に酸化してシリコン酸化膜102とすることができる。続いてシリコン酸化膜102をエッチングすることで、ウエハWの表面に非ドープシリコン膜100を残しつつ、Pドープシリコン膜101を除去することができる。 Here, the film removal method according to the present disclosure is a method for removing the P-doped silicon film 101 in a configuration in which both the P-doped silicon film 101 and the undoped silicon film 100 are exposed on the surface of the wafer W. May be applied. There is a large difference in ease of oxidation between the P-doped silicon film 101 and the undoped silicon film 100. Therefore, even if both the P-doped silicon film 101 and the undoped silicon film 100 are exposed on the surface, it is possible to selectively oxidize the P-doped silicon film 101 to form the silicon oxide film 102. can. By subsequently etching the silicon oxide film 102, the P-doped silicon film 101 can be removed while leaving the undoped silicon film 100 on the surface of the wafer W.

また、非ドープシリコン膜100の上方にPドープシリコン膜101を積層した構成において、非ドープシリコン膜100と、Pドープシリコン膜101とが直接、上下に積層されていることは必須の要件ではない。非ドープシリコン膜100と、Pドープシリコン膜101との間に他の膜、例えばDHFなどのエッチャントにてシリコン酸化膜102と共に除去することが可能な膜が形成されたウエハWであってもよい。このとき他の膜は、既述の酸化処理を行う際にPドープシリコン膜101と共に酸化されてもよい。 Furthermore, in the structure in which the P-doped silicon film 101 is stacked above the undoped silicon film 100, it is not an essential requirement that the undoped silicon film 100 and the P-doped silicon film 101 are directly stacked one above the other. . The wafer W may have another film formed between the undoped silicon film 100 and the P-doped silicon film 101, for example, a film that can be removed together with the silicon oxide film 102 using an etchant such as DHF. . At this time, the other films may be oxidized together with the P-doped silicon film 101 when performing the oxidation treatment described above.

ここで後述の実験結果に示すように、Pドープシリコン膜101は、Pの濃度が高くなることで酸化されやすくなる傾向がみられることが分かった。そのためPドープシリコン膜101と、非ドープシリコン膜100と、の酸化しやすさに十分な差を持たせるため、Pドープシリコン膜101に含まれるPの濃度は、1.5×1020原子/cm以上であることが好ましい。
またPドープシリコン膜101は、アモルファスのシリコン膜にPをドープした膜であってもよい。またモノシリコン、あるいはポリシリコンにPをドープした膜であってもよい。いずれの膜であっても本開示に係る技術により非ドープシリコン膜100を残しつつ、Pドープシリコン膜101を除去することができる。
As shown in the experimental results described below, it has been found that the P-doped silicon film 101 tends to be more easily oxidized as the P concentration increases. Therefore, in order to create a sufficient difference in oxidability between the P-doped silicon film 101 and the undoped silicon film 100, the concentration of P contained in the P-doped silicon film 101 is set to 1.5×10 20 atoms/ It is preferable that it is 3 cm or more.
Further, the P-doped silicon film 101 may be an amorphous silicon film doped with P. Alternatively, it may be a film of monosilicon or polysilicon doped with P. Regardless of which film is used, the P-doped silicon film 101 can be removed while leaving the undoped silicon film 100 using the technique according to the present disclosure.

続いて本開示に係る膜除去方法を行うシステム(基板処理システム)について説明する。この基板処理システムは、図6に示すように、ウエハWの酸化前にエッチングする装置(第3装置)901と、Pドープシリコン膜101を酸化してシリコン酸化膜102を形成する装置(第1装置)902と、シリコン酸化膜102をエッチングする装置(第2装置)903と、を含む。さらに各装置901~903にウエハWを搬送するための搬送機構である搬送車904を備えている。図6中の符号Cは、ウエハWを各装置間で搬送する際にウエハWが収納されるキャリアを指している。なお搬送機構は、基板処理システムが設けられた工場の天井に設けられたレールに沿ってキャリアCを搬送するOHT(Overhead Hoist Transport)により構成してもよい。 Next, a system (substrate processing system) for performing the film removal method according to the present disclosure will be described. As shown in FIG. 6, this substrate processing system includes a device (third device) 901 that performs etching before oxidizing the wafer W, and a device (first device) that oxidizes a P-doped silicon film 101 to form a silicon oxide film 102. 902 and a device (second device) 903 for etching the silicon oxide film 102. Furthermore, a transport vehicle 904, which is a transport mechanism for transporting wafers W to each of the apparatuses 901 to 903, is provided. The symbol C in FIG. 6 indicates a carrier in which the wafer W is stored when the wafer W is transferred between each device. Note that the transport mechanism may be configured by an OHT (Overhead Hoist Transport) that transports the carrier C along a rail provided on the ceiling of a factory in which the substrate processing system is installed.

ウエハWの酸化前にエッチングする装置901は、例えばキャリアCから取り出され、不図示の処理容器内の載置台に載置されたウエハWに向けて塩素(Cl)ガスを供給するように構成されたドライエッチング装置を用いることができる。またCMP(化学機械研磨:chemical mechanical polishing)によりエッチングしてもよい。
また、シリコン酸化膜102をエッチングする装置903は、例えばエッチング液であるDHFが貯留された液槽にウエハWを浸漬してシリコン酸化膜102をエッチングするウェットエッチング装置を用いることができる。
An apparatus 901 for etching the wafer W before oxidation is configured to supply chlorine (Cl 2 ) gas to the wafer W taken out from the carrier C and placed on a mounting table in a processing container (not shown), for example. A dry etching apparatus can be used. Etching may also be performed by CMP (chemical mechanical polishing).
Further, as the device 903 for etching the silicon oxide film 102, for example, a wet etching device that etches the silicon oxide film 102 by immersing the wafer W in a liquid tank in which DHF, which is an etching solution, is stored can be used.

Pドープシリコン膜101を酸化してシリコン酸化膜102を形成する装置902は、例えばウエハWに対して熱酸化処理を実施する縦型熱処理炉9を備えた熱処理装置を用いることができる。熱処理装置は、キャリアCが搬送されるキャリアブロックS1と、キャリアCからウエハWを取り出す受け渡し機構94とキャリアCから取り出したウエハWを載置する載置棚96と、載置棚96に載置されたウエハWを縦型熱処理炉97に移載する移載機構95を備えている。
図7に示すように、縦型熱処理炉9は、石英ガラス製の処理容器である反応管11の内部に、多数のウエハWを積載する棚状のウエハボート12が下方側から気密に収納される。反応管11の内部には、ガスインジェクタ13が反応管11の長さ方向に亘って配置される。ガスインジェクタ13は、例えばガス供給路23を介してOガスの供給源231に接続される。図7中の符号V23はバルブ、M23は流量調節部である。
As the apparatus 902 for oxidizing the P-doped silicon film 101 to form the silicon oxide film 102, for example, a heat treatment apparatus equipped with a vertical heat treatment furnace 9 for performing thermal oxidation treatment on the wafer W can be used. The heat treatment apparatus includes a carrier block S1 to which the carrier C is transported, a transfer mechanism 94 that takes out the wafer W from the carrier C, a mounting shelf 96 that places the wafer W taken out from the carrier C, and a wafer W that is placed on the mounting shelf 96. A transfer mechanism 95 for transferring the processed wafer W to a vertical heat treatment furnace 97 is provided.
As shown in FIG. 7, in the vertical heat treatment furnace 9, a shelf-shaped wafer boat 12 on which a large number of wafers W are loaded is hermetically housed from below inside a reaction tube 11, which is a processing container made of quartz glass. Ru. A gas injector 13 is arranged inside the reaction tube 11 over the length of the reaction tube 11 . The gas injector 13 is connected to an O 2 gas supply source 231 via a gas supply path 23, for example. Reference numeral V23 in FIG. 7 is a valve, and M23 is a flow rate adjustment section.

反応管11の上端部には排気口15が形成され、この排気口15は、圧力調節弁26を含む金属製の真空排気路25を介して排気機構251に接続される。圧力調節弁26は、真空排気路25を開閉自在に設けられ、その開度の調整により排気経路のコンダクタンスを増減することによって、反応管11内の圧力を調節する役割を果たす。圧力調節弁26としては、例えばバタフライバルブなどのAPC(Adaptive Pressure Control)用のバルブが用いられる。また、図7中、符号16は反応管11の下端開口部を開閉するための蓋部、17はウエハボート12を鉛直軸周りに回転させるための回転機構を指している。反応管11の周囲及び蓋部16には加熱部18が設けられ、ウエハボート12に載置されたウエハWを800℃に加熱する。この縦型熱処理炉9においては、ウエハWにOガスを供給しながら加熱処理を行う。これによりPドープシリコン膜101を酸化することができる。 An exhaust port 15 is formed at the upper end of the reaction tube 11 , and the exhaust port 15 is connected to an exhaust mechanism 251 via a metal vacuum exhaust path 25 including a pressure regulating valve 26 . The pressure control valve 26 is provided to open and close the vacuum exhaust path 25, and plays the role of adjusting the pressure inside the reaction tube 11 by increasing or decreasing the conductance of the exhaust path by adjusting its opening degree. As the pressure regulating valve 26, for example, an APC (Adaptive Pressure Control) valve such as a butterfly valve is used. Further, in FIG. 7, reference numeral 16 indicates a lid for opening and closing the lower end opening of the reaction tube 11, and reference numeral 17 indicates a rotation mechanism for rotating the wafer boat 12 around the vertical axis. A heating section 18 is provided around the reaction tube 11 and around the lid section 16, and heats the wafers W placed on the wafer boat 12 to 800.degree. In this vertical heat treatment furnace 9, heat treatment is performed on the wafer W while supplying O 2 gas. This allows the P-doped silicon film 101 to be oxidized.

そしてウエハWの酸化前にエッチングする装置901と、シリコン酸化膜102を形成する装置902と、シリコン酸化膜102をエッチングする装置903は、夫々制御部91~93を備えている。さらに基板処理システムは、各制御部91~93に制御信号を送信すると共に、搬送車904によるキャリアCの搬送を制御する上位コンピュータ90を備えている。制御部91~93や上位コンピュータ90には、既述の膜除去方法を実行するためのプログラムが記憶されている。
またシリコン酸化膜102を形成する装置は、例えばウエハWに水蒸気を供給しながら加熱して、Pドープシリコン膜101を酸化する装置であってもよい。
The device 901 for etching the wafer W before oxidation, the device 902 for forming the silicon oxide film 102, and the device 903 for etching the silicon oxide film 102 each include control units 91 to 93. Further, the substrate processing system includes a host computer 90 that transmits control signals to each of the control units 91 to 93 and controls the transport of the carrier C by the transport vehicle 904. The control units 91 to 93 and the host computer 90 store programs for executing the film removal method described above.
Further, the apparatus for forming the silicon oxide film 102 may be an apparatus that oxidizes the P-doped silicon film 101 by heating the wafer W while supplying water vapor, for example.

今回開示された実施形態は全ての点で例示であって制限的なものではないと考えられるべきである。上記の実施形態は、添付の請求の範囲及びその主旨を逸脱することなく、様々な形態で省略、置換、変更されてもよい。 The embodiments disclosed this time should be considered to be illustrative in all respects and not restrictive. The embodiments described above may be omitted, replaced, or modified in various forms without departing from the scope and spirit of the appended claims.

(実験1)
本開示に係る膜除去方法の効果を検証するため以下の予備実験を行った。アモルファスのシリコン膜を成膜(膜厚1μm以上)したウエハWをサンプル1とした。またリンをドープしたアモルファスシリコン膜(膜中のPの濃度が8.0×1020原子/cm 膜厚1μm以上)を成膜したウエハWをサンプル2とした。また膜中のPの濃度を1.5×1020原子/cmとしたことを除いてサンプル2と同様に成膜した例をサンプル3とした。
サンプル1~3の各々について、図7に示した縦型熱処理炉9にてOガスを供給しながら800℃の温度で加熱して酸化処理を実施し、酸化時間[分]に対する形成されたシリコン酸化膜102の膜厚を測定した。各サンプルのアモルファスシリコンは、上記酸化処理を行うための昇温の過程で各々結晶化してポリシリコンになっている。
(Experiment 1)
The following preliminary experiment was conducted to verify the effectiveness of the film removal method according to the present disclosure. Sample 1 was a wafer W on which an amorphous silicon film was formed (film thickness of 1 μm or more). Sample 2 was a wafer W on which a phosphorus-doped amorphous silicon film (P concentration in the film was 8.0×10 20 atoms/cm 3 , film thickness 1 μm or more) was formed. Sample 3 was an example in which a film was formed in the same manner as Sample 2 except that the concentration of P in the film was set to 1.5×10 20 atoms/cm 3 .
Each of Samples 1 to 3 was oxidized by heating at a temperature of 800° C. while supplying O 2 gas in the vertical heat treatment furnace 9 shown in FIG. The thickness of the silicon oxide film 102 was measured. The amorphous silicon of each sample was crystallized into polysilicon during the temperature raising process for performing the above-mentioned oxidation treatment.

図8は、この実験結果を示し、サンプル1~3における酸化時間に対するシリコン酸化膜102の膜厚を示す。なおPドープシリコン膜101、または非ドープシリコン膜100を夫々全層酸化してシリコン酸化膜102としたとすると、元のPドープシリコン膜101、及び非ドープシリコン膜100の膜厚に対しておよそ2倍の膜厚のシリコン酸化膜102が形成される。即ち、図8中にて、形成されたシリコン酸化膜102の膜厚が30nmということは、15nmの膜厚のPドープシリコン膜101、または非ドープシリコン膜100が酸化されたことを示している。 FIG. 8 shows the results of this experiment, showing the thickness of the silicon oxide film 102 with respect to the oxidation time in Samples 1 to 3. Note that if the P-doped silicon film 101 or the undoped silicon film 100 is fully oxidized to form the silicon oxide film 102, the thickness will be approximately A silicon oxide film 102 having twice the thickness is formed. That is, in FIG. 8, the thickness of the silicon oxide film 102 formed is 30 nm, which indicates that the P-doped silicon film 101 or the undoped silicon film 100 with a thickness of 15 nm has been oxidized. .

図8に示すようにサンプル1と比較すると、サンプル2、3は、短時間で厚いシリコン酸化膜102が形成されている。従って、サンプル2、3(Pドープシリコン膜101)は、サンプル1(リンがドープされていない非ドープシリコン膜100)と比較して酸化されやすいと言える。
具体的には、サンプル1では、およそ5.5nmの膜厚(非ドープシリコン膜100の膜厚の減少量が2.5~3nm)のシリコン酸化膜102が形成される期間中(酸化時間35分)に、サンプル2にて、30nmの膜厚(Pドープシリコン膜101の膜厚の減少量が15nm)のシリコン酸化膜102が形成されていた。従ってPドープシリコン膜101は、非ドープシリコン膜100に比べてシリコン酸化膜102の形成速度が速く、酸化されやすい特性を有すると評価できる。
またサンプル2とサンプル3とを比較するとサンプル2の方がシリコン酸化膜102の形成速度が速かった。従ってPドープシリコン膜101中のPの濃度を高くすることで、Pドープシリコン膜101をより酸化しやすくすることができる。
As shown in FIG. 8, compared to Sample 1, Samples 2 and 3 have thick silicon oxide films 102 formed in a short time. Therefore, it can be said that Samples 2 and 3 (P-doped silicon film 101) are more easily oxidized than Sample 1 (undoped silicon film 100 that is not doped with phosphorus).
Specifically, in sample 1, during the period in which the silicon oxide film 102 with a film thickness of approximately 5.5 nm (the amount of decrease in film thickness of the undoped silicon film 100 is 2.5 to 3 nm) is formed (oxidation time 35 nm). In sample 2, a silicon oxide film 102 with a thickness of 30 nm (the amount of decrease in the thickness of the P-doped silicon film 101 was 15 nm) was formed. Therefore, it can be evaluated that the P-doped silicon film 101 forms the silicon oxide film 102 at a faster rate than the undoped silicon film 100 and has the characteristic of being easily oxidized.
Further, when Sample 2 and Sample 3 were compared, Sample 2 had a faster formation rate of the silicon oxide film 102. Therefore, by increasing the concentration of P in the P-doped silicon film 101, the P-doped silicon film 101 can be more easily oxidized.

また、既述のサンプル1、2について、水蒸気を供給しながら加熱するウェット酸化装置にて酸化処理を行ったところ、サンプル1では、酸化時間5分の時点で9nmの膜厚のシリコン酸化膜102が形成されたのに対して、サンプル2では60nmの厚さのシリコン酸化膜102を形成することができた。
ウエハWにOガスを供給しながら酸化処理を行った場合と、水蒸気を供給しながら酸化処理を行った場合とにおけるサンプル1、2の酸化速度の比を比べると、ほぼ同等であった。このように、シリコン酸化膜102を形成する装置は、ウエハWに水蒸気を供給しながら加熱するように構成してもよいと言える。
In addition, when samples 1 and 2 described above were oxidized using a wet oxidation device that heated while supplying water vapor, in sample 1, the silicon oxide film 10 with a thickness of 9 nm was formed after 5 minutes of oxidation time. was formed, whereas in sample 2, a silicon oxide film 102 with a thickness of 60 nm could be formed.
A comparison of the oxidation rate ratios of Samples 1 and 2 in the case where the oxidation process was performed while supplying O 2 gas to the wafer W and the case where the oxidation process was performed while supplying water vapor to the wafer W revealed that it was almost the same. In this way, it can be said that the apparatus for forming the silicon oxide film 102 may be configured to heat the wafer W while supplying water vapor.

(実験2)
下層側に厚さ15nmの非ドープシリコン膜100を成膜し、上層側に厚さ15nmのPドープシリコン膜101を成膜した例と同様の構成のウエハWについて、図7に示した縦型熱処理炉9を用い、Oガスを供給しながら800℃の加熱温度下で酸化処理を行った。
(Experiment 2)
Regarding a wafer W having the same configuration as the example in which an undoped silicon film 100 with a thickness of 15 nm is formed on the lower layer side and a P-doped silicon film 101 with a thickness of 15 nm on the upper layer side, the vertical type shown in FIG. Oxidation treatment was performed using a heat treatment furnace 9 at a heating temperature of 800° C. while supplying O 2 gas.

酸化処理の経過時間に伴う酸化の進行を確認したところ、30分経過した時点でPドープシリコン膜101がすべて酸化されてシリコン酸化膜102になった。一方で40分加熱を行った時点において、非ドープシリコン膜100はほとんど酸化されず、形成されたシリコン酸化膜102は、0.3nmであった。
以上の実験結果によれば、Pドープシリコン膜101を酸化してシリコン酸化膜102を形成する酸化処理を行っても、非ドープシリコン膜100はほとんど酸化されずに元の状態で残すことができると言える。従って、シリコン酸化膜102に対するエッチングの選択比が高いエッチャントを利用してシリコン酸化膜102を除去することで、非ドープシリコン膜100の除去を抑制しながらPドープシリコン膜101を除去することができると言える。
When the progress of oxidation was confirmed as time elapsed during the oxidation treatment, the P-doped silicon film 101 was completely oxidized to become the silicon oxide film 102 after 30 minutes had passed. On the other hand, after heating for 40 minutes, the undoped silicon film 100 was hardly oxidized, and the silicon oxide film 102 formed had a thickness of 0.3 nm.
According to the above experimental results, even if the P-doped silicon film 101 is oxidized to form the silicon oxide film 102, the undoped silicon film 100 can remain in its original state without being oxidized. I can say that. Therefore, by removing the silicon oxide film 102 using an etchant with a high etching selectivity to the silicon oxide film 102, the P-doped silicon film 101 can be removed while suppressing the removal of the undoped silicon film 100. I can say that.

100 非ドープシリコン膜
101 Pドープシリコン膜
102 シリコン酸化膜
W ウエハ
100 Undoped silicon film 101 P-doped silicon film 102 Silicon oxide film W Wafer

Claims (8)

リンがドープされたリンドープシリコン膜を除去する方法であって、
前記リンドープシリコン膜と、前記リンがドープされていない非ドープシリコン膜と、を含み、少なくとも前記リンドープシリコン膜が表面に露出する基板について、前記リンドープシリコン膜を酸化してシリコン酸化膜を形成する工程と、
前記シリコン酸化膜と前記非ドープシリコン膜とのうち、前記シリコン酸化膜を選択的にエッチングして除去する工程と、を有し、
前記シリコン酸化膜を形成する工程の前に、膜厚が10nm~100nmの範囲内になるように前記リンドープシリコン膜をエッチングする工程を含む、方法。
A method for removing a phosphorus-doped silicon film doped with phosphorus, the method comprising:
For a substrate that includes the phosphorus-doped silicon film and the undoped silicon film that is not doped with phosphorus, and in which at least the phosphorus-doped silicon film is exposed on the surface, the phosphorus-doped silicon film is oxidized to form a silicon oxide film. a step of forming;
selectively etching and removing the silicon oxide film between the silicon oxide film and the undoped silicon film ;
A method comprising, before the step of forming the silicon oxide film, etching the phosphorus-doped silicon film so that the film thickness is within a range of 10 nm to 100 nm .
前記基板には、前記非ドープシリコン膜の上方に、前記リンドープシリコン膜が積層されている、請求項1に記載の方法。 2. The method of claim 1, wherein the substrate has the phosphorus-doped silicon film stacked over the undoped silicon film. 前記シリコン酸化膜を形成する工程は、前記基板に酸素あるいは、水蒸気を供給して加熱することにより実施される、請求項1または2に記載の方法。 3. The method according to claim 1, wherein the step of forming the silicon oxide film is performed by supplying oxygen or water vapor to the substrate and heating it. 前記リンドープシリコン膜は、膜中のリンの濃度が1.5×1020原子/cm以上である、請求項1ないしのいずれか一項に記載の方法。 4. The method according to claim 1, wherein the phosphorus-doped silicon film has a phosphorus concentration of 1.5×10 20 atoms/cm 3 or more. リンがドープされたリンドープシリコン膜を除去するシステムであって、
前記リンドープシリコン膜と、前記リンがドープされていない非ドープシリコン膜と、を含み、少なくとも前記リンドープシリコン膜が表面に露出する基板について、前記リンドープシリコン膜を酸化してシリコン酸化膜を形成する第1装置と、
前記シリコン酸化膜をエッチングする第2装置と、
前記基板を搬送する搬送機構と、
制御部と、を有し、
前記制御部は、前記第1装置にて、前記リンドープシリコン膜を酸化してシリコン酸化膜を形成するステップと、前記搬送機構により、前記シリコン酸化膜が形成された基板を、前記第2装置に搬送するステップと、前記第2装置にて、前記シリコン酸化膜と前記非ドープシリコンとのうち、前記シリコン酸化膜を選択的にエッチングして除去するステップと、を実行する制御を行うように構成され
前記システムは、前記第1装置にて前記基板を酸化する前に、前記リンドープシリコン膜をエッチングする第3装置を含み、
前記制御部は、前記第3装置により、前記酸化が行われる前のリンドープシリコン膜の膜厚が10nm~100nmの範囲内の値となるようにエッチングを行うステップと、前記搬送機構により、前記リンドープシリコン膜のエッチングがされた基板を、前記第1装置に搬送するステップと、を実行する制御を行うように構成される、システム。
A system for removing a phosphorus-doped silicon film doped with phosphorus, the system comprising:
For a substrate that includes the phosphorus-doped silicon film and the undoped silicon film that is not doped with phosphorus, and in which at least the phosphorus-doped silicon film is exposed on the surface, the phosphorus-doped silicon film is oxidized to form a silicon oxide film. a first device for forming;
a second device for etching the silicon oxide film;
a transport mechanism that transports the substrate;
a control unit;
The control unit includes a step of oxidizing the phosphorus-doped silicon film to form a silicon oxide film in the first device, and transporting the substrate on which the silicon oxide film is formed by the transport mechanism to the second device. and a step of selectively etching and removing the silicon oxide film out of the silicon oxide film and the undoped silicon using the second device. configured ,
The system includes a third device for etching the phosphorus-doped silicon film before oxidizing the substrate in the first device;
The control unit includes a step of etching the phosphorus-doped silicon film before the oxidation by the third device to a value within a range of 10 nm to 100 nm, and a step of etching the phosphorus-doped silicon film by the third device so that the film thickness falls within a range of 10 nm to 100 nm. and transporting a substrate with a phosphorous-doped silicon film etched to the first apparatus .
前記非ドープシリコン膜の上方に、前記リンドープシリコン膜が積層された前記基板から、前記リンドープシリコン膜を除去する、請求項に記載のシステム。 6. The system of claim 5 , wherein the phosphorus-doped silicon film is removed from the substrate having the phosphorus-doped silicon film stacked above the undoped silicon film. 前記第1装置は、前記基板に酸素あるいは、水蒸気を供給して加熱することにより、前記シリコン酸化膜を形成する、請求項またはに記載のシステム。 7. The system according to claim 5 , wherein the first device forms the silicon oxide film by supplying oxygen or water vapor to the substrate and heating it. 膜中のリンの濃度が1.5×1020原子/cm以上である前記リンドープシリコン膜が形成された基板から、前記リンドープシリコン膜を除去する、請求項ないしのいずれか一項に記載のシステム。 Any one of claims 5 to 7 , wherein the phosphorus-doped silicon film is removed from the substrate on which the phosphorus-doped silicon film is formed, and the phosphorus concentration in the film is 1.5×10 20 atoms/cm 3 or more. The system described in Section.
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