JP7420445B1 - information processing equipment - Google Patents

Abstract

An object of the present invention is to improve tamper resistance of an information processing device. This device includes a first substrate 2 having a first conductor pattern 1 of a predetermined shape on at least one surface of an insulating substrate, and a first substrate 2 disposed opposite to the first surface of the first substrate 2. a second substrate 4 having a second conductor pattern 3 at a position shifted along the one surface with respect to the first conductor pattern 1; A side wall portion 6 includes a conductive layer 5 that electrically connects the pattern 3 and is disposed between the first substrate 2 and the second substrate 4 and mechanically connects them to each other; The electric circuit 7 is provided in a region surrounded by the substrate 2 , the second substrate 4 and the side wall portion 6 . [Selection diagram] Figure 1

Description

The present invention relates to an information processing device.

Patent Document 1 has been proposed in connection with a technique for ensuring tamper resistance of electronic devices. This technology involves a structure in which upper and lower circuit boards are surrounded by side walls using conventional anisotropic conductive rubber connectors and connected to each other. According to this structure, when a metal (conductive) pin or the like is passed through the side wall made of anisotropic conductive rubber to establish electrical connection with the conductor pattern of the circuit board, the anisotropic conductive A plurality of electrodes (conductors) built into the rubber are electrically connected to each other, and the presence or absence of a tamper can be determined from the change in potential caused by this electrical continuity.

Japanese Patent Application Publication No. 2013-125510 JP2009-181217A

However, in Patent Document 1, since the configuration is such that the positions of the plurality of electrodes in the anisotropic conductive rubber are simply shifted, the arrangement of the electrodes can be easily predicted, and based on the predicted arrangement. If the pin is inserted so as to avoid contact with the electrode, there is a problem in that it is not possible to detect the occurrence of tampering due to the insertion of the pin.
Furthermore, Patent Document 2, which was proposed in connection with a technology for ensuring tamper resistance of electronic devices, detects tampering based on the presence or absence of damage to circuit patterns that constitute electronic devices. It is not possible to detect access to the circuit due to the insertion of

The purpose of this invention is to make it difficult to access an electric circuit by inserting a pin or the like.

In order to solve the above problems, an information processing device according to the present invention includes a first substrate having a first conductor pattern of a predetermined shape on at least one surface of the insulating substrate; a second substrate disposed opposite to the first conductive pattern and provided with a second conductive pattern at a position shifted along the one surface with respect to the first conductive pattern; a side wall portion provided with a conductive layer that electrically connects the first substrate and the second substrate and mechanically connects the first substrate and the second substrate to each other; It has an electric circuit provided in a region surrounded by the second substrate and the side wall portion.

According to the present invention, it is possible to make it difficult to access the internal electric circuit by inserting a pin or the like.

FIG. 1 is a block diagram of an example of the minimum configuration of an information processing device according to the present invention. 1 is an exploded perspective view of an information processing device according to an embodiment of the present invention. 1 is a perspective view of anisotropic conductive rubber forming a side wall portion of an information processing device according to an embodiment of the present invention. FIG. 2 is an explanatory diagram of a positional relationship between a side wall portion of the information processing device according to an embodiment of the present invention when viewed from above and a circuit pattern when viewed from a cross section of a circuit board. FIG. 1 is a cross-sectional view of an information processing device according to an embodiment. FIG. 2 is an explanatory diagram of the positional relationship between a cross section and a plane of an information processing device according to an embodiment. FIG. 1 is a circuit diagram of an information processing device according to an embodiment. 7 is a flowchart of tamper detection processing of the information processing device according to one embodiment.

The configuration of an information processing apparatus according to the minimum configuration of the present invention will be described with reference to FIG. 1.
This device includes a first substrate 2 having a first conductor pattern 1 of a predetermined shape on at least one surface of an insulating substrate, and a first substrate 2 disposed opposite to the first surface of the first substrate 2, a second substrate 4 having a second conductor pattern 3 at a position shifted along the one surface with respect to the first conductor pattern 1; and the first conductor pattern 1 and the second conductor pattern 3. a side wall portion 6 which includes a conductive layer 5 for electrical connection and is disposed between the first substrate 2 and the second substrate 4 and mechanically connects them to each other; It has an electric circuit 7 provided in a region surrounded by the second substrate 4 and the side wall portion 6.

According to the above configuration, since the positions of the first conductive pattern 1 and the second conductive pattern 3 are shifted in the plane direction, it becomes difficult to visually recognize these positions from the outside, and for example, the positions of the first conductive pattern 1 and the second conductive pattern 3 are shifted in the plane direction. When performing a tampering operation in which a conductor pin or the like is inserted into the conductor pattern 6, it becomes difficult to insert the conductor pin or the like while avoiding the first conductor pattern 1 and the second conductor pattern 3.

An embodiment of the present invention will be described with reference to FIGS. 2 to 8.
FIG. 2 shows the overall configuration, and this device includes an electrically insulating first substrate 20, a second substrate 40, and a connector 60 made of anisotropically conductive rubber disposed between them. The basic configuration is
A circuit pattern for tamper detection is mounted on the first substrate 20 and the second substrate 40. A connector 60 made of anisotropic conductive rubber as shown in FIG. 3 is used to connect the first substrate 20 and the second substrate 40. As shown in FIG. 3, this connector 60 is composed of anisotropic conductive rubber walls 61 combined in a frame shape.

Further, the first substrate 20 or the second substrate 40 includes a holding circuit 71 that applies a predetermined voltage to an electric circuit mounted thereon, and a holding circuit 71 that detects the voltage applied to the holding circuit 71 and performs a predetermined operation. It is connected to a CPU (Central Processing Unit) 72 that performs the process, a memory 73 that is operated by the CPU 72, and a battery (or capacitor) 74 that supplies power to the holding circuit 71 (and the CPU 72 and memory 73 as necessary). . Note that the holding circuit 71, CPU 72, memory 73, and battery 74 that constitute these electric circuits are mounted on a circuit board 100 that is separate from the first board 20 and the second board 40, and are protected from tampering. For this purpose, it is arranged in an area surrounded by the first board 20, the second board 40, and the connector 60.
Further, the conductive patterns formed on the first substrate 20 and the second substrate 40 may be connected to jumper wires 76 that directly connect the first substrate 20 and the second substrate 40, as shown in FIG. are connected to each other by Further, the battery 74 is kept on at all times to ensure operation of the device regardless of whether the device to which the device is attached is powered on or off.

The anisotropic conductive rubber wall 61 is constructed by disposing a conductive layer 63 between a pair of insulating layers 62, as shown in FIG. The conductive layer 63 has a structure in which conductive parts 64 and insulating parts 65, which extend obliquely in the vertical direction in FIG. 3, are alternately arranged.

As shown in FIG. 4, the conductive portion 64 has a configuration in which four GND (grounding) connection portions 64A and four detection connection portions 64B are alternately arranged.
Among the circuit patterns formed on the first substrate 20 (or the second substrate 40), the GND connection portions 64A are arranged in plurality (four in the illustrated example) corresponding to the width of the GND pattern 10 connected to GND. A plurality of detection connection parts 64B (four in the illustrated example) are arranged in a region corresponding to the width of the detection pattern 11 through which the tamper detection signal connected to the holding circuit 71 flows. It is located in the designated area.
In other words, the GND connection portion 64A has the width of the GND pattern 10 connected to GND (the width of the first substrate 20 shown in FIG. 4) among the circuit patterns formed on the first substrate 20 (or the second substrate 40). (or the width in the left-right direction in the plane intersecting with the second substrate 40), and are insulated from each other by insulating portions 65, and are arranged in groups of four. Furthermore, the detection connection portion 64B corresponds to the width of the detection pattern 11 through which the detection signal flows (width in the left-right direction on the plane intersecting the first substrate 20 (or second substrate 40) shown in FIG. 4). Four of them are arranged with each other being insulated from each other by an insulating part 65. Although FIG. 4 shows the arrangement of the GND pattern 10, the detection pattern 11 and the conductive layer 63 on the first substrate 20, the GND pattern 30 and the detection pattern 31 on the second substrate 40 shown in FIG. are also arranged in the same way as the GND pattern 10 and the detection pattern 11 of the first substrate 20 with respect to the conductive layer 63.

Since the GND connection part 64A and the detection connection part 64B are inclined with respect to the thickness direction, the connector 60 can be inserted into the space between the first board 20 and the second board 40 depending on the direction , the combination of connections between the GND patterns 10, 30 and the detection patterns 11, 31 can be changed.
That is, as shown in FIGS. 5(a) and 5(b), by reversing the insertion direction of the connector 60 (so that the inclination directions of the GND connection part 64A and the detection connection part 64B are opposite), The combination of the GND patterns 10, 30 and the detection patterns 11, 31 of the first substrate 20 and the second substrate 40 that are connected to each other can be changed.

The first substrate 20 and the second substrate 40 are equipped with a tamper detection circuit for detecting a tampering action in which a conductive pin or the like is inserted into them to bring them into contact.
This tamper detection circuit is realized by the holding circuit 71 and battery 74 on the circuit board 100 shown in FIG. 2, and as shown in FIG. A plurality of (two in the illustrated example) detection conductor patterns 75 are provided on the surface surrounded by the second substrate 40 and the connector 60. These detection conductor patterns 75 are arranged so as to connect a plurality of detection patterns 11 of the first substrate 20 to each other. Note that the detection conductor pattern 75 may be provided on the second substrate 40 or on both the first substrate 20 and the second substrate 40. Further, the detection pattern 11 is connected to the holding circuit 71 shown in FIG. 2 by a connection conductor pattern or jumper conductor wire formed on the circuit board 100.
The detection conductor pattern 75 has a spiral shape in the illustrated example, but in order to increase the probability of contact with a conductor pin etc. inserted by tampering, the detection conductor pattern 75 has as few gaps as possible (the outer shape of the conductor pin etc. that may be inserted). Other shapes may be used as long as they are arranged (with smaller spacing).

As shown in FIG. 7, one end of the first detection conductor pattern 75 is connected to the power supply VBAT supplied from the battery 74 mounted on the circuit board 100 via a pull-up resistor R1 in the holding circuit 71, and the other The end is connected to the ground point GND of the holding circuit 71 via a pull-down resistor R4. Similarly, one end of the other detection conductor pattern 75 is connected to the power supply VBAT supplied from the battery 74 mounted on the circuit board 100 via a pull-up resistor R3, and the other end is connected to the ground point of the holding circuit 71. It is connected to GND via a pull-down resistor R6. With this connection, a voltage having a division ratio corresponding to the resistance values of the pull-up resistors R1 and R3 and the pull-down resistors R4 and R6 is applied to the detection conductor pattern 75.

Since the pull-up resistor has a value that is one-tenth of the pull-down resistor, the tamper detection signal of the detection conductor pattern 75 is at H level in a conductive state.
In the normal conductive state, the tamper detection signal of the detection conductor pattern 75 is at H level, and the AND output of the logic element 77 in FIG. 7 is at H level.
If there is a tampering action and the detection conductor pattern 75 is cut or short-circuited with the GND pattern, the tamper detection signal of the detection conductor pattern 75 becomes L level, and the AND output of the logic element 77 becomes L level.
The act of removing or destroying the first substrate 20, the second substrate 40, and the connector 60 made of anisotropic conductive rubber by applying a voltage for tamper detection to the detection conductor pattern 75 as described above. Also, it is possible to prevent the act of piercing a thin needle-like object aiming at the insulating part of the connector 60 made of anisotropic conductive rubber. Even when the foot pattern or tamper detection pattern of the connector 60 is short-circuited and the board is removed, the insulating layer 62 and the conductive layer 63 are arranged diagonally, so that the conductor pattern to be short-circuited can be identified. It's making it difficult.
In addition, even if it is successful, the insertion direction of the connector 60 made of anisotropic conductive rubber is not constant, so if the insertion direction of the anisotropic conductive rubber connector is not the same for the second and subsequent units, a short circuit will occur. Since the exponent pattern changes, if a similar tampering action is performed, the value of the logical product will change and the tampering action can be detected.

Next, with reference to FIG. 8, the operation of tamper-resistant control in the information processing apparatus configured as described above will be described.
Step SP1
A tampering action is performed, that is, an action such as inserting a pin or the like into a portion protected by the first board 20, the second board 40, and the connector 60, and the first board 20 is tampered with. , the detection conductor pattern 75 provided on the second substrate 40 and the conductive layer 63 of the anisotropic conductive rubber wall 61 constituting the connector 60 are cut, or the detection conductor pattern 75, the conductive layer 63, etc. When a conductor to which a predetermined voltage is applied comes into contact with the pin or the like and is short-circuited to the ground GND, the information processing device according to one embodiment starts tamper-proofing processing.
Step SP2
The signal level of the detection patterns 11 and 31 to which a predetermined voltage is applied by the battery 74 changes.
Step SP3
It is determined whether or not the information processing device is powered on. If the information processing device is not powered on, the process proceeds to step SP4; if the information processing device is powered on, the process proceeds to step SP5.
Step SP4
When the power is not turned on, the detection by the holding circuit 71 is held by the battery 74.
Step SP5
It is determined whether the signal held by the holding circuit 71 has switched from the initial output H to L, and if the signal has been switched, it is determined that tampering has been performed, and a predetermined process, for example, is stored in the memory 73. It performs processing such as erasing or invalidating information that has been tampered with, displaying the presence of a tamper by outputting sound or light, and notifying higher-level information devices.

In one embodiment, when someone tampers the electronic device with this configuration, the detection conductor patterns 75 on the first substrate 20 and the second substrate 40 are short-circuited or disconnected. Furthermore, when a tampering action is performed on the connector 60 between the first substrate 20 and the second substrate 40, the conductive layer 63 of the anisotropic conductive rubber constituting the connector 60 may be short-circuited or disconnected. occurs. Then, due to the short circuit or disconnection, the output signal level of the logic element 77, which is connected to the detection patterns 11 and 31 and which is part of the holding circuit 71, changes from high to low level, thereby detecting the occurrence of tampering. It is possible to prevent information from being tampered with or leaked by, for example, deleting confidential information.

As explained above, the information processing device of one embodiment has the effects described below.
The first effect is that tampering of the space surrounded by the board and connector can be detected.
The second effect is that by enclosing the area to be protected from tampering using an anisotropic conductive rubber connector and providing a conductor pattern for tamper detection on the board, tampering between boards can be prevented.
The third effect is that the direction of conduction of the conductive pattern of the anisotropic conductive rubber connector is diagonal, which makes it more difficult to puncture the insulation with a thin needle-like object from the side or short the foot pattern. The goal is to further improve tamper resistance.

The configurations of the first substrate, the second substrate, the shapes of the conductor patterns mounted thereon, the conductive direction of the anisotropic conductor rubber, the thickness of each layer, arrangement, etc. are not limited to the one embodiment. .
Furthermore, although one embodiment of the present invention has been described in detail with reference to the drawings, the specific configuration is not limited to this embodiment, and may include design changes within the scope of the gist of the present invention.

INDUSTRIAL APPLICATION This invention can be utilized as a countermeasure against tampering of an information processing device.

1 First conductor pattern 2 First substrate 3 Second conductor pattern 4 Second substrate 5 Conductive layer 6 Side wall portion 7 Electric circuit 20 (First) substrate 40 (Second) substrates 10, 30 (GND ) Patterns 11, 31 (For detection) Pattern 60 Connector 61 Anisotropic conductive rubber wall 62 Insulating layer 63 Conductive layer 64 Conductive part 64A GND connection part 64B Detection connection part 65 Insulation part 71 Holding circuit 72 CPU
73 Memory 74 Battery 75 Detection conductor pattern 76 Jumper wire 77 Logic element

Claims (3)

a first substrate having a first conductor pattern of a predetermined shape on at least one surface of the insulating substrate;
a second substrate disposed opposite to the one surface of the first substrate and comprising a second conductor pattern at a position shifted along the one surface with respect to the first conductor pattern;
a conductive layer that electrically connects the first conductor pattern and the second conductor pattern ;
a side wall portion disposed between the first substrate and the second substrate to mechanically connect them to each other;
An electric circuit provided in a region surrounded by the first substrate, the second substrate, and the side wall portion;
has
The positions of the end of the conductive layer on the first conductor pattern side and the end of the conductive layer on the second conductor pattern side are shifted along the one surface,
The conductive layer included in the side wall portion is arranged obliquely when viewed in a direction along one surface of the first substrate,
The first substrate includes a third conductor pattern insulated with respect to the first conductor pattern,
The second substrate is insulated from the second conductor pattern, and has a fourth conductor disposed offset from the first conductor pattern and the third conductor pattern along the one surface. with a pattern,
The conductive layer includes a first conductive layer connecting the first conductive pattern and the second conductive pattern, and a second conductive layer connecting the third conductive pattern and the fourth conductive pattern. , an insulating layer interposed between the first conductive layer and the second conductive layer,
At least one of the first substrate and the second substrate includes a detection conductor pattern connected to at least one of the third conductor pattern and the fourth conductor pattern,
The detection conductor pattern has a shape that is bent multiple times within a plane including at least one of the first substrate and the second substrate, and has an outer shape of a conductor that may be inserted into the detection conductor pattern. placed at smaller intervals,
Information processing device. The first conductive layer, the second conductive layer, and the insulating layer are arranged obliquely when viewed in a direction along one surface of the first substrate.
The information processing device according to claim 1 . The electric circuit is a logic circuit that detects the presence or absence of conduction between the first conductive layer and the second conductive layer.
The information processing device according to claim 1 or 2 .

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