JP7406449B2 - motor drive device - Google Patents

Description

The present invention relates to a motor drive device.

The three-phase brushless motor drive device disclosed in Patent Document 1 is a current detector that detects the DC bus current of an inverter, and includes a shunt resistor connected in series between the lower arm of each phase and the ground; the current detector including a detection circuit including an operational amplifier; a control unit that inputs the output of the current detector to detect the phase current of each phase, and uses the detected phase current to perform PWM control of the inverter; Equipped with

Japanese Patent Application Publication No. 2017-163789

By the way, in a motor drive device that is equipped with a detection circuit that detects the DC bus current of an inverter and detects the phase current of each phase from the detected value of the DC bus current, if the detection circuit breaks down and the phase current cannot be detected, , it becomes impossible to continue drive control of the motor.
For example, in the case of a motor drive device that generates steering assist torque in a vehicle's power steering system, if the motor drive control becomes impossible due to a failure in the detection circuit, the motor no longer generates assist torque, and the driver A problem arises in that the operability of the steering wheel is reduced.

The present invention was made in view of the conventional situation, and its purpose is to continue motor control as much as possible even if a failure occurs in a detection circuit that detects the DC bus current of an inverter. , to provide a motor drive device.

Therefore, as one aspect of the motor drive device according to the present invention, an inverter that supplies alternating current power to a three-phase brushless motor is connected in series between the inverter and ground to detect the direct current bus current of the inverter. a shunt resistor connected to the shunt resistor, a first detection circuit that detects a potential difference between both ends of the shunt resistor, a second detection circuit that detects a potential difference between both ends of the shunt resistor, and a second detection circuit that detects a potential difference between both ends of the shunt resistor. 3 detection circuit, and a control unit that controls the inverter by converting the output of the first detection circuit, the output of the second detection circuit, and the output of the third detection circuit from analog to digital and reading the output . In addition, in the motor drive device, the control unit includes a first analog-to-digital conversion circuit that converts an output from the first detection circuit and an output from the second detection circuit from analog to digital, and the second detection circuit. and a second analog-to-digital conversion circuit that performs analog-to-digital conversion of the output of the first analog-to-digital converter and the output of the third detection circuit; A comparison process is performed to compare the analog-to-digital converted output by the analog-to-digital conversion circuit of No. 2, and based on the determination result of match or mismatch in the comparison process, the first detection circuit and the second detection circuit A detection circuit other than the detection circuit determined to be faulty among the first detection circuit, the second detection circuit, and the third detection circuit; The inverter is controlled based on the output of the detection circuit.

According to the above invention, even if a failure occurs in the detection circuit that detects the DC bus current of the inverter, motor control can be continued as much as possible.

FIG. 2 is a circuit diagram showing one aspect of a drive device for a three-phase brushless motor. FIG. 2 is a block diagram showing one aspect of PWM control of a three-phase brushless motor. FIG. 2 is a circuit diagram showing details of a detection circuit that detects a DC bus current of an inverter. 3 is a flowchart showing a procedure for diagnosing a failure of a detection circuit. FIG. 3 is a diagram showing a correlation between a comparison pattern of outputs of a detection circuit and a failure determination result.

Embodiments of the present invention will be described below.
FIG. 1 is a circuit diagram showing one embodiment of a three-phase brushless motor 100 and a motor drive device 200.

The three-phase brushless motor 100 is, for example, a motor that generates steering assist torque in an electric power steering device for a vehicle.
A motor drive device 200 that drives the three-phase brushless motor 100 includes a drive circuit 210 and a control section 220.

The control unit 220 includes an analog-to-digital conversion circuit 221 (hereinafter referred to as AD conversion circuit 221) and a microcomputer 222, and the microcomputer 222 includes a microprocessor such as a CPU, and memory such as ROM and RAM. have a device.
The three-phase brushless motor 100 includes star-connected three-phase windings 101u, 101v, and 101w of U-phase, V-phase, and W-phase in a cylindrical stator (not shown), formed in the center of the stator. A rotor 102 made of a permanent magnet is rotatably provided in the space.

The drive circuit 210 includes an inverter 213 in which switching elements 212a to 212f including antiparallel diodes 211a to 211f are connected in a 3-phase bridge, and a DC power supply circuit 214. Supply electricity.
The switching elements 212a-212f of the inverter 213 are, for example, FETs, and each gate terminal of the switching elements 212a-212f is connected to an output port of the control unit 220.
Then, the switching elements 212a-212f are switched between the on state and the off state in accordance with the gate signals that the control unit 220 outputs to the respective gate terminals of the switching elements 212a-212f.

The control unit 220 controls the on/off state of the switching elements 212a to 212f of the inverter 213 by, for example, PWM (Pulse Width Modulation) using a triangular wave comparison method, thereby controlling the voltage applied to the three-phase brushless motor 100.
In triangular wave comparison type PWM control, by comparing the triangular wave with a PWM timer set according to the command duty ratio, the timing for switching on/off of each switching element 212a to 212f, in other words, the switching element The rise and fall timings of PWM pulses, which are gate signals 212a to 212f, are detected.

In addition, the control unit 220 controls the lower arm (switching elements 212b, 212d, 212f) of each phase in response to the PWM pulse that controls the on/off of the upper arm (switching elements 212a, 212c, 212e) of each phase of the inverter 213. The switching elements 212a to 212f of the inverter 213 are PWM-controlled by a complementary method in which the PWM pulses that control the on/off of the inverter 213 are of opposite phase.
In the above complementary method, when the PWM pulse that controls the on/off of the upper arm of one phase is high at logic level, the PWM pulse that controls the on/off of the lower arm of the same phase is low at logic level, When the upper arms of all phases are on, the lower arms of all phases are turned off, and when the lower arms of all phases are on, the upper arms of all phases are turned off.

The motor drive device 200 also includes a shunt resistor 230 connected in series between the lower arm of each phase (switching elements 212b, 212d, 212f) and the ground (ground side) of the power supply circuit 214, and both ends of the shunt resistor 230. and a detection circuit 240 (current detection amplifier) that detects the potential difference between the two.
The DC bus current of the inverter 213 is detected by the shunt resistor 230 and the detection circuit 240, and the combination of the shunt resistor 230 and the detection circuit 240 constitutes a bus current detection section 250 that detects the DC bus current of the inverter 213.

The voltage analog signal output by the detection circuit 240 is converted into a digital signal indicating a voltage value by the AD conversion circuit 221 of the control unit 220, and the microcomputer 222 reads the digital signal output by the AD conversion circuit 221.
The microcomputer 222 determines the three-phase command voltages Vu, Vv, and Vw using, for example, a vector control method based on the rotor position and the command torque, and performs PWM control on the inverter 213 based on the command voltages.

The microcomputer 222 detects the phase current of each phase based on the detection value of the detection circuit 240, that is, the detection value of the DC bus current of the inverter 213, and performs vector control using the detected phase current.
In other words, the microcomputer 222 uses the fact that the output of the detection circuit 240 (in other words, the DC bus current) indicates the phase current of one phase due to the combination of PWM pulses of each phase. The phase current is detected based on the output of the detection circuit 240.

For example, if the upper arm of the U phase (switching element 212a) is on and the upper arms of the V and W phases (switching element 212c and switching element 212e) are both off, the current flowing in the U phase will The detection circuit 240 detects the U-phase phase current Iu.
That is, in a PWM pulse combination state in which one of the upper arms (switching elements 212a, 212c, 212e) of each phase is on and the other two are off, the detection circuit 240 detects that the upper arm is controlled to be on. The phase current of one phase will be detected.

For example, if the upper arms of the U phase and V phase (switching element 212a and switching element 212c) are both on, and the upper arm of the W phase (switching element 212e) is off, the current flowing to the U phase and The currents flowing in the V phase merge and flow in the W phase, and the detection circuit 240 detects the W phase phase current Iw.
That is, in a PWM pulse combination state in which two of the upper arms (switching elements 212a, 212c, 212e) of each phase are on and the other is off, the detection circuit 240 detects that the upper arm is controlled to be off. The phase current of one phase is detected.

In this way, in the PWM pulse combination state where one or two of the upper arms of each phase are on, the output of the detection circuit 240 represents the phase current of one phase determined by the PWM pulse combination pattern. become.
Therefore, the microcomputer 222 uses such characteristics to detect the phase current of each phase from the output of the detection circuit 240, and uses the detected phase current for PWM control.

FIG. 2 is a block diagram of the microcomputer 222, and shows the function of setting processing of three-phase command voltages Vu, Vv, and Vw using a vector control method.
In FIG. 2, the phase current detection unit 501 detects the phase current of each phase based on the value obtained by A/D converting the output of the detection circuit 240 by the AD conversion circuit 221, in other words, based on the digital value of the DC bus current of the inverter 213. Detect Iu, Iv, and Iw.

As described above, the phase current detection unit 501 defines the PWM pulse period in which one or two of the upper arms of each phase are on as a phase current detection period, and also determines which phase's upper arm is on. One phase in which a phase current is detected in the phase current detection section is identified based on the phase current detection section.
Then, the phase current detection unit 501 sets the phase current detection timing within the phase current detection period, in other words, the sampling timing of the A/D converted value of the output of the detection circuit 240, and at this phase current detection timing, the detection circuit The output of 240 is sampled, and the current value obtained from the sampled value is set as the phase current detection value of the phase specified as the detection target at that time.
Note that when the phase current detection unit 501 detects the phase current of two phases based on the detected value of the DC bus current of the inverter 213, the sum of the phase currents becomes zero, and uses this to calculate the phase current of the remaining one phase. It can be determined by calculation.

The angle/angular velocity calculation unit 502 estimates the motor angle (magnetic pole position) and angular velocity (motor rotation speed).
Here, when the microcomputer 222 performs PWM control on the 3-phase brushless motor 100 using a sensorless drive method, the angle/angular velocity calculation unit 502 estimates the rotor position based on the back electromotive force of the 3-phase brushless motor 100 and calculates the estimated rotor position. The angular velocity of the three-phase brushless motor 100 is determined based on the rotor position.

On the other hand, when the 3-phase brushless motor 100 has a magnetic pole position sensor, the angle/angular velocity calculation unit 502 detects the rotor position from the output of the magnetic pole position sensor, and based on the detected rotor position, the 3-phase brushless motor 100 Find the angular velocity.
Furthermore, the three-phase to two-axis converter 503 converts the phase currents Iu, Iv, and Iw detected by the phase current detection unit 501 into a two-axis rotating coordinate system (dq (coordinate system) into actual currents Id and Iq.

The vector control unit 504 receives the d-axis command current and q-axis command current according to the command torque, the angular velocity calculated by the angle/angular velocity calculation unit 502, and the actual currents Id and Iq determined by the 3-phase-2-axis converter 503. is input.
Then, the vector control unit 504 determines command voltages Vq, Vd in the dq coordinate system based on the d-axis command current, the q-axis command current, the angular velocity, and the actual currents Id, Iq in the dq coordinate system. The system command voltages Vq and Vd are output to the two-axis to three-phase converter 505.

The two-axis to three-phase converter 505 converts the command voltages Vq and Vd in the dq coordinate system output from the vector control unit 504 into three-phase command voltages Vu, Vv, and Vw, and outputs the three-phase command voltages Vu, Vv, and Vw to the PWM modulation unit 506.
The PWM modulator 506 generates three-phase commands as modulated waves for the rise timing and fall timing of a switching gate waveform (PWM pulse) for driving the switching elements (upper arm and lower arm) of each phase of the inverter 213. The switching gate waveform is determined by comparing the voltages Vu, Vv, and Vw with the triangular wave carrier.

Then, the PWM modulation section 506 outputs the generated switching gate waveform to the control terminal (gate terminal) of each switching element 212a to 212f of the inverter 213.
Here, the PWM modulation unit 506 compares the U-phase command voltage Vu and the triangular wave carrier, and when the U-phase command voltage Vu is larger than the triangular wave carrier, drives the U-phase upper arm (switching element 212a). The switching gate waveform for driving the upper arm of the U phase is set to a low level as a logic level when the U-phase command voltage Vu is smaller than the triangular wave carrier.

Furthermore, the PWM modulator 506 uses the inverted signal of the switching gate waveform for driving the U-phase upper arm (switching element 212a) as the switching gate waveform for driving the U-phase lower arm (switching element 212b). generate.
Similarly, the PWM modulator 506 generates a switching gate waveform for driving the upper and lower arms of the V phase (switching elements 212c and 212d), and a switching gate waveform for driving the upper and lower arms of the W phase (switching elements 212e and 212f). Generate switching gate waveforms.

FIG. 3 is a circuit diagram showing details of the detection circuit 240 and the AD conversion circuit 221.
In the motor drive device 200, a detection circuit 240 that detects the potential difference between both ends of the shunt resistor 230 (in other words, the DC bus current of the inverter 213), and an AD conversion circuit 221 that converts the analog output of the detection circuit 240 into a digital signal. are each made redundant.

Specifically, the detection circuit 240 has a first detection circuit 240a, a second detection circuit 240b, and a third detection circuit 240c, and each detection circuit 240a, 240b, 240c has a Detect potential difference.
Further, the AD conversion circuit 221 includes a first AD conversion circuit 221a and a second AD conversion circuit 221b, and the first AD conversion circuit 221a receives the analog output of the first detection circuit 240a and the second detection circuit 240b. The second AD conversion circuit 221b converts the analog output of the second detection circuit 240b and the analog output of the third detection circuit 240c into digital signals.
That is, the analog output of the second detection circuit 240b is converted into a digital signal by both the first AD conversion circuit 221a and the second AD conversion circuit 221b, respectively.

Here, the microcomputer 222 compares the outputs of the respective detection circuits 240a, 240b, 240c, determines which of the detection circuits 240a, 240b, 240c is malfunctioning, and determines which of the detection circuits 240a, 240b, 240c Among them, phase currents are detected based on the outputs of detection circuits other than the detection circuit determined to be malfunctioning, and the inverter 213 is controlled based on the detected phase currents.
Note that the motor drive device 200 includes a CR low-pass filter on the output side of each detection circuit 240a, 240b, and 240c, and the first AD conversion circuit 221a and the second AD conversion circuit 221b are analog converters that have passed through the CR low-pass filter. Convert a signal into a digital signal.

FIG. 4 is a flowchart showing the procedure of failure diagnosis of the detection circuits 240a, 240b, and 240c by the microcomputer 222.
In the following, the output of the first detection circuit 240a converted into a digital signal by the first AD conversion circuit 221a will be referred to as SO1, and the output of the second detection circuit 240b converted into a digital signal by the first AD conversion circuit 221a will be referred to as SO1. SO2 (0), the output of the second detection circuit 240b converted into a digital signal by the second AD conversion circuit 221b, SO2 (1), the third detection converted into a digital signal by the second AD conversion circuit 221b. The output of the circuit 240c is assumed to be SO3.

In step S701 (first comparison process), the microcomputer 222 compares the output SO1 of the first detection circuit 240a and the output SO2(1) of the second detection circuit 240b, and determines whether the two outputs match or do not match.
The microcomputer 222 outputs SO1 and SO2(1) when the absolute value of the deviation between the output SO1 of the first detection circuit 240a and the output SO2(1) of the second detection circuit 240b is less than a threshold value (threshold value>0). ) are determined to match, and when the absolute value of the deviation is greater than or equal to the threshold value, it is determined that the output SO1 and the output SO2(1) do not match.
Note that the microcomputer 222 makes the same determinations as in step S701 in determining whether or not they match in steps S703 and S705, which will be described later.

When the microcomputer 222 determines in step S701 that the output SO1 of the first detection circuit 240a and the output SO2(1) of the second detection circuit 240b do not match, it raises the failure flag FA in step S702 and then ( Failure flag FA=1), the process advances to step S703.
On the other hand, if the microcomputer 222 determines in step S701 that the output SO1 of the first detection circuit 240a and the output SO2(1) of the second detection circuit 240b match, the microcomputer 222 bypasses step S702 and proceeds to step S703. move on.
Note that the initial value of the failure flag FA is zero, and the initial values of failure flags FB and FC, which will be described later, are also zero.

In step S703 (second comparison process), the microcomputer 222 compares the output SO2(0) of the second detection circuit 240b and the output SO3 of the third detection circuit 240c, and determines whether the two outputs match or do not match.
Then, when the microcomputer 222 determines in step S703 that the output SO2(0) and the output SO3 do not match, the microcomputer 222 raises the failure flag FB in step S704 (failure flag FB=1), and then proceeds to step S705. move on.
On the other hand, if the microcomputer 222 determines in step S703 that the output SO2(0) and the output SO3 match, the microcomputer 222 bypasses step S704 and proceeds to step S705.

In step S705 (third comparison process), the microcomputer 222 compares the output SO1 of the first detection circuit 240a and the output SO3 of the third detection circuit 240c, and determines whether the two outputs match or do not match.
If the microcomputer 222 determines in step S705 that the output SO1 and output SO3 do not match, it raises the failure flag FC in step S706 (failure flag FC=1), and then proceeds to step S707.
On the other hand, if the microcomputer 222 determines in step S705 that the output SO1 and the output SO3 match, the microcomputer 222 bypasses step S706 and proceeds to step S707.

In step S707, the microcomputer 222 enters a state in which the failure flag FA, failure flag FB, and failure flag FC are all set to zero (failure flag FA=0, failure flag FB=0, and failure flag FC). =0).
If the failure flag FA, failure flag FB, and failure flag FC are all zero, the microcomputer 222 proceeds to step S708 and sets the first detection circuit 240a, the second detection circuit 240b, and the third detection circuit 240c. Determine that everything is normal.
When the first detection circuit 240a, the second detection circuit 240b, and the third detection circuit 240c are all normal, the microcomputer 222 uses any of the outputs SO1, SO2(0), SO2(1), and SO3. detects the phase current and controls the inverter 213.

On the other hand, the microcomputer 222 determines in step S707 that all of the failure flag FA, failure flag FB, and failure flag FC are not zero. In other words, at least one of the failure flag FA, failure flag FB, and failure flag FC is If it is determined that it is standing up, the process advances to step S709.
In step S709, the microcomputer 222 determines whether the failure flag FA=1, the failure flag FB=0, and the failure flag FC=1.

If the failure flag FA=1, the failure flag FB=0, and the failure flag FC=1, the microcomputer 222 proceeds to step S710 and determines the failure of the first detection circuit 240a (abnormality of the output SO1), while It is determined whether the second detection circuit 240b and the third detection circuit 240c are normal (the outputs SO2(0), SO2(1), and SO3 are normal).
At this time, the microcomputer 222 detects the phase current using one of the outputs SO2(0), SO2(1), and SO3, and controls the inverter 213.

If the microcomputer 222 determines in step S709 that the failure flag FA=1, failure flag FB=0, and failure flag FC=1 do not hold, the microcomputer 222 proceeds to step S711.
In step S711, the microcomputer 222 determines whether the failure flag FA=1, the failure flag FB=1, and the failure flag FC=0.

If the failure flag FA=1, the failure flag FB=1, and the failure flag FC=0, the microcomputer 222 proceeds to step S712, and detects the failure of the second detection circuit 240b (outputs SO2(0), SO2(1)). On the other hand, it is determined whether the first detection circuit 240a and the third detection circuit 240c are normal (outputs SO1 and SO3 are normal).
At this time, the microcomputer 222 detects the phase current using either the output SO1 or SO3 and controls the inverter 213.

If the microcomputer 222 determines in step S711 that the failure flag FA=1, failure flag FB=1, and failure flag FC=0 do not hold, the microcomputer 222 proceeds to step S713.
In step S713, the microcomputer 222 determines whether the failure flag FA=0, the failure flag FB=1, and the failure flag FC=1.

If the failure flag FA=0, the failure flag FB=1, and the failure flag FC=1, the microcomputer 222 proceeds to step S714 and determines a failure of the third detection circuit 240c (abnormality of the output SO3). It is determined whether the first detection circuit 240a and the second detection circuit 240b are normal (the outputs SO1, SO2(0), and SO2(1) are normal).
At this time, the microcomputer 222 detects the phase current using one of the outputs SO1, SO2(0), and SO2(1), and controls the inverter 213.

Further, if the microcomputer 222 determines in step S713 that the failure flag FA=0, failure flag FB=1, and failure flag FC=1 are not established, the microcomputer 222 proceeds to step S715, and the first detection circuit 240a and the It is determined that two or more of the second detection circuit 240b and the third detection circuit 240c are out of order.
In this case, the microcomputer 222 identifies the normal output of the DC bus current detection outputs of the inverter 213 and determines that it is in a state where it cannot be used for phase current detection. Control is shifted to a fail-safe mode that includes stopping the motor.

Figure 5 shows the comparison patterns (first to third comparison processing) of outputs SO1, SO2 (0), SO2 (1), and SO3, and the failure states identified according to the match/mismatch judgment results in each comparison. The detection circuit is shown.
If the output SO1 and the output SO2 (1) do not match, the output SO2 (0) and the output SO3 match, and the output SO1 and the output SO3 do not match, the microcomputer 222 outputs the output SO1 (the first detection circuit). 240a).
If the output SO1 and the output SO2(1) do not match, there is a possibility that one of them is malfunctioning, but the microcomputer 222 cannot determine which one is malfunctioning.
However, if the output SO2 (0) and the output SO3 match and the output SO1 and the output SO3 do not match, the microcomputer 222 determines that each comparison result is a failure state of the output SO1 (first detection circuit 240a). It is possible to identify the failure of the output SO1 (first detection circuit 240a) based on the pattern shown in FIG.

Further, if output SO1 and output SO2 (1) do not match, output SO2 (0) and output SO3 do not match, and output SO1 and output SO3 match, the microcomputer 222 outputs 2 detecting circuit 240b).
Furthermore, when output SO1 and output SO2 (1) match, output SO2 (0) and output SO3 do not match, and output SO1 and output SO3 do not match, the microcomputer 222 outputs output SO3 (third A failure of the detection circuit 240c) is determined.

As described above, when one of the three detection circuits 240a, 240b, and 240c fails, the microcomputer 222 identifies the failed detection circuit and controls the inverter 213 based on the output of the normal detection circuit. In other words, drive control of the three-phase brushless motor 100 can be continued.
Therefore, if the three-phase brushless motor 100 is, for example, a motor that generates steering assist torque in an electric power steering device of a vehicle, even if one of the detection circuits 240a, 240b, and 240c fails, normal detection will not occur. The three-phase brushless motor 100 can be drive-controlled using the output of the circuit to continue generating assist torque, and it is possible to prevent the steering performance by the driver from deteriorating.

In addition, the microcomputer 222 converts the voltage data converted into a digital signal by the first AD conversion circuit 221a and the voltage data converted into a digital signal by the second AD conversion circuit 221b in steps S701, S703, and S705 of FIG. Compare with the voltage data obtained.
Therefore, for example, even if the output SO1 and the output SO2 (0) become abnormal values at the same level due to a failure of the first AD conversion circuit 221a, an erroneous match determination is prevented, and the microcomputer 222 proceeds to step S715, where it is possible to determine failure of two or more detection circuits and implement fail-safe control.

The technical ideas described in the above embodiments can be used in combination as appropriate, as long as there is no contradiction.
Further, although the content of the present invention has been specifically explained with reference to preferred embodiments, it is obvious that those skilled in the art can make various modifications based on the basic technical idea and teachings of the present invention. It is.

DESCRIPTION OF SYMBOLS 100... Three-phase brushless motor, 200... Motor drive device, 210... Drive circuit, 213... Inverter, 220... Control part, 221... AD conversion circuit, 221a... First AD conversion circuit, 221b... Second AD conversion circuit , 222... Microcomputer, 230... Shunt resistor, 240... Detection circuit, 240a... First detection circuit, 240b... Second detection circuit, 240c... Third detection circuit

Claims (4)

an inverter that supplies AC power to a three-phase brushless motor;
a shunt resistor connected in series between the inverter and ground to detect the DC bus current of the inverter;
a first detection circuit that detects a potential difference between both ends of the shunt resistor;
a second detection circuit that detects a potential difference between both ends of the shunt resistor;
a third detection circuit that detects a potential difference between both ends of the shunt resistor;
a control unit that reads the output of the first detection circuit, the second detection circuit, and the third detection circuit after analog-to-digital conversion , and controls the inverter;
A motor drive device comprising:
The control unit includes:
a first analog-digital conversion circuit that converts the output of the first detection circuit and the output of the second detection circuit from analog to digital;
a second analog-digital conversion circuit that converts the output of the second detection circuit and the output of the third detection circuit from analog to digital;
Equipped with
Performing a comparison process of comparing an output converted from analog to digital by the first analog-to-digital conversion circuit and an output converted from analog to digital by the second analog-to-digital conversion circuit,
Based on the match or mismatch determination result in the comparison process, determine which detection circuit is faulty among the first detection circuit, the second detection circuit, and the third detection circuit;
controlling the inverter based on the output of a detection circuit other than the detection circuit determined to be malfunctioning among the first detection circuit, the second detection circuit, and the third detection circuit;
Motor drive device. The motor drive device according to claim 1,
As the comparison process, the control unit includes:
Compare the output of the first detection circuit that has been analog-to-digital converted by the first analog-to-digital conversion circuit and the output of the second detection circuit that has been analog-to-digital converted by the second analog-to-digital conversion circuit. a first comparison process;
Compare the output of the second detection circuit that has been analog-to-digital converted by the first analog-to-digital conversion circuit and the output of the third detection circuit that has been analog-to-digital converted by the second analog-to-digital conversion circuit. a second comparison process;
The output of the first detection circuit, which has been analog-to-digital converted by the first analog-to-digital conversion circuit, is compared with the output of the third detection circuit, which has been analog-to-digital converted by the second analog-to-digital conversion circuit. a third comparison process;
carry out,
Motor drive device. The motor drive device according to claim 2,
The control unit includes:
When the first comparison process determines whether the two outputs match, the second comparison process determines whether the two outputs match, and the third comparison process determines whether the two outputs match, the first detection circuit Determine the failure,
When the first comparison process determines whether the two outputs match, the second comparison process determines whether the two outputs match, and the third comparison process determines whether the two outputs match, the second detection circuit Determine the failure,
When the first comparison process determines whether the two outputs match, the second comparison process determines whether the two outputs match, and the third comparison process determines whether the two outputs match, the third detection circuit Determine failure,
Motor drive device. The motor drive device according to claim 2,
The control unit includes:
When the first comparison process determines whether the two outputs match, the second comparison process determines whether the two outputs match, and the third comparison process determines whether the two outputs match, the first detection circuit Determine the failure,
When the first comparison process determines whether the two outputs match, the second comparison process determines whether the two outputs match, and the third comparison process determines whether the two outputs match, the second detection circuit Determine the failure,
When the first comparison process determines whether the two outputs match, the second comparison process determines whether the two outputs match, and the third comparison process determines whether the two outputs match, the third detection circuit Determine the failure,
When the first comparison process determines whether both outputs match, the second comparison process determines whether both outputs match, and the third comparison process determines whether both outputs match, the first detection circuit; determining that all of the second detection circuit and the third detection circuit are normal;
While controlling the inverter based on the output of a detection circuit other than the detection circuit determined to be malfunctioning among the first detection circuit, the second detection circuit, and the third detection circuit,
determining that two or more of the first detection circuit, the second detection circuit, and the third detection circuit are out of order when neither of the matching and non-matching patterns apply; Shifting control of the three-phase brushless motor to a fail-safe mode;
Motor drive device.