JP7393876B2 - Symbol power tracking amplification system and wireless communication device including the same - Google Patents

Description

The present invention relates to a symbol power tracking amplification system, and more particularly to a symbol power tracking amplification system that supports symbol power tracking modulation technology and a wireless communication device including the same.

Wireless communication devices such as smartphones, tablets, and IoT (internet of things) devices use WCDMA (registered trademark) (wideband code division multiple access) (third generation (3G)) technology and LTE (registered trademark) technology for high-speed communication. trademark) (long-term evolution) and LTE advanced (4th generation (4G)) technology. As communication technology develops, higher PAPR (peak-to-average ratio) and higher bandwidth are required for transmitted and received signals. The efficiency of the amplifier becomes low. At high PAPR and high bandwidth, average power tracking (APT) and envelope tracking (ET) modulation techniques are used to improve the efficiency of power amplifiers. Envelope tracking modulation techniques can be used to improve the efficiency and linearity of power amplifiers. A chip that supports the average power tracking technique and the envelope tracking modulation technique is called an envelope modulator (SM).

However, recently, research on 5th generation communication (hereinafter referred to as 5G communication) technology has been progressing, and along with this, 5G communication technology is being developed that is suitable for high-speed data communication that is even faster than 4th generation communication technology. Power tracking modulation techniques are required.

Special Publication No. 2005-513943

The present invention has been made in view of the above-mentioned conventional technology, and an object of the present invention is to provide a power tracking modulation technology suitable for 5G communication, and to improve the efficiency of power consumed for amplification and communication performance. An object of the present invention is to provide a symbol power tracking amplification system and a wireless communication device including the same.

A symbol power tracking amplification system according to one aspect of the present invention made to achieve the above object is a symbol power tracking amplification system that supports symbol power tracking modulation, and is a symbol power tracking amplification system that supports symbol power tracking modulation. generates a first supply voltage and a second supply voltage based on a power amplifier to amplify and a symbol tracking signal received from the outside, and generates the first supply voltage and the second supply voltage for each symbol group section corresponding to a symbol group unit including at least one symbol. and a symbol tracking modulator that alternately selects the first supply voltage and the second supply voltage to provide the power amplifier with a supply voltage whose level can be changed for each symbol group interval.

A wireless communication device according to one aspect of the present invention made to achieve the above object includes a power amplifier that amplifies an RF signal, a symbol tracking modulator that provides a supply voltage to the power amplifier, and a wireless communication device that amplifies the RF signal. a modem that provides the symbol tracking modulator with a symbol tracking signal and a trigger signal that correspond to each symbol group including one symbol; The above supply voltages are generated, and one of the supply voltages is selected and provided to the power amplifier for each symbol group interval based on the symbol group unit based on the trigger signal. shall be.

A recording medium according to an aspect of the present invention made to achieve the above object is a computer-readable recording medium storing a program for generating a signal necessary for symbol power tracking modulation, the recording medium comprising: The signal generation step includes a step of dividing a data signal corresponding to an RF signal into a plurality of symbol groups based on a symbol group unit containing at least one symbol, and a step of dividing the data signal corresponding to the RF signal into a plurality of symbol groups, based on a symbol group unit containing at least one symbol, and dividing the data signal corresponding to the RF signal into a plurality of symbol groups. The method may include the steps of generating a symbol tracking signal based on the size, and generating a trigger signal corresponding to the symbol group.

According to the present invention, communication performance between a wireless communication device and a base station can be improved by outputting an RF output signal that directly reflects the signal pattern of an RF signal.

FIG. 1 is a block diagram schematically illustrating a wireless communication device according to an embodiment of the present invention. FIG. 2 is a diagram for explaining an average power tracking technique. FIG. 2 is a diagram for explaining problems with average power tracking technology. FIG. 3 is a diagram for explaining a symbol power tracking modulation technique according to the present invention. FIG. 3 is a diagram for explaining a symbol power tracking modulation technique according to the present invention. FIG. 2 is a block diagram illustrating a symbol tracking modulator according to an embodiment of the invention. FIG. 2 is a block diagram illustrating a symbol tracking modulator according to an embodiment of the invention. FIG. 2 is a circuit diagram illustrating a symbol tracking modulator according to an embodiment of the invention. 6 is a diagram of the signals necessary for the symbol tracking modulator of FIG. 5 to perform its operations; FIG. FIG. 2 is a circuit diagram illustrating a symbol tracking modulator capable of fast charge control according to an embodiment of the present invention. FIG. 2 is a block diagram for explaining the operation of a first charge control circuit that performs first charge control. 1 is a block diagram illustrating a modem according to an embodiment of the invention. FIG. FIG. 2 is a diagram illustrating a 5G-based frame configuration for explaining a method of determining symbol group units based on a 5G frame configuration. 12 is a flowchart for explaining a method for determining symbol group units based on the communication environment. 6 is a diagram of the signals necessary for the symbol tracking modulator of FIG. 5 to perform its operations; FIG. FIG. 2 is a circuit diagram illustrating a symbol tracking modulator according to an embodiment of the invention. 13 is a diagram of the signals necessary for the symbol tracking modulator of FIG. 12 to perform its operations; FIG. 1 is a block diagram illustrating an example implementation of a symbol tracking modulator according to an embodiment of the present invention. FIG. 15 is a circuit diagram showing the first SIMO (single inductor multiple output) converter of FIG. 14. FIG. FIG. 3 is a block diagram illustrating another example of a symbol tracking modulator according to an embodiment of the present invention. FIG. 3 is a block diagram illustrating another example of a symbol tracking modulator according to an embodiment of the present invention. FIG. 1 is a block diagram illustrating a wireless communication device according to an embodiment of the present invention. 1 is a block diagram illustrating a phased array antenna module according to an embodiment of the present invention. FIG. FIG. 6 is a diagram illustrating a symbol power tracking operation using SIDO according to an embodiment of the present invention. FIG. 6 is a diagram illustrating a symbol power tracking operation using SIDO according to an embodiment of the present invention. FIG. 2 is a block diagram illustrating a PMIC equipped with two buck converters supporting a ripple-injected hysteresis control function according to an embodiment of the present invention.

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram schematically showing a wireless communication device according to an embodiment of the present invention.

Referring to FIG. 1, wireless communication device 100 includes a modem 110, a symbol tracking modulator 130, an RF block 150, and a power amplifier (PA) 170. The configuration including symbol tracking modulator 130 and power amplifier 170 is defined as a symbol power tracking amplification system that amplifies an RF signal (RF _IN ) and outputs an RF output signal (RF _OUT ). Modem 110 processes baseband signals transmitted and received by wireless communication device 100. Specifically, modem 110 generates a digital signal, and generates a digital data signal and a digital symbol tracking signal corresponding to the digital data signal from the generated digital signal. At this time, the digital symbol tracking signal is generated from the magnitude (or amplitude component) of the digital data signal. Modem 110 performs digital-to-analog conversion on the digital data signal and the digital symbol tracking signal and provides data signal TX and symbol tracking signal TS_SPT to RF block 150 and symbol tracking modulator 130, respectively. However, the symbol tracking signal TS_SPT provided by the modem 110 to the symbol tracking modulator 130 is not limited to an analog signal, but may be a digital signal.

The data signal TX corresponds to a predetermined frame, and the data signal TX includes a plurality of symbols. The contents regarding the frame will be specifically explained with reference to FIG. The modem 110 according to one embodiment divides the data signal TX into a plurality of symbol groups based on symbol group units including at least one symbol, and divides the data signal TX into a plurality of symbol groups based on the symbol group unit including at least one symbol, and the size (or amplitude) of the symbol included in each symbol group. The symbol tracking signal TS_SPT is generated based on the symbol tracking signal TS_SPT. For example, when a symbol group unit includes only one symbol, the symbol group unit is called a symbol unit, and the modem 110 generates the symbol tracking signal TS_SPT based on the magnitude of each symbol of the data signal TX, Symbol tracking modulator 130 provides a selected supply voltage Vsel that tracks RF signal RF _IN to power amplifier 170 for each symbol period based on symbol tracking signal TS_SPT. In addition, the modem 110 provides the symbol tracking modulator 130 with a trigger signal Trigger_SPT corresponding to each symbol group. The trigger signal Trigger_SPT is a signal for informing the symbol tracking modulator 130 of the start of a new symbol group period. For example, when the symbol group unit includes only one symbol, the trigger signal Trigger_SPT is a signal for notifying the time point at which each symbol of the data signal TX starts.

The modem 110 variously determines (or changes) the number of symbols included in each symbol group, and generates a symbol tracking signal TS_SPT and a trigger signal Trigger_SPT corresponding to each symbol group. A determination method for each symbol group of the modem 110 will be described with reference to FIGS. 7A to 9.

The symbol tracking signal TS_SPT and the trigger signal Trigger_SPT control the symbol tracking modulator 130 to provide the power amplifier 170 with a selected supply voltage Vsel that tracks the RF signal RF _IN for each symbol group interval on a symbol group basis. It is realized in various ways as a signal to do so. The symbol tracking modulator 130 adjusts the voltage of the selected supply voltage Vsel based on the maximum symbol size of the data signal TX for each symbol group corresponding to the symbol tracking signal TS_SPT and the trigger signal Trigger_SPT. A symbol power tracking (SPT) operation is performed to modulate the level.

Symbol tracking modulator 130 modulates the voltage level of selected supply voltage Vsel provided to power amplifier 170 based on symbol tracking signal TS_SPT. Specifically, symbol tracking modulator 130 includes an SPT control circuit 131, a voltage supply 133, and a switch circuit 135. In one embodiment, the SPT control circuit 131 provides the first control signal SPT_CS1 and the second control signal SPT_CS2 to the voltage supply 133 and the switch circuit 135, respectively, based on the symbol tracking signal TS_SPT and the trigger signal Trigger_SPT received from the modem 110. Provided to.

The voltage supplier 133 uses the power supply voltage V _DD (or battery voltage) to generate at least two supply voltages based on the first control signal SPT_CS1. The voltage levels of these supply voltages are changed by the first control signal SPT_CS1, and the symbol group intervals in which the voltage levels of the respective supply voltages are changed are different. Voltage supplier 133 includes a plurality of output terminals that output respective supply voltages, and each output terminal is coupled to switch circuit 135 .

The switch circuit 135 includes a plurality of switch elements, and selects one of the supply voltages generated by the voltage supply device 133 for each symbol group section corresponding to each symbol group based on the second control signal SPT_CS2. Select. For example, when a symbol group unit includes only one symbol, the switch circuit 135 performs a switching operation to select one of the supply voltages for each symbol period. The voltage supplier 133 changes the voltage level of the remaining supply voltages excluding the supply voltage selected by the switch circuit 135 based on the first control signal SPT_CS1.

RF block 150 up-converts data signal TX to generate RF signal RF _IN . Power amplifier 170 is driven by a selected supply voltage Vsel to amplify the RF signal RF _IN and generate an RF output signal RF _OUT . An RF output signal RF _OUT is provided to the antenna. The selected supply voltage Vsel has a voltage level transition pattern that tracks the data signal TX or RF signal RF _IN on a symbol group basis, as described above.

The symbol tracking modulator 130 according to the present invention performs the amplification operation of the power amplifier 170 to minimize signal pattern distortion of the RF signal RF _IN by performing the symbol power tracking operation. That is, the power amplifier 170 uses the selected supply voltage Vsel to output the RF output signal RF _OUT in which the signal pattern of the RF signal RF _IN is directly reflected, thereby improving the communication performance between the wireless communication device 100 and the base station. improve.

FIGS. 2A and 2B are diagrams for explaining the average power tracking technique and its problems, respectively. In the following, in the LTE (long-term evolution) system, a frame of a data signal includes 10 subframes, and one subframe has two slots. One slot includes seven symbols.

Referring to FIG. 2A, the average power tracking technique modulates the voltage level of the supply voltage V _APT based on the maximum magnitude (or amplitude) of the data signal for each subframe interval. FIG. 2B shows the RF signal RF _IN corresponding to the first subframe period ITV1 to the third subframe period ITV3 of FIG. 2A and the supply voltage (stepped static voltage) V _APT according to the average power tracking technique. Referring to FIG. 2B, in the second subframe interval ITV2, the first symbol S_SB1 of the RF signal RF _IN has the same size as the second symbol S_SB2 of the RF signal RF _IN in the third subframe interval ITV3. , the level of the supply voltage V _APT corresponding to the second sub-frame period ITV2 is different from the level of the supply voltage V _APT corresponding to the third sub-frame period ITV3. In an actual power amplifier, the amplification gain is changed depending on the level of the supply voltage V _APT . This differs from the size of the output signal. In other words, even if the same symbol is provided with supply voltages V _APT of different levels to the power amplifier, it will be amplified with different amplification gains and different results will be output, which may reduce the reliability of communication. there were. In particular, in 5G systems, symbol-by-symbol communication is assumed for high-speed data communication in high frequency bandwidths, but since symbol-by-symbol data accuracy is important, average power tracking modulation technology is being used instead. A power tracking modulation technique is required.

3A and 3B are diagrams illustrating symbol power tracking modulation techniques according to the present invention.

Referring to FIG. 3A, a symbol power tracking modulation technique according to the present invention is implemented using the modem 110 and symbol tracking modulator 130 of FIG. The voltage level of the supply voltage V _SPT is modulated based on the magnitude (or amplitude) of V SPT. The level of the supply voltage V _SPT is changed within a cyclic prefix (CP) interval of a symbol. However, the embodiment shown in FIG. 3A applies when the symbol group unit includes only one symbol, and when the symbol group unit includes multiple symbols, the embodiment shown in FIG. 3A applies to each symbol group section including multiple symbols. Then, the voltage level of the supply voltage V _SPT is modulated based on the maximum magnitude of the data signal.

Referring to FIG. 3B, symbol tracking modulator 130 of FIG. 1 provides a supply voltage V _SPT to power amplifier 170 that tracks the RF signal RF _IN on a symbol-by-symbol basis. As a result, the symbol power tracking amplification system including the symbol tracking modulator 130 and the power amplifier 170 according to the present invention accurately amplifies and outputs the RF signal RF _IN symbol by symbol, thereby improving the communication performance with the base station. It has the effect of improving.

4A and 4B are block diagrams illustrating a symbol tracking modulator according to one embodiment of the invention.

Referring to FIG. 4A, the symbol tracking modulator 200 includes an SPT control circuit 210, a first voltage supply circuit 220, a second voltage supply circuit 230, and a switch circuit 240. The SPT control circuit 210 receives a symbol tracking signal TS_SPT and a trigger signal Trigger_SPT from the modem. The SPT control circuit 210 generates a first voltage level control signal VL_CSa and a second voltage level control signal VL_CSb based on the symbol tracking signal TS_SPT, and provides them to the first voltage supply circuit 220 and the second voltage supply circuit 230, respectively. . Further, the SPT control circuit 210 generates a switching control signal SW_CS based on the trigger signal Trigger_SPT and provides it to the switch circuit 240. The SPT control circuit 210 further includes a timer, and upon receiving information on the number of symbols separately included in each symbol group from the modem, after receiving the trigger signal Trigger_SPT once, the SPT control circuit 210 uses the timer to control the number of symbols. The time corresponding to each group is counted, and a switching control signal SW_CS is periodically generated based on the count result.

The first voltage supply circuit 220 generates a first supply voltage VOUTa based on the first voltage level control signal VL_CSa, and the second voltage supply circuit ₂₃₀ generates a second supply voltage VOUTa based on the second voltage level control signal VL_CSb. Generates a supply voltage V _OUTb . The switch circuit 240 alternately selects the first voltage supply circuit 220 and the second voltage supply circuit 230 for each symbol group period based on the switching control signal SW_CS, and connects the first voltage supply circuit 220 and the second voltage supply circuit 230 to the power amplifier (PA). The first voltage supply circuit 220 changes the level of the first supply voltage V _OUTa based on the first voltage level control signal VL_CSa in the symbol group interval selected by the second voltage supply circuit 230 . Further, the second voltage supply circuit 230 changes the level of the second supply voltage V _OUTb based on the second voltage level control signal VL_CSb in the symbol group interval in which the first voltage supply circuit 220 is selected. Through a scheme as described above, switch circuit 240 provides a selected supply voltage Vsel to a power amplifier (PA) with symbol power tracking modulation.

Referring to FIG. 4B, the symbol tracking signal TS_SPT of FIG. 4A includes a first symbol tracking signal TS_SPT1 and a second symbol tracking signal TS_SPT2. The first symbol tracking signal TS_SPT1 is a signal for controlling the level of the first supply voltage V _OUTa , and the second symbol tracking signal TS_SPT2 is a signal for controlling the level of the second supply voltage V _OUTb . In one embodiment, the SPT control circuit 210 includes a digital-to-analog conversion circuit (212, 214), and the first symbol tracking signal TS_SPT1 and the second symbol tracking signal TS_SPT2 include a digital-to-analog conversion circuit (212, 214). are converted into a first voltage level control signal VL_CSa and a second voltage level control signal VL_CSb, respectively. However, in one embodiment, when the first symbol tracking signal TS_SPT1 and the second symbol tracking signal TS_SPT2 are analog signals, the first symbol tracking signal TS_SPT1 and the second symbol tracking signal TS_SPT2 each have a first voltage level. This signal is the same as the control signal VL_CSa and the second voltage level control signal VL_CSb.

The SPT control circuit 210 receives the first symbol tracking signal TS_SPT1 via the first signal path SP1, routes it to the first voltage supply circuit 220, and routes the first symbol tracking signal TS_SPT1 to the first voltage supply circuit 220 via the second signal path SP2. The symbol tracking signal TS_SPT2 is received and routed to the second voltage supply circuit 230.

To explain the relationship between the first symbol tracking signal TS_SPT1 and the second symbol tracking signal TS_SPT2 for implementing the symbol power tracking modulation technique, the level change timing of the first symbol tracking signal TS_SPT1 is based on the level of the second symbol tracking signal TS_SPT2. The change timing is different. Further, the interval between the level change timing of the first symbol tracking signal TS_SPT1 and the level change timing of the second symbol tracking signal TS_SPT2 corresponds to the length of the symbol group unit. That is, the modem provides multiple symbol tracking signals (TS_SPT1, TS_SPT2) to symbol tracking modulator 200 via multiple signal paths (SP1, SP2).

FIG. 5 is a circuit diagram illustrating a symbol tracking modulator according to one embodiment of the invention.

Referring to FIG. 5, the symbol tracking modulator 300 includes an SPT control circuit 310, a first DC-DC converter 320, a second DC-DC converter 330, a switch circuit 340, and an output capacitor element C _SPT . The first DC-DC converter 320 and the second DC-DC converter 330 support a dynamic voltage scaling (DVS) function. The first DC-DC converter 320 includes a first conversion control circuit 322, a first comparator 324, a plurality of switch elements (SW _C1 , SW _C2 ), an inductor element L _a , and a capacitor element Ca. The second DC-DC converter 330 includes a second conversion control circuit 332, a second comparator 334, a plurality of switch elements (SW _C3 , SW _C4 ), an inductor element L _b , and a capacitor element C _b .

The SPT control circuit 310 provides a first reference voltage V _REFa and a second reference voltage V _REFb to the first comparator 324 and the second comparator 334, respectively, based on the symbol tracking signal TS_SPT. The first comparator 324 receives the first supply voltage V _OUTa of the output node N _a of the first DC-DC converter 320, compares the first reference voltage V _REFa with the first supply voltage V _OUTa , and outputs the comparison result. The first conversion control circuit 322 is provided with the first conversion control circuit 322 . The first conversion control circuit 322 controls the switching operation of the switch elements (SW _C1 , SW _C2 ) based on the comparison result, and the first DC-DC converter 320 controls the first supply voltage corresponding to the first reference voltage V _REFa . A voltage V _OUTa is generated. The second comparator 334 receives the second supply voltage V _OUTb of the output node N _b of the second DC-DC converter 330, compares the second reference voltage V _REFb and the second supply voltage V _OUTb , and outputs the comparison result. The second conversion control circuit 332 is provided with the second conversion control circuit 332 . The second conversion control circuit 332 controls the switching operation of the switch elements (SW _C3 , SW _C4 ) based on the comparison result, and the second DC-DC converter 330 controls the second supply voltage corresponding to the second reference voltage V _REFb . Generates voltage V _OUTb .

The switch circuit 340 includes a plurality of switch elements (SW _a , SW _b ). The first switch element SW _a is connected between the first DC-DC converter 320 and the output node N _OUT (or output end) of the symbol tracking modulator 300, and the second switch element SW _b is connected between the first DC-DC converter 320 and the output node N OUT (or output end) of the symbol tracking modulator 300. It is connected between the DC converter 330 and the output node N _OUT (or output end) of the symbol tracking modulator 300 . The SPT control circuit 310 generates a first switching control signal SW_CS _a and a second switching control signal SW_CS _b based on the trigger signal Trigger_SPT, and provides them to the first switching element SW _a and the second switching element SW _b , respectively. . The switch circuit 340 alternately selects the first supply voltage V _OUTa and the second supply voltage V _OUTb based on the switching control signals (SW_CS _a , SW_CS _b ), and selects the selected supply voltage V sel via the output node N _OUT . (voltage V _SPT of output node N _OUT ) is provided to a power amplifier (PA). In order to prevent a sudden voltage blank during a switching operation through the switch circuit 340, an output capacitor element C _SPT is connected to the output node N _OUT .

FIG. 6 shows a diagram of the signals necessary for the symbol tracking modulator of FIG. 5 to perform its operation. In the following, it is assumed that a symbol group unit includes only one symbol.

Referring to FIGS. 5 and 6, in the first symbol period SB_0 (the period between time "t0" and time "t1"), the SPT control circuit 310 maintains a constant level based on the symbol tracking signal TS_SPT. A first reference voltage V _REFa is provided to the first DC-DC converter 320, and a first switching control signal SW_CSa having a high level is applied to the first switch element based on the trigger signal Trigger_SPT received at time t0. The first supply voltage V _OUTa provided to SW _a and generated by the first DC-DC converter 320 is provided to the power amplifier (PA) as the selected supply voltage Vsel (voltage V _SPT at the output node N _OUT ). In the first symbol interval SB_0, the SPT control circuit 310 provides the second DC-DC converter 330 with a second reference voltage V _REFb whose level is changed at time "ta" based on the symbol tracking signal TS_SPT, Based on the trigger signal Trigger_SPT received at time t0, a second switching control signal SW_CSb having a low level is provided to the second switching element SW _b , and a second supply generated by the second DC-DC converter 330 Change the level of voltage _VOUTb .

In the second symbol period SB_1 (the period between time "t1" and time "t2"), the SPT control circuit 310 sets the second reference voltage V _REFb , which maintains a constant level, based on the symbol tracking signal TS_SPT. Based on the trigger signal Trigger_SPT provided to the second DC-DC converter 330 and received at time t1, a second switching control signal SW_CS _b having a high level is provided to the second switching element SW _b , - The second supply voltage V _OUTb generated by the DC converter 330 is provided to the power amplifier (PA) as the selected supply voltage Vsel (voltage V _SPT at the output node N _OUT ). In the second symbol interval SB_1, the SPT control circuit 310 provides the first DC-DC converter 320 with the first reference voltage V _REFa whose level is changed at time "tb" based on the symbol tracking signal TS_SPT, Based on the trigger signal Trigger_SPT received at the time “t1”, the first switching control signal SW_CS _a having a low level is provided to the first switching element SW a, and the first switching control signal SW_CS _a having a low level is provided to the first switching element SW a, Change the level of the supply voltage V _OUTa .

In the third symbol period SB_2 (the period between time "t2" and time "t3"), the SPT control circuit 310 sets the first reference voltage V _REFa , which maintains a constant level, based on the symbol tracking signal TS_SPT. Based on the trigger signal Trigger_SPT provided to the first DC-DC converter 320 and received at time t2, a first switching control signal SW_CS _a having a high level is provided to the first switching element SW _a , - The first supply voltage V _OUTa generated by the DC converter 320 is provided to the power amplifier (PA) as the selected supply voltage Vsel (voltage V _SPT at the output node N _OUT ). In the third symbol interval SB_2, the SPT control circuit 310 provides the second DC-DC converter 330 with a second reference voltage V _REFb whose level is changed at time "tc" based on the symbol tracking signal TS_SPT, Based on the trigger signal Trigger_SPT received at time “t2”, a second switching control signal SW_CS _b having a low level is provided to the second switching element SW b, and a second switching control signal SW_CS _b having a low level is provided to the second switching element SW b, Change the level of supply voltage V _OUTb .

In the fourth symbol period SB_3 (the period between time "t3" and time "t4"), the SPT control circuit 310 sets the second reference voltage V _REFb , which maintains a constant level, based on the symbol tracking signal TS_SPT. Based on the trigger signal Trigger_SPT provided to the second DC-DC converter 330 and received at time t3, a second switching control signal SW_CS _b having a high level is provided to the second switching element SW _b , and the second DC-DC converter - The second supply voltage V _OUTb generated by the DC converter 330 is provided to the power amplifier (PA) as the selected supply voltage Vsel (voltage V _SPT at the output node N _OUT ). In the fourth symbol period SB_3, the SPT control circuit 310 provides the first DC-DC converter 320 with the first reference voltage V _REFa whose level is changed at time "td" based on the symbol tracking signal TS_SPT, Based on the trigger signal Trigger_SPT received at the time “t3”, the first switching control signal SW_CS _a having a low level is provided to the first switching element SW a, and the first switching control signal SW_CS _a having a low level is provided to the first switching element SW a, Change the level of the supply voltage V _OUTa .

In the manner described above, the symbol tracking modulator 300 alternately selects the first supply voltage V _OUTa and the second supply voltage V _OUTb for each symbol interval to the selected supply voltage Vsel (the voltage at the output node N _OUT V _SPT ). The selected and unselected supply voltages perform the symbol power tracking modulation operation by changing the voltage level in advance.

FIG. 7A is a circuit diagram showing a symbol tracking modulator capable of first charge control according to an embodiment of the present invention, and FIG. 7B is a block diagram for explaining the operation of the first charge control circuit that performs first charge control. It is.

Referring to FIG. 7A, symbol tracking modulator 300', compared to symbol tracking modulator 300 of FIG. 5, includes a first current source IS ₁ , a second current source IS ₂ , a first fast charge control switch SW _UP , and a second fast charge control switch SW _DN . In one embodiment, the first current source IS ₁ increases the voltage at the output node N _{OUT by rapidly charging the output node N OUT before} the first switch element SW _a or the second switch element SW _b is turned on. V _SPT is previously set close to the first supply voltage V _OUTa of the output node N _a of the first DC-DC converter 320' or the second supply voltage V _OUTb of the output node N _b of the second DC-DC converter 330'. arrive. The second current source IS ₂ rapidly discharges the output node N _OUT before the first switch element SW _a or the second switch element SW _b is turned on, so that the voltage V _SPT of the output node N _OUT is increased in advance. It arrives close to the first supply voltage V _OUTa at the output node N _a of the first DC-DC converter 320' or the second supply voltage V _OUTb at the output node N _b of the second DC-DC converter 330'. Charge/discharge control for the output node N _OUT via the first current source IS ₁ and the second current source IS ₂ is defined as first charge control. That is, through the configuration of the first current source IS ₁ , the second current source IS ₂ , the first fast charge control switch SW _UP , and the second fast charge control switch SW _DN , the voltage V _SPT of the output node N _OUT becomes It quickly reaches the first supply voltage V _OUTa or the second supply voltage V _OUTb , thereby reducing the time it takes for the voltage V _SPT at the output node N _OUT to transition to the target voltage. In addition, when the switch elements (SW _a , SW _b ) are connected, rush current generated due to a large voltage difference between the output node N _OUT and different output nodes (N _a , N _b ) is prevented. do.

Referring to FIG. 7B, symbol tracking modulator 300' further includes a fast charge control circuit 350' compared to symbol tracking modulator 300 of FIG. The first charge control circuit 350' is configured to control a target voltage (e.g., a first supply voltage V _OUTa or a second supply voltage V _OUTb ) in response to a trigger signal TICK that triggers a symbol power transition; Based on the difference from the voltage V _SPT of the output node N _OUT , one of the first fast charge switching control signal UP and the second fast charge switching control signal DN is generated, and the first fast charge control switch SW is generated. _UP and the second fast charge control switch SW _DN . Furthermore, the first charge control circuit 350' detects whether charging or discharging is performed so that the voltage V _SPT of the output node N _OUT approaches the target voltage. When the first charge control circuit 350' detects that the voltage V _SPT of the output node N _OUT approaches the target voltage, the SPT control circuit 310' turns on/off the first switch element SW _a or the second switch element SW _b . An enable signal SWAP_EN is provided to the SPT control circuit 310' to generate switching control signals SW_CS _a and SW_CS _b for controlling the SPT control circuit 310'.

The configuration for fast charge control shown in FIGS. 7A and 7B is only an exemplary embodiment, but is not limited to the voltage at the output node N _OUT that tracks rapid changes in symbol power. Various configurations that generate V _SPT and prevent inrush current are applicable.

FIG. 8 is a block diagram illustrating a modem according to one embodiment of the invention.

Referring to FIG. 8, modem 110 includes a baseband processor 112 and an SPT control module 114. SPT control module 114 is software executed by baseband processor 112 and stored in a predetermined memory area within modem 110. Furthermore, SPT control module 114 is also implemented in hardware and controls symbol power tracking modulation operations separately from baseband processor 112.

In one embodiment, the SPT control module 114 includes a 5G frame configuration infrastructure control module 114a and a communication environment infrastructure control module 114b. The baseband processor 112 executes the 5G frame configuration infrastructure control module 114a, determines (or changes) the number of symbols included in each symbol group based on the frame configuration in the 5G system, and determines the number of symbols included in the determined symbol group. A symbol tracking signal and a trigger signal are generated based on the unit. The baseband processor 112 also executes the communication environment infrastructure control module 114b, and determines the number of symbols included in each symbol group based on at least one of the parameters indicating the communication environment between the base station and the wireless communication device. is determined (or changed), and a symbol tracking signal and a trigger signal are generated based on the determined symbol group unit.

However, this is only an exemplary embodiment and is not limited thereto, and the baseband processor 112 periodically changes symbol group units in various ways based on various parameters.

FIG. 9 is a diagram showing the configuration of a 5G-based frame for explaining a method for determining symbol group units based on the 5G frame configuration, and FIG. 10 is a diagram showing a symbol group unit determination method based on the communication environment. 2 is a flowchart for explaining a method of

Referring to FIG. 9, one subframe (or radio frame) includes multiple slots. As an example, one subframe includes 10 slots. One slot includes multiple symbols. As an example, one slot includes seven symbols. However, this is an exemplary embodiment, and a slot includes a different number of symbols depending on the unit interval between subcarriers, ie, subcarrier spacing size, for 5G wireless communication. Also, at least one symbol included in one slot is divided into a minislot, and a minislot is defined as one unit for 5G-based low latency communications. The baseband processor 112 in FIG. 8 determines (or changes) symbol group units to correspond to the number of symbols included in the mini-slot.

Referring to FIG. 10, the baseband processor 112 of FIG. 8 acquires communication environment information based on at least one of the parameters indicating the communication environment (step S100). In one embodiment, the parameter indicating the communication environment is a parameter indicating the channel state between the base station and the wireless communication device, and for example, the parameter indicating the communication environment is related to channel quality indicator. . Furthermore, the baseband processor 112 acquires communication environment information based on the system information and control information received from the base station. The baseband processor 112 determines (or changes) the number of symbols included in each symbol group based on the acquired communication environment information (step S120). The baseband processor 112 controls the symbol power tracking modulation operation based on the determined symbol group unit (step S140).

FIG. 11 is a diagram of the signals necessary for the symbol tracking modulator of FIG. 5 to perform its operation. Unlike FIG. 6, FIG. 11 assumes that each symbol group unit includes two symbols.

Referring to FIGS. 5 and 11, in the first symbol group interval SBG_0 (the interval between time "t0" and time "t2"), the SPT control circuit 310 maintains a constant level based on the symbol tracking signal TS_SPT. The first reference voltage V _REFa to be maintained is provided to the first DC-DC converter 320, and the first switching control signal SW_CS _a having a high level is provided to the first DC-DC converter 320 based on the trigger signal Trigger_SPT received at time t0. The first supply voltage V _OUT a provided to the switch element SW _a and generated by the first DC-DC converter 320 is provided to the power amplifier (PA) as the selected supply voltage Vsel (voltage V _SPT of the output node N _OUT ). do. In the first symbol group interval SBG_0, the SPT control circuit 310 provides the second DC-DC converter 330 with a second reference voltage V _REFb whose level is changed at time "t'a" based on the symbol tracking signal TS_SPT. Then, based on the trigger signal Trigger_SPT received at time t0, a second switching control signal SW_CS _b having a low level is provided to the second switching element SW _b , and is generated by the second DC-DC converter 330. The level of the second supply voltage V _OUTb is changed.

In the second symbol group interval SBG_1 (the interval between time "t2" and time "t4"), the SPT control circuit 310 sets the second reference voltage V _REFb , which maintains a constant level, based on the symbol tracking signal TS_SPT. , a second switching control signal SW_CS _b having a high level is provided to the second switching element SW _b based on the trigger signal Trigger_SPT provided to the second DC-DC converter 320 and received at time “t2”, The second supply voltage V _OUTb generated by the 2DC-DC converter 330 is provided to the power amplifier (PA) as the selected supply voltage Vsel (voltage V _SPT at the output node N _OUT ). In the second symbol group interval SBG_1, the SPT control circuit 310 provides the first DC-DC converter 320 with the first reference voltage V _REFa whose level is changed at time "t'b" based on the symbol tracking signal TS_SPT. Then, based on the trigger signal Trigger_SPT received at time t2, the first switching control signal SW_CS _a having a low level is provided to the first switching element SW a, and the first switching control signal SW_CS _a is generated by the first DC-DC converter 320. The level of the first supply voltage V _OUTa is changed.

Descriptions regarding the third symbol group section SBG_2 and the fourth symbol group section SBG_3 are the same as those described above, and therefore will be omitted below.

FIG. 12 is a circuit diagram illustrating a symbol tracking modulator according to one embodiment of the invention.

Referring to FIG. 12, the symbol tracking modulator 300'' includes an SPT control circuit 310'', a first DC-DC converter 320'', a second DC-DC converter 330'', a switch circuit 340'', and an output capacitor element C _SPT . The first DC-DC converter 320'' and the second DC-DC converter 330'' support a DVS (dynamic voltage scaling) function.The first DC-DC converter 320'' supports a first conversion control circuit 322'' and a first comparator. _The second DC-DC converter 330'' includes a second _conversion control _circuit 332'_' , a second comparator 334'', a plurality of switch elements (SW _C3 , SW _C4 ), an inductor element L _b , and a capacitor element C'' _b.The switch circuit 340'' includes a plurality of switch elements (SW _a1 , SW _a2 , SW _b1 , SW _b2 ).

The switch circuit 340'' of FIG. 12 is different from the connection configuration of the switch circuit 340 of FIG. 6. In one embodiment, the first switch element SW _a1 and the second switch element SW _a2 are connected in series with each other, and the third The switch element SW _b1 and the fourth switch element SW _b2 are connected in series with each other.The first switch element SW _a1 and the second switch element SW _a2 are connected to the third switch element SW _b1 and the fourth switch element SW _b2. The SPT control circuit 310'' generates a plurality of switching control signals (SW_CS _a1 , SW_CS _a2 , SW_CS _b1 , SW_CS _b2 ) based on the trigger signal Trigger_SPT, and provides them to the switch circuit 340''. The operation of the symbol tracking modulator 300'' has been specifically explained with reference to FIG. 5, so the description thereof will be omitted below.

FIG. 13 is a diagram of the signals necessary for the symbol tracking modulator of FIG. 12 to perform its operation. In the following, it is assumed that a symbol group unit includes only one symbol.

Referring to FIGS. 12 and 13, in the first symbol period SB_0 (the period between time "t0" and time "t1"), the SPT control circuit 310'' maintains a constant level based on the symbol tracking signal TS_SPT. The first reference voltage V _REFa to be maintained is provided to the first DC-DC converter 320'', and the first switching control signal SW_CS _a1 having a high level is provided to the first DC-DC converter 320'' based on the trigger signal Trigger_SPT received at time t0. A second switching control signal SW_CS _a2 having a low level is provided to the second switching element SW _a2 , and a first supply voltage V _OUTa generated by the first DC-DC converter 320'_' is supplied to the first switching element SW a1. , as the selected supply voltage Vsel (output node voltage V _SPT ) to the power amplifier (PA). In the first symbol period SB_0, the SPT control circuit 310'' provides the selected supply voltage Vsel (output node voltage V SPT ) to the power amplifier (PA) based on the symbol tracking signal TS_SPT. A third switching control device provides the second reference voltage V _REFb , the level of which is changed at time ``t0'', to the second DC-DC converter 330'' and has a low level based on the trigger signal Trigger_SPT received at time ``t0''. providing a signal SW_CS _b1 to a third switching element SW _b1 ; providing a fourth switching control signal SW_CS _b2 changed from a low level to a high level at time "t"a to a fourth switching element SW _b2 ; The level of the second supply voltage V _OUTb generated by the second DC-DC converter 330'' is changed.

In the second symbol interval SB_1 (the interval between the time "t1" and the time "t2"), the SPT control circuit 310'' controls the first symbol whose level is changed at the time "t1" based on the symbol tracking signal TS_SPT. The reference voltage V _REFa is provided to the first DC-DC converter 320'', and the first switching control signal SW_CS _a1 having a low level is applied to the first switching element SW based on the trigger signal Trigger_SPT received at the time t1. _a1 , and the second switching control signal SW_CS _a2 , which is changed from low level to high level at time ``t''b'', is provided to the second switching element SW <sub>a2</sub> , and is generated by the first DC-DC converter 320''. In the second symbol interval SB_1, the SPT control circuit 310'' changes the level of the first supply voltage <sub>VOUTa</sub> at time ``t''b'' based on the symbol tracking signal TS_SPT. The voltage V _REFb is provided to the second DC-DC converter 330'', and the third switching control signal SW_CS _b1 having a high level is applied to the third switching element SW _b1 based on the trigger signal Trigger_SPT received at the time t1. and a fourth switching control signal SW_CS _b2 having a low level is provided to the fourth switching element SW _b2 , and the second supply voltage V _OUTb generated by the second DC-DC converter 330'' is set to the selected supply voltage Vsel. (voltage of the output node V _SPT ) is provided to the power amplifier (PA).

The explanation regarding the third symbol section SB_2 and the fourth symbol section SB_3 is the same as that described above, and therefore will be omitted below.

FIG. 14 is a block diagram illustrating an example of a symbol tracking modulator according to an embodiment of the present invention, and FIG. 15 is a circuit diagram illustrating a first SIMO (single inductor multiple output) converter of FIG. 14.

Referring to FIG. 14, symbol tracking modulator 400 includes an SPT control circuit 410, a first SIMO converter 420, a second SIMO converter 430, and a switch circuit 440. Furthermore, referring to FIG. 15, the first SIMO converter 420 includes a SIMO conversion control circuit 422, a plurality of comparators (424_1 to 424_n), a plurality of voltage generation circuits (426_1 to 426_n), an inductor L, and a switch element (SW _C1 , SW _C2 ). The first SIMO converter 420 generates a plurality of voltages at different levels and outputs them through respective output nodes (N _a1 -N _an ) of the voltage generation circuits (426_1 - 426_n).

Each voltage generation circuit (426_1 to 426_n) includes a switch element (SW _a1 to SW _an ) and a capacitor (C ₁ to C _n ), respectively. In one embodiment, each voltage generation circuit (426_1 to 426_n) includes a capacitor having a different capacitance and a different load. Each comparator (424_1 to 424_n) receives a feedback signal from the reference voltage (V _REF1 to V _REFn ) and the output node (N _a1 to N _an ) of the voltage generation circuit (426_1 to 426_n) and generates a control signal. is generated and provided to the SIMO conversion control circuit 422.

In one embodiment, the SIMO conversion control circuit 422 generates a switching control signal that controls on/off of the switch elements (SW _a1 to SW _{an ) based on the first voltage level control signal VL_CSa, and generates a switching control signal that controls on/off of the switch elements (SW a1 to SW an} ). SW _a1 to SW _an ) to change the level of the first supply voltage V _OUTa generated by the first SIMO converter 420. That is, the symbol power tracking modulation operation according to an embodiment of the present invention is performed using the first SIMO converter 420 that does not support the DVS function.

Returning to FIG. 14 again, the SPT control circuit 410 generates a switching control signal SW_CS based on the trigger signal Trigger_SPT and provides it to the switch circuit 440, thereby controlling the first supply voltage V _OUTa of the first SIMO converter 420 and the second SIMO converter 420. A second supply voltage V _OUTb of converter 430 is alternately selected. Other operations of the symbol tracking modulator 400 have been specifically explained with reference to FIG. 4A and the like, so the description thereof will be omitted below.

16 and 17 are block diagrams illustrating other implementations of a symbol tracking modulator according to an embodiment of the present invention.

Referring to FIG. 16, symbol tracking modulator 500 includes an SPT control circuit 510, a DC-DC converter 520, a linear amplifier (LA) 530, and a switch circuit 540. That is, the voltage supply circuits (220, 230) of FIG. 4A are implemented as different types of circuits, and one of the voltage supply circuits (220, 230) is implemented as a linear amplifier 530.

Referring to FIG. 17, symbol tracking modulator 600 includes more voltage supply circuits (620_1 to 620_m) compared to FIG. 4A. Based on the trigger signal Trigger_SPT, the SPT control circuit 610 sequentially selects the supply voltages (V _OUT1 to V _OUTm ) generated by the voltage supply circuits (620_1 to 620_m) as the selected supply voltage Vsel. , changes the level of the unselected supply voltage based on the symbol tracking signal TS_SPT.

The operation of the symbol tracking modulators (500, 600) shown in FIGS. 16 and 17 has been specifically explained in FIG. 4A and the like, so the description thereof will be omitted below.

FIG. 18 is a block diagram illustrating a wireless communication device according to an embodiment of the present invention.

Referring to FIG. 18, a wireless communication device 1000 as an example of a communication device includes an ASIC (application specific integrated circuit) 1010 and an ASIP (application specific instruction set processor). ) 1030, memory 1050, main processor 1070, main memory 1090, and symbol power A tracking amplification system 100' is included. Symbol power tracking amplification system 100' supports a wireless communication device 1000 with symbol power tracking modulation techniques according to an embodiment of the present invention.

Two or more of ASIC 1010, ASIP 1030, and main processor 1070 communicate with each other. Furthermore, at least two or more of the ASIC 1010, the ASIP 1030, the memory 1050, the main processor 1070, and the main memory 1090 are built into one chip.

ASIP 1030 is an integrated circuit that is customized for a specific application, supports a dedicated instruction set for a specific application, and executes instructions included in the instruction set. Memory 1050 is in communication with ASIP 1030 and provides non-transitory storage for storing instructions to be executed by ASIP 1030 and, in some embodiments, SPT control module 114 of FIG. Memory 1050 may include, by way of non-limiting example, random access memory (RAM), read-only memory (ROM), tape, magnetic disk, optical disk, volatile memory, non-volatile memory, and combinations thereof. Contains any type of memory that is accessible by ASIP 1030. ASIP 1030 or main processor 1070 controls symbol power tracking modulation operations by executing a series of instructions stored in memory 1050.

Main processor 1070 controls wireless communication device 1000 by executing a plurality of commands. For example, main processor 1070 controls ASIC 1010 and ASIP 1030, processes data received over a wireless communication network, and processes user input to wireless communication device 1000. Main memory 1090 communicates with main processor 1070 and stores instructions executed by main processor 1070 as non-transitory storage.

FIG. 19 is a block diagram illustrating a phased array antenna module according to an embodiment of the invention. The following description focuses on the phased array antenna module 2000 performing symbol power tracking modulation suitable for 5G communication, but this is only an exemplary embodiment and is not limited thereto. The technical idea of the present invention is also applied to the power tracking scheme.

Referring to FIG. 19, a phased array antenna module 2000 includes a power management integrated circuit (PMIC) 2100 and a phased array transceiver 2200. The PMIC2100 includes two DC-DC converters (2110, 2120) (hereinafter referred to as buck converters), a 1.1VLDO (linear drop out) linear regulator 2130, an auxiliary LDO 2140, a first charge/discharge current source 2150, and a reference voltage generator 2160. , controller 2170, multiplexer 2180, multiple capacitors (C _1.1V , C _1.3V , C _L1 , C _L2 ), multiple SPT switches (SW _L1 , SW _L2 , SW _SD1 , SW _SD2 ), and SIDO (single -inductor dual-output) switch SW _SIDO . The first buck converter 2110 is implemented to perform the operations of the first voltage supply circuit 220 and the second voltage supply circuit 230 of FIG. 4A. The second buck converter 2120 is implemented to match the timing of the symbol power tracking operation and precharge or predischarge the load capacitors (C _L1 , C _L2 ). Meanwhile, the SPT switches (SW _L1 , SW _L2 , SW _SD1 , SW _SD2 ) are also implemented to provide the phased array transceiver 2200 with a supply voltage V _SPT consistent with symbol power tracking operation.

Controller 2170 includes a Mobile Industry Processor Interface (MIPI) slave 2172, a main controller 2174, an FFC 2176, and an internal clock source 2178. Phased array transceiver 2200 includes two transceiving circuits (2210_a, 2210_b), a microcontroller unit (MCU) 2220, a MIPI master 2230, and an internal LDO 2240. The transceiving circuit (2210_a, 2210_b) includes a plurality of antennas Ants, a plurality of RF circuits RF_CKTs, mixers (MIX_a, MIX_b), and an interface circuit Interface_CKTa. The RF circuits RF_CKTs each include a transceiver switch TRXSWa, a low noise amplifier LNA, a power amplifier PA, a plurality of mixers (MIX_a, MIX_b), a plurality of filters (FT_a, FT_b), and a plurality of phase shifters PS. The transceiving circuits (2210_a, 2210_b) are coupled to IF circuits (IF_CKT_a, IF_CKT_b) of an intermediate frequency (IF) transceiver. The transceiving circuit (2210_a, 2210_b) frequency down-converts the RF signal received via the antenna Ants to the IF band and provides it to the IF transceiver.

The IF circuits (IF_CKT_a, IF_CKT_b) each include a transceiver switch TRX SWb, a low noise amplifier LNA, a power amplifier PA, a plurality of mixers (MIX_c, MIX_d), a plurality of filters (FT_c, FT_d), and an interface circuit Interface_CKTb. The IF circuit (IF_CKT_a, IF_CKT_b) down-converts the frequency of the received IF signal to the baseband and provides it to the 5G modem.

After the power-on reset signal is generated by the external digital supply, a mobile industry processor interface (MIPI) digital communication channel between the controller 2170 and the phased array transceiver 2200 is prepared. That is, a digital communication channel between MIPI master 2230 and MIPI slave 2172 is prepared.

The MCU 2220 sends a timing signal Tick (or trigger signal) at every CP (cyclic prefix) start time in order to accurately synchronize with transmit power update timing and SPT (symbol power tracking) transition timing. generate. On the other hand, the MCU 2220 provides data DATA, a clock signal CLK, and a timing signal Tick necessary for the symbol power tracking operation of the PMIC 2100 to the MIPI slave 2172 of the controller 2170 and the main controller 2174 via the MIPI master 2230.

MIPI slave 2172 receives data DATA and clock signal CLK, and provides a signal generated based on them to reference voltage generator 2160. The reference voltage generator 2160 is connected to one of the second buck converter 2120 and the auxiliary LDO 2140 via a first DAC (digital analog converter) (DAC1) connected to the first buck converter 2110 and a multiplexer 2180. It includes a second DAC (DAC2) that is selectively coupled.

The main controller 2174 receives an internal clock signal from an internal clock source 2178 and is fed back the supply voltages (V _SPT , V _o1.3V ) and load capacitor voltages (V _C1 , V _C2 ). The main controller 2174 generates an activation signal Enables for the first charge/discharge current source 2150 and a buck converter (2110, 2120) based on the received voltages (V _SPT , V _o1.3V , V _C1 , V _C2 ) and internal clock signals. ) is a mode selection signal for selecting a power tracking mode using Mode Sel. , the DAC selection signal DAC Sel. of the reference voltage generator 2160. and a switch control signal Cap. for capacitor swapping. Generate Swap.

Note that an FFC (fixed frequency controller) 2176 controls the frequency of the buck converter (2110, 2120) to be constant. That is, the buck converters (2110, 2120) according to exemplary embodiments of the invention are not synchronized to the reference clock when operating in hysteretic control mode, but the frequency of the buck converters (2110, 2120) is (process, voltage, temperature) and operating conditions, the FFC 2176 converts the first FFC signal FFC1 and second FFC signal FFC2 generated based on the internal clock signal to the buck converter (2110, 2120). By providing each, the frequency of the buck converter (2110, 2120) is controlled to be constant.

For symbol power tracking operation according to one embodiment, two control schemes involving capacitor swapping between the load capacitors (C _L1 , C _L2 ) and fast charge/discharge operation on the output capacitor C _SPT are implemented in the PMIC2100. Applies to. Specifically, capacitor swapping is performed by the second buck converter BK _SIDO to precharge or predischarge the load capacitors (C _L1 , C _L2 ) in the symbol power tracking operation according to an embodiment of the present invention. (C _L1 , C _L2 ) refers to the operation of controlling selective connection to (C L1 , C L2 ). Furthermore, the first charge/discharge operation utilizes the first charge/discharge current source 2150, and has been explained with reference to FIGS. 7A and 7B, so the specific details will be omitted.

In the phased array transceiver 2200, at 1.1V, a large supply current will be consumed, so a 1.3VDC-DC buck conversion is required for efficient subregulation by the 1.1V LDO 2130 with SIDO operation. , is also implemented in the second buck converter 2120.

20A and 20B are diagrams illustrating a symbol power tracking operation using single-inductor dual-output (SIDO) according to an embodiment of the present invention. The configuration of the PMIC 2100 in FIG. 20A has been described with reference to FIG. 19, so duplicate content will be omitted.

Referring to FIG. 20A, the first buck converter 2110 receives two pieces of data from the 5G modem to enable symbol power tracking operations. One is data related to the power level of the next symbol, and the other is data related to the CP start time. The second buck converter 2120 precharges or predischarges the auxiliary capacitors (C _L1 , C _L2 ) based on the power level data within a predetermined current symbol duration (eg, 4.16 μs). do. When the first buck converter 2110 performs the symbol power tracking operation and the second buck converter 2120 performs the precharge operation, instead of the power source for the 1.3V supply voltage, the auxiliary LDO 2140 (FIG. 19) In the feedback loop, it starts smoothly regulating the 1.3V voltage and provides the necessary current for precharging or predischarging the auxiliary capacitors (C _L1 , C _L2 ). Upon completion of the precharge operation on the auxiliary capacitors (C _L1 , C _L2 ), the second buck converter 2120 further adjusts the 1.3V DC output for sub-regulation of the 1.1V LDO 2130 (FIG. 19). do. After the second buck converter 2120 receives the CP start time signal, the two load capacitors (C _L1 , C _L2 ) are disconnected from the V _SPT output and the first charge/discharge current source 2150 is connected to the first charge controller 2175 . Under control, the output capacitor C _SPT is rapidly charged or discharged. When the voltage difference between the output capacitor C _SPT and the first load capacitor C _L1 or the second load capacitor C _L2 is within a threshold, the first charge controller 2175 generates a swap trigger signal SWAP_EN and performs the swap. In response to the trigger signal SWAP_EN, the output capacitor C _SPT is coupled to one of the first load capacitor C _L1 and the second load capacitor C _L2 .

In a symbol power tracking operation according to an embodiment of the present invention, the output capacitor C _SPT is quickly charged or discharged, and the second buck converter 2120 precharges or predischarges the load capacitors (C _L1 , C _L2 ) so that the voltage When the difference is below a critical value, by performing a capacitor swapping operation between the V _SPT output and the load capacitors (C _L1 , C _L2 ), transition ends within 290 ns are guaranteed, resulting in high inrush ) has the effect of preventing electric current.

Referring to FIG. 20B, the first buck converter BK _SPT first responds to the trigger signal Tick and connects the first load capacitor C _L1 having the voltage of the first level _LV1 to the section corresponding to the first uplink symbol UL Symbol1. At , it is connected to the V _SPT output. Through it, the power amplification array (PA array) is provided with a supply voltage V _SPT of a first level LV ₁ in a section corresponding to the first uplink symbol UL Symbol1. Also, the first buck converter BK _SPT generates a second load capacitor voltage V _C2 at a second level LV ₂ in response to the “PWL _S1 ” signal. The output load capacitance of the PMIC 2100 in the section corresponding to the first uplink symbol UL Symbol1 is determined by the sum of the capacitance of the first load capacitor C _L1 and the capacitance of the output capacitor C _SPT .

Meanwhile, in response to the second trigger signal Tick, the fast charge controller 2175 performs fast linear charging on the output capacitor C _SPT so that the level of the supply voltage V _SPT is charged at a second level _LV2 . ) to control behavior. The output load capacitance of the PMIC 2100 during the fast linear charging operation period is determined by the capacitance of the output capacitor _CSPT .

The main controller 2174 responds to the second trigger signal Tick, and when the voltage difference between the output capacitor C _SPT and the second load capacitor C _L2 is less than a critical value, the second load capacitor ₂₁₇₄ has a voltage of a second level LV2. C _L2 is connected to the V _SPT output in an interval corresponding to the second uplink symbol UL Symbol2. Through it, the power amplification array (PA array) is provided with the supply voltage V _SPT of the second level LV ₂ in a period corresponding to the second uplink symbol UL Symbol2. In addition, the first buck converter BK _SPT generates the first load capacitor voltage V _C1 at the third level LV ₃ in response to the "PWL _S2 " signal, and the second buck converter BK _SIDO generates the first load capacitor voltage V C1 at the third level LV _3. Free charge. The output load capacitance of the PMIC 2100 in the section corresponding to the second uplink symbol UL Symbol2 is determined by the sum of the capacitance of the second load capacitor C _L2 and the capacitance of the output capacitor C _SPT .

Meanwhile, in response to the third trigger signal Tick, the fast charge controller 2175 performs fast linear discharging on the output capacitor C _SPT so that the level of the supply voltage V _SPT is discharged at a third level LV ₃ . ) to control behavior. The output load capacitance of the PMIC 2100 during the fast linear discharge operation period is determined by the capacitance of the output capacitor C _SPT .

The main controller 2174 is responsive to the third trigger signal Tick, and when the voltage difference between the output capacitor C _SPT and the first load capacitor C _L1 is less than a critical value, the first load capacitor 2174 has a voltage of a third level LV ₃ . C _L1 is connected to the V _SPT output in an interval corresponding to the third uplink symbol UL Symbol3. Through it, the power amplification array (PA array) is provided with the supply voltage V _SPT of the third level LV ₃ in a section corresponding to the third uplink symbol UL Symbol3. In addition, the first buck converter BK _SPT can generate the second load capacitor voltage V _C2 at the first level LV ₁ in response to the “PWL _S3 ” signal, and the second buck converter BK _SIDO can generate the second load capacitor voltage V C2 at the first level LV 1. Capacitor C _L2 can be pre-discharged. The output load capacitance of the PMIC 2100 in the section corresponding to the third uplink symbol UL Symbol3 is determined by the sum of the capacitance of the first load capacitor C _L1 and the capacitance of the output capacitor C _SPT .

FIG. 21 is a block diagram illustrating a PMIC equipped with two buck converters to support ripple-injected hysteresis control functionality according to an embodiment of the present invention.

Referring to FIG. 21, the PMIC 3000 includes a first buck converter 3100, a second buck converter 3200, an auxiliary LDO 3300, a plurality of switches (SW _SIDO , SW _SD1 , SW _SD2 , SW _L1 , SW _L2 ), and a plurality of capacitors (C _1.3V , C _L1 , C _L2 , C _SPT ). The first buck converter 3100 includes an M _P1 transistor, an M _N1 transistor, a gate driver, an SPT inductor L _SPT , a variable resistor R _r1 , a plurality of resistors (R _f1a , R _f1b , R _f1c , R _f1d ), and a plurality of capacitors (C _ac1 , C _r1 , C _f1 ), a DAC, a buffer BUF, and a switch DPC ₁ for dynamic precharge control. The second buck converter 3200 includes an M _P2 transistor, an M _N2 transistor, a gate driver, a SIDO inductor L _SIDO , a variable resistor R _r2 , a plurality of resistors (R _f2a , R _f2b , R _f2c , R _f2d ), and a plurality of capacitors (C _ac2 , C _r2 , C _f2 ), DAC, buffer BUF, switch DPC ₂ for operational precharge control, and multiple feedback selection switches for connection with load capacitors (C _1.3V , C _L1 , C _L2 ). (FSS _1.3V , FSS _C1 , FSS _C2 ). Meanwhile, the auxiliary LDO 3300 includes a comparator COMP, a feedback block FB, and an _MP3 transistor.

As shown in FIG. 21, through the configuration of the first buck converter 3100 and the configuration of the second buck converter 3200, rapidly changing feedback inputs can be handled while ensuring loop stability and smooth transitions. Even if there is, the target output of the buck converter (3100, 3200) is stabilized. That is, the first buck converter 3100 and the second buck converter 3200 smoothly perform the SPT operation and the SIDO operation, respectively.

In the first buck converter 3100 and the second buck converter 3200 according to an embodiment, a dynamic precharge control method is applied to a hysteretic feedback loop through some switches (DPC ₁ , DPC ₂ ); A direct feed-forward path is formed at the output to the internal compensation node for the SPT transition time or the SIDO transition time. Through the above dynamic precharge control scheme, the loop response time can be shortened within a predetermined time. According to the SPT and SIDO operation scenarios, a suitable reference voltage is generated for the respective buck regulation via a reference voltage generator included in the buck converter (3100, 3200). The reference voltage generator includes two DACs, two buffers BUF, and a track and hold circuit.

The hysteretic control produces a variation in the output switching frequency due to the ratio of input to output, and this variation is modulated into the PA transmission signal as an unwanted spurious spectrum. shown.

In order to compensate for the noise attenuation by the selected LC filter when there is a change in PVT (process, voltage, temperature), the switching frequency controller is also applied with a simple frequency fixed loop to the hysteretic controller.

Although the present invention has been described with reference to embodiments shown in the drawings, these are merely exemplary and those skilled in the art will appreciate that various modifications and equivalents may be made therefrom. It is understood that other embodiments are possible. Therefore, the technical scope of the present invention is not limited to these embodiments.

The symbol power tracking amplification system according to the present invention and a wireless communication device including the same can be effectively applied to, for example, technical fields related to wireless communication.

100, 1000 wireless communication device 100' symbol power tracking amplification system 110 modem 112 baseband processor 114 SPT control module 114a 5G frame configuration infrastructure control module 114b communication environment infrastructure control module 130, 200, 300, 300', 300", 400, 500, 600 symbol tracking modulator 133 voltage supply 135, 240, 340, 340', 340", 440, 540 switch circuit 150 RF block 170 power amplifier 210, 310, 310', 310", 410, 510, 610 SPT Control circuit 212, 214 Digital/analog conversion circuit (DAC)
220 First voltage supply circuit 230 Second voltage supply circuit 320, 320', 320" First DC-DC converter 322, 322', 322" First conversion control circuit 324, 324', 324" First comparator 330, 330 ', 330'' Second DC-DC converter 332, 332', 332'' Second conversion control circuit 334, 334', 334'' Second comparator 350' First charge control circuit 420 First SIMO converter 422 SIMO conversion control circuit 424_1 to 424_n Comparator 426_1 to 426_n Voltage generation circuit 430 Second SIMO converter 520 DC-DC converter 530 Linear amplifier 620_1 to 620_m Voltage supply circuit 1010 ASIC
1030 ASIP
1050 Memory 1070 Main Processor 1090 Main Memory 2000 Phased Array Antenna Module 2100, 3000 PMIC
2110, 3100 (1st) Buck converter 2120, 3200 (2nd) Buck converter 2130 1.1VLDO linear regulator 2140, 3300 Auxiliary LDO
2150 First charge/discharge current source 2160 Reference voltage generator 2170 Controller 2172 MIPI slave 2174 Main controller 2175 First charge controller 2176 FFC
2178 Internal clock source 2180 Multiplexer 2200 Phase array transceiver 2210_a, 2210_b Transceiving circuit 2220 Microcontroller unit (MCU)
2230 MIPI Master 2240 Internal LDO

Claims (24)

A symbol power tracking amplification system supporting symbol power tracking modulation, comprising:
a power amplifier that amplifies an RF (radio frequency) signal;
A first supply voltage and a second supply voltage are generated based on a symbol tracking signal received from the outside, and the first supply voltage and the second supply voltage are generated for each symbol group section corresponding to a symbol group unit including at least one symbol. a symbol tracking modulator that alternately selects two supply voltages to provide the power amplifier with a supply voltage whose level can be changed for each symbol group interval ;
The symbol tracking signal is
a first symbol tracking signal for controlling the level of the first supply voltage;
a second symbol tracking signal for controlling the level of the second supply voltage . The symbol power tracking amplification system according to claim 1 , wherein the level change timing of the first symbol tracking signal is different from the level change timing of the second symbol tracking signal. The symbol power according to claim 1 , wherein an interval between a level change timing of the first symbol tracking signal and a level change timing of the second symbol tracking signal corresponds to the length of the symbol group unit. Tracking amplification system. A symbol power tracking amplification system supporting symbol power tracking modulation, comprising:
a power amplifier that amplifies an RF (radio frequency) signal;
A first supply voltage and a second supply voltage are generated based on a symbol tracking signal received from the outside, and the first supply voltage and the second supply voltage are generated for each symbol group section corresponding to a symbol group unit including at least one symbol. a symbol tracking modulator that alternately selects two supply voltages to provide the power amplifier with a supply voltage whose level can be changed for each symbol group interval;
The symbol power tracking amplification system is characterized in that the number of symbols included in each symbol group is variable. A symbol power tracking amplification system supporting symbol power tracking modulation, comprising:
a power amplifier that amplifies an RF (radio frequency) signal;
A first supply voltage and a second supply voltage are generated based on a symbol tracking signal received from the outside, and the first supply voltage and the second supply voltage are generated for each symbol group section corresponding to a symbol group unit including at least one symbol. a symbol tracking modulator that alternately selects two supply voltages to provide the power amplifier with a supply voltage whose level can be changed for each symbol group interval;
The symbol tracking modulator includes:
The symbol power tracking amplification further comprises receiving a trigger signal corresponding to the symbol group from the outside, and alternately selecting the first supply voltage and the second supply voltage based on the trigger signal. system. The symbol tracking modulator includes:
2. The symbol power tracking amplification system according to claim 1, wherein the level of the second supply voltage is changed based on the symbol tracking signal in a symbol group interval in which the first supply voltage is selected. A symbol power tracking amplification system supporting symbol power tracking modulation, comprising:
a power amplifier that amplifies an RF (radio frequency) signal;
A first supply voltage and a second supply voltage are generated based on a symbol tracking signal received from the outside, and the first supply voltage and the second supply voltage are generated for each symbol group section corresponding to a symbol group unit including at least one symbol. a symbol tracking modulator that alternately selects two supply voltages to provide the power amplifier with a supply voltage whose level can be changed for each symbol group interval;
The symbol tracking modulator includes:
A symbol power tracking amplification system characterized in that the level change of the supply voltage is performed within a CP (cyclic prefix) interval of a first symbol included in the symbol group interval. The symbol tracking modulator includes:
a first voltage supply circuit that generates the first supply voltage;
a second voltage supply circuit that generates the second supply voltage;
2. The power amplifier according to claim 1, further comprising a switch circuit for selectively connecting one of the first voltage supply circuit and the second voltage supply circuit to the power amplifier. Symbol power tracking amplification system. The symbol power tracking amplification system of claim 8, wherein each of the first voltage supply circuit and the second voltage supply circuit is a DC-DC converter that supports a dynamic voltage scaling (DVS) function. 9. The symbol power tracking amplification system according to claim 8 , wherein each of the first voltage supply circuit and the second voltage supply circuit is a single inductor multiple output (SIMO) converter. The first voltage supply circuit is a DC-DC converter that supports a DVS function,
9. The symbol power tracking amplification system of claim 8 , wherein the second voltage supply circuit is a linear amplifier. The switch circuit is
The symbol power according to claim 8 , characterized in that in the first symbol group period, the first voltage supply circuit is connected to the power amplifier, and the second voltage supply circuit and the power amplifier are disconnected. Tracking amplification system. The second voltage supply circuit includes:
13. The symbol power tracking amplification system according to claim 12 , wherein the level of the second supply voltage is changed based on the symbol tracking signal in the first symbol group period. The switch circuit is
14. The symbol of claim 13 , wherein in the second symbol group interval, the second voltage supply circuit is connected to the power amplifier, and the first voltage supply circuit and the power amplifier are disconnected. Power tracking amplification system. A wireless communication device,
a power amplifier that amplifies an RF (radio frequency) signal;
a symbol tracking modulator providing a supply voltage to the power amplifier;
a modem that provides the symbol tracking modulator with a symbol tracking signal and a trigger signal that cause the RF signal to correspond to symbol groups including at least one symbol;
The symbol tracking modulator includes:
Generating at least two or more supply voltages based on the symbol tracking signal, and selecting one of the supply voltages for each symbol group interval based on the trigger signal. , to the power amplifier. The modem is
The data signal corresponding to the RF signal is divided into a plurality of symbol groups based on the symbol group unit, and the symbol tracking signal is generated based on the size of the symbol included in each of the symbol groups. The wireless communication device according to claim 15 . The modem is
determining the number of symbols included in each symbol group based on a radio frame configuration of the RF signal, and generating the symbol tracking signal and the trigger signal based on the determined symbol group unit. The wireless communication device according to claim 15 . The modem is
The number of symbols included in the symbol group is determined based on at least one of the parameters indicating the communication environment between base stations, and the symbol tracking signal and the symbol tracking signal are determined based on the determined symbol group. The wireless communication device according to claim 15 , wherein the wireless communication device generates the trigger signal. 16. The wireless communication device of claim 15 , wherein the symbol tracking signal changes the voltage level of the remaining supply voltages except for the selected supply voltage. The symbol tracking signal includes a first symbol tracking signal and a second symbol tracking signal,
The symbol tracking modulator includes a first voltage supply circuit and a second voltage supply circuit;
The first voltage supply circuit receives the first symbol tracking signal via a first signal path from the modem, and the second voltage supply circuit receives the first symbol tracking signal via a second signal path from the modem. 16. The wireless communication device of claim 15 , receiving the second symbol tracking signal. The first supply voltage generated from the first voltage supply circuit is selected in the symbol group interval different from the second supply voltage generated from the second voltage supply circuit, or the voltage level is changed. The wireless communication device according to claim 20 . A processor- readable recording medium storing a program for generating signals necessary for symbol power tracking modulation, the recording medium comprising:
The step of generating the signal includes:
dividing a data signal corresponding to an RF (radio frequency) signal into a plurality of symbol groups based on a symbol group unit containing at least one symbol;
generating a symbol tracking signal based on the size of the symbols included in each of the symbol groups;
A recording medium comprising the step of generating a trigger signal corresponding to the symbol group. The step of generating the signal includes:
The method further includes the step of determining the number of symbols in each symbol group based on a radio frame structure of the RF signal and a communication environment between a base station and a wireless communication device including the processor. The recording medium according to claim 22 . the symbol tracking signal and the trigger signal are provided to a symbol power tracking amplification system for amplifying the RF signal;
The symbol power tracking amplification system includes:
a power amplifier that amplifies the RF signal;
Generating at least two or more supply voltages based on the symbol tracking signal, and selecting one of the supply voltages for each symbol group interval based on the trigger signal. 23. The recording medium of claim 22 , further comprising a symbol tracking modulator for the power amplifier.

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