GB2524243A - System and method for controlling a power amplifier - Google Patents

System and method for controlling a power amplifier Download PDF

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Publication number
GB2524243A
GB2524243A GB1404708.8A GB201404708A GB2524243A GB 2524243 A GB2524243 A GB 2524243A GB 201404708 A GB201404708 A GB 201404708A GB 2524243 A GB2524243 A GB 2524243A
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GB
United Kingdom
Prior art keywords
power
supply voltage
transmission
power amplifier
power estimator
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Application number
GB1404708.8A
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GB201404708D0 (en
Inventor
Neil Piercy
Christian Schwarzbauer
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IP Access Ltd
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IP Access Ltd
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Publication date
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Priority to GB1404708.8A priority Critical patent/GB2524243A/en
Publication of GB201404708D0 publication Critical patent/GB201404708D0/en
Publication of GB2524243A publication Critical patent/GB2524243A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0216Continuous control
    • H03F1/0222Continuous control by using a signal derived from the input signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0216Continuous control
    • H03F1/0222Continuous control by using a signal derived from the input signal
    • H03F1/0227Continuous control by using a signal derived from the input signal using supply converters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0244Stepped control
    • H03F1/025Stepped control by using a signal derived from the input signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2626Arrangements specific to the transmitter only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/321Use of a microprocessor in an amplifier circuit or its control circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/465Power sensing

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Transmitters (AREA)

Abstract

A power estimator 107 controls the voltage supply 108 for an RF power amplifier 105 so that the supply voltage is just sufficient for the amplifier 105 to remain in or near its linear region throughout a burst, slot, or symbol. The power estimator 107 receives information from the scheduler 102 related to the required transmitter power, for example the number of subcarriers in a forthcoming OFDM burst, and refers to a look-up-table 109 to obtain a suitable supply voltage value for the adjustable power supply 108.  The power estimator 107 updates the amplifier supply voltage at the symbol rate, which is much lower than the signal sampling rate.  The reduction in power consumption is not as great as in a fully envelope-tracking arrangement, but a complicated linearization circuit is not needed and a rapidly-responding voltage supply 108 is not required.  The power estimator may respond to the modulation scheme, the coding scheme, the time of transmission, or an average transmit power level.  The amplifier may be used in a base station or an access point

Description

SYSTEM AND METHOD FOR CONTROLLING A POWER AMPLIFIER
Field of the invention
The field of this invention relates, in general, to power amplifiers and, more particularly, to a method and system for high efficiency, linear power amplification in wireless applications, such as the so-called Third Generation and Long Term Evolution cellular systems.
Background of the Invention
Power amplifiers for wireless transmission applications, such as radio frequency ç'RF") power amplifiers, are utilized in a wide variety of communications and other electronic applications. Ideally, the input-output transfer function of a power amplifier should be linear, with a perfect replica of the input signal, increased in amplitude, appearing at the output of the power amplifier. In addition, for greater efficiency, various RF systems, such as cellular systems, attempt to run power amplifiers at or near their saturation levels, in which the actual output power of the amplifier is just below its maximum rated power output level. This power output level is generally related to the supply voltage (or supply power) to the power amplifier, such that a greater supply voltage will produce a correspondingly greater output power from the amplifier; for higher power input signals, a correspondingly greater actual power output is required to maintain the amplifier at or near saturation.
Power amplifiers for small cell transmission may typically utilise a high bias voltage in order to keep their operating output linear with respect to the input. This high bias voltage supply uses more power than is theoretically needed when the power amplifier output power is low. Typically, for small cell applications, it is known to use a cheap power amplifier that requires significant bias power to keep it operating in a linear output versus input region. This is not particularly power efficient, and leads to significant power dissipation, even when the cell is nearly idle. Known techniques for varying the supply voltage to the power amplifier involve the use of techniques such as Envelope Tracking. This arrangement allows the power amplifier to operate in lower supply voltage regions where the power amplifier's response is non-linear. Although this can lead to greater efficiency, there is the necessity to carry out sample-rate Physical layer calculations in order to compensate for the non-linearity. In the case of Envelope Tracking this usually requires the use of a high dynamic range power amplifier and a fast voltage converter, thereby adding to the complexity of the signal processing systems required for the base station transceivers, "node Bs" or "access points" which typically comprise a cellular communications system.
Thus it would be advantageous to provide a way of controlling a power amplifier which did not have the disadvantages of known methods and systems.
Summary of the invention
Aspects of the invention provide a system, an access point, computer program product and method for controlling a power amplifier as described in the appended claims.
According to a first aspect of the invention there is provided a system for controlling a power amplifier for amplification of communications signals for transmission, the system including a power estimator arranged to determine a value of a supply voltage for the power amplifier depending on a predicted transmission load.
In one embodiment, the system includes a scheduler, operably coupled to the power estimator, for selecting a transmission scheme for the communications signals for transmission and the power estimator is arranged to determine a supply voltage based on a selected transmission scheme.
A transmission scheme may include at least one of; a modulation scheme, a coding scheme, a number of sub carriers, a time of transmission of a communication signal, an average transmit power.
The power estimator may contain a look up table which may be used to compare stored values of preferred supply voltage values against transmission schemes. In one example, the look up table contains numbers of sub-carriers versus preferred supply voltage values.
In one embodiment, the power estimator is arranged to generate an output signal indicative of the determined supply voltage value. In one example, the power estimator may generate an actual supply voltage for application to the power amplifier. In other embodiments, the output signal from the power estimator may be fed to a voltage generator for generating the determined supply voltage for application to the power amplifier. The voltage generator may comprise a DC to DC converter or an adjustable power supply, or a set of two or more fixed voltage supplies which are selected by the power estimator's output signal, for example.
The power estimator may be implemented in an integrated circuit device.
According to a second aspect of the invention, there is provided a method for controlling a power amplifier for amplification of communications signals for transmission, the method including determining a value of a supply voltage for the power amplifier depending on a predicted transmission load.
In one embodiment, the power estimator determines a supply voltage value based on an output from the scheduler on a symbol by symbol basis.
The determined voltage supply value may preferably be within a linear region of operation of the power amplifier. In one embodiment, just a lower limit of a desired supply voltage value may be signalled to the voltage generator by the power estimator, rather than a precise value.
Advantageously and in contrast to envelope tracking methods, for example, no additional components for taking into account any distortion need be added.
Thus, the present invention provides a system and method which may use scheduler information to estimate a predicted maximum output power of a communications transmitter at symbol rate (rather than sampling rate) and therefore, determine a supply voltage required by the power amplifier. This rate is several orders of magnitude below the sample rate used in Envelope Tracking.
For example, for Long Term Evolution communications systems, the symbol rate is normallyl4kHz (and in some situations, 12kHz). The power amplifier may be kept biased just inside its linear region or on low power hot standby in cases where no transmission is scheduled. As this can be done without Envelope Tracking circuitry or a high-speed voltage converter, the invention is particularly applicable to cells that may spend significant periods of time at low load. For example, small cells, operating in low-usage situations can benefit especially from the invention. For example, for a small cell operating in a Long Term Evolution communications system, when a resource block is unused for user data, only the cell reference symbols are transmitted which may occupy only 217 of the time in each resource block. Operating at lower average power consumption can have the benefits of being able to reduce the amount of heat sinking needed and increasing component lifetime.
Also advantageously, a slow and inexpensive DC-DC converter, several fixed power supplies or Digital to Analogue converter which manipulates an adjustable power supply can be used to set the determined supply voltage in accordance with the output from the power estimator.
By using a statistical distribution of symbol energy a better upper limit of the power needed and thus lower limit of power amplifier supply voltage is achievable while accepting a little compression in uncertain cases. Different statistics can be used by the power estimator for different modulation schemes. The system is tolerant of any inherent hysteresis in the power amplifier voltage supply and may be arranged to raise the supply voltage to its preferred, determined value early enough but never to drop it before the end of a transmitted symbol. Hence, not only does the invention have the advantage of increased efficiency but also relaxes the requirements on rise time and timing accuracy of the voltage supply.
According to a third aspect of the invention there is provided an access point for a wireless communications system wherein the access point includes a system according to the first aspect.
According to a fourth aspect of the invention, there is provided a transitory computer-readable medium having computer-readable instructions stored thereon for execution by a processor to perform a method in accordance with the second aspect.
The transitory computer-readable medium may comprise at least one from a group consisting of a hard disk, a CD-ROM, an optical storage device, a magnetic storage device, a Read Only Memory, a Programmable Read Only Memory, an Erasable Programmable Read Only Memory, EPROM, an Electrically Erasable Programmable Read Only Memory and a Flash memory These and other aspects, features and advantages of the invention will be apparent from, and elucidated with reference to, the embodiments described hereinafter.
Brief Description of the Drawings
Further details, aspects and embodiments of the invention will be described, by way of example only, with reference to the drawings. Elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. Like reference numerals have been included in the respective drawings to ease understanding.
FIG. 1 is a simplified, schematic block diagram of a part of an access point of a wireless communications system and including a system for controlling a power amplifier.
Detailed Description
The inventive concept finds particular applicability in wireless communication systems which include small cell networks.
Those skilled in the art will recognise and appreciate that the specifics of the specific examples described are merely illustrative of some embodiments and that the teachings set forth herein are applicable in a variety of alternative settings. For example, implementations within cellular communication systems conforming to different standards are contemplated and are within the scope of the various teachings described.
FIG. 1 is a block diagram illustrating a part of an access point which may provide communications services to wireless communications devices (not shown) within a coverage area of the access point 100. The access point may form a part of a wider wireless communications network that connects wireless communications devices to other wireless communications devices and/or to other networks such as a wide area network, a local area network, a public switched telephone network, and the like. In this example, the access point 100 operates in accordance with the Long Term Evolution communications standard which utilises multiple subcarriers.
The access point 100 includes a baseband processor 101. Included in the baseband processor 101 is a scheduler 102 and an antenna interface controller 103. A first output of the scheduler 102 is connected to an input of the antenna interface controller 103 whose output is connected to an RE modulator 104. An output of the RE modulator 104 is connected to an input of a power amplifier 105 whose supply voltage is to be controlled. An output of the power amplifier comprises communications signals on line 106 which may be transmitted to one or more wireless communications units via an antenna or antenna array (not shown). The antenna interface controller 103, the RF modulator 104 and the scheduler 102 may be of conventional design.
The scheduler 102 is used for scheduling the transmission of wireless data from the access point 100 to one or more wireless communication devices. The scheduler 102 makes decisions on the coding and modulation of a data burst and thus how many resource blocks and thus subcarriers are needed to transmit the data burst. In particular, the scheduler 102 makes the decision on the selection of modulation and coding schemes for the data traffic bursts based on information such as Channel Quality Information ("CQI") or a Receiver Signal to Interference plus Noise Ratio in accordance with known techniques. Hence, for example, the scheduler 102 can decide on a number of subcarriers to be used in some future transmission burst and also the average power at which the subcarriers will be transmitted.
The baseband processor 101 of the access point 100 also includes a power estimator 107 having an input which is connected to a second output of the scheduler 102 and an output which is connected to an adjustable DC-DC converter 108. An output of the adjustable DC to DC converter 108 is applied to the power amplifier as a supply voltage. The power estimator includes a look up table 109. In this example, the look up table 109 contains voltage values versus number of subcarriers to be used for the transmission.
The example of OFDMA (orthogonal frequency division multiple access) transmission as used in Long Term Evolution systems is a superposition of subcarriers which can be either not used (ofo or have different signal strengths up to a defined maximum or overall total. Thus an overall maximum transmission load can be calculated with the knowledge of the subcarriers to be in use and their average power. Thus, the second output of the scheduler 102 can be used by the power estimator 107 and may simply comprise an integer number from zero to some maximum. If the output number is non-zero, this is then mapped, using the look up table 107 to a preferred supply voltage value within the linear region of the power amplifier 105.
In operation then, the scheduler 102 determines a number of subcarriers to be used in a forthcoming data burst. This information, which is a prediction of the transmission load which the power amplifier 105 is to supply to the antenna to be transmitted, is known to the scheduler and hence to the power estimator, in advance of its actual transmission. For example, the scheduler 102 may schedule a data burst for a time slot which can be typically one or two time slots in advance. In the intervening period, the power estimator 107 determines a value for a supply volt3ge for the power amplifier which will be sufficient for the power amplifier to achieve the required amplification of the RE modulated signals arriving on its input. In this example, the power estimator 107 determines the required supply voltage value by interrogating the look up table 109. By knowing the number of subearriers to be used (and their required average power) in a forthcoming transmission burst, a corresponding value of supply voltage can be determined from the table. The table may be populated with values as a result of prior test procedures. The power estimator 107 then outputs a signal indicative of the determined supply voltage value to the adjustable DC-DC converter 108. In response, the adjustable DC-DC converter 108 generates the actual determined supply voltage at its output and applies it to the power amplifier prior to the power amplifier 105 receiving the burst for transmission.
When the scheduled transmission load is scheduled, in a future transmission burst, to diminish or cease altogether, (ie, the number of subcarriers also diminishes or ceases) the power estimator 107 looks up the appropriate entry in its look up table 109 and sends a revised value of a preferred supply voltage to the DC-DC voltage converter 108 at the appropriate point in time. The power amplifier 105 can be kept in the linear region if an upper limit for RF power is known. Power saving is the largest if no symbol is transmitted as the power amplifier 105 can be set, under such conditions, to a Hot-Standby Voltage which does not need to be in the linear region.
In another embodiment, the power estimator 107 considers the different modulation and coding schemes selected by the scheduler 102 for the transmission in determining the output signal for controlling the power amplifier supply voltage.
In another embodiment, the power estimator 107 may output a signal indicating that the supply voltage should be set to either a pre-set minimum or a pre-set maximum value. Alternatively to the DC-DC converter, a number of discrete supply voltages may be used, under the control of the output signal from the power estimator 107.
While the specific examples have been described with reference to Long Term Evolution systems and OFDM transmission methods, it will be understood that the invention is also applicable to other systems and transmission methods such as TDM (time division multiplex) and FDM (frequency division multiplex), DECT (digital enhanced cordless communication), multi-carrier CDMA (code division multiple access) and carrier-aggregated Long Term Evolution or multi-channel W1Fi and Third Generation HSDPA (high speed downlink packet access).
The signal processing functionality of the embodiments of the invention, particularly the function of the power estimator 107, may be achieved using computing systems or architectures known to those who are skilled in the relevant art. Computing systems such as, a desktop, laptop or notebook computer, hand-held computing device (PDA, cell phone, palmtop, etc.), mainframe, server, client, or any other type of special or general purpose computing device as may be desirable or appropriate for a given application or environment can be used. The computing system can include one or more processors which can be implemented using a general or special-purpose processing engine such as, for example, a microprocessor, microcontroller or other control module.
The computing system can also include a main memory, such as random access memory (RAM) or other dynamic memory, for storing information and instructions to be executed by a processor. Such a main memory also may be used for storing temporary variables or other intermediate information during execution of instructions to be executed by the processor. The computing system may likewise include a read only memory (ROM) or other static storage device for storing static information and instructions for a processor.
The computing system may also include an information storage system which may include, for example, a media drive and a removable storage interface. The media drive may include a drive or other mechanism to support fixed or removable storage media, such as a hard disk drive, a floppy disk drive, a magnetic tape drive, an optical disk drive, a compact disc (CD) or digital video drive (DVD) read or write drive (R or R, or other removable or fixed media drive. Storage media may include, for example, a hard disk, floppy disk, magnetic tape, optical disk, CD or DVD, or other fixed or removable medium that is read by and written to by media drive. The storage media may include a computer-readable storage medium having particular computer software or data stored therein.
In alternative embodiments, an information storage system may include other similar components for allowing computer programs or other instructions or data to be loaded into the computing system. Such components may include, for example, a removable storage unit and an interface, such as a program cartridge and cartridge interface, a removable memory (for example, a flash memory or other removable memory module) and memory slot, and other removable storage units and interfaces that allow software and data to be transferred from the removable storage unit to computing system.
The computing system can also include a communications interface. Such a communications interface can be used to allow software and data to be transferred between a computing system and external devices. Examples of communications interfaces can include a modem, a network interface (such as an Ethernet or other NIC card), a communications port (such as for example, a universal serial bus (USB) port), a PCMCIA slot and card, etc. Software and data transferred via a communications interface are in the form of signals which can be electronic, electromagnetic, and optical or other signals capable of being received by a communications interface medium.
In this document, the terms computer program product', computer-readable medium' and the like may be used generally to refer to tangible media such as, for example, a memory, storage device, or storage unit. These and other forms of computer-readable media may store one or more instructions for use by the processor comprising the computer system to cause the processor to perform specified operations. Such instructions, generally referred to as computer program code' (which may be grouped in the form of computer programs or other groupings), when executed, enable the computing system to perform functions of embodiments of the present invention. Note that the code may directly cause a processor to perform specified operations, be compiled to do so, and/or be combined with other software, hardware, and/or firmware elements (e.g., libraries for performing standard functions) to do so.
In an embodiment where the elements are implemented using software, the software may be stored in a computer-readable medium and loaded into computing system using, for example, removable storage drive. A control module (in this example, software instructions or executable computer program code), when executed by the processor in the computer system, causes a processor to perform the functions of the invention as described herein.
Furthermore, the inventive concept can be applied to any circuit for performing signal processing functionality within a network element. It is further envisaged that, for example, a semiconductor manufacturer may employ the inventive concept in a design of a stand-alone device, such as a microcontroller of a digital signal processor (DSP), or application-specific integrated circuit (ASIC) and/or any other sub-system element.
It will be appreciated that, for clarity purposes, the above description has described embodiments of the invention with reference to a single processing logic. However, the inventive concept may equally be implemented by way of a plurality of different functional units and processors to provide the signal processing functionality. Thus, references to specific functional units are only to be seen as references to suitable means for providing the described functionality, rather than indicative of a strict logical or physical structure or organisation.
Aspects of the invention may be implemented in any suitable form including hardware, software, firmware or any combination of these. The invention may optionally be implemented, at least partly, as computer software running on one or more data processors and/or digital signal processors or configurable module components such as FPGA devices. Thus, the elements and components of an embodiment of the invention may be physically, functionally and logically implemented in any suitable way. Indeed, the functionality may be implemented in a single unit, in a plurality of units oras part of other functional units.
Although the present invention has been described in connection with some embodiments, it is not intended to be limited to the specific form set forth herein. Rather, the scope of the present invention is limited only by the accompanying claims. Additionally, although a feature may appear to be described in connection with particular embodiments, one skilled in the art would recognize that various features of the described embodiments may be combined in accordance with the invention. In the claims, the term comprising' does not exclude the presence of other elements or steps.
Furthermore, although individually listed, a plurality of means, elements or method steps may be implemented by, for example, a single unit or processor. Additionally, although individual features may be included in different claims, these may possibly be advantageously combined, and the inclusion in different claims does not imply that a combination of features is not feasible and/or advantageous. Also, the inclusion of a feature in one category of claims does not imply a limitation to this category, but rather indicates that the feature is equally applicable to other claim categories, as appropriate.
Furthermore, the order of features in the claims does not imply any specific order in which the features must be performed and in particular the order of individual steps in a method claim does not imply that the steps must be performed in this order. Rather, the steps may be performed in any suitable order. In addition, singular references do not exclude a plurality. Thus, references to a', an', first', second', etc. do not preclude a plurality.

Claims (13)

  1. Claims 1. A system for controlling a power amplifier for amplification of communications signals for transmission, the system including a power estimator arranged to determine a value of a supply voltage for the power amplifier depending on a predicted transmission load.
  2. 2. A system according to claim 1 including a scheduler, operably coupled to the power estimator, for selecting a transmission scheme forthe communications signals for transmission and wherein the power estimator is arranged to determine a value of supply voltage based on a selected transmission scheme..
  3. 3. A system according to claim 2 wherein a transmission scheme includes at least one of; a modulation scheme, a coding scheme, a number of sub carriers, a time of transmission of a communication signal, an average transmit power level.
  4. 4. A system according to claim 2 or claim 3 wherein the power estimator includes a look up table comparing a transmission scheme against a preferred supply voltage value.
  5. 5. The system according to any preceding claim wherein the power estimator is arranged to generate an output signal indicative of the determined supply voltage value.
  6. 6. The system according to claim 5 including a voltage generator for receiving the output signal generated by the power estimator and for generating the determined supply voltage for application to the power amplifier.
  7. 7. The system according to claim 6 wherein the voltage generator is a DC to DC voltage converter.
  8. 8. The system according to claim 6 wherein the voltage generator comprises at least two fixed voltage supplies selectable by the power estimator.
  9. 9. An access point for a wireless communication system wherein the access point includes the system of claim 1.
  10. 10. An integrated circuit device comprising the power estimator of claim 1.
  11. 11. A method for controlling a power amplifier for amplification of communications signals for transmission, the method including determining a value of a supply voltage for the power amplifier depending on a predicted transmission load.
  12. 12. A non-transitory computer-readable medium having computer-readable instructions stored thereon for execution by a processor to perform a method in accordance with claim 11.
  13. 13. The non-transitory computer-readable medium of claim 12 wherein the tangible computer program product comprises at least one from a group consisting of: a hard disk, a CD-ROM, an optical storage device, a magnetic storage device, a Read Only Memory, a Programmable Read Only Memory, an Erasable Programmable Read Only Memory, EPROM, an Electrically Erasable Programmable Read Only Memory and a Flash memory.
GB1404708.8A 2014-03-17 2014-03-17 System and method for controlling a power amplifier Withdrawn GB2524243A (en)

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JP2019195168A (en) * 2018-04-30 2019-11-07 三星電子株式会社Samsung Electronics Co.,Ltd. Symbol power tracking amplification system and radio communication device including the same
US10686407B2 (en) 2018-04-30 2020-06-16 Samsung Electronics Co., Ltd. Symbol power tracking amplification system and a wireless communication device including the same
US11687258B2 (en) 2021-09-08 2023-06-27 Hewlett Packard Enterprise Development Lp Operational feature activation/disabling

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