JP7390927B2 - gaming machine - Google Patents

Description

The present invention relates to a gaming machine equipped with a processing system for reproducing audio data.

Conventionally, gaming machines are known that include a processing system for reproducing audio data (see Patent Document 1).
This gaming machine selects a sound output component corresponding to a performance pattern from among sound output components (audio data) such as BGM, preview SE, character SE, and role object SE, and selects a sound output component corresponding to a production pattern, Play using. In particular, the volume of each sound output component is monitored and if the volume of any sound output component exceeds a threshold, the volume of that sound output component is reduced. This suppresses an increase in current consumption.

Japanese Patent Application Publication No. 2014-104242

However, in conventional gaming machines, when suppressing an increase in current consumption, there is a risk that the effect of sound production may be reduced.
That is, in the conventional gaming machine, when the volume of the sound output component exceeds a threshold value, the increase in current consumption is suppressed by lowering the volume of the sound output component. As a result, for example, if the volume of a sound output component reproduced using the channel corresponding to the woofer exceeds a threshold, the volume of the woofer will be lowered, weakening the impression of the bass range and improving the sound production. The effectiveness may be reduced.
An object of the present invention is to suppress an increase in current consumption while suppressing a decrease in the effect of sound production.

In order to achieve the above object, the gaming machine according to the first invention includes a plurality of processing systems including a first processing system and a second processing system, and the first processing system has a sound output means. is not connected, the sound based on the audio data assigned to the first processing system is not outputted by the sound output means, and the sound based on the audio data assigned to the first processing system is not output. The system is characterized in that it is possible to adjust the volume of audio data assigned to the processing system.
In the gaming machine according to the first invention, when the volume of the audio data assigned to the first processing system exceeds a predetermined value, the volume of the audio data assigned to the first processing system is not decreased. By reducing the volume of audio data assigned to the second processing system, it is possible to reduce current consumption when outputting audio reproduced by the second processing system.
This makes it possible to prevent the impression of the sound (frequency band) reproduced by the first processing system from becoming weak, and to suppress an increase in current consumption when outputting the sound.
Therefore, the objective is to suppress an increase in current consumption while suppressing a decrease in the effect of sound production.
In particular, in the gaming machine according to the first invention, since the sound output means is not connected to the first processing system, the sound output means does not output the sound based on the audio data assigned to the first processing system. . This makes it possible to control whether or not to adjust the volume of audio data assigned to the second processing system depending on whether or not audio data is assigned to the first processing system.
Here, the plurality of processing systems correspond to audio buses 1 to 8, which will be described later. The first processing system corresponds to an audio bus 8 , which will be described later. The second processing system corresponds to the audio bus 5, which will be described later.

The gaming machine according to the second invention includes a plurality of processing systems including a first processing system, a second processing system, and a third processing system, and the audio data assigned to the third processing system. is assigned to the first processing system based on the volume common to the third processing system, and is assigned to the second processing system based on the volume of the audio data assigned to the first processing system. It is characterized in that it is possible to adjust the volume of the assigned audio data.
In the gaming machine according to the second invention, the specific audio data is assigned to the first processing system while outputting audio based on the audio data (hereinafter referred to as "specific audio data") assigned to the third processing system. It becomes possible to control whether or not to adjust the volume of the audio data assigned to the second processing system depending on whether the volume of the audio data assigned to the second processing system is adjusted.
Here, the plurality of processing systems correspond to audio buses 1 to 8, which will be described later. The first processing system corresponds to an audio bus 8, which will be described later. The second processing system corresponds to the audio bus 5, which will be described later. The third processing system corresponds to the audio bus 6, which will be described later.

A gaming machine according to a fourth invention is a gaming machine according to any one of the first to third inventions, in which the first performance is based on the volume of the audio data assigned to the first processing system. The volume of the audio data assigned to the second processing system is adjusted, and in the second performance, the volume of the audio data assigned to the first processing system is adjusted. The volume of the audio data assigned to the audio data is not adjusted.
In the gaming machine according to the fourth invention, it is possible to increase the variations of sound effects.
Here, the first performance corresponds to sound performance A, which will be described later. The second performance corresponds to sound performance B, which will be described later.

A gaming machine according to a fifth aspect of the invention is characterized in that it includes a plurality of processing systems, and the sound output means does not output audio based on audio data assigned to a predetermined processing system among the plurality of processing systems.

According to the present invention, it is possible to suppress an increase in current consumption while suppressing a decrease in the effect of sound production.

FIG. 1 is a perspective view showing the overall configuration of a pachinko machine. It is a diagram showing the front of the game board and schematically showing the parts especially necessary for explanation. FIG. 2 is a block diagram showing the configuration of a control system of a pachinko machine. FIG. 2 is a block diagram showing the configuration of a firing condition detection circuit and a firing control circuit. It is a block diagram showing the composition of an effect control board. This is an address map of a memory area used by the CPU 210. It is a flowchart which shows CPU initialization processing. 3 is a flowchart showing main loop processing. 3 is a flowchart illustrating evacuation processing when power is cut off. 3 is a flowchart showing timer interrupt processing. 3 is a flowchart showing dynamic port output processing. 3 is a flowchart showing performance display device output processing. 5 is a flowchart illustrating setting-related processing. 5 is a flowchart showing switch management processing. It is a flowchart which shows normal figure starting ball detection processing. It is a flowchart which shows special figure 1 starting ball detection processing. It is a flowchart which shows special figure 2 starting ball detection processing. It is a flowchart showing special symbol random number acquisition processing. It is a flowchart showing special game management processing. It is a flowchart which shows special figure fluctuation waiting processing. It is a flowchart which shows processing during special figure fluctuation. It is a flowchart which shows special figure stop processing. It is a flowchart showing the big prize opening pre-opening process. It is a flowchart which shows special electric role opening/closing switching processing. It is a flowchart showing the big prize opening control process. It is a flowchart showing the big winning opening closing valid processing. It is a flowchart showing the big prize opening end wait process. It is a flowchart showing normal game management processing. It is a flowchart which shows the normal pattern fluctuation waiting process. It is a flowchart which shows processing during normal figure fluctuation. It is a flowchart which shows processing during normal figure stop. It is a flowchart which shows the normal electric accessory release pre-processing. It is a flowchart which shows normal electric role opening/closing switching processing. It is a flowchart which shows normal electric accessory release control processing. It is a flowchart which shows normal electric accessory closure effective processing. It is a flowchart showing normal electric accessory opening end wait processing. 3 is a flowchart showing performance display device control processing. 5 is a flowchart showing sub CPU initialization processing. 5 is a flowchart showing initial transfer processing. 3 is a flowchart showing sub-timer interrupt processing. 3 is a flowchart showing command analysis processing. 3 is a flowchart illustrating pending command reception processing. 3 is a flowchart illustrating a prefetch command reception process. 3 is a flowchart illustrating variable command reception processing. 3 is a flowchart illustrating stop command reception processing. 7 is a flowchart showing opening command reception processing. 3 is a flowchart showing Vsync interrupt processing. 3 is a flowchart showing command construction task processing. It is a flowchart which shows sound interrupt processing. 5 is a flowchart showing lamp interrupt processing. 3 is a flowchart showing movable body interrupt processing. FIG. 2 is a block diagram showing the configuration of a sound circuit. FIG. 3 is a diagram showing types of frequency correction parameters. FIG. 3 is a diagram showing settings of a channel router. It is a figure explaining a ducking function. It is a figure showing the contents of the command list corresponding to sound effects A and B.

Embodiments of the present invention will be described below with reference to the drawings.
In this embodiment, a gaming machine according to the present invention is applied to a pachinko machine 1.

(Overall configuration of pachinko machine 1)
First, the overall configuration of the pachinko machine 1 will be explained.
FIG. 1 is a perspective view showing the overall configuration of a pachinko machine. The pachinko machine 1 includes an outer frame unit 2, an inner frame unit 3, an integrated door unit 4, and a game board unit 10.
The outer frame unit 2, the inner frame unit 3, and the integral door unit 4 are fixed to each other via a hinge mechanism. Thereby, the inner frame unit 3 can be opened and closed with respect to the outer frame unit 2. Moreover, the integral door unit 4 can be opened and closed with respect to each of the inner frame unit 3 and the outer frame unit 2.

The outer frame unit 2 includes a rectangular frame (outer frame). The outer frame of the outer frame unit 2 is fixed to the island equipment of the game hall.
The inner frame unit 3 includes a rectangular frame (inner frame). The inner frame unit 3 is arranged inside the outer frame unit 2.
The integral door unit 4 is formed into a rectangular door shape. The integrated door unit 4 includes a transparent plate 4a disposed approximately in the center, a decorative portion 4b disposed around the transparent plate 4a, and a saucer unit 5 disposed below the transparent plate 4a. A firing handle unit 6 is disposed on the side of the saucer unit 5.

The transparent plate 4a is formed into a flat plate shape from a transparent material such as resin or glass. The decorative portion 4b is made of a transparent or semi-transparent resin material and has a shape that bulges forward. A sound cutout part 4c in which a speaker 22 (see FIG. 3) is disposed is provided at each upper corner of the decorative part 4b. Each sound extraction part 4c is provided with a plurality of sound extraction holes through which the sound output from the speaker 22 passes. Further, a frame lamp 20 (see FIG. 3) is arranged in the decorative portion 4b. The frame lamp 20 includes a plurality of light emitting elements (LEDs) driven by dynamic lighting control.

The tray unit 5 includes a tray 5a for receiving game balls (rental balls and prize balls), and various operating means that can be operated by the player.
In this embodiment, various operation means include a production button 5b, a rotary selector 5c, a light amount adjustment button (not shown), a volume adjustment button (not shown), a cross key button (not shown), etc. ing.
The performance button 5b includes an operation section that can be pressed by the player, and a button switch 25 (see FIG. 3) that detects the press operation of the operation section. The button switch 25 outputs a detection signal to the production control board 300 (see FIG. 3) every time the operating section is pressed.
The rotary selector 5c (so-called "jog dial") includes an operation section that can be rotated by the player, and a dial switch 26 (see FIG. 3) that detects the rotation operation of the operation section. The dial switch 26 outputs a detection signal to the production control board 300 every time the operating section is rotated by a predetermined angle (for example, 60 [°]).

The light amount adjustment button consists of two operation parts (a first operation part and a second operation part) that can be pressed by the player, and a light amount adjustment switch 27 that detects the press operation of each operation part (see FIG. 3). It is composed of and. The light amount adjustment switch 27 outputs a first detection signal to the production control board 300 each time the first operation section is pressed, and outputs a second detection signal every time the second operation section is pressed. The detection signal is output to the production control board 300.
The volume adjustment button includes two operation parts (a first operation part and a second operation part) that can be pressed by the player, and a volume adjustment switch 28 (see FIG. 3) that detects the press operation of each operation part. It is composed of and. The volume adjustment switch 28 outputs a first detection signal to the production control board 300 each time the first operation section is pressed, and outputs a second detection signal every time the second operation section is pressed. The detection signal is output to the production control board 300.
The cross key button consists of four operation parts (upper key button, lower key button, left key button, and right key button) that can be pressed by the player, and a cross key switch that detects the press operation of each operation part. 29 (see FIG. 3). The cross key switch 29 outputs a first detection signal to the production control board 300 each time the upper key button is pressed, and outputs a second detection signal each time the lower key button is pressed. Every time the left key button is pressed, a third detection signal is output to the production control board 300, and every time the right key button is pressed, a fourth detection signal is output to the production control board 300. The detection signal is output to the production control board 300.

Further, on the upper surface of the saucer unit 5, a lending operation section 7 is arranged. The rental operation section 7 includes a ball rental button 7a, a return button 7b, and a frequency display device 7c.
Here, the pachinko machine 1 is communicably connected to a CR unit 700 that can read and update information recorded on a prepaid card. When a prepaid card (not shown) is inserted into the CR unit 700, the remaining power of the valuable medium recorded on the prepaid card inserted into the CR unit 700 is displayed on the power display device 7c.
Further, when the ball lending button 7a is operated with the prepaid card inserted into the CR unit 700, a predetermined number of game balls are paid out to the saucer 5a. At this time, the remaining frequency of the valuable medium recorded on the prepaid card is updated according to the number of game balls that have been paid out, and the updated remaining frequency of the valuable medium is displayed on the frequency display device 7c.
Further, if the return button 7b is operated while a prepaid card with remaining value media remaining is inserted into the CR unit 700, the prepaid card is returned from the CR unit 700.
Here, examples of the prepaid cart include a magnetic storage medium, a storage IC built-in medium, and the like.

The firing handle unit 6 includes a handle base portion (not shown), a handle operating portion (not shown), and a firing stop button (not shown).
The handle base portion is attached to the front side of the integral door unit 4. A bearing portion is provided on the front side of the handle base portion.
The handle operating section is configured in a shape that allows it to be held by a player. A rotating shaft portion is provided on the back side of the handle operation portion. The handle operation part is rotatably attached to the handle base part by having its rotation shaft part supported by a bearing part of the handle base part.
The handle operating section can be rotated (displaced) between a predetermined initial position and a predetermined limit position. Inside the firing handle unit 6, a biasing means (a spring in this embodiment) that biases the handle operating portion toward the initial position is arranged. As a result, the handle operation section is placed (displaced) at the initial position when no rotation operation is performed by the player.
The firing stop button is provided on the side of the handle operation section. The firing stop button can be pressed by the player.

Further, the firing handle unit 6 includes a firing volume 411, a touch sensor 412, and a firing stop switch 413.
Firing volume 411 is configured by a variable resistor. The firing volume 411 detects the amount of rotation operation of the handle operation section (the angle at which the handle operation section is rotated). Specifically, the firing volume 411 is configured to include a rotation shaft and a resistor whose resistance value changes depending on the amount of rotation (rotation angle) of the rotation shaft. The rotation axis of the firing volume 411 is coaxially fixed to the rotation axis of the handle operation section. As a result, the rotation axis of the firing volume 411 is rotated in response to the rotational operation of the handle operating section, and the resistance value of the firing volume 411 is changed according to the amount of rotational operation of the handle operating section.
The firing volume 411 is electrically connected to the operation detection section 421 (see FIG. 4). The operation detection unit 421 detects a rotational operation (amount of rotational operation) of the handle operation unit based on a change in the resistance value (voltage value) of the firing volume 411.
The touch sensor 412 detects contact (grasping) of the handle operation section by the player based on a change in capacitance. Then, the touch sensor 412 outputs a touch signal to the firing enable condition detection unit 422 (see FIG. 4) when the touch of the handle operation unit by the player is detected (the touch signal is set to high level). do). On the other hand, the touch sensor 412 stops outputting the touch signal to the shooting enable condition detection section 422 (sets the touch signal to a low level) when no contact by the player with the handle operation section is detected.
The firing stop switch 413 detects a pressing operation of the firing stop button. Then, the firing stop switch 413 outputs a firing stop signal to the firing possible condition detection unit 422 (sets the firing stop signal to a high level) when no press operation of the firing stop button is detected. On the other hand, the firing stop switch 413 stops outputting the firing stop signal to the firing possible condition detection unit 422 (setting the firing stop signal to a low level) when the pressing operation of the firing stop button is detected.

(Configuration of game board unit 10)
Next, the configuration of the game board unit 10 will be explained.
FIG. 2 is a diagram showing the front of the game board and schematically showing the parts particularly necessary for explanation.
The game board unit 10 is supported by the inner frame unit 3. Specifically, the game board unit 10 is attached to the inside of the inner frame included in the inner frame unit 3. As a result, the game board unit 10 is placed on the back side of the integrated door unit 4. The player can visually check the game board 11 (game area 30), which will be described later, through the transparent plate 4a. In this embodiment, a game area 30, which will be described later, is configured between the back side of the transparent plate 4a and the front side of the game board 11.
As shown in FIG. 2, the game board unit 10 includes a set board (not shown), a game board 11 attached to the set board, and various performance devices (main image display device 31, sub (an image display device 32, a movable body unit, etc.).

The set plate is formed into a box shape with an open front side. An opening consisting of a through hole is provided approximately at the center of the back plate of the set plate.
The game board 11 is attached to the front side of the set board. The game board 11 is made of resin and is formed into a flat plate shape. Approximately at the center of the game board 11, an opening (not shown) consisting of a through hole is provided. The player can view the display screen 31a of the main image display device 31 through the opening provided in the game board 11 and the opening provided in the set board.
A game area 30 is formed around the opening on the front side of the game board 11, in which game balls shot out in response to the rotational operation of the firing handle unit 6 flow down. The gaming area 30 is configured with a left path formed on the left side of the main image display device 31 and a right side path formed on the right side of the main image display device 31 as a path for the game ball to flow down. There is.
Further, in the game area 30 of the game board 11, a board lamp 21 (see FIG. 3) is provided. The panel lamp 21 includes a plurality of light emitting elements (LEDs) driven by dynamic lighting control.

The main image display device 31 is attached to the back side of the set plate. The main image display device 31 is configured by a variable display device such as a liquid crystal display or a CRT (Cathode Ray Tube) display.
The main image display device 31 includes a display screen 31a that can display various effect images (moving images and still images).
The display screen 31a displays three first effect pattern display areas a1 to a3 (not shown) in which the first effect pattern z1 (not shown) is displayed, and a second effect pattern z2 (not shown). It is possible to configure one second effect pattern display area a4 (not shown).
The first performance pattern z1 includes identification information (designs) such as numbers, letters, symbols, and characters. In each of the first performance symbol display areas a1 to a3, it is possible to perform variable display and static display of the first performance symbol z1. The second effect pattern z2 is composed of color bars. In the second performance symbol display area a4, it is possible to perform variable display and static display of the second performance symbol z2.

The variable display of the production symbols z1 and z2 means that the first production symbol z1 is moved (scrolled) in each of the first production symbol display areas a1 to a3, and the first production symbol z1 displayed in the second production symbol display area a4 is 2 Refers to a display in which the type of the effect pattern z2 is changed (the color represented by the color bar is changed in sequence).
Stop display of performance symbols z1 and z2 means that one type of first performance symbol z1 is stopped at the lottery result display position of each of the first performance symbol display areas a1 to a3, and the second performance symbol display area a4 , refers to a display in which one type of second effect pattern z2 is displayed (the color bar represents a predetermined color).
Then, a special symbol is created by a combination of the first performance symbol z1 that is stopped and displayed in the three first performance symbol display areas a1 to a3 and the second performance symbol z2 that is stopped and displayed in the second performance symbol display area a4. The result of the lottery (first special symbol lottery or second special symbol lottery) is displayed.
Further, the display screen 31a can configure pending symbol display areas b1 and b2 (not shown) in which pending symbols h (not shown) are displayed.
In the pending symbol display area b1, a pending symbol h corresponding to the game information being displayed (fluctuating display and stop display of special symbols) is displayed. In the pending symbol display area b2, a pending symbol h corresponding to the game information whose notification display is pending is displayed.

The sub-image display device 32 is arranged at a position on the front side of the main image display device 31.
The sub-image display device 32 is constituted by a variable display device such as a liquid crystal display or a CRT display. The sub-image display device 32 has a display screen 32a capable of displaying an effect image.
The sub-image display device 32 can be displaced (moved) in the vertical direction by a drive mechanism (not shown). Specifically, the sub-image display device 32 can be displaced within a predetermined range including the origin position (see FIG. 2) and a presentation position (not shown) below the origin position. .
The sub-image display device 32 disposed (displaced) at the origin position is disposed above the display screen 31a of the main image display device 31 and does not cover the display screen 31a. On the other hand, the sub-image display device 32 disposed (displaced) at the presentation position is disposed on the front side of the display screen 31a of the main image display device 31, and covers a part of the display screen 31a.

A first starting port 51 is provided below the display screen 31a in the gaming area 30. The first starting port 51 is a ball entry port (so-called "belly button") that opens upward, and allows game balls to enter at all times. The first starting port 51 is configured such that a game ball flowing down the left path can enter the ball (a game ball flowing down the right path cannot enter the ball).
A special figure 1 starting port switch 101 (see FIG. 3) is disposed within the first starting port 51. The special figure 1 starting port switch 101 sends a detection signal to the main control board 200 in response to detection of a game ball entering the first starting port 51 (entering the game ball into the first starting port 51). Output. The main control board 200 executes the first special symbol lottery in response to the input of the detection signal from the special symbol 1 starting port switch 101.

To the left of the first starting opening 51 in the gaming area 30, an upper left other winning hole 55, a middle left other winning hole 56, and a lower left other winning hole 57 are provided. Each of the other winning holes 55 to 57 is a ball entrance opening that opens upward, and allows game balls to enter at all times. Each of the other prize openings 55 to 57 is configured such that game balls flowing down the left path can enter (game balls flowing down the right path cannot enter).
The game board 11 is provided with a left winning port switch 106 (see FIG. 3). The left winning hole switch 106 is used to control the game ball that entered the upper left winning hole 55 (entering the game ball into the upper left winning hole 55), the game ball that entered the left middle winning hole 56 (the left middle winning hole, etc.) In response to the detection of the game ball entering the opening 56) and the game ball entering the lower left other winning hole 57 (the game ball entering the lower left other winning hole 57), a detection signal is sent to the main control board. Output for 200. The main control board 200 causes the game ball payout device 440 to execute the payout operation of prize balls in response to the input of the detection signal from the left winning port switch 106.

A starting gate 41 is provided on the right side of the display screen 31a in the gaming area 30. The starting gate 41 is formed so that game balls can pass through it at all times. The starting gate 41 is configured such that game balls flowing down the right path can pass through it (game balls flowing down the left path cannot pass through it).
The starting gate 41 is provided with a gate switch 104 (see FIG. 3). Gate switch 104 outputs a detection signal to main control board 200 in response to detection of a game ball passing through starting gate 41 (passing of starting gate 41 by a game ball). The main control board 200 executes a normal symbol lottery in response to the input of the detection signal from the gate switch 104.

A big prize opening 53 is provided below the starting gate 41 in the gaming area 30. The grand prize opening 53 can be displaced into a closed state in which it is impossible to enter a game ball into the grand prize opening 53 and an open state in which it is possible to enter a gaming ball into the grand prize opening 53. A special electric accessory (special electric accessory) 53a (so-called "attacker") is provided that can perform the following actions.
The special electric accessory 53a is opened and closed by a special electric accessory solenoid 65 (see FIG. 3). Normally, the special electric accessory 53a is in a closed state, making it impossible for game balls to enter the grand prize opening 53, but if you win the first special symbol lottery or the second special symbol lottery. When a jackpot game state occurs, the special electric accessory 53a is opened and a game ball can enter the game ball. The grand prize opening 53 allows the entry of game balls flowing down the right path (it is not possible to enter the game balls flowing down the left path).
A count switch 103 (see FIG. 3) is arranged inside the grand prize opening 53. The count switch 103 outputs a detection signal to the main control board 200 in response to detection of a game ball that has entered the big winning hole 53 (entering the game ball into the big winning hole 53). The main control board 200 causes the game ball payout device 440 to execute the payout operation of prize balls in response to the input of the detection signal from the count switch 103.

A second start opening 52 is provided below the big winning opening 53 in the gaming area 30. The second starting port 52 has two states: a closed state that makes it impossible for game balls to enter the second starting port 52, and an open state that allows game balls to enter the second starting port 52. A movable ordinary electric accessory (ordinary electric accessory) 52a (so-called "electric tulip") is provided.
The normal electric accessory 52a is opened and closed by a normal electric accessory solenoid 64 (see FIG. 3). Normally, the normal electric accessory 52a is in a closed state and the second starting port 52 is in a closed state, making it impossible for game balls to enter the second starting port 52. 52a is opened, allowing the game ball to enter. The second starting port 52 allows entry of game balls flowing down the right path (incapable of entry of game balls flowing down the left path).
A special figure 2 starting port switch 102 (see FIG. 3) is disposed within the second starting port 52. The special figure 2 starting port switch 102 sends a detection signal to the main control board 200 in response to detection of a game ball entering the second starting port 52 (entering the game ball into the second starting port 52). Output. The main control board 200 executes the second special symbol lottery in response to the input of the detection signal from the special symbol 2 starting port switch 102.

A right winning opening 54 is provided below the second starting opening 52 in the gaming area 30. The other right winning hole 54 is a ball entrance opening that opens upward, and allows game balls to enter at all times. The other right winning hole 54 is configured such that game balls flowing down the right path can enter there (game balls flowing down the left path cannot enter).
In the other right winning hole 54, a right winning hole switch 105 (see FIG. 3) is arranged. The right winning hole switch 105 outputs a detection signal to the main control board 200 in response to the detection of the game ball that has entered the right other winning hole 54 (the game ball entering the right other winning hole 54). . The main control board 200 causes the game ball payout device 440 to execute the payout operation of prize balls in response to the input of the detection signal from the right winning port switch 105.

At the lowest position in the game area 30, an out port 58 is provided for discharging game balls that have not entered any of the winning ports 51 to 57 (win).
Here, the inner frame unit 3 includes a discharge path (not shown) through which game balls discharged from the game area 30 pass. Specifically, the discharge path is attached to the back side of the inner frame included in the inner frame unit 3. The pachinko machine 1 is configured such that all the game balls launched into the game area 30 (all the game balls ejected from the game area 30) pass through the ejection path. That is, the game ball launched into the game area 30 is ejected from the game area 30 by entering any of the winning ports 51 to 57 or by passing through the out port 58, and flows into the discharge path. do.
Specifically, the game ball that has entered each of the winning holes 51 to 57 is guided to the discharge path after being detected by the switches 101 to 103, 105, and 106 arranged in the winning hole. Moreover, the game balls discharged from the out port 58 are guided to the discharge path.
The inner frame unit 3 is provided with an out switch 109 (see FIG. 3). Then, the out switch 109 outputs a detection signal to the main control board 200 in response to detection of a game ball passing through the discharge path (a game ball discharged from the game area 30). As a result, all the game balls ejected from the game area 30 are detected by the out switch 109.
Further, in the game area 30, a plurality of nails (not shown) are arranged so as to guide game balls to each of the winning holes 51 to 57 and the starting gate 41.

A main display device 60 is provided on the game board 11. The main display device 60 includes a plurality of lighting elements (segments). Each lighting element is composed of a light emitting element (in this embodiment, an LED).
The main display device 60 displays information regarding games.
The main display device 60 includes a special map 1 display device, a special map 2 display device, a regular map display device, a special map 1 reservation display device, a special map 2 reservation display device, a regular map reservation display device, and a round map display device. It is configured to include a display device, a right-handed display device, a variable probability display device, and a time saving display device.
Specifically, the main display device 60 is configured to include 32 lighting elements (LED1 to LED32).
In the main display device 60, LED1 to LED8 constitute a special figure 1 display device, LED7 to LED16 constitute a special figure 2 display device, LEDs 17 and 18 constitute a regular figure display device, and LED19 ~ The LED 23 constitutes a round display device, the LED 24 constitutes a right-handed display device, the LEDs 25 and 26 constitute a special figure 1 reservation display device, and the LEDs 27 and 28 constitute a special symbol 2 reservation display device. However, the LEDs 29 and 30 constitute a normal figure reservation display device, the LED 31 constitutes a probability change display device, and the LED 32 constitutes a time saving display device.

The special figure 1 display device is capable of variable display and stop display of a first special symbol consisting of numbers, symbols, etc. Then, in the special figure 1 display device, the result of the first special symbol lottery is displayed using the first special symbol that is stopped and displayed.
The special figure 2 display device is capable of variable display and stop display of a second special symbol consisting of numbers, symbols, etc. Then, in the special figure 2 display device, the result of the second special symbol lottery is displayed using the second special symbol that is stopped and displayed.
Here, the display of the special symbol (first special symbol or second special symbol) on the special symbol display device and the display of the production symbols z1 and z2 in the production symbol display areas a1 to a4 are based on the time when the variable display starts. , the time when the stop display starts, and the lottery result indicated by the stop display symbol are associated with each other.
Then, if the first special symbol (stop symbol) stopped and displayed on the special figure 1 display device becomes a specific symbol (jackpot symbol), or the second special symbol (stopped symbol) stopped and displayed on the special figure 2 display device becomes a specific symbol (jackpot symbol). When the stop symbol) becomes a specific symbol (jackpot symbol), a jackpot gaming state which is an advantageous gaming state for the player occurs.

The ordinary symbol display device is capable of fluctuating and statically displaying ordinary symbols consisting of numbers, symbols, etc. Then, in the ordinary symbol display device, the result of the ordinary symbol lottery is displayed using the stopped and displayed ordinary symbols. Then, when the normal symbol stopped and displayed on the common symbol display device becomes a specific symbol (a common symbol per symbol), a common symbol per game state which is an advantageous gaming state for the player is generated.

The special figure 1 reservation display device displays the number of times the display of the lottery result of the first special symbol lottery is suspended (special figure 1 reservation number).
The special figure 2 pending display device displays the number of times the display of the lottery result of the second special symbol lottery is suspended (special figure 2 pending number).
The number of times the display of the lottery result of the regular symbol lottery is suspended (the number of reserved symbols) is displayed on the regular symbol reservation display device.
The round display device displays the number of round games executed during the jackpot gaming state (type of jackpot gaming state).
The right-handed display device displays the path (left-hand path or right-side path) in which the game ball should be hit.
The probability change display device displays the gaming state (during the occurrence of a special pattern high probability state or during the occurrence of a special pattern low probability state) when the power is restored.
The time saving display device displays the current gaming state (whether the time saving control is being executed or stopped).

Furthermore, the pachinko machine 1 is provided with one or more movable units (not shown). In this embodiment, one or more movable units are arranged in the integrated door unit 4, and one or more movable units are arranged in the game board unit 10.
Each movable body unit of the integrated door unit 4 is disposed on the front of the decoration part 4b, the upper surface of the saucer unit 5, etc., and is capable of performing a predetermined performance operation.
Each movable body unit of the game board unit 10 is attached to the front side of the set plate. Specifically, each movable body unit is arranged in a space (hereinafter referred to as "performance space") between the game board 11 and the main image display device 31 (display screen 31a). Each movable body unit is capable of performing a predetermined performance operation in the performance space.
Each movable unit includes a presentation member, a drive mechanism, a drive source, and a position detection sensor 24 (see FIG. 3). In this embodiment, a motor 23 (see FIG. 3) is used as the drive source. The motor 23 is a stepping motor. Note that a solenoid may be used as the drive source.
The presentation member can be displaced along a predetermined direction by a drive mechanism. Specifically, the presentation member can be displaced to a plurality of positions including an initial position and a presentation position. The presentation member is driven (displaced) by the motor 23.

The position detection sensor 24 is composed of a photo sensor or the like. The position detection sensor 24 detects the position of the presentation member. Specifically, the position detection sensor 24 includes a light projecting section and a light receiving section that receives the light projected from the light projecting section. Then, the position detection sensor 24 outputs a detection signal to the production control board 300 in response to the reception (detection) of the light projected from the light projecting section by the light receiving section. On the other hand, the position detection sensor 24 stops outputting the detection signal to the production control board 300 when the light receiving section does not receive (detect) the light projected from the light projecting section.
Further, a shielding plate is provided at a predetermined position of the presentation member. When the presentation member is placed at the initial position, the shielding plate is placed between the light projecting part and the light receiving part of the position detection sensor 24, and blocks light from entering the light receiving part. As a result, when the production member is placed at the initial position, the output of the detection signal from the position detection sensor 24 to the production control board 300 is stopped. On the other hand, when the effect member is not placed at the initial position, a detection signal is output from the position detection sensor 24 to the effect control board 300.
Thereby, the effect control board 300 is able to detect whether or not the effect member is placed at the initial position based on the input status of the detection signal from the position detection sensor 24.

Furthermore, the pachinko machine 1 is provided with a detection sensor that detects various abnormal conditions.
In this embodiment, as detection sensors, a glass frame opening sensor 107, an inner frame opening sensor 108, a vibration detection sensor 113, a radio wave detection sensor 114, a magnetic detection sensor 115, etc. are provided.
The glass frame opening sensor 107 detects opening of the integral door unit 4 with respect to the inner frame unit 3. Then, the glass frame open sensor 107 transmits a detection signal to the main control board 200 via the dispensing control board 400 in response to the opening of the integral door unit 4 with respect to the inner frame unit 3.
The inner frame open sensor 108 detects opening of the inner frame unit 3 with respect to the outer frame unit 2. Then, the inner frame open sensor 108 transmits a detection signal to the main control board 200 via the payout control board 400 in response to the opening of the inner frame unit 3 with respect to the outer frame unit 2.

The vibration detection sensor 113 detects vibrations of the game board 11. In this embodiment, the vibration detection sensor 113 is arranged on the game board 11. The vibration detection sensor 113 transmits a detection signal to the main control board 200 in response to detection of vibration of the game board 11.
The radio wave detection sensor 114 detects radio waves generated around the game board 11. In this embodiment, two radio wave detection sensors 114 are arranged on the game board 11. Each radio wave detection sensor 114 transmits a detection signal to the main control board 200 in response to detection of radio waves.
The magnetic detection sensor 115 detects magnetism generated around the game board 11. In this embodiment, three magnetic detection sensors 115 are provided. Specifically, one magnetic detection sensor 115 is disposed in the inner frame unit 3 (discharge path). Further, on the game board 11, two magnetic detection sensors 115 are arranged. The magnetic detection sensor 115 provided in the inner frame unit 3 transmits a detection signal to the main control board 200 via the payout control board 400 in response to the detection of magnetism. Further, each magnetic detection sensor 115 provided on the game board 11 transmits a detection signal to the main control board 200 in response to detection of magnetism.

(Control system configuration)
Next, the configuration of the control system in the pachinko machine 1 will be explained.
FIG. 3 is a block diagram showing the configuration of the control system of the pachinko machine. FIG. 6 is an address map of the memory area used by the CPU 210.
The pachinko machine 1 includes various control boards.
Specifically, as shown in FIG. 3, the pachinko machine 1 supplies power (power) to the main control board 200, the production control board 300, the payout control board 400, each control board 200, 300, 400, etc. It includes a plurality of control boards, such as a power supply board 600, a driver board 330, and a sub-connection board 340.
The plurality of control boards 200, 300, 400, and 600 are mutually independent (separate) circuit boards. Further, each control board 200, 300, 400, and 600 is housed in an individual board case.
The main control board 200 and the performance control board 300 are included in the game board unit 10. Specifically, the main control board 200 and the performance control board 300 are attached to the back side of the game board 11.
The payout control board 400 is included in the inner frame unit 3. Specifically, the payout control board 400 is attached to the back side of the inner frame included in the inner frame unit 3.

(Configuration of main control board 200)
First, the configuration of the main control board 200 will be explained.
The main control board 200 controls the progress of the game.
The main control board 200 includes a one-chip microcomputer (one-chip microcomputer), a clock generation circuit 202, a random number generation circuit 203, an input port 204, an output port 205, a performance display device 206, a RAM clear switch 207, a setting key switch 208, and a sink. It is configured to include a driver 240, source drivers 250a, 250b, and the like.
A one-chip microcomputer is an LSI that integrates a CPU core, registers, semiconductor memory, etc. Specifically, the one-chip microcomputer is configured to include a CPU 210, a ROM 220, a RAM 230, and the like.

The main control board 200 is configured to include a memory area used by the CPU 210. As shown in FIG. 6, the memory area used by the CPU 210 includes a memory area (0000H to 2FFFH) allocated to the ROM 220 and a memory area (F000H to F3FFH) allocated to the RAM 230. .
Here, in FIG. 6, addresses for specifying memory areas are shown in hexadecimal numbers ("H" indicates hexadecimal numbers).

The ROM 220 (memory area of the ROM 220) includes a used area m1 (0000H to 1A7AH) and an unused area m2 (2000H to 2BFFH).
The used area m1 includes a program area, an unused area, and a data area. The program area stores a program (program code) for controlling the progress of the game. The data area stores data (program data) for controlling the progress of the game. Note that the used area m1 may be configured without including an unused area.

The unused area m2 includes a program area and a data area.
The program area contains a program (program code) for executing processing related to tests specified by gaming machine regulations, and a program (program code) for controlling the display of the performance display device 206 (specifically, calculating the base ratio). code) and are stored. The data area stores data (program data) for executing processing related to tests specified by gaming machine regulations, and data (program data) for controlling the display of the performance display device 206.
In addition to the used area m1 and the unused area m2, the ROM 220 is also provided with an unused area, a ROM comment area, a program management area, and the like.
The ROM comment area stores arbitrary data such as the program title and version. On the other hand, the program management area stores information necessary for the CPU 210 to execute various programs.
Further, in the ROM 220, an unused area m3 of a predetermined byte (for example, 16 bytes or more) is provided between the used area m1 and the unused area m2. This clarifies the boundary between the used area m1 and the unused area m2.

The RAM 230 (memory area of the RAM 230) includes a used area M1 (F000H to F1FFH) and an unused area M2 (F300H to F3FFH).
The usage area M1 includes a work area and a stack area.
The work area is used as an area for temporarily storing various data during execution of the program (program for controlling the progress of the game) stored in the usage area m1. On the other hand, the stack area is used as an area for temporarily saving various data while the program (program for controlling the progress of the game) stored in the usage area m1 is being executed. Note that the used area M1 may be configured without including an unused area.
Specifically, the work area includes a setting value area, a gaming machine status flag area, a checksum area, a backup flag area, an error related area, a normal game related area 1, and a normal game related area 2. It is composed of:
Setting values are stored in the setting value area. A gaming machine status flag is stored in the gaming machine status flag area. A checksum is stored in the checksum area. A backup flag is stored in the backup flag area. The error related area stores information regarding errors. In the normal game related area 1, subcommand pointers and the like are stored. The normal game related area 2 stores input/output data in the main control board 200, data for arithmetic processing, various counters (random number counter, timer counter, etc.), flags for managing lottery results, game status, etc. In particular, the normal game-related area 2 is an area for storing game information acquired in response to input of detection signals from each of the special figure 1 starting gate switch 101, special figure 2 starting gate switch 102, and gate switch 104. (a game information storage area to be described later).

The unused area M2 includes a work area and a stack area.
During the execution of the program stored in the unused area m2 (a program for executing processing related to tests specified by gaming machine regulations or a program for controlling the display of the performance display device 206), the work area is It is used as an area to temporarily store various data. On the other hand, the stack area is used during execution of a program stored in the unused area m2 (a program for executing processing related to tests specified by gaming machine regulations, or a program for controlling the display of the performance display device 206). It is used as an area to temporarily save various data.
Specifically, the work area includes a performance display related area. The performance display related area is used as an area for temporarily storing various data during execution of a program for controlling the display of the performance display device 206.
Further, in the RAM 230, an unused area M3 of a predetermined byte (16 bytes or more) is provided between the used area M1 and the unused area M2. This clarifies the boundary between the used area M1 and the unused area M2.

In this embodiment, in the process based on the program (program for controlling the progress of the game) stored in the used area m1, it is permitted to refer to the data stored in the unused area M2.
On the other hand, the data stored in the unused area M2 is prohibited from being rewritten (changed) by processing based on the program (program for controlling the progress of the game) stored in the used area m1. There is.
In addition, in processing based on a program stored in the unused area m2 (a program for executing processing related to a test specified by gaming machine regulations, or a program for controlling the display of the performance display device 206), the used area It is permitted to refer to the data stored in M1.
On the other hand, by processing based on a program stored in the unused area m2 (a program for executing processing related to the test specified by the gaming machine regulations, or a program for controlling the display of the performance display device 206), the used area It is prohibited that the data stored in M1 be rewritten (changed).
The game in the pachinko machine 1 can be progressed (completed) by the program (program for controlling the progress of the game) stored in the use area m1.

The clock generation circuit 202 generates a clock (synchronization signal) at a predetermined clock frequency (12 [MHz] in this embodiment) and outputs this clock to each of the CPU 210 and the random number generation circuit 203.
The random number generation circuit 203 includes a first loop counter that generates a winning random number for the normal symbol lottery, a second loop counter that generates a jackpot random number for the first special symbol lottery, and a second loop counter that generates a jackpot random number for the second special symbol lottery. It is configured to include a 3-loop counter and a 4th loop counter that generates a reach group random number.
The first loop counter updates the value of the loop counter by 1 within a predetermined range (in the present embodiment, within the range of 0 to 65535) every time one clock is input from the clock generation circuit 202. To generate a winning random number for a normal symbol lottery. In this embodiment, the value of the first loop counter is updated every 0.083 [μs] (1 [s]/12 [MHz] = 0.083 [μs]).
The second loop counter updates the value of the loop counter by 1 within a predetermined range (in the present embodiment, within the range of 0 to 65535) every time one clock is input from the clock generation circuit 202. A jackpot random number for the first special symbol lottery is generated. In this embodiment, the value of the second loop counter is updated every 0.083 [μs] (1 [s]/12 [MHz] = 0.083 [μs]).

The third loop counter updates the value of the loop counter by 1 within a predetermined range (in the present embodiment, within the range of 0 to 65535) every time one clock is input from the clock generation circuit 202. A jackpot random number for the second special symbol lottery is generated. In this embodiment, the value of the third loop counter is updated every 0.083 [μs] (1 [s]/12 [MHz] = 0.083 [μs]).
The fourth loop counter keeps the value of the loop counter within a predetermined range (in this embodiment, from 0 to 10006) every time 32 clocks are input from the clock generation circuit 202 (once by dividing the clock frequency by 32). Within the range), a reach group random number is generated by updating it by 1. In this embodiment, the value of the fourth loop counter is updated every 2.666 [μs] (32 [s]/12 [MHz] = 2.666 [μs]).

The input port 204 is configured to include a plurality of input ports (input port 0 to input port 3 in this embodiment).
Input port 0 receives a detection signal from the glass frame open sensor 107, a detection signal from the inner frame open sensor 108, a detection signal from the vibration detection sensor 113, a detection signal from one of the radio wave detection sensors 114, and a magnetic detection sensor 115. Detection signals etc. from are input.
The input port 1 receives a RAM clear signal from the RAM clear switch 207, a detection signal from the setting key switch 208, a handle detection signal from the firing enable condition detection section 422, and the like.
The input port 2 receives a detection signal from the count switch 103, a detection signal from the right winning port switch 105, a detection signal from the left winning port switch 106, a detection signal from the out switch 109, and a detection signal from the other radio wave detection sensor 114. Detection signals and the like are input.
The input port 3 receives a detection signal from the special map 1 starting port switch 101, a detection signal from the special chart 2 starting port switch 102, a detection signal from the gate switch 104, etc.
Each input port (input port 0 to input port 3) is provided with a reception storage area corresponding to each switch/sensor (detection signal). In the reception storage area corresponding to each switch/sensor, 1-bit data indicating the reception state of the detection signal from the switch/sensor is set.
Specifically, when the detection signal from the switch/sensor is input (high level), "1" is set in the reception storage area corresponding to each switch/sensor, and the reception storage area corresponding to the switch/sensor is set to "1". "0" is set when no detection signal is input (low level).

The output port 205 is configured to include a plurality of output ports (in this embodiment, output ports 0 to 4).
Output port 0 outputs data signals (“SEGDATA0” to “SEGDATA7”) for controlling lighting of the main display device 60. The data signal output from output port 0 is then input to the source driver 250a.
The output port 1 outputs common signals (“COM0” to “COM3”) for controlling the lighting of the main display device 60 and the performance display device 206, a firing permission signal for detecting firing conditions described below, and the like. The common signal output from output port 1 is input to sink driver 240.
Output port 2 outputs an external signal. At this time, the external signal output from the output port 2 is input to the hall computer via the payout control board 400 and the external terminal board 450.
The output port 3 outputs a control signal for controlling the drive of the normal electric accessory solenoid 64, a control signal for controlling the drive of the special electric accessory solenoid 65, and the like.
Output port 4 outputs data signals (“7SEGDATA0” to “7SEGDATA7”) for controlling lighting of performance display device 206. The data signal output from the output port 4 is input to the source driver 250b.

Further, the main control board 200 includes a command output port 1 and a command output port 2. Then, the CPU 210 transmits a control command (subcommand) to the production control board 300 from the command output port 1, and transmits a control command (payout command) to the payout control board 400 from the command output port 2. do.
Command output port 1 and command output port 2 each include a transmission data register (not shown), a FIFO (First In First Out) buffer (not shown), and a transmission shift register (not shown). have.
The transmission data register outputs the input control command to the FIFO buffer based on subcommand transmission processing (step S2-4), which will be described later.
The FIFO buffer is composed of a plurality of registers and is capable of storing a plurality of control commands. The FIFO buffer stores the control commands input from the transmission data register, and outputs the stored control commands to the transmission shift register in the order in which they were input.
The transmission shift register performs parallel-serial conversion on the control command input from the FIFO buffer, and transmits it to the production control board 300 or payout control board 400 as serial data.

The performance display device 206 is configured to include a plurality of lighting elements (segments). Each lighting element is composed of a light emitting element (in this embodiment, an LED). Note that the performance display device 206 is disposed on the back side of the game board 11, so that it cannot be visually recognized by the player.
As described later, in the pachinko machine 1, the gaming machine states (hereinafter referred to as "gaming machine states") include a playable state, a settings change state, a settings confirmation state, a settings abnormal state, and a RAM abnormal state. and a backup abnormal state are defined. The information displayed on the performance display device 206 changes depending on the gaming machine state that is occurring.

The performance display device 206 includes four (four-digit) display sections (not shown). Each display section is composed of eight lighting elements. That is, each display section is composed of a 7-segment LED capable of displaying numbers, symbols, etc., and a dot segment LED capable of displaying dots such as a decimal point.
Specifically, the performance display device 206 is configured to include 32 lighting elements (LED33 to LED64). In the performance display device 206, LED33 to LED40 become the first digit display section, LED41 to LED48 become the second digit display section, LED49 to LED56 become the third digit display section, and LED57 to LED64 become the third digit display section. is the fourth digit displayed.

While the game-enabled state is occurring, the game can be played. Then, while the playable state is occurring, the base ratio is displayed on the performance display device 206.
In the present embodiment, during the occurrence of the playable state, the first base ratio and the second base ratio are displayed on the performance display device 206 at predetermined intervals (in the present embodiment, 5.0 [s]). , are displayed alternately.
The "first base ratio" is the base ratio of the current section (the base ratio calculated for the period from the start of the current section to the present time).
The "second base ratio" is the base ratio of the previous section (the final base ratio calculated for the previous section).
Specifically, in the performance display device 206, the top two digits of the four-digit display section display information for identifying the type of base ratio (first base ratio or second base ratio). The lower two digits display a number indicating the base ratio (percentage).

While the setting change state is occurring, the setting value can be changed. Then, while the setting change state is occurring, the setting values stored (set) in the setting value area of the RAM 230 are displayed on the performance display device 206.
Specifically, in the performance display device 206, the top three digits of the four-digit display section display information indicating that a setting change state is occurring (specifically, ""r","n." in the upper 2nd digit, "-" in the upper 3rd digit), and the display section of the lowest digit displays a number indicating the setting value stored in the setting value area. be done.
While the setting confirmation state is occurring, the setting value can be confirmed. Then, while the setting confirmation state is occurring, the setting values stored (set) in the setting value area of the RAM 230 are displayed on the performance display device 206.
Specifically, in the performance display device 206, the top three digits of the four-digit display section display information indicating that the setting confirmation state is occurring (specifically, ""r", the second highest digit is "n.", the third highest digit is not displayed), and the display section of the lowest digit displays a number indicating the setting value stored in the setting value area. Ru.

While the game is in a stopped state (abnormal setting state, abnormal RAM state, and abnormal backup state), it is impossible to proceed with the game. Then, while the game is stopped, an error code corresponding to the abnormality that has occurred is displayed on the performance display device 206.
Specifically, in the performance display device 206, the top three digits of the four-digit display section display information indicating that the gaming stop state is occurring (specifically, ""E","r." in the upper 2nd digit, no display in the 3rd digit) is displayed, and the display of the lower 1st digit indicates the error that has occurred (setting abnormality, RAM abnormality, or backup abnormality). A number indicating the error code corresponding to the status) is displayed.

The RAM clear switch 207 is a tactile switch. That is, the RAM clear switch 207 includes an operation section that can be pressed. The RAM clear switch 207 outputs a RAM clear signal to the input port 1 when the operating section is pressed down.
The setting key switch 208 is a key lock switch. That is, the setting key switch 208 includes an operation section provided with a keyhole. The operation unit is unlocked by inserting a special key into the keyhole, and can be rotated (switched) from an OFF state to an ON state. The setting key switch 208 outputs a detection signal to the input port 1 when the operation section is in the ON state.

The sink driver 240 controls the output of the common signal to each display device 60, 206 according to the common signal (“COM0” to “COM3”) output from the output port 1.
The source driver 250a controls the output of data signals to the main display device 60 in accordance with the data signals (“SEGDATA0” to “SEGDATA7”) output from the output port 0.
The source driver 250b controls the output of data signals to the performance display device 206 in accordance with the data signals (“7SEGDATA0” to “7SEGDATA7”) output from the output port 4.
The pachinko machine 1 is provided with a source driver 250a corresponding to the main display device 60 and a source driver 250b corresponding to the performance display device 206. The application of the power supply voltage Vcc to the data signal line is controlled individually by the main display device 60 and the performance display device 206.
On the other hand, in the pachinko machine 1, a common sync driver 240 is provided for the main display device 60 and the performance display device 206. The grounding of the common signal line is collectively controlled by the main display device 60 and the performance display device 206.
This eliminates the need to provide the sink driver 240 corresponding to each of the main display device 60 and performance display device 206, and as a result, the output port (which outputs the common signal) corresponding to each of the main display device 60 and performance display device 206 is eliminated. There is no need to provide an output port for
Therefore, it is possible to reduce the number of parts required to control the lighting of the main display device 60 and the performance display device 206, and in the main control board 200 (CPU 210), the main display device 60 and the performance display device 206 It is no longer necessary to generate a common signal corresponding to each of the two, and it becomes possible to reduce the control load for controlling the lighting of the main display device 60 and the performance display device 206.

The main control board 200 also includes a test signal output circuit (not shown).
In test signal output processing (step S4-24), which will be described later, the CPU 210 generates test information (test signal) indicating an internal state (jackpot game state, time-saving control execution state, special symbol lottery probability state, etc.). Then, the generated test signal is stored in the port output request buffer of the RAM 230. As a result, the test signal stored in the port output request buffer is output from the predetermined output port. The test signal output from a predetermined output port is input to an interface board of a test computer (not shown) via a test signal output circuit.
In addition, in the main control board 200, a detection signal from the special drawing 1 starting opening switch 101, a detection signal from the special drawing 2 starting opening switch 102, a detection signal from the gate switch 104, a detection signal from the count switch 103, a right prize winning A detection signal from the opening switch 105, a detection signal from the left winning opening switch 106, a detection signal from the out switch 109, etc. are input to the input port 204, and are sent to the test computer via the test signal output circuit. Input to the interface board.
Furthermore, in the main control board 200, a control signal for controlling the drive of each solenoid (normal electric accessory solenoid 64, special electric accessory solenoid 65, etc.) output from the output port 3 is sent to each solenoid 64, 65. At the same time, the signal is input to the interface board of the test computer via the test signal output circuit.

(Configuration of payout control board 400)
Next, the configuration of the payout control board 400 will be explained.
FIG. 4 is a block diagram showing the configuration of the firing condition detection circuit and the firing control circuit.
The payout control board 400 controls the firing of game balls to the game area 30 and the payout of the game balls.
The payout control board 400 is configured to include a one-chip microcomputer.
A one-chip microcomputer is an LSI that integrates a CPU core, registers, semiconductor memory, etc. Specifically, a one-chip microcomputer is configured to include a CPU, ROM, RAM, and the like.
The payout control board 400 controls the game ball payout operation (prize ball payout operation) by the game ball payout device 440 based on the control command received from the main control board 200. Further, the payout control board 400 controls the game ball payout operation (rental ball payout operation) by the game ball payout device 440 based on the ball lending instruction signal received from the CR unit 700.
Further, the payout control board 400 receives the resistance value (voltage value) input from the firing volume 411, the touch signal input from the touch sensor 412, the firing stop signal input from the firing stop switch 413, and the main control board. Based on the launch permission signal input from CR unit 200 and the CR connection signal input from CR unit 700, the game ball launch operation by game ball launcher 430 (launch solenoid 431) is controlled.
Hereinafter, a method of controlling the game ball firing operation by the payout control board 400 will be explained in detail.

As shown in FIG. 4, the payout control board 400 is configured to include a firing condition detection circuit 420 and a firing control circuit 425 as a circuit for controlling the game ball putting out operation.
The firing condition detection circuit 420 is a circuit that detects the establishment of firing conditions, which will be described later.
The firing condition detection circuit 420 includes an operation detection section 421, a firing condition detection section 422, and a firing condition detection section 423.
The operation detection section 421 is a circuit that detects a rotational operation (amount of rotational operation) of the handle operation section.
The operation detection unit 421 is configured to include an operational amplifier that controls the output of the operation detection signal (sets the operation detection signal to a high level or a low level) according to the resistance value (voltage value) of the firing volume 411.
Specifically, in the firing handle unit 6, the resistance value of the firing volume 411 changes depending on the amount of rotational operation of the handle operating section. Then, the operation detection unit 421 detects the resistance value (voltage value) of the firing volume 411, and based on the detected resistance value (voltage value), determines whether or not there is a rotation operation of the handle operation unit, and whether or not the rotation operation of the handle operation unit is performed. Detect the amount and.
Then, the operation detection unit 421 generates an operation detection signal while detecting the rotation operation of the handle operation unit, and outputs the generated operation detection signal to the firing enable condition detection unit 422 (operation detection signal to high level). On the other hand, when the operation detection section 421 does not detect the rotational operation of the handle operation section, it stops outputting the operation detection signal to the firing enable condition detection section 422 (sets the operation detection signal to a low level).
Further, while detecting the rotational operation of the handle operation unit, the operation detection unit 421 generates a firing intensity signal according to the amount of rotational operation of the handle operation unit (resistance value of the firing volume 411), and The intensity signal is output to the firing control circuit 425.

The firing possible condition detection unit 422 is a circuit that detects the establishment of firing possible conditions.
The firing enable condition detection unit 422 includes an AND gate IC (logic IC) that controls the output/stop of a predetermined signal according to the result of the logical product of the operation detection signal, the touch signal, and the firing stop signal, and an AND gate. The device includes a transistor that switches between outputting and stopping the steering wheel detection signal in accordance with a predetermined signal output from the IC.
The "fireable condition" is a condition related to the player's operation (player's intention) among a plurality of conditions that constitute the firing condition described later.
Conditions for allowing firing include (1) conditions based on the detection status of the firing volume 441 and operation detection unit 421 (detection status of rotational operation of the handle operation unit), and (2) conditions based on the detection status of the touch sensor 412 (detection status of the rotation operation of the handle operation unit by the player). (3) conditions based on the detection status of the firing stop switch 413 (detection status of pressing operation of the firing stop button).
In this embodiment, (1) the firing volume 441 and the operation detection unit 421 detect a rotational operation of the handle operation unit, and (2) the touch sensor 412 detects a contact with the handle operation unit by the player. and (3) no press operation of the firing stop button is detected by the firing stop switch 413. On the other hand, if at least one of the conditions (1) to (3) is not satisfied, the firing enable condition is not satisfied.
Here, the conditions for allowing firing include (1) conditions based on the detection status of the firing volume 441 and operation detection unit 421 (detection status of rotational operation of the handle operation unit), and (2) detection status of the touch sensor 412 (player (3) conditions based on the detection status of the firing stop switch 413 (detection status of the pressing operation of the firing stop button). I don't mind.
That is, (1) the firing volume 441 and the operation detection unit 421 have detected the rotational operation of the handle operation unit, and (2) the touch sensor 412 has detected the player's contact with the handle operation unit. A configuration in which the launchable condition is satisfied when both conditions (1) and (2) are met, and the launchable condition is not satisfied when at least one of the conditions (1) and (2) is not met. I don't mind.

Specifically, the firing enable condition detection unit 422 detects an operation detection signal input from the operation detection unit 421 , a touch signal input from the touch sensor 412 , and a firing stop signal input from the firing stop switch 413 . Based on this, it is detected whether or not the conditions for firing are met.
At this time, the firing-enabled condition detection unit 422 detects that the firing-enabled condition is satisfied when all of the operation detection signal, touch signal, and firing stop signal are input. On the other hand, when at least one of the operation detection signal, the touch signal, and the firing stop signal is not input, the fulfillment of the firing enable condition is not detected.
The firing possible condition detection unit 422 generates a handle detection signal while detecting the establishment of the firing possible condition, and sends the generated handle detection signal to each of the main control board 200 and the firing condition detection unit 423. Output (makes the handle detection signal high level). On the other hand, when the launchable condition detection unit 422 does not detect the establishment of the launchable condition, it stops outputting the handle detection signal to each of the main control board 200 and the launch condition detection unit 423 (lowers the handle detection signal). level).

The firing condition detection unit 423 is a circuit that detects whether a firing condition is met.
The firing condition detection unit 423 includes an AND gate IC (logic IC) that controls the output/stop of the firing signal according to the result of the AND operation of the handle detection signal, the firing permission signal, and the CR connection signal. Ru.
The "launching condition" is a condition for executing the firing of a game ball (game ball firing operation) to the game area 30 by the game ball firing device 430 (firing solenoid 431).
In this embodiment, (1) firing enable conditions are met, (2) a firing permission signal is input from the main control board 200, and (3) a CR connection signal is input from the CR unit 700. The firing condition is met when all the conditions are met. On the other hand, if at least one of the conditions (1) to (3) is not satisfied, the firing condition is not satisfied.
The "launch permission signal" indicates that communication is possible between the main control board 200 and the payout control board 400 (that the main control board 200 and the payout control board 400 are electrically connected). As a premise, when the game enabled state is set, the main control board 200 outputs to the firing condition detection section 423.
Here, the launch permission signal may be configured to be output from the main control board 200 to the launch condition detection section 423 regardless of the state of the gaming machine while the main control board 200 is powered on. do not have. That is, when communication is possible between the main control board 200 and the payout control board 400 (when the main control board 200 and the payout control board 400 are electrically connected), the firing permission signal is sent. However, a configuration may also be adopted in which the main control board 200 outputs it to the firing condition detection section 423.
The "CR connection signal" is transmitted when communication is possible between the CR unit 700 and the payout control board 400 (when the CR unit 700 and the payout control board 400 are electrically connected). It is output from the CR unit 700 to the firing condition detection section 423.

Specifically, the firing condition detection section 423 receives a handle detection signal inputted from the firing possible condition detection section 422, a firing permission signal inputted from the main control board 200, and a CR connection signal inputted from the CR unit 700. Based on , it is detected whether the firing condition is satisfied or not.
At this time, the firing condition detection unit 423 detects that the firing condition is met when all of the handle detection signal, firing permission signal, and CR connection signal are input. On the other hand, when at least one of the handle detection signal, the firing permission signal, and the CR connection signal is not input, the fulfillment of the firing condition is not detected.
The firing condition detection unit 423 generates a firing signal while detecting the establishment of the firing condition, and outputs the generated firing signal to the firing control circuit 425 (setting the firing signal to high level). On the other hand, the firing condition detection unit 423 stops outputting the firing signal to the firing control circuit 425 (sets the firing signal to low level) when not detecting that the firing condition is satisfied.

The firing control circuit 425 is a circuit that controls the firing strength of the game ball by the game ball firing device 430 and the firing timing of the game ball by the game ball firing device 430. That is, the firing control circuit 425 controls the output of the drive signal to the game ball firing device 430 (firing solenoid 431).
Specifically, the firing control circuit 425 includes a clock generating section (not shown), a firing timing control section (not shown), and a firing solenoid driving section (not shown).
The clock generator outputs a clock signal of a predetermined frequency to the emission timing controller.
The firing timing control section generates a pulse signal for controlling firing timing based on the clock signal input from the clock generating section, and outputs the generated pulse signal to the firing solenoid drive section. At this time, the firing timing control section generates a pulse signal so that the number of game balls fired per minute is a predetermined number (for example, 100 [balls]).
The firing solenoid drive unit operates the firing solenoid based on the firing signal input from the firing condition detection unit 423, the pulse signal input from the firing timing control unit, and the firing intensity signal input from the operation detection unit 421. Controls the output of the drive signal to 431.
Specifically, the firing solenoid drive unit receives an input from the operation detection unit 421 when a pulse signal is input from the firing timing control unit when a firing signal is input from the firing condition detection unit 423. A drive signal (drive current) corresponding to the firing intensity signal is output to the firing solenoid 431. As a result, the game ball is fired with an intensity corresponding to the firing intensity signal input from the operation detection section 421.
On the other hand, the firing solenoid drive section stops outputting the drive signal to the firing solenoid 431 when the firing signal is not input from the firing condition detection section 423 . As a result, the firing of the game ball is stopped.

The game ball launching device 430 includes a batting mallet (not shown) and a firing solenoid 431 that drives the batting mallet. The firing solenoid 431 is constituted by a rotary solenoid. Here, the batting mallet may be driven by another drive source such as a motor.
Game balls are supplied to the game ball firing device 430 from a ball feeding unit (not shown). When a drive signal is input to the firing solenoid 431, the firing solenoid 431 is driven in accordance with the inputted driving signal, and a game ball is hit by the ball hammer. As a result, game balls are launched toward the game area 30.

As described above, in the pachinko machine 1, on the premise that the main control board 200 is set to the playable state and the CR unit 700 and the payout control board 400 are in a state where communication is possible, the firing is stopped. When the handle operation section is rotated (displaced from the initial position toward the limit position) by the player's touch without pressing the button, the game ball firing operation by the game ball firing device 430 is started. . Then, while the game ball firing device 430 executes the game ball firing operation, the game ball is fired toward the game area 30 with a strength corresponding to the amount of rotational operation of the handle operation section.
Further, when the firing stop button is pressed, the game ball firing operation by the game ball firing device 430 is stopped. That is, even if the handle operation section is rotated by the player's touch, when the firing stop button is pressed, the game ball firing operation by the game ball firing device 430 is stopped.
Further, when the handle operation section is returned to the initial position (when the handle operation section is not rotated), the game ball launch operation by the game ball launcher 430 is stopped. That is, even if the player is in contact with the handle operation part, when the handle operation part is returned to the initial position, the game ball firing operation by the game ball firing device 430 is stopped.

In particular, in the pachinko machine 1, the output of the handle detection signal from the shooting possible condition detection unit 422 to the main control board 200 is maintained while the shooting possible condition is satisfied (hereinafter referred to as the "shooting possible state"). be done.
In other words, a state in which a rotational operation of the handle operating section is detected, a contact with the handle operating section is detected, and a pressing operation of the firing stop button is not detected (a state in which firing is possible) is occurring. At this time, the output of the handle detection signal from the firing condition detection circuit 420 to the main control board 200 is maintained.
At this time, as long as the firing enable state is occurring, regardless of whether a firing permission signal is input from the main control board 200 to the firing condition detection circuit 420 (regardless of the game machine state set in the main control board 200). (1) The output of the handle detection signal from the firing condition detection circuit 420 to the main control board 200 is maintained.
Furthermore, as long as the firing ready state is occurring, regardless of whether or not the CR connection signal is input from the CR unit 700 to the firing condition detection circuit 420 (communication is possible between the CR unit 700 and the payout control board 400). regardless of whether the firing condition detection circuit 420 is in the current state or not), the output of the handle detection signal from the firing condition detection circuit 420 to the main control board 200 is maintained.
As described above, it becomes possible for the main control board 200 to detect (understand) whether or not a firing-enabled state is occurring, and control the progress of the game, the content of the performance, etc. according to the occurrence of the firing-enabled state. It becomes possible to do so.

That is, when the main control board 200 detects that the handle detection signal has changed from not being input to being input (the handle detection signal has changed from low level to high level), the main control board 200 can fire. A game situation designation command that designates the occurrence (start) of a state is transmitted to the production control board 300.
On the other hand, the main control board 200 can fire when it detects that the handle detection signal has changed from being input to not being input (the handle detection signal has changed from high level to low level). A game situation designation command that designates cancellation (end) of the state is transmitted to the production control board 300.
As a result, the production control board 300 detects the occurrence of the firing-enabled state by receiving the gaming situation designation command that designates the occurrence of the firing-enabled state, and upon receiving the gaming situation designation command that designates the release of the firing-enabled state, It becomes possible to detect release of the firing ready state.
Then, the effect control board 300 can change the effect content depending on whether or not a firing ready state is occurring.

(Configuration of production control board 300)
Next, the configuration of the production control board 300 will be explained.
FIG. 5 is a block diagram showing the configuration of the production control board. FIG. 52 is a block diagram showing the configuration of the sound circuit. FIG. 54 is a diagram showing the settings of the channel router.
The production control board 300 controls production (display production, sound production, lamp production, movable body production, etc.) based on control commands received from the main control board 200.
As shown in FIG. 5, the production control board 300 includes a microcomputer (one-chip microcomputer) 301 and various external devices externally connected to the microcomputer 301.
In this embodiment, various external devices include a control ROM 302, a CGROM (Character Generator Read Only Memory) 303, a DRAM (Dynamic Random Access Memory) 304, a digital amplifier 305, and the like.

The control ROM 302 contains a control program for controlling the operation of the microcomputer 301, various data necessary for executing the control program, various command lists set in the control register of the sound circuit 323, and information for the digital amplifier 305. Various operating parameters (frequency correction parameters, etc.) that are transmitted are stored. In particular, the control ROM 302 contains performance scenario data corresponding to each performance number, animation tables corresponding to each display performance number, command lists corresponding to each sound performance control number, various compression lamp drive data, and various compression motor drives. Data is stored (memorized).
"Compressed lamp drive data" is data obtained by compressing (encoding) lamp drive data in a predetermined format. The "lamp drive data" is data for driving the various lamps 20 and 21 (data specifying the brightness values of the lamps 20 and 21 belonging to each system).
"Compressed motor drive data" is data obtained by compressing (encoding) motor drive data in a predetermined format. “Motor drive data” is data for driving various motors 23 (data that defines the output value of each motor 23).
In this embodiment, a NOR flash memory (NOR ROM) is used as the control ROM 302. Here, as the control ROM 302, an EEPROM (Electrically Erasable Programmable Read Only Memory) may be used.
Control ROM 302 is connected to HOST interface 313 of microcomputer 301.

The CGROM 303 stores (memorizes) various types of compressed image data, various types of compressed audio data, and the like.
"Compressed image data" is data obtained by compressing (encoding) image data (material data) in a predetermined format. “Image data (material data)” is data of images (moving images/still images) that are the materials for drawing processing.
"Compressed audio data" is data obtained by compressing (encoding) audio data in a predetermined format. “Audio data” is audio data output from various speakers 22.
In this embodiment, a NAND flash memory (NAND ROM) is used as the CGROM 303. Specifically, the CGROM 303 is configured with an SSD (Solid State Drive) using a NAND flash memory as a storage unit.
CGROM 303 is connected to CG bus interface 314 of microcomputer 301. The CG bus interface 314 is a SATA (Serial AT Attachment) standard connection interface. As a result, reading of various data stored in the CGROM 303 is performed by SATA transfer.

DRAM 304 is provided with a preload area. Various data (specifically, compressed image data, compressed audio data, etc.) stored in the CGROM 303 are transferred (preloaded) to the preload area.
Further, the DRAM 304 is provided with a drawing command buffer area. In this embodiment, a double buffering method is adopted for the drawing command buffer area, and two drawing command buffer areas are provided in the DRAM 304.
The two drawing command buffer areas have the same size. While one of the two drawing command buffer areas is designated as a construction area, the other drawing command buffer area is designated as a transfer area. Further, for each drawing command buffer area, designation of a construction area and designation of a transfer area are alternately switched for each frame.
Then, for each drawing command buffer area, a display list, which will be described later, is stored (generated and constructed) in the drawing command buffer area during the period specified as the construction area, and during the period specified as the transfer area. , the display list stored in the drawing command buffer area is transferred to the VDP (specifically, the preloader circuit 319).
DRAM 304 is connected to DRAM interface 315 of microcomputer 301.

The microcomputer 301 is an LSI in which a CPU core, registers, semiconductor memory, etc. are integrated.
The microcomputer 301 controls performance operations by various performance means based on control commands received from the main control board 200.
The "various presentation means" include various image display devices 31 and 32, various speakers 22, various lamps 20 and 21, and various motors 23 (various movable bodies). Therefore, "performance operations by various production means" include display of production images by various image display devices 31 and 32, output of sounds by various speakers 22, driving (lighting) of various lamps 20 and 21, and various motors 23 ( This includes driving various movable bodies).
The microcomputer 301 includes a CPU 310, a CPU work memory 311, a CPU interface 312, a host interface 313, a CG bus interface 314, a DRAM interface 315, a VRAM 316, a serial communication controller 317, a transfer circuit 318, a preloader circuit 319, a display circuit 320, and a graphic The data bus 324 includes internal devices such as a bus decoder circuit 321, a drawing circuit 322, a sound circuit 323, and the like, and these internal devices are connected to a data bus 324.

The CPU 310 is connected to a HOST interface 313 via a CPU interface 312. Further, the main control board 200 is connected to the HOST interface 313, and control commands from the main control board 200 are input. Further, a data bus 324 is connected to the HOST interface 313.
This allows the CPU 310 to receive control commands (subcommands) from the main control board 200 via the HOST interface 313.
Further, the CPU 310 is capable of communicating with internal devices such as a serial communication controller 317, a preloader circuit 319, a display circuit 320, and a sound circuit 323 via a HOST interface 313 and a data bus 324. .
Further, the CPU 310 can read various data (control programs, control data, etc.) stored in the control ROM 302 via the HOST interface 313.
Further, the CPU 310 is capable of reading various data (compressed audio data) stored in the CGROM 303 via the HOST interface 313, data bus 324, and CG bus interface 314.
Furthermore, the CPU 310 can read and write data to and from the DRAM 304 via the HOST interface 313, data bus 324, and DRAM interface 315.

The CPU 310 executes various arithmetic processes necessary to control the effect operations by various effect means, control processes for internal devices in accordance with the various arithmetic processes, and the like.
At this time, the CPU 310 uses the CPU work memory (RAM) 311 and the DRAM 304 as a work area for various calculation processes, a buffer area for various calculation processing data, a table data area, a buffer area for various input/output data, etc. do.
That is, the CPU 310 selects a performance (performance number) to be executed based on the control command received from the main control board 200, and selects and sets performance scenario data corresponding to the selected performance number. Further, according to the selected/set performance scenario data, command information (internal commands) for controlling various internal devices (VDP, sound circuit 323, lamp controller 317a, motor controller 317b, etc.) is sequentially generated.

Specifically, CPU 310 sets the animation table in the animation table setting area according to the command information. Then, according to the set animation table, a display list is generated in the drawing command buffer area designated as the construction area.
The "display list" is a collection of drawing commands for one frame. That is, in the display list, a group of drawing commands for one frame are described in a predetermined order. Then, in the VDP, one frame of drawing data is generated by executing processing based on each drawing command in the order described in the display list.
The "drawing command" is information that specifies the content of drawing processing (drawing control) to be executed by the VDP. In particular, the drawing command includes the address of the storage area where compressed image data used for drawing is stored (hereinafter referred to as "image address"), the magnification (enlargement/reduction ratio) of the image data, and the The coordinates at which the image data is drawn (coordinates in the frame buffer area), the transmittance (transparency, transparency, transparency) when drawing the image data, etc. are specified.

Further, when the power is turned on, the CPU 310 transfers (preloads) the compressed audio data stored in the CGROM 303 to the preload area of the DRAM 304.
That is, while a NAND flash memory such as the CGROM 303 can easily be increased in capacity compared to a NOR flash memory such as the control ROM 302, the data read speed is slow. Therefore, if the compressed audio data is directly read from the CGROM 303 (NAND flash memory) when the sound circuit 323 performs audio output processing, there is a risk that the processing performance will be significantly degraded.
Therefore, in the pachinko machine 1, before audio output processing is executed, the compressed audio data stored in the CGROM 303 is transferred in advance to the DRAM 304, which is a storage means with a faster data readout speed than the CGROM 303. . By configuring the compressed audio data to be read from the DRAM 304 when audio output processing is executed, deterioration in processing performance is prevented.

Specifically, when the power is turned on, the CPU 310 transfers (preloads) predetermined compressed audio data from among the compressed audio data stored in the CGROM 303 to the preload area of the DRAM 304 . At this time, in this embodiment, all compressed audio data stored in the CGROM 303 is transferred to the preload area of the DRAM 304. Here, a configuration may be adopted in which some of the compressed audio data stored in the CGROM 303 is transferred to the preload area of the DRAM 304.
Then, in the pachinko machine 1, after the transfer of the predetermined compressed audio data is completed, it becomes possible to control the audio output from the various speakers 22 (audio output processing by the sound circuit 323). In other words, before the transfer of the predetermined compressed audio data is completed, it becomes impossible to control the audio output by the various speakers 22 (audio output processing by the sound circuit 323).
Further, after the transfer of the predetermined compressed audio data is completed, it becomes possible to control the display of effect images by the various image display devices 31 and 32 (drawing process by VDP). In other words, before the transfer of the predetermined compressed audio data is completed, it becomes impossible to control the display of effect images by the various image display devices 31 and 32 (drawing process by VDP). .
On the other hand, before the transfer of the predetermined compressed audio data is completed, it becomes possible to control the driving (light emission) of the various lamps 20 and 21 (lamp driving processing by the lamp controller 317a).
Furthermore, before the transfer of the predetermined compressed audio data is completed, it becomes possible to control the drive of the various motors 23 (various movable bodies) (motor drive processing by the motor controller 317b).

The transfer circuit 318 transfers various data between internal devices.
Specifically, the transfer circuit 318 transfers the display list stored in the drawing command buffer area designated as the transfer area to the preloader circuit 319. Further, the transfer circuit 318 transfers the display list rewritten by the preloader circuit 319 to the drawing circuit 322.

The VRAM 316 is provided with an image development area. In the image development area, image data (material data) developed (restored and decoded) by the graphics decoder circuit 321 is temporarily stored.
Further, the VRAM 316 is provided with a frame buffer area. In this embodiment, a double buffering method is adopted for the frame buffer area, and two frame buffer areas are provided in the VRAM 316.
The two frame buffer areas have the same size. While one of the two frame buffer areas is designated as a drawing area, the other frame buffer area is designated as an output area. Further, for each frame buffer area, designation of a drawing area and designation of an output area are alternately switched for each frame.
Then, for each frame buffer area, one frame of drawing data is stored (generated/drawn) in the frame buffer area during the period specified as the drawing area, and during the period specified as the output area. , output of a video signal is executed based on one frame of drawing data stored in the frame buffer area.

In the microcomputer 301, a preloader circuit 319, a display circuit 320, a graphics decoder circuit 321, a drawing circuit 322, and the like function as a VDP (Video Display Processor).
The VDP controls the display of effect images by the various image display devices 31 and 32. Specifically, the VDP generates drawing data in response to receiving a display list (drawing command) from the CPU 310, generates a video signal based on the generated drawing data, and uses the generated video signal to display various images. It outputs to display devices 31 and 32.
The preloader circuit 319 is capable of reading various data (compressed image data) stored in the CGROM 303 via the CG bus interface 314.
In particular, the preloader circuit 319 transfers (preloads) the compressed image data stored in the CGROM 303 to the preload area of the DRAM 304 before the drawing circuit 322 executes the drawing process.
That is, as described above, a NAND flash memory such as the CGROM 303 can easily increase the capacity compared to a NOR flash memory such as the control ROM 302, but has a slower data read speed. Therefore, if the compressed image data is directly read from the CGROM 303 (NAND flash memory) when the drawing circuit 322 executes the drawing process, there is a possibility that the processing performance will be significantly degraded.
Therefore, in the pachinko machine 1, before the drawing process is executed, the compressed image data stored in the CGROM 303 is transferred in advance to the DRAM 304, which is a storage means with a faster data readout speed than the CGROM 303. By configuring the compressed image data to be read from the DRAM 304 when drawing processing is executed, deterioration in processing performance is prevented.

Specifically, each time the preloader circuit 319 receives a display list, the preloader circuit 319 transfers one frame of compressed image data specified by the display list from among the compressed image data stored in the CGROM 303 to the preload area of the DRAM 304. Transfer (preload) to. At this time, the preloader circuit 319 rewrites the display list.
That is, in the display list generated by the CPU 310, an address specifying a storage area of the CGROM 303 is written as an image address included in each drawing command. Therefore, for each drawing command included in the display list, the preloader circuit 319 transfers the compressed image data stored in the storage area (the storage area of the CGROM 303) designated by the image address included in the drawing command to a predetermined area of the DRAM 304. After the drawing command is transferred, the image address included in the drawing command is rewritten to an address that specifies the storage area (predetermined area of the DRAM 304) after the transfer. As a result, a new display list with rewritten image addresses is generated.
Here, in this embodiment, the preloader circuit 319 is configured to transfer (preload) compressed image data stored in the CGROM 303 to a preload area of the DRAM 304. However, a configuration may also be adopted in which the preloader circuit 319 transfers compressed image data stored in the CGROM 303 to a predetermined area (preload area) of the VRAM 316.
The display list rewritten by the preloader circuit 319 is transferred to the drawing circuit 320 by the transfer circuit 318.

The drawing circuit 322 stores (generates and draws) one frame worth of drawing data in the frame buffer area designated as the drawing area according to the display list received from the preloader circuit 319 .
Specifically, each time the drawing circuit 320 receives a display list, it reads one frame of compressed image data specified by the display list from the DRAM 304. One frame of compressed image data read from the DRAM 304 is restored (decoded) by the graphic decoder circuit 321 and stored (developed) in the image development area of the VRAM 316 . Then, the drawing circuit 320 uses the image data stored in the image development area to generate drawing data for one frame in the frame buffer area designated as the drawing area.

The display circuit 320 generates a video signal based on one frame of drawing data stored (generated/drawn) in a frame buffer area designated as an output area, and displays the generated video signal in various image displays. Output to devices 31 and 32. In this embodiment, a digital RGB signal is output as the video signal. Here, a configuration may be adopted in which an LVDS (Low voltage differential signaling) signal is output as the video signal.
Specifically, the display circuit 320 includes a data acquisition circuit (not shown), a scaler circuit (not shown), a color correction circuit (not shown), a dither circuit (not shown), and a synchronization signal generation circuit (not shown). ), etc.
The data acquisition circuit reads drawing data stored in a frame buffer area designated as an output area.
The scaler circuit is capable of performing scaling processing (enlargement processing/reduction processing) on the drawing data read out by the data acquisition circuit.
The color correction circuit is capable of performing color correction processing on the drawing data processed by the scaler circuit.
The dither circuit is capable of dithering the drawing data processed by the color correction circuit.
The drawing data processed by the dithering circuit is then output as a video signal (digital RGB signal).
The synchronization signal generation circuit generates a horizontal synchronization signal and a vertical synchronization signal (Vsync). The synchronization signal generation circuit then outputs the generated horizontal synchronization signal and vertical synchronization signal to the various image display devices 31 and 32. Further, the synchronization signal generation circuit outputs the generated vertical synchronization signal to the CPU 310.
Here, in this embodiment, the display of the effect image (display of the effect image based on one frame of drawing data) on each image display device 31, 32 is updated every 16.66 [ms]. Therefore, the synchronization signal generation circuit outputs the vertical synchronization signal to the CPU 310 (set to high level) every 16.66 [ms].

The sound circuit 323 (built-in sound source) controls the output (playback) of sounds (effect sounds) from the various speakers 22.
As shown in FIG. 52, the sound circuit 323 includes 40 tracks (Track 1 to Track 40), 8 audio buses (Audio Bus 1 to Audio Bus 8), and 8 channels (Channel 1 to Channel 40), and 8 channels (Channel 1 to Channel 40). 8) and a control register (not shown).
In this embodiment, the various speakers 22 include an upper left speaker, an upper right speaker, a middle left speaker, a middle right speaker, a lower speaker, and a woofer. One speaker is connected (electrically connected) to each channel via a digital amplifier 305. Specifically, the upper left speaker is connected to channel 1, the upper right speaker is connected to channel 2, the middle left speaker is connected to channel 3, the middle right speaker is connected to channel 4, and the lower speaker is connected to channel 5. , a woofer is connected to channel 6. On the other hand, no speakers are connected to channels 7 and 8.
Here, the upper left speaker, the upper right speaker, the middle left speaker, and the middle right speaker are configured as high-range/middle-range speakers (full-range speakers). On the other hand, the lower speaker and woofer are configured as low-range speakers. Note that the woofer has a lower output frequency band (its frequency characteristics are in a lower frequency band) and a larger output (W) than the lower speaker.
The sound circuit 323 is equipped with an independent sequencer (not shown) for each track. This makes it possible to independently control playback, stop, volume, etc. of audio data for each track.
Each track is provided with a compressed audio decoder 351, a track fader 352, a programmable pan 353, and the like.
The compressed audio decoder 351 restores (decodes) compressed audio data. The track fader 352 sets the volume of the track. The programmable pan 353 controls sound localization by outputting the audio data of the track to an arbitrary audio bus.

The eight audio buses are provided with a switcher 354, a ducker 355, a channel router 356, and the like.
The switcher 354 allocates audio data of eight audio buses and audio data of eight external serial inputs (not shown) to eight audio buses. In this embodiment, eight external serial input systems are not used. The ducker 355 ducks (reduces) the volume of the other audio buses based on the volume of audio data input from a predetermined audio bus among the eight audio buses. The channel router 356 sets connections between each audio bus (audio bus 1 to audio bus 8) and each channel (channel 1 to channel 8).

As shown in FIG. 54, in this embodiment, audio bus 1 and channel 1 are connected by channel router 356. Also, the audio signal generated by channel 1 is input to the upper left speaker. As a result, the audio based on the audio data assigned to the audio bus 1 is output from the upper left speaker.
Furthermore, the channel router 356 connects the audio bus 2 and the channel 2. Furthermore, the audio signal generated by channel 2 is input to the upper right speaker. As a result, the audio based on the audio data assigned to the audio bus 2 is output from the upper right speaker.
Furthermore, the audio bus 3 and channel 3 are connected by the channel router 356. Also, the audio signal generated by channel 3 is input to the left middle speaker. As a result, the audio based on the audio data assigned to the audio bus 3 is output from the middle left speaker.
Further, the audio bus 4 and channel 4 are connected by the channel router 356. Furthermore, the audio signal generated by channel 4 is input to the middle right speaker. As a result, the audio based on the audio data assigned to the audio bus 4 is output from the middle right speaker.
Furthermore, the audio bus 5 and channel 5 are connected by the channel router 356. Furthermore, the audio signal generated by channel 5 is input to the lower speaker. As a result, audio based on the audio data assigned to the audio bus 5 is output from the lower speaker.
Further, the audio bus 6 and the channel 6 are connected by the channel router 356. Also, the audio signal generated by channel 6 is input to the woofer. As a result, the audio based on the audio data assigned to the audio bus 6 is outputted by the woofer.
Further, the audio bus 7 and the channel 6 are connected by the channel router 356. As a result, the audio based on the audio data assigned to the audio bus 7 is outputted by the woofer.
On the other hand, the audio bus 8 is not connected to any channel by the channel router 356.
As described above, in this embodiment, channels 7 and 8 are not used, and no audio data is input.

The eight channels include a channel volume 357, an equalizer 358, a limiter 359, a post effector 360, a master volume 361, an audio serial output 362, and the like.
Channel volume 357 sets the volume of each channel. The equalizer 358 sets emphasis or reduction of a specific frequency band for each channel (corrects the frequency). In this embodiment, the equalizer 358 is not used. Limiter 359 prevents clipping by compressing sounds that exceed a threshold for each channel. The post-effector 360 sets emphasis/reduction of a specific frequency band, volume, delay of sound generation timing, etc. for each channel. The master volume 361 sets the volume of all channels at once. The audio serial output 362 performs conversion for serially transmitting the audio data of each channel to the digital amplifier 305.

CPU 310 sets the command list read from control ROM 302 in the control register of sound circuit 323 according to the command information. As a result, the sound circuit 323 operates according to the command list set in the control register.
The “command list” is information that specifies the operation of the sound circuit 323. As mentioned above, a command list corresponding to each sound production control number is stored.
In this embodiment, the command list includes a command list for specifying the start of sound production, a command list for specifying volume adjustment, a command list for specifying the end of sound production, etc.
The command list that specifies the start of sound production includes information that specifies the compressed audio data to start playing, information that specifies the track to which the compressed audio data is assigned, information that specifies the number of times the compressed audio data is played, and information that specifies the number of times the compressed audio data is to be played. It includes information specifying the volume of the audio data (audio data), information specifying the panpot ratio of the compressed audio data (audio data), and the like.
The "panpot ratio" is information that specifies the audio bus (audio bus 1 to audio bus 8) to which audio data is assigned. In other words, the panpot ratio is information that specifies the volume of each audio bus when audio data is assigned to each audio bus. In this embodiment, the volume balance of eight audio buses (audio bus 1 to audio bus 8) is specified by the panpot ratio. Specifically, the panpot ratio specifies the volume ratio of audio buses 1 to 8.
On the other hand, the command list for specifying volume adjustment includes information specifying the track whose volume is to be adjusted, information specifying the details of the adjustment, and the like.
On the other hand, the command list for specifying the end of the sound production includes information for specifying the track to stop playing.
As described above, in this embodiment, playback, stop, volume adjustment, etc. of audio data are controlled for each track.

The serial communication controller 317 includes a lamp controller 317a and a motor controller 317b.
The lamp controller 317a controls the driving (light emission) of the various lamps 20 and 21.
Specifically, the CPU 310 sets the LED register according to command information (message) set in a lamp command buffer area, which will be described later. Then, the lamp controller 317a generates lamp drive data according to the settings of the LED register, and outputs the generated lamp drive data to the lamp drivers 332 and 342 together with a clock signal. At this time, the lamp drive data is output as serial data.
The lamp controller 317a includes a lamp decoder circuit (not shown). The lamp decoder circuit reads compression lamp drive data specified by the command information from the control ROM 302. It also restores (decodes) the read compression lamp drive data. Then, lamp drive data is generated based on the restored lamp drive data, and the generated lamp drive data is output to the lamp drivers 332 and 342.

The motor controller 317b controls the driving of various motors 23 (various movable bodies).
Specifically, CPU 310 sets the motor register according to command information (message) set in a movable body command buffer area, which will be described later. Then, the motor controller 317b generates motor drive data according to the settings of the motor register, and outputs the generated motor drive data to the motor drivers 333 and 343 together with a clock signal. At this time, the motor drive data is output as serial data.
The motor controller 317b includes a motor sequencer circuit (not shown). The motor sequencer circuit reads compression motor drive data specified by the command information from the control ROM 302. It also restores (decodes) the read compression motor drive data. Then, motor drive data is generated based on the restored motor drive data, and the generated motor drive data is output to the motor drivers 333 and 343.
Further, information indicating the detection status of various sensors 24 is input from the driver board 330 to the motor controller 317b, and information indicating the detection status of each switch 25 to 29 and information indicating the detection status of the various sensors 24 is input from the sub-connection board 340. Information indicating the detection status of is input.

(About reducing current consumption by ducking function)
Next, suppression of current consumption (power consumption) by the ducking function will be explained.
FIG. 55 is a diagram explaining the ducking function. FIG. 56 is a diagram showing the contents of the command list corresponding to sound productions A and B.
In the pachinko machine 1, an overcurrent protection circuit (not shown) is installed in the path for supplying current (power) from the power supply board 600 to various devices (various lamps 20, 21, various speakers 22, various motors 23, etc.). is provided. The overcurrent protection circuit cuts off (or limits) current output to various devices when detecting current output exceeding a predetermined value.
Here, the output (W) of the woofer is larger than that of the other speakers (upper left speaker, upper right speaker, middle left speaker, middle right speaker, and lower speaker). For this reason, when the volume of the audio output from the woofer increases, the current consumption by the woofer increases, and as a result, the total current consumption by the various speakers 22 increases, the overcurrent protection circuit is activated, and the current output to various devices is reduced. There is a risk of being blocked (or restricted).
On the other hand, in a sound production composed of sounds output from various speakers 22 (upper left speaker, upper right speaker, middle left speaker, middle right speaker, lower speaker, and woofer), the volume of the sound output by the woofer is lowered. If this occurs, the impression of the bass range will be weakened, the image of the sound production will be impaired, and there is a risk that the production effect of the sound production will be reduced.
Therefore, in the pachinko machine 1, the ducking function of the ducker 355 is used to suppress the increase in the total volume output by the various speakers 22, thereby suppressing the increase in the total current consumption by the various speakers 22. At this time, in this embodiment, when the volume of the audio output from the woofer exceeds a predetermined threshold, the volume of the audio output from the other speakers is reduced. Specifically, when the volume of the sound output from the woofer exceeds a threshold, the volume of the sound output from the lower speaker whose frequency characteristics overlap with that of the woofer (the frequency bands that can be output overlap) is reduced. It is said that
This makes it possible to prevent an increase in the total current consumption by the various speakers 22 while preventing the image of the sound production from being impaired (preventing the impression of the bass range from becoming weak).
"Total volume output by various speakers 22" is output by all speakers (upper left speaker, upper right speaker, middle left speaker, middle right speaker, lower speaker, and woofer) during execution of one sound production. This is the maximum value of the total volume.
"Total current consumption by various speakers 22" refers to the total consumption output by all speakers (upper left speaker, upper right speaker, middle left speaker, middle right speaker, lower speaker, and woofer) during execution of one sound production. The current is at its maximum value.

Here, in a sound production in which the total current consumption by the various speakers 22 exceeds a predetermined value due to the volume of the sound output from the woofer exceeding a threshold value (hereinafter referred to as "loud volume sound production"), the volume of the sound output from the woofer exceeds the threshold value. The overcurrent protection circuit may be activated when the volume of the audio exceeds the threshold. Therefore, in a high-volume sound production, when the volume output from the woofer exceeds a threshold value, it is necessary to reduce the volume of the audio output from the other speakers (specifically, the lower speaker).
On the other hand, in sound production (hereinafter referred to as "low-volume sound production") in which the total current consumption by the various speakers 22 does not exceed a predetermined value even if the volume of the audio output from the woofer exceeds a threshold, There is no risk that the overcurrent protection circuit will operate at the timing when the volume of the output audio exceeds the threshold. Therefore, in the low-volume sound production, even if the volume output from the woofer exceeds a threshold value, there is no need to reduce the volume of the audio output from other speakers (specifically, the lower speaker).
Therefore, in this embodiment, among the audio buses 1 to 8, an audio bus 8 to which no speaker is connected (an audio bus 8 to which an audio signal based on assigned audio data is not output to a speaker) is used. ) is used to control activation/deactivation of the ducking function depending on the type of sound production (loud volume sound production/low volume sound production).

That is, in this embodiment, the ducker 355 is set to reduce (ducking) the volume of the audio bus 5 to which the lower speaker is connected based on the input of the audio bus 8 to which no speaker is connected. .
Specifically, in the ducker 355, the volume of audio data assigned to the audio bus 8 is constantly monitored while the power is turned on to the pachinko machine 1, and the volume of the audio data assigned to the audio bus 8 exceeds a threshold value. If the value exceeds the maximum value, the ducking function is activated, and the volume of the audio data assigned to the audio bus 5 is set to be reduced (decreased, restricted, suppressed). In addition, after the ducking function is activated, if the volume of the audio data assigned to the audio bus 8 falls below the threshold, the volume of the audio data assigned to the audio bus 5 is set to return to the original volume. There is.
In the command list that specifies the start of a loud sound performance, the audio data that is allocated to the audio bus 6 among the audio data that constitutes the loud sound performance is transferred to the audio bus 8 at the same volume as the audio bus 6. A panpot ratio is specified so that the panpot ratio can also be assigned.
As a result, when a high-volume sound effect is executed, the audio data assigned to the audio bus 6 is also assigned to the audio bus 8 at the same volume as that of the audio bus 6. That is, the same audio data is assigned to the audio bus 6 and the audio bus 8 at the same volume. As a result, the ducker 355 reduces the volume of the audio data assigned to the audio bus 5 when the volume of the audio data assigned to the audio bus 8 exceeds the threshold value. In other words, the ducker 355 reduces the volume of the audio data assigned to the audio bus 5 when the volume of the audio data assigned to the audio bus 6 exceeds the threshold value. Therefore, when the volume of the audio output from the woofer exceeds the threshold value, it is possible to reduce the volume of the audio output from the lower speaker.
On the other hand, in the command list that specifies the start of a low-volume sound production, panning is performed so that audio data that is assigned to the audio bus 6 out of the audio data that makes up the low-volume production is not assigned to the audio bus 8. Pot ratio is specified. In other words, no audio data is assigned to the audio bus 8 in the command list that specifies the start of a low-volume sound performance.
As a result, when a low-volume sound effect is executed, the audio data assigned to the audio bus 6 is not assigned to the audio bus 8. Therefore, even if the volume of the audio output from the woofer exceeds the threshold, the volume of the audio output from the lower speaker is not reduced.

For example, in the pachinko machine 1, sound production A and sound production B are defined as the types of sound production. Sound performance A is a loud sound performance. On the other hand, sound performance B is a low volume sound performance.
That is, in sound production A, the volume output from the woofer exceeds the threshold at a predetermined timing. In sound production A, when the volume output from the woofer exceeds the threshold value, the total current consumption by the various speakers 22 may exceed a predetermined value, and the overcurrent protection circuit may be activated.
Therefore, in sound production A, when the volume output from the woofer exceeds a threshold value, the ducking function is activated to reduce the volume output from the lower speaker.
On the other hand, in sound production B, the volume output from the woofer exceeds the threshold at a predetermined timing. However, in sound production B, even if the volume output from the woofer exceeds the threshold value, the total current consumption by the various speakers 22 does not exceed a predetermined value, and there is no fear that the overcurrent protection circuit will operate.
Therefore, in sound production B, even if the volume output from the woofer exceeds a threshold value, the ducking function is not activated and the volume output from the lower speaker is maintained.
This will be explained in detail below.

Sound production A is composed of audio data A (compressed audio data A), audio data B (compressed audio data B), audio data C (compressed audio data C), and audio data D (compressed audio data D). configured.
Audio data A is vocal audio data. Audio data B is audio data of a guitar sound. Audio data C is audio data for bass note 1. Audio data D is audio data for bass note 2.
As shown in FIG. 56(a), the command list for specifying the start of sound production A (hereinafter referred to as "command list A") includes the playback of audio data A (compressed audio data A) and the command list for specifying the start of sound production A. Reproduction of audio data B (compressed audio data B), reproduction of audio data C (compressed audio data C), and reproduction of audio data D (compressed audio data D) are specified.
In command list A, audio data A is assigned (output) to each audio bus 1, 2, 3, and 4 at a predetermined volume, and audio data B is assigned to each audio bus 1, 2, 3, and 4 at a predetermined volume. Audio data C is assigned (outputted) at a predetermined volume to the audio bus 5, and audio data D is assigned (outputted) at a predetermined volume to each audio bus 6, 8. The panpot ratio is specified so that it is assigned (output) as follows.
In particular, in the command list A, the panpot ratio is defined so that the audio data D is assigned to the audio buses 6 and 8 at the same volume.
As a result, in sound production A, audio data A is played by each audio bus 1, 2, 3, 4 (each channel 1, 2, 3, 4), and the audio (vocal) based on audio data A is It is output from the speaker, the upper right speaker, the middle left speaker, and the middle right speaker. Also, the audio data B is played back by each audio bus 1, 2, 3, 4 (each channel 1, 2, 3, 4), and the audio (guitar sound) based on the audio data B is transmitted to the upper left speaker, the upper right speaker, Output is from the left center speaker and the right center speaker. Furthermore, the audio data C is reproduced by the audio bus 5 (channel 5), and the audio based on the audio data C (base sound 1) is output from the lower speaker. Further, the audio data D is reproduced by the audio bus 6 (channel 6), and the audio based on the audio data D (base sound 2) is outputted by the woofer.
In particular, in the ducker 355, the volume of the compressed data D assigned to the audio bus 8 is monitored, and in response to the volume of the compressed data D exceeding a threshold, the volume of the compressed data C assigned to the audio bus 5 is increased. reduced. Furthermore, in response to the volume of the compressed data D falling below the threshold, the volume of the compressed data C assigned to the audio bus 5 is restored to the original volume specified in the command list A.
As a result of the above, in sound production A, the volume of the audio data D assigned to the audio buses 6 and 8 exceeds the threshold at a predetermined timing, but at this time, the volume of the compressed data C assigned to the audio bus 5 is reduced.
As a result, even if the volume of the audio data D assigned to the audio buses 6 and 8 exceeds the threshold, the total current consumption by the various speakers 22 will not exceed a predetermined value, and the overcurrent protection circuit will not be activated. becomes possible.
In particular, when the volume of the audio output by the woofer exceeds a threshold value, it is possible to maintain the volume of the audio output from the woofer while suppressing an increase in the total current consumption by the various speakers 22.

Sound production B is made from audio data E (compressed audio data E), audio data F (compressed audio data F), audio data G (compressed audio data G), and audio data H (compressed audio data H). configured.
The audio data E is vocal audio data. The audio data F is audio data of a guitar sound. The audio data G is the audio data of the bass note 1. The audio data H is the audio data of the bass sound 2.
As shown in FIG. 56(b), the command list for specifying the start of sound production B (hereinafter referred to as "command list B") includes the playback of audio data E (compressed audio data E) and the command list for specifying the start of sound production B. Reproduction of F (compressed audio data F), reproduction of audio data G (compressed audio data G), and reproduction of audio data H (compressed audio data H) are specified.
In command list B, audio data E is assigned (output) to each audio bus 1, 2, 3, and 4 at a predetermined volume, and audio data F is assigned to each audio bus 1, 2, 3, and 4 at a predetermined volume. audio data G is assigned (outputted) at a predetermined volume to each audio bus 5, audio data H is assigned (outputted) to each audio bus 6 at a predetermined volume. The panpot ratio is specified so that the signal is output (output). Note that in command list B, compressed data is not assigned to audio bus 8.
As a result, in sound production B, audio data E is played back by each audio bus 1, 2, 3, 4 (each channel 1, 2, 3, 4), and the audio (vocal) based on audio data E is It is output from the speaker, the upper right speaker, the middle left speaker, and the middle right speaker. Also, the audio data F is played back by each audio bus 1, 2, 3, 4 (each channel 1, 2, 3, 4), and the audio (guitar sound) based on the audio data F is transmitted to the upper left speaker, the upper right speaker, Output is from the left center speaker and the right center speaker. Further, the audio data G is reproduced by the audio bus 5 (channel 5), and the audio based on the audio data G (base sound 1) is output from the lower speaker. Further, the audio data H is reproduced by the audio bus 6 (channel 6), and the audio based on the audio data H (base sound 2) is outputted by the woofer.
In particular, in the ducker 355, the volume of audio data assigned to the audio bus 8 is monitored, but in sound production B, since no audio data is assigned to the audio bus 8, the ducker function does not operate. .
That is, in sound production B, the volume of the audio data H assigned to the audio bus 6 exceeds the threshold at a predetermined timing, but even if the volume of the audio data H assigned to the audio bus 6 exceeds the threshold, The total current consumption by the various speakers 22 does not exceed a predetermined value, and the overcurrent protection circuit does not operate.
Therefore, when the volume of the audio data H assigned to the audio bus 6 exceeds a threshold value, there is no need to reduce the volume of the audio data G assigned to the audio bus 5.
Therefore, in the command list B, the audio data H assigned to the audio bus 6 is not assigned to the audio bus 8, so that the ducker function is not activated.

As described above, in the pachinko machine 1, for loud sound production, the audio data assigned to the audio bus 6 is assigned to the audio buses 6 and 8 by also assigning it to the audio bus 8 at the same volume as the audio bus 6. When the volume of the audio data assigned to the audio bus 6 exceeds the threshold, the ducker function is activated and the volume of the audio data assigned to the audio bus 5 can be reduced. It becomes possible to suppress an increase in the total current consumption of the various speakers 22 without reducing the volume.
On the other hand, regarding the low volume sound production, by not assigning the audio data assigned to the audio bus 6 to the audio bus 8, even if the volume of the audio data assigned to the audio bus 6 exceeds the threshold, the ducker The function is not activated, and the volume of the audio data assigned to the audio bus 5 can be maintained.
Therefore, in the pachinko machine 1, it is possible to control activation/deactivation of the ducker function depending on whether or not audio data is assigned to the audio bus 8. Therefore, it is possible to control activation/deactivation of the ducker function in units of audio data.

(Method of controlling production using production control board 300)
Next, a method of controlling the performance using the performance control board 300 will be explained.
The CPU 310 selects a performance (performance number) to be executed according to a control command received from the main control board 200. Then, the performance scenario data corresponding to the selected performance number and the performance scenario timer corresponding to the performance scenario data are set in the performance scenario setting area of the DRAM 304.
The "performance scenario data" is information that defines the progress of the production. Specifically, a plurality of process data are registered in chronological order in the performance scenario data. That is, a plurality of process data and information specifying the start time (start timing) of processing based on each process data are registered in the production scenario data.
Each process data includes one or more pieces of command information. For example, the command information includes command information that specifies the start of a sub-effect (display effect, sound effect, lamp effect, or movable object effect), sub-effect (display effect, sound effect, lamp effect, or movable object effect) Command information (hereinafter referred to as "performance end command") that specifies the end of the performance is specified.

Further, the CPU 310 controls the progress of the performance based on the performance scenario data set in the performance scenario setting area.
Specifically, the CPU 310 updates the performance scenario timer set in the performance scenario setting area at a predetermined period, and updates the performance set in the performance scenario setting area based on the updated value of the performance scenario timer. It is determined whether there is any process data whose start time has arrived among the process data registered in the scenario data. When it is determined that there is process data whose start time has come, each piece of command information included in the process data is stored (stored) in the corresponding buffer area.
At this time, command information regarding the display performance (command information specifying the start of the display effect, command information specifying the end of the display effect, etc.) is stored in the display command buffer area. On the other hand, command information regarding sound production (command information specifying various sound production control numbers) is stored in the sound command buffer area. On the other hand, command information regarding the lamp effect (command information specifying the start of the lamp effect, command information specifying the end of the lamp effect, etc.) is stored in the lamp command buffer area. On the other hand, command information regarding the movable body performance (command information specifying the start of the movable body performance, command information specifying the end of the movable body performance, etc.) is stored in the movable body command buffer area.

(How to control display effects)
Next, a method of controlling the display effect (display) by the effect control board 300 will be explained.
The control ROM 302 stores an animation table corresponding to each display effect (each display effect number). The animation table corresponding to each display effect is associated with display priority information corresponding to the display effect (image forming the display effect).
"Display priority information" is information that specifies display priority.
“Display priority” is information that specifies display (drawing) priority.
When a plurality of display effects (displays) are executed overlappingly in time, the display on the display screen 31a (the image displayed on the display screen 31a) is based on the plurality of display effects (images related to the plurality of display effects). A staged image) is constructed. In this case, among the multiple display effects (images) that make up the display (the effect image), the display effect (image) with the higher display priority is lower than the display effect (image) with the lower display priority. , will be displayed with priority. That is, among the plurality of display effects (the plurality of images) constituting the effect image, the display effect (image) with a higher display priority is displayed with higher priority.
In other words, among the plurality of display effects (images) that make up the effect image, the display effect (image) with a higher display priority is closer to the player (player) than the display effect (image) with a lower display priority. side). That is, among the plurality of display effects (the plurality of images) constituting the effect image, the display effect (image) with a higher display priority is displayed closer to the viewer.
As a result, among the multiple display effects (multiple images) constituting the relevant effect image, there is overlap between a display effect (image) with a higher display priority and a display effect (image) with a lower display priority. If there is, the display effect (image) with the higher display priority is displayed preferentially for the overlapping portion.

The CPU 310 (display control unit) determines whether command information is stored in the display command buffer area at predetermined intervals. If it is determined that command information is stored in the display command buffer area, each piece of command information stored in the display command buffer area is analyzed, and processing is executed according to the analysis result.
At this time, if command information specifying the start of a display effect is stored in the display command buffer area, the animation table corresponding to the display effect number specified by the command information among the animation tables stored in the control ROM 302 Read out. Then, the read animation table is set (stored/registered) in the animation table setting area of the DRAM 304.
As a result, the animation table stored in the control ROM 302 is copied to the animation table setting area. Note that multiple animation tables can be set in the animation table setting area.

The "animation table" is information (various parameters for controlling image display) that defines the progress of display effects (display of effect images) by the various image display devices 31 and 32. In other words, the animation table is information that defines the movement of an image.
Specifically, a predetermined number of pieces of frame information are registered in the animation table in chronological order. The display performance progresses by sequentially displaying images based on each piece of frame information in the order in which they are registered for a predetermined number of pieces of frame information registered in the animation table.
Each frame information is a variety of parameters for controlling (executing and configuring) the display of one frame's worth of images. That is, each frame information includes information (image address information) that specifies the image data (compressed image data) used for drawing, information (display priority information) that specifies the display priority of the image data (the display effect), and information that specifies the image data (the display effect). Information that specifies the magnification (enlargement rate/reduction rate) when drawing data (hereinafter referred to as "display magnification information"), information that specifies the coordinates (coordinates in the frame buffer area) for rendering the image data (hereinafter referred to as "display magnification information") (hereinafter referred to as "display coordinate information"), information specifying the transmittance (transparency, transparency, transparency rate) when drawing the image data (hereinafter referred to as "transmittance information"), etc. .

Then, the CPU 310 controls the display of the effect image corresponding to each frame based on one or more animation tables set in the animation table setting area.
Specifically, the CPU 310 executes command construction processing, which will be described later, at predetermined intervals.
In the command construction process, first, the sub-scenario timer corresponding to each animation data set in the display scenario setting area is updated. Next, a display list is constructed in the drawing command buffer area specified as the construction area based on all the animation tables set in the animation table setting area.
Specifically, for all the animation tables set in the animation table setting area, among the frame information registered in each animation table, the frame information selected as the target for constructing the display list is acquired. Then, a display list is constructed based on all the acquired frame information.
As a result, the VDP is controlled according to the display list generated in the drawing command buffer area, and the display performance (display of the performance image by the main image display device 31) is controlled.
That is, when one piece of animation data is set in the display scenario setting area, a display list is constructed that specifies the rendering of the image data specified by the one piece of animation data.
On the other hand, if multiple animation data are set in the display scenario setting area, specify that the image data specified by the multiple animation data be drawn in a predetermined order (sequence). A display list is constructed.
At this time, based on the display priority specified by the display priority information set in the display scenario setting area, the order in which image data corresponding to the display priority information is rendered is set.

(How to control sound production)
Next, a method of controlling sound effects using the effect control board 300 will be explained.
The CPU 310 (sound control unit) determines whether command information is stored in the sound command buffer area at predetermined intervals. If it is determined that command information is stored in the sound command buffer area, each piece of command information stored in the sound command buffer area is analyzed, and processing is executed according to the analysis result.
Specifically, the command list corresponding to the sound production control number specified by the command information is read from the control ROM 302, and the read command list is set in the control register of the sound circuit 323. As a result, the sound circuit 323 operates according to the command list set in the control register.

(Lamp effect control method)
Next, a method of controlling the lamp effect using the effect control board 300 will be explained.
CPU 310 determines whether command information is stored in the lamp command buffer area at predetermined intervals. If it is determined that command information is stored in the lamp command buffer area, each piece of command information stored in the lamp command buffer area is analyzed, and processing is executed according to the analysis result.
At this time, if command information specifying the start of a lamp performance is stored in the lamp command buffer area, the compressed lamp drive data corresponding to the lamp performance number specified by the command information is read out, and the read compression lamp drive data is set in the lamp register. Thereby, the lamp controller 317a controls the lamp performance (driving (lighting) of the various lamps 20 and 21) according to the compressed lamp drive data set in the lamp register.

(How to control moving body performance)
Next, a method of controlling the movable body performance using the performance control board 300 will be explained.
CPU 310 determines whether command information is stored in the movable object command buffer area at predetermined intervals. When it is determined that command information is stored in the movable body command buffer area, each piece of command information stored in the movable body command buffer area is analyzed, and processing is executed according to the analysis result.
At this time, if command information specifying the start of the movable body effect is stored in the movable body command buffer area, the compression motor drive data specified by the command information is read out, and the read compression motor drive data is transferred to the motor register. Set to . As a result, the motor controller 317b controls the movable body performance (driving of various motors 23 (various movable bodies)) according to the compression motor drive data set in the motor register.

(Configuration of driver board 330)
The driver board 330 includes a parallel-serial conversion circuit 331, a lamp driver 332, and a motor driver 333.
The lamp driver 332 controls the driving (light emission) of the light emitting element groups of each system forming the panel lamp 21 according to lamp drive data input from the lamp controller 317a.
At this time, the lamp drive data specifies a brightness value corresponding to each system configuring the panel lamp 21. Then, an excitation signal (drive current) corresponding to the luminance value specified by the lamp drive data is supplied to each system constituting the panel lamp 21. As a result, the driving (light emission) of the light emitting element groups constituting the system is controlled for each system.
The motor driver 333 sends excitation signals (drive current) to various motors 23 (motors 23 forming various movable body units) arranged in the game board unit 10 according to motor drive data input from the motor controller 317b. control the output of
At this time, the output value of each motor 23 disposed in the game board unit 10 is specified in the motor drive data. Then, each motor 23 is supplied with an excitation signal (drive current) according to the output value specified by the motor drive data. As a result, the drive of each motor 23 is controlled.
Detection signals from various sensors 24 are input to the parallel-serial conversion circuit 331 . Then, the parallel-serial conversion circuit 331 converts the detection signals from the various sensors 24 into serial data and outputs the serial data to the serial communication controller 317.

(Configuration of sub-connection board 340)
The sub-connection board 340 includes a parallel-to-serial conversion circuit 341, a lamp driver 342, and a motor driver 343.
The lamp driver 342 controls the driving (light emission) of the light emitting element groups of each system forming the frame lamp 20 according to the lamp drive data input from the lamp controller 317a.
At this time, the lamp drive data specifies a brightness value corresponding to each system making up the frame lamp 20. Then, an excitation signal (drive current) corresponding to the luminance value specified by the lamp drive data is supplied to each system constituting the frame lamp 20. As a result, the driving (light emission) of the light emitting element groups constituting the system is controlled for each system.
The motor driver 343 sends excitation signals (drive current) to various motors 23 (motors 23 forming various movable body units) arranged in the integrated door unit 4 according to motor drive data input from the motor controller 317b. control the output of
At this time, the output value of each motor 23 disposed in the integrated door unit 4 is specified in the motor drive data. Then, each motor 23 is supplied with an excitation signal (drive current) according to the output value specified by the motor drive data. As a result, the drive of each motor 23 is controlled.
Detection signals from the various sensors 24 and detection signals from the various switches 25 to 29 are input to the parallel-serial conversion circuit 341. The parallel-serial conversion circuit 341 converts the detection signals from the various sensors 24 and the detection signals from the various switches 25 to 29 into serial data, and outputs the serial data to the serial communication controller 317.

(Configuration of digital amplifier 305)
Next, the configuration of the digital amplifier 305 will be explained.
The digital amplifier 305 converts and amplifies the audio data (digital signal) input from the sound circuit 323 into an analog signal, and outputs the signal to various speakers 22 (upper left speaker, upper right speaker, middle left speaker, middle right speaker, and woofer). Output against. At this time, the digital amplifier 305 performs frequency correction, volume correction, etc. for each channel (channel 1 to channel 8).
In particular, the digital amplifier 305 has a built-in DSP (Digital Signal Processor). Then, the digital amplifier 305 transmits frequency correction parameters from the CPU 310 to the digital amplifier 305, so that for each channel (channel 1 to channel 8), PEQ (Parametric Equalizer) of 10 bands (frequency bands), 3 bands (Frequency band) DRC (Dynamic Range Controller), crossover filter, bass enhancement function, etc. can be set.

Specifically, the digital amplifier 305 is configured to include four CPU cores (core 1 to core 4). Core 1 performs frequency correction, volume correction, etc. on the audio data of channels 1 and 2 (upper left speaker and upper right speaker). The core 2 performs frequency correction, volume correction, etc. on the audio data of channels 3 and 4 (center left speaker and center right speaker). The core 3 performs frequency correction, volume correction, etc. on the audio data of channel 5 (woofer). Core 4 is unused.
Further, the digital amplifier 305 is provided with a frequency correction parameter setting register in which frequency correction parameters are set (stored). Then, the digital amplifier 305 performs frequency correction on the audio data of each channel (channel 1 to channel 8) according to the frequency correction parameter set in the frequency correction parameter setting register.
In this embodiment, the frequency correction parameter setting register includes a frequency correction parameter setting section 1 corresponding to core 1 (channels 1 and 2), a frequency correction parameter setting section 2 corresponding to core 2 (channels 3 and 4), It is configured to include a frequency correction parameter setting section 3 corresponding to the core 3 (channels 5 and 6).
Then, the core 1 performs frequency correction on the audio data of channels 1 and 2 (upper left speaker and upper right speaker) according to the frequency correction parameters set in the frequency correction parameter setting section 1. Further, the core 2 performs frequency correction on the audio data of channels 3 and 4 (center left speaker/center right speaker) according to the frequency correction parameters set in the frequency correction parameter setting section 2. Further, the core 3 performs frequency correction on the audio data of channel 5 (woofer) according to the frequency correction parameter set in the frequency correction parameter setting section 3.

(Control of digital amplifier 305 by CPU 310)
Next, control of the digital amplifier 305 by the CPU 310 will be explained.
FIG. 53 is a diagram showing types of frequency correction parameters.
The control ROM 302 stores frequency correction parameters.
The “frequency correction parameter” is information that specifies the content of frequency correction to be executed by the digital amplifier 305.
As described later, CPU 310 transmits frequency correction parameters to digital amplifier 305 via serial communication controller 317. As a result, in the digital amplifier 305, the frequency correction parameter received from the CPU 310 is set in the frequency correction parameter setting register, and the frequency is set for the audio data of each channel according to the frequency correction parameter set in the frequency correction parameter setting register. Correction is performed.
As shown in FIG. 53, in this embodiment, there are four types of frequency correction parameters with different contents of frequency correction (specifically, "normal time/frequency correction parameter", "jackpot time/frequency correction parameter"). ", "time saving/frequency correction parameters" and "inspection/frequency correction parameters"). In the control ROM 302, "normal time/frequency correction parameter", "big hit time/frequency correction parameter", "time saving time/frequency correction parameter", and "test time/frequency correction parameter" are stored.

The "normal time/frequency correction parameter" is a frequency correction parameter that corresponds to the occurrence of the normal gaming state. That is, the "normal time/frequency correction parameter" is information that specifies the content of frequency correction to be executed by the digital amplifier 305 while the normal gaming state is occurring.
The "normal gaming state" is a gaming state in which no jackpot gaming state occurs and time saving control is stopped.
In particular, in the "Normal/Frequency Correction Parameters", the content of frequency correction for each channel (each speaker) is specified (defined) according to the frequency characteristics of each speaker (so that the frequency characteristics of each speaker are utilized). ing.
"Normal time/Frequency correction parameter" includes "Normal time/Frequency correction parameter 1" corresponding to core 1, "Normal time/Frequency correction parameter 2" corresponding to core 2, and "Normal time/frequency correction parameter 2" corresponding to core 3.・Frequency correction parameter 3".

"Normal frequency correction parameter 1" is information that specifies the content of frequency correction performed by core 1 on audio data of channels 1 and 2 (upper left speaker and upper right speaker). Specifically, "normal frequency correction parameter 1" specifies emphasis on the high and middle ranges and removal (cut) of the low range. As a result, when "normal frequency correction parameter 1" is set in the frequency correction parameter setting section 1, the high and middle ranges of the audio data of channels 1 and 2 (upper left speaker and upper right speaker) are emphasized. At the same time, the low frequency range is removed.
"Normal frequency correction parameter 2" is information that specifies the content of frequency correction performed by the core 2 on the audio data of channels 3 and 4 (center left speaker and center right speaker). Specifically, "normal frequency correction parameter 2" specifies emphasis on the high and middle ranges and removal of the low range. As a result, when "Normal frequency correction parameter 2" is set in the frequency correction parameter setting section 2, the high and middle ranges are emphasized for the audio data of channels 3 and 4 (center left speaker/center right speaker). At the same time, the low frequency range is removed.
“Normal frequency correction parameter 3” is information specifying the content of frequency correction performed by the core 3 on the audio data of channel 5 (woofer). Specifically, "normal frequency correction parameter 3" specifies emphasis on the bass range and removal of the treble range and middle range. As a result, when "Normal frequency correction parameter 3" is set in the frequency correction parameter setting section 3, the bass range is emphasized and the high range and midrange are removed from the audio data of channel 5 (woofer). be done.

The “frequency correction parameter at the time of jackpot” is a frequency correction parameter corresponding to the occurrence of a jackpot gaming state. That is, the "frequency correction parameter at the time of jackpot" is information that specifies the content of frequency correction to be executed by the digital amplifier 305 while the jackpot gaming state is occurring.
In particular, in the "Jackpot Frequency Correction Parameter", the content of frequency correction for each channel (each speaker) is specified (regulated) according to the frequency characteristics of each speaker (so that the frequency characteristics of each speaker are utilized). ing.
"Jackpot/Frequency correction parameter" includes "Jackpot/Frequency correction parameter 1" corresponding to core 1, "Jackpot/frequency correction parameter 2" corresponding to core 2, and "Jackpot/frequency correction parameter 2" corresponding to core 3.・Frequency correction parameter 3".

“Jackpot Frequency Correction Parameter 1” is information specifying the frequency correction content of the audio data of channels 1 and 2 (upper left speaker and upper right speaker) by core 1. Specifically, "Jackpot/Frequency Correction Parameter 1" specifies emphasis on the high and middle ranges and removal of the low range. As a result, when "Jackpot Frequency Correction Parameter 1" is set in the frequency correction parameter setting section 1, the high and middle ranges of the audio data of channels 1 and 2 (upper left speaker and upper right speaker) are emphasized. At the same time, the low frequency range is removed.
“Jackpot Frequency Correction Parameter 2” is information that specifies the content of frequency correction performed by the core 2 on the audio data of channels 3 and 4 (center left speaker and center right speaker). Specifically, "Jackpot/Frequency Correction Parameter 2" specifies emphasis on the high and middle ranges and removal of the low range. As a result, when "Jackpot Frequency Correction Parameter 2" is set in the frequency correction parameter setting section 2, the high and middle ranges will be emphasized for the audio data of channels 3 and 4 (center left speaker/center right speaker). At the same time, the low frequency range is removed.
“Jackpot frequency correction parameter 3” is information that specifies the content of frequency correction performed by the core 3 on the audio data of channel 5 (woofer). Specifically, "Jackpot frequency correction parameter 3" specifies the emphasis of the bass range and the removal of the treble and middle ranges. As a result, when "Jackpot Frequency Correction Parameter 3" is set in the frequency correction parameter setting section 3, the bass range is emphasized and the high and middle ranges are removed from the audio data of channel 5 (woofer). be done.

The "time saving/frequency correction parameter" is a frequency correction parameter that corresponds to the execution of time saving control. That is, the "time-saving time/frequency correction parameter" is information that specifies the content of frequency correction to be executed by the digital amplifier 305 during execution of time-saving control.
In particular, in the "time saving/frequency correction parameters", the content of frequency correction for each channel (each speaker) is specified (regulated) according to the frequency characteristics of each speaker (so that the frequency characteristics of each speaker are utilized). ing.
"Time saving time/frequency correction parameter" includes "time saving time/frequency correction parameter 1" corresponding to core 1, "time saving time/frequency correction parameter 2" corresponding to core 2, and "time saving time/frequency correction parameter 2" corresponding to core 3.・Frequency correction parameter 3''.

"Time saving/frequency correction parameter 1" is information specifying the content of frequency correction performed by the core 1 on the audio data of channels 1 and 2 (upper left speaker and upper right speaker). Specifically, "time saving time/frequency correction parameter 1" specifies emphasis on the high and middle ranges and removal of the low range. As a result, when the "time saving time/frequency correction parameter 1" is set in the frequency correction parameter setting section 1, the high and middle ranges of the audio data of channels 1 and 2 (upper left speaker and upper right speaker) are emphasized. At the same time, the low frequency range is removed.
"Time saving/frequency correction parameter 2" is information specifying the content of frequency correction performed by the core 2 on the audio data of channels 3 and 4 (center left speaker and center right speaker). Specifically, "time saving time/frequency correction parameter 2" specifies emphasis on the high and middle ranges and removal of the low range. As a result, when the "time saving/frequency correction parameter 2" is set in the frequency correction parameter setting section 2, the high and middle ranges are emphasized for the audio data of channels 3 and 4 (center left speaker/center right speaker). At the same time, the low frequency range is removed.
“Time saving/frequency correction parameter 3” is information specifying the content of frequency correction performed by the core 3 on the audio data of channel 5 (woofer). Specifically, the "time saving time/frequency correction parameter 3" specifies the emphasis of the bass range and the removal of the treble range and the middle range. As a result, when the "time saving time/frequency correction parameter 3" is set in the frequency correction parameter setting section 3, the bass range is emphasized and the high and middle ranges are removed from the audio data of channel 5 (woofer). be done.

"Frequency correction parameter at the time of inspection" is a frequency correction parameter corresponding to the execution of the operation confirmation process described later. That is, the "inspection/frequency correction parameter" is information that specifies the content of frequency correction to be performed by the digital amplifier 305 during execution of the operation confirmation process.
In particular, in the "normal frequency correction parameters", the content of frequency correction for each channel (each speaker) is specified (defined) regardless of the frequency characteristics of each speaker. In this embodiment, the "inspection/frequency correction parameter" is information specifying that frequency correction is not performed for all channels (all speakers).
"Inspection frequency correction parameter" includes "Inspection frequency correction parameter 1" corresponding to core 1, "Inspection frequency correction parameter 2" corresponding to core 2, and "Inspection frequency correction parameter 2" corresponding to core 3.・Frequency correction parameter 3''.

"Frequency correction parameter 1 during inspection" is information that specifies the content of frequency correction performed by the core 1 on the audio data of channels 1 and 2 (upper left speaker and upper right speaker). Specifically, "inspection/frequency correction parameter 1" specifies that correction is not to be performed (no correction) for all frequency bands. As a result, when "inspection/frequency correction parameter 1" is set in the frequency correction parameter setting section 1, frequency correction is not performed on the audio data of channels 1 and 2 (upper left speaker and upper right speaker).
"Frequency correction parameter 2 during inspection" is information that specifies the content of frequency correction performed by the core 2 on the audio data of channels 3 and 4 (center left speaker and center right speaker). Specifically, "inspection/frequency correction parameter 2" specifies that correction is not to be performed (no correction) for all frequency bands. As a result, when the "inspection/frequency correction parameter 2" is set in the frequency correction parameter setting section 2, frequency correction is not performed on the audio data of channels 3 and 4 (center left speaker/center right speaker).
"Frequency correction parameter 3 during inspection" is information that specifies the content of frequency correction performed by the core 3 on the audio data of channel 5 (woofer). Specifically, "inspection/frequency correction parameter 3" specifies that no correction is to be performed (no correction) for all frequency bands. As a result, when the "inspection frequency correction parameter 3" is set in the frequency correction parameter setting section 3, frequency correction is not performed on the audio data of channel 5 (woofer).

The DRAM 304 is provided with a frequency correction parameter number setting area 1, a frequency correction parameter number setting area 2, and a frequency correction parameter number setting area 3.
In the frequency correction parameter number setting area 1, information (hereinafter referred to as "frequency correction parameter number") specifying the type of frequency correction parameter set in the frequency correction parameter setting section 1 is set (stored).
In the frequency correction parameter number setting area 2, information (frequency correction parameter number) specifying the type of frequency correction parameter set in the frequency correction parameter setting section 2 is set (stored).
In the frequency correction parameter number setting area 3, information (frequency correction parameter number) specifying the type of frequency correction parameter set in the frequency correction parameter setting section 3 is set (stored).
In this embodiment, the frequency correction parameter numbers include a value (specifically, 0) that specifies the "normal time/frequency correction parameter" and a value (specifically, "0") that specifies the "big hit/frequency correction parameter". "1"), a value that specifies the "time saving time/frequency correction parameter" (specifically, "2"), and a value that specifies the "inspection time/frequency correction parameter" (specifically, , "3") are defined.
Each frequency correction parameter number setting area (frequency correction parameter number setting area 1 to frequency correction parameter number setting area 3) is set to any value from "0" to "3".

Further, the control ROM 302 stores post-effector frequency correction parameters.
The “post-effector frequency correction parameter” is information that specifies the content of frequency correction performed by the post-effector 360.
In this embodiment, there are two types of post-effector frequency correction parameters with different frequency correction contents (specifically, "normal time/post-effector frequency correction parameter" and "inspection time/post-effector frequency correction parameter"). ) is specified. In the control ROM 302, "normal time/post effector frequency correction parameters" and "examination time/post effector frequency correction parameters" are stored.
The "normal time/post-effector frequency correction parameter" is a post-effector frequency correction parameter that corresponds to the game. That is, the "normal time/post-effector frequency correction parameter" is information that specifies the content of frequency correction performed by the post-effector 360 during the game. In particular, the "normal/post-effector frequency correction parameter" specifies that a predetermined frequency correction is to be performed on the audio data of each channel (channel 1 to channel 8).
The "inspection/post-effector frequency correction parameter" is a post-effector frequency correction parameter that corresponds to the execution of the operation confirmation process described later. That is, the "inspection/post-effector frequency correction parameter" is information that specifies the content of frequency correction to be performed by the post-effector 360 during execution of the operation confirmation process. In particular, the "inspection/post-effector frequency correction parameter" specifies that frequency correction is not performed on the audio data of all channels (channels 1 to 8).

The sound circuit 323 is provided with a post-effector frequency correction parameter number register in which a post-effector frequency correction number is set. In the post-effector frequency correction parameter number register, specify the value (specifically, "0") that specifies the "normal time/post-effector frequency correction parameter" and the "post-effector frequency correction parameter during inspection". One of the values (specifically, "1") is set.
The post-effector 360 then performs frequency correction by referring to the post-effector frequency correction parameters stored in the control ROM 302 according to the value set in the post-effector frequency correction parameter number register.
Specifically, when the post-effector frequency correction parameter number register is set to “0”, the post-effector 360 performs frequency correction according to the “normal time/post-effector frequency correction parameter” stored in the control ROM 302. Execute. On the other hand, if "1" is set in the post-effector frequency correction parameter number register, frequency correction is executed according to the "inspection/post-effector frequency correction parameter" stored in the control ROM 302.

(Setting frequency correction parameters during gaming)
When the power is turned on to the pachinko machine 1, the CPU 310 performs initial setting processing (step S28-1) included in the sub-CPU initialization processing to be described later, in which each frequency correction parameter number setting area (frequency correction parameter number setting) of the DRAM 304 is Initialize the values of area 1 to frequency correction parameter number setting area 3). As a result, a value (specifically, "0") specifying the "normal frequency correction parameter" is set in each frequency correction parameter number setting area.
Further, the CPU 310 initializes the value of the post-effector frequency correction parameter number register of the sound circuit 323 in the initial setting process (step S28-1). As a result, a value (specifically, "0") specifying the "normal time/post-effector frequency correction parameter" is set in the post-effector frequency correction parameter number register.
As a result, the post-effector 360 then performs frequency correction on the audio data of each channel according to the "normal time/post-effector frequency correction parameter."

Further, in the digital amplifier setting process (step S28-3), after transmitting a reset signal to the digital amplifier 305, the CPU 310 sends "normal time/frequency correction parameters"("normal time/frequency correction parameters 1" to " Normal time/frequency correction parameter 3'') is transmitted to the digital amplifier 305.
As a result, in the digital amplifier 305, various registers (frequency correction parameter setting register (frequency correction parameter setting section 1, frequency correction parameter setting section 2, and frequency correction parameter setting section 3), registers related to volume setting (correction), After the registers related to terminal settings, status information setting registers, etc.) are initialized (cleared), "normal frequency correction parameters" are set in the frequency correction parameter setting register. That is, in the frequency correction parameter setting section 1, "normal time/frequency correction parameter 1" is set, in the frequency correction parameter setting section 2, "normal time/frequency correction parameter 2" is set, and in the frequency correction parameter setting section 3, ""Normal/Frequency Correction Parameter 3" is set.
As a result, the digital amplifier 305 then performs frequency correction on the audio data of channels 1 and 2 (upper left speaker and upper right speaker) according to the "normal time frequency correction parameter 1", and the "normal time frequency correction parameter 2, frequency correction is performed on the audio data of channels 3 and 4 (center left speaker, center right speaker), and frequency correction is performed on the audio data of channel 5 (woofer) according to ``Normal frequency correction parameter 3''. Correction is performed.

In addition, at the start of the jackpot gaming state, the CPU 310 specifies "jackpot/frequency correction parameter" in each frequency correction parameter number setting area (frequency correction parameter number setting area 1 to frequency correction parameter setting area 3) of the DRAM 304. Set a value (specifically, "1").
In addition, the CPU 310 transmits “frequency correction parameters at the time of jackpot” (“frequency correction parameter 1 at the time of jackpot” to “frequency correction parameter 3 at the time of jackpot”) to the digital amplifier 305.
As a result, the "jackpot/frequency correction parameter" is set in the frequency correction parameter setting register of the digital amplifier 305. That is, in the frequency correction parameter setting unit 1, “Jackpot/Frequency correction parameter 1” is set, in the frequency correction parameter setting unit 2, “Jackpot/Frequency correction parameter 2” is set, and in the frequency correction parameter setting unit 3, “Jackpot/frequency correction parameter 2” is set. ``At the time of jackpot/frequency correction parameter 3'' is set.
As a result, the digital amplifier 305 performs frequency correction on the audio data of channels 1 and 2 (upper left speaker and upper right speaker) in accordance with the "Jackpot frequency correction parameter 1", and the "Jackpot frequency correction parameter 2, frequency correction is performed on the audio data of channels 3 and 4 (center left speaker/center right speaker), and frequency correction is performed on the audio data of channel 5 (woofer) according to ``Jackpot Frequency Correction Parameter 3''. Correction is performed.

In addition, if the CPU 310 does not start the time saving control in response to the end of the jackpot gaming state, when the jackpot gaming state ends, the CPU 310 stores each frequency correction parameter number setting area (frequency correction parameter number setting area 1 to frequency correction parameter setting area) of the DRAM 304. In 3), a value (specifically, "0") specifying the "normal time/frequency correction parameter" is set.
Further, the CPU 310 transmits “normal frequency correction parameters” (“normal frequency correction parameters 1” to “normal frequency correction parameters 3”) to the digital amplifier 305.
As a result, the "normal frequency correction parameter" is set in the frequency correction parameter setting register of the digital amplifier 305. That is, in the frequency correction parameter setting section 1, "normal time/frequency correction parameter 1" is set, in the frequency correction parameter setting section 2, "normal time/frequency correction parameter 2" is set, and in the frequency correction parameter setting section 3, ""Normal/Frequency Correction Parameter 3" is set.
As a result, the digital amplifier 305 then performs frequency correction on the audio data of channels 1 and 2 (upper left speaker and upper right speaker) according to the "normal time frequency correction parameter 1", and the "normal time frequency correction parameter 2, frequency correction is performed for the audio data of channels 3 and 4 (center left speaker, center right speaker), and frequency correction for the audio data of channel 5 (woofer) is performed according to ``Normal frequency correction parameter 3''. Correction is performed.

On the other hand, when the CPU 310 starts the time saving control in response to the end of the jackpot gaming state, the CPU 310 stores each frequency correction parameter number setting area (frequency correction parameter number setting area 1 to frequency correction parameter setting area) of the DRAM 304 at the end of the jackpot gaming state. In 3), a value (specifically, "2") specifying the "time saving/frequency correction parameter" is set.
Further, the CPU 310 transmits “time saving/frequency correction parameters” (“time saving/frequency correction parameters 1” to “time saving/frequency correction parameters 3”) to the digital amplifier 305.
As a result, the “time saving/frequency correction parameter” is set in the frequency correction parameter setting register of the digital amplifier 305. That is, the frequency correction parameter setting section 1 sets "time saving/frequency correction parameter 1", the frequency correction parameter setting section 2 sets "time saving/frequency correction parameter 2", and the frequency correction parameter setting section 3 sets "time saving/frequency correction parameter 1". "Time saving/frequency correction parameter 3" is set.
As a result, the digital amplifier 305 then performs frequency correction on the audio data of channels 1 and 2 (upper left speaker and upper right speaker) according to the "time saving time/frequency correction parameter 1", and the "time saving time/frequency correction parameter 2, frequency correction is performed on the audio data of channels 3 and 4 (center left speaker/center right speaker), and frequency correction is performed on the audio data of channel 5 (woofer) according to ``Time saving/frequency correction parameter 3''. Correction is performed.

Furthermore, at the end of the time saving control (when the number of time saving times has been exhausted), the CPU 310 sets the "Normal A value (specifically, "0") that specifies "frequency correction parameter" is set.
Further, the CPU 310 transmits “normal time/frequency correction parameters” (“normal time/frequency correction parameter 1” to “normal time/frequency correction parameter 3”) to the digital amplifier 305.
As a result, the “normal frequency correction parameter” is set in the frequency correction parameter setting register of the digital amplifier 305. That is, in the frequency correction parameter setting section 1, "normal time/frequency correction parameter 1" is set, in the frequency correction parameter setting section 2, "normal time/frequency correction parameter 2" is set, and in the frequency correction parameter setting section 3, ""Normal/Frequency Correction Parameter 3" is set.
As a result, the digital amplifier 305 performs frequency correction on the audio data of channels 1 and 2 (upper left speaker and upper right speaker) in accordance with the "normal frequency correction parameter 1", and 2, frequency correction is performed on the audio data of channels 3 and 4 (center left speaker/center right speaker), and frequency correction is performed on the audio data of channel 5 (woofer) according to ``Normal frequency correction parameter 3''. Correction is performed.

As described above, while the normal gaming state is occurring, the post effector 360 performs frequency correction of the audio data of each channel (channel 1 to channel 8) based on the "normal time/post effector frequency correction parameter". At the same time, the digital amplifier 305 performs frequency correction of the audio data of each channel (channel 1 to channel 8) based on the "normal frequency correction parameter."
On the other hand, while the jackpot game state is occurring, the post-effector 360 performs frequency correction of the audio data of each channel (channel 1 to channel 8) based on the "normal time/post-effector frequency correction parameter". , the digital amplifier 305 performs frequency correction of the audio data of each channel (channel 1 to channel 8) based on the "jackpot frequency correction parameter".
On the other hand, while the time saving control is being executed, the post effector 360 executes frequency correction of the audio data of each channel (channel 1 to channel 8) based on the "normal time/post effector frequency correction parameter", and The digital amplifier 305 performs frequency correction of the audio data of each channel (channel 1 to channel 8) based on the "time saving/frequency correction parameter".
In particular, for "Normal time/Frequency correction parameter", "Jackpot time/Frequency correction parameter", and "Time saving time/Frequency correction parameter", audio data that matches the frequency characteristics of the speaker connected to the channel is set for each channel. The contents of the frequency correction are defined so that the frequency correction is generated. This makes it possible to bring out the characteristics of each speaker and improve the effect of sound production.

Here, in the digital amplifier 305, when the frequency correction parameter set in the frequency correction parameter setting register (frequency correction parameter setting section 1 to frequency correction parameter setting section 3) is changed, the volume for the corresponding channel is changed to "0" (mute/silence), and then the frequency correction parameter is changed.
Specifically, when the frequency correction parameter set in the frequency correction parameter setting section 1 is changed, the volume is set to "0" for channels 1 and 2, and then the frequency correction parameter is changed. After changing the frequency correction parameters, channels 1 and 2 are restored to their original volumes.
On the other hand, when the frequency correction parameter set in the frequency correction parameter setting section 2 is changed, the volume is set to "0" for channels 3 and 4, and then the frequency correction parameter is changed. After changing the frequency correction parameters, channels 3 and 4 are restored to their original volumes.
On the other hand, when the frequency correction parameter set in the frequency correction parameter setting section 3 is changed, the volume is set to "0" for channels 5 and 6, and then the frequency correction parameter is changed. After changing the frequency correction parameters, channels 5 and 6 are restored to their original volumes.

(Setting frequency correction parameters when executing operation confirmation process)
The main control board 200 is provided with a test terminal (not shown) to which a test device can be connected. By operating the inspection device connected to the inspection terminal, it is possible to send a predetermined inspection command from the main control board 200 to the production control board 300.
Upon receiving the predetermined test command, the CPU 310 executes speaker test processing.
In the speaker test process, first, in each frequency correction parameter number setting area (frequency correction parameter number setting area 1 to frequency correction parameter setting area 3) of the DRAM 304, a value (specifically is set to "3").
Further, in the post-effector frequency correction parameter number register of the sound circuit 323, a value (specifically, "1") that specifies the "inspection/post-effector frequency correction parameter" is set.
As a result, the post-effector 360 then performs frequency correction on the audio data of each channel according to the "inspection/post-effector frequency correction parameter."

Furthermore, “inspection frequency correction parameters” (“inspection frequency correction parameters 1” to “inspection frequency correction parameters 3”) are transmitted to the digital amplifier 305.
As a result, the “inspection/frequency correction parameter” is set in the frequency correction parameter setting register of the digital amplifier 305. That is, in the frequency correction parameter setting section 1, "inspection/frequency correction parameter 1" is set, in the frequency correction parameter setting section 2, "inspection/frequency correction parameter 2" is set, and in the frequency correction parameter setting section 3, "inspection/frequency correction parameter 2" is set. ``Inspection/Frequency Correction Parameter 3'' is set.
As a result, the digital amplifier 305 performs frequency correction on the audio data of channels 1 and 2 (upper left speaker and upper right speaker) in accordance with the "frequency correction parameter 1 during inspection", and 2, frequency correction is performed on the audio data of channels 3 and 4 (center left speaker/center right speaker), and frequency correction is performed on the audio data of channel 5 (woofer) according to ``Frequency correction parameter 3 during inspection''. Correction is performed.

In the speaker test process, next, an operation check process is executed.
In the operation confirmation process, predetermined test sounds (sound effects, audio, etc.) are output from the upper left speaker, upper right speaker, middle left speaker, middle right speaker, and woofer in a predetermined order. Thereby, the tester tests (operation check) whether or not each speaker is operating normally, based on the test sound output from each speaker.
In this embodiment, the speaker inspection process (operation confirmation process) is configured to end when the power of the pachinko machine 1 is cut off.
Here, if frequency correction similar to that during the game is performed on the test sounds output from each speaker, there is a possibility that the tester will not be able to hear the test sounds. For example, if each speaker outputs a test sound in the frequency range from treble to midrange, if frequency correction is performed to remove the treble and midrange from the test sound output from the woofer, the tester However, there is a risk that the test sound output from the woofer may not be audible.
Therefore, in the pachinko machine 1, while executing the operation check process of the speaker 22, the post-effector 360 adjusts the audio data of each channel (channels 1 to 8) based on the "inspection/post-effector frequency correction parameter". In addition to controlling the frequency correction, the digital amplifier 305 controls the frequency correction of the audio data of each channel (channel 1 to channel 8) based on the "inspection frequency correction parameter."
In particular, in the "inspection/post-effector frequency correction parameters", it is specified that the frequency correction of the audio data of each channel is not performed (the audio data is passed through). Furthermore, the contents of the "inspection/frequency correction parameters" are specified so that frequency correction of the audio data of each channel is not performed (audio data is passed through).
As a result, during execution of the operation confirmation process of the speaker 22, frequency correction is not performed on the audio data of all channels in the sound circuit 323 and the digital amplifier 305.
Therefore, it is possible to prevent a situation in which the examiner cannot hear the test sounds output from each speaker 22.

Here, each speaker may be damaged if sound in a frequency band that does not match the frequency characteristics of the speaker is output at a large volume.
Therefore, in the digital amplifier 305, during the period in which the frequency correction of the audio data of each channel is controlled based on the "inspection time/frequency correction parameter", the "normal time/frequency correction parameter" and the "jackpot time/frequency correction parameter" are controlled. The volume (gain) of each channel may be suppressed (reduced) compared to the period in which the frequency correction of the audio data of each channel is controlled based on the "parameter" or the "time saving time/frequency correction parameter". I do not care.
For example, in speaker testing processing, "testing/volume correction parameters" are sent to the digital amplifier 305 together with "testing/frequency correction parameters," and during operation confirmation processing, the digital amplifier 305 sends " A configuration may also be adopted in which the volume of each channel is controlled according to the "Inspection/Volume Correction Parameter". At this time, the "inspection/volume correction parameter" is set for each channel during gaming (while the "normal time/frequency correction parameter", "jackpot time/frequency correction parameter", or "time saving time/frequency correction parameter" is being set). A lower volume shall be specified compared to .

(Digital amplifier reset processing)
Next, digital amplifier reset processing will be explained.
The digital amplifier 305 is provided with a status information setting register in which status information is set. Here, the "status information" is information indicating the status of the digital amplifier 305.
Furthermore, the digital amplifier 305 is capable of detecting the occurrence of various abnormal states, such as the occurrence of overcurrent, the occurrence of a high temperature state, and the occurrence of a state in which the duty ratio (τ) is maintained at an abnormal level. There is. Then, when various abnormal states are not detected, a value corresponding to the normal state (specifically, "0") is set in the status information setting register, and the status is changed according to the detection of various abnormal states. In the information setting register, a value (specifically, "1") corresponding to the abnormal state is set.
Further, the CPU 310 acquires status information set in the status information setting register of the digital amplifier 305 in a status information acquisition process (step S28-7) to be described later. Then, when it is determined that the acquired status information has a value corresponding to an abnormal state (specifically, "1"), a digital amplifier reset process (step S28-9), which will be described later, is executed.
In the digital amplifier reset process, a reset signal is transmitted to the digital amplifier 305 (the signal input to the reset terminal is turned on). Then, upon receiving the reset signal, the digital amplifier 305 initializes various registers. Specifically, a frequency correction parameter setting register (frequency correction parameter setting section 1, frequency correction parameter setting section 2, and frequency correction parameter setting section 3), a register related to volume setting (correction), a register related to terminal setting, Initialize (clear) the status information setting register, etc. As a result, a value (specifically, "0") corresponding to the normal state is set in the status information setting register.

Here, when a reset signal is sent to the digital amplifier 305 while the power is turned on to the pachinko machine 1, the frequency correction parameter setting registers (frequency correction parameter setting section 1, frequency correction parameter setting section 2, and By initializing the frequency correction parameter setting section 3), the quality of the sound output from the speaker 22 changes before and after the reset signal is transmitted, which may give the player a sense of discomfort.
Therefore, in the pachinko machine 1, after transmitting a reset signal to the digital amplifier 305, the frequency correction parameter setting registers (frequency correction parameter setting section 1, frequency correction parameter setting section 2, and frequency correction parameter setting section 3) are The configuration is such that the set information is restored to the information before the reset signal is transmitted (before the occurrence of an abnormal state is detected in the digital amplifier 305).
That is, after executing the digital amplifier reset process, the CPU 310 executes the parameter restoration process (step S28-10).
In the parameter restoration process, first, the values in the frequency correction parameter number setting areas (frequency correction parameter number setting area 1 to frequency correction parameter number setting area 3) of the DRAM 304 are checked. Then, the frequency correction parameter corresponding to the value of each frequency correction parameter number setting area is read from the control ROM 302, and the read frequency correction parameter is transmitted to the digital amplifier 305.

Specifically, the value of frequency correction parameter number setting area 1 is "0", the value of frequency correction parameter number setting area 2 is "0", and the value of frequency correction parameter number setting area 3 is "0". If so, “normal time/frequency correction parameter 1”, “normal time/frequency correction parameter 2”, and “normal time/frequency correction parameter 3” are transmitted to the digital amplifier 305. As a result, in the digital amplifier 305, "normal time/frequency correction parameter 1" is restored to frequency correction parameter setting section 1, "normal time/frequency correction parameter 2" is returned to frequency correction parameter setting section 2, and frequency correction “Normal frequency correction parameter 3” is returned to the parameter setting section 3.
On the other hand, if the value of frequency correction parameter number setting area 1 is "1", the value of frequency correction parameter number setting area 2 is "1", and the value of frequency correction parameter number setting area 3 is "1" , "Jackpot frequency correction parameter 1,""Jackpot frequency correction parameter 2," and "Jackpot frequency correction parameter 3" are transmitted to the digital amplifier 305. As a result, in the digital amplifier 305, the "jackpot/frequency correction parameter 1" is restored to the frequency correction parameter setting section 1, the "jackpot/frequency correction parameter 2" is returned to the frequency correction parameter setting section 2, and the frequency correction “Jackpot frequency correction parameter 3” is returned to the parameter setting section 3.
On the other hand, if the value of frequency correction parameter number setting area 1 is "2", the value of frequency correction parameter number setting area 2 is "2", and the value of frequency correction parameter number setting area 3 is "2" , "time saving time/frequency correction parameter 1", "time saving time/frequency correction parameter 2", and "time saving time/frequency correction parameter 3" are transmitted to the digital amplifier 305. As a result, in the digital amplifier 305, the "time saving/frequency correction parameter 1" is restored to the frequency correction parameter setting section 1, the "time saving/frequency correction parameter 2" is returned to the frequency correction parameter setting section 2, and the frequency correction The “time saving/frequency correction parameter 3” is returned to the parameter setting section 3.

As described above, in the pachinko machine 1, even if the digital amplifier 305 is initialized (reset) while the production control board 300 is powered on, the speaker 22 The quality of the sound output from the device will not change. Therefore, it is possible to prevent a situation where the player feels uncomfortable.
Here, if an abnormal state occurs in the digital amplifier 305 while the power is being turned on to the pachinko machine 1, the initialization/recovery process will not be executed for the production control board 300 as described above. Initialization/recovery processing (steps S28-9, S28-10) is executed only for the digital amplifier 305.
On the other hand, if an abnormal state occurs in the performance control board 300 while the power is being turned on to the pachinko machine 1, the performance control board 300 can be controlled by turning off the power to the pachinko machine 1 and then turning on the power again. , initialization/return processing (step S28-1) is executed, and initialization/return processing (step S28-3) is executed for the digital amplifier 305. As a result, various types of memory (values in the frequency correction parameter number setting area, values in the setting value storage area, values in the flag area indicating the execution status of time saving control, flags indicating the effect mode) for controlling the effects in the effect control board 300 are stored. (area values, etc.) will be initialized (values before the occurrence of the abnormal condition will be deleted and initial values will be set again).

(About gaming machine status)
In the pachinko machine 1, six states are defined as gaming machine states (specifically, a playable state, a setting change state, a setting confirmation state, a setting abnormal state, a RAM abnormal state, and a backup abnormal state). .
The RAM 230 of the main control board 200 is provided with a gaming machine status flag area. The gaming machine status flag area contains six gaming machine statuses (specifically, game ready status, setting change status, setting confirmation status, setting abnormality status, RAM abnormality status, and backup abnormality status) as gaming machine status flags. ), a value corresponding to any one of the gaming machine states is stored (set). Then, in the pachinko machine 1, a gaming machine state corresponding to the value stored in the gaming machine state flag area is generated.

The "playable state" is a gaming machine state in which it is possible to proceed with the game.
While the game-enabled state is occurring, execution of the processes of steps S4-9 to S4-18, which will be described later, is permitted. This allows the games (normal games and special games) to proceed.
Further, while the game-enabled state is occurring, the base ratio is displayed on the performance display device 206. Furthermore, information regarding the game is displayed on the main display device 60.

The "setting change state" is a gaming machine state in which the setting values stored in the setting value area of the RAM 230 can be changed.
The setting change state is generated when the setting change condition is satisfied. In this embodiment, when the power is turned on, the detection signal from the inner frame open sensor 108 is input, the detection signal from the setting key switch 208 is input, and the detection signal from the RAM clear switch 207 is input. When the signal is input, the setting change condition is satisfied. That is, when the power is turned on, if the inner frame unit 3 is open, the key switch 208 is rotated to the ON state, and the RAM clear switch 207 is pressed, a setting change state occurs. be done.
While the setting change state is occurring, execution of the processes of steps S4-9 to S4-18, which will be described later, is prohibited. As a result, games (specifically, normal games and special games) are stopped.
Furthermore, while the setting change state is occurring, the setting values stored in the setting value area are displayed on the performance display device 206. Furthermore, all the lighting elements constituting the main display device 60 are turned off. Furthermore, security information (external information) is output to the external device.
Further, while the setting change state is occurring, by pressing the RAM clear switch 207, it is possible to change the setting values stored in the setting value area. Then, when the key switch 208 is rotated to the OFF state while the setting change state is occurring, a game enabled state is generated instead of the setting change state. As a result, the setting value stored in the setting value area is determined.

The "setting confirmation state" is a gaming machine state in which the setting values stored in the setting value area of the RAM 230 can be confirmed.
The setting confirmation state occurs when the setting confirmation condition is satisfied. In this embodiment, when the power is turned on, the detection signal from the inner frame open sensor 108 is input, the detection signal from the setting key switch 208 is input, and the detection signal from the RAM clear switch 207 is input. The setting confirmation condition is met when no signal is input. That is, when the power is turned on, if the inner frame unit 3 is open, the key switch 208 is rotated to the ON state, and the RAM clear switch 207 is not pressed, the setting confirmation state occurs. be done.
While the setting confirmation state is occurring, execution of the processes of steps S4-9 to S4-18, which will be described later, is prohibited. As a result, games (specifically, normal games and special games) are stopped.
Further, while the setting confirmation state is occurring, the setting values stored in the setting value area are displayed on the performance display device 206. This makes it possible to check the setting values stored in the setting value area. Furthermore, all the lighting elements that constitute the main display device 60 are turned off. Furthermore, security information (external information) is output to the external device.
Note that while the setting confirmation state is occurring, the setting values stored in the setting value area cannot be changed.
Then, when the key switch 208 is rotated to the OFF state while the setting confirmation state is occurring, a game ready state is generated instead of the setting confirmation state.

The "setting abnormal state" is a gaming machine state in which a setting abnormality has occurred.
The setting abnormal state occurs when it is determined that the set value set in the set value area is not within the specified range while the game enabled state is occurring.
While the setting abnormality is occurring, execution of the processes of steps S4-9 to S4-18, which will be described later, is prohibited. As a result, games (specifically, normal games and special games) are stopped.
Furthermore, while a setting abnormality is occurring, an error code designating the occurrence of a setting abnormality is displayed on the performance display device 206. Furthermore, all the lighting elements constituting the main display device 60 are turned off. Furthermore, security information (external information) is output to the external device.
In order to recover from an abnormal setting state, it is necessary to turn off the power and turn on the power to bring about a setting change state.

The "RAM abnormal state" is a gaming machine state in which a RAM abnormality has occurred.
The RAM abnormal state occurs when it is determined that a read/write abnormality has occurred in the RAM 230 when the power is turned on.
While the RAM abnormal state is occurring, execution of the processes of steps S4-9 to S4-18, which will be described later, is prohibited. As a result, games (specifically, normal games and special games) are stopped.
Furthermore, while the RAM abnormality is occurring, an error code specifying the occurrence of the RAM abnormality is displayed on the performance display device 206. Furthermore, all the lighting elements constituting the main display device 60 are turned off. Furthermore, security information (external information) is output to the external device.
In order to recover from the RAM abnormal state, it is necessary to turn off the power and turn on the power to cause a setting change state.

The "backup abnormal state" is a gaming machine state in which a backup abnormality has occurred.
The backup abnormal state occurs when it is determined that a backup abnormality (specifically, a backup flag abnormality or a checksum abnormality) has occurred in the RAM 230 when the power is turned on.
While the backup abnormal state is occurring, execution of the processes of steps S4-9 to S4-18, which will be described later, is prohibited. As a result, games (specifically, normal games and special games) are stopped.
Further, while a backup abnormality is occurring, an error code specifying the occurrence of the backup abnormality is displayed on the performance display device 206. Furthermore, all the lighting elements constituting the main display device 60 are turned off. Furthermore, security information (external information) is output to the external device.
In order to recover from the backup abnormal state, it is necessary to turn off the power and turn on the power to bring about a setting change state.

(About setting values)
Next, setting values (setting information) set in the pachinko machine 1 will be explained.
The "setting value" is information that specifies the probability of winning the special symbol lottery (first special symbol lottery and second special symbol lottery) (probability of winning the jackpot game state). In this embodiment, values from "0" to "5" are defined as the set value.
The RAM 230 of the main control board 200 is provided with a set value area. In the set value area, any one value from "0" to "5" is stored (set) as a set value. In the pachinko machine 1, the probability of winning the special symbol lottery is determined according to the value set in the set value area.
In this embodiment, the winning probabilities of the special symbol lottery corresponding to each setting value are as follows: the winning probability corresponding to the setting value = "5", the winning probability corresponding to the setting value = "4", in descending order of winning probability. , the winning probability corresponding to the setting value = "3", the winning probability corresponding to the setting value = "2", the winning probability corresponding to the setting value = "1", the winning probability corresponding to the setting value = "0" (winning probability) Probability becomes “high” → probability of winning becomes “low”).

In particular, in the pachinko machine 1, it is possible to change (select) the setting values stored in the setting value area while the setting change state is occurring. Here, the setting value is changed by an administrator of the pachinko machine 1 (such as an employee of the gaming hall where the pachinko machine 1 is installed).
That is, as described above, when the power is turned on, if the inner frame unit 3 is open, the key switch 208 is rotated to the ON state, and the RAM clear switch 207 is pressed, the settings A modified state is raised.
While the setting change state is occurring, the setting values stored in the setting value area are displayed on the performance display device 206. Furthermore, each time the RAM clear switch 207 is pressed, the set value stored in the set value area is changed. At this time, when the setting value set in the setting value area is changed, the setting value displayed on the performance display device 206 is also changed accordingly.
Then, when the key switch 208 is rotated to the OFF state while the setting change state is occurring, a game enabled state is generated instead of the setting change state. As a result, the setting value stored in the setting value area is determined.

(About base ratio)
In the pachinko machine 1, a base ratio (base value) is calculated by the CPU 210 while the game-enabled state is occurring. In this embodiment, the base ratio is calculated only while a predetermined gaming state is occurring (specifically, while the special figure low probability state is occurring and the time saving control is stopped).
Then, while the playable state is occurring, the calculated base ratio is displayed on the performance display device 206.
The "base ratio" is the number of game balls launched into the game area 30 and the number of game balls launched into the predetermined ball entry ports (in this embodiment, the first starting port 51, the second starting port 52, and other winning ports 54 to 57). The information is calculated based on the number of prize balls paid out in response to the entry of game balls. Specifically, the base ratio is the ratio (percentage) of the number of pitches put out to the number of out pitches.
In this embodiment, the base ratio for each predetermined section (period) is calculated. Then, as the predetermined section, a section in which a predetermined number (in this embodiment, 60,000 [balls]) of out balls are detected (discharged) is defined. That is, each section starts in response to the end of the previous section, and ends in response to the number of out pitches detected during the current section reaching a predetermined number (60,000 [balls]). Then, the CPU 210 calculates the base ratio at any time (in real time) during each section.

Note that a predetermined time may be defined as the predetermined section. That is, the CPU 210 may be configured to calculate the base ratio every predetermined time.
"Number of out pitches" refers to the number of out pitches. “Out ball” refers to a game ball ejected from the game area 30. Specifically, the out ball is a game ball that has passed through the discharge path (a game ball detected by the out switch 109).
Note that the game ball ejected from the out port 58 may be used as an out ball. Specifically, the out switch 109 may be configured to detect only the game ball ejected from the out port 58, and the game ball detected by the out switch 109 may be regarded as an out ball.
The "number of payouts" refers to the total number of prize balls paid out in response to game balls entering the first starting port 51, second starting port 52, and other winning ports 54 to 57.

(About various lotteries)
Next, various types of lottery executed by the pachinko machine 1 will be explained.
In the pachinko machine 1, a normal symbol lottery is executed when a game ball passes through the starting gate 41. When the normal symbol lottery is won, a normal symbol winning game state is generated. In the normal figure winning game state, the normal electric accessory 52a is displaced (opened) from the closed state to the open state, allowing the game ball to enter the second starting port 52.
In this embodiment, one type of "normal pattern win" is set as the type of the normal pattern winning game state that occurs when the normal symbol lottery is won.

When winning the "normal pattern winning" (winning the normal pattern lottery), the normal pattern display device is controlled to stop displaying the normal pattern as the "normal pattern winning pattern".
On the other hand, if the normal symbol lottery is unsuccessful, the normal symbol is controlled to be stopped and displayed as a "missing symbol" in the common symbol display device.
In the pachinko machine 1, it is possible to execute time-saving control as auxiliary control that is advantageous to the player.
During execution of the time saving control, the time (hereinafter referred to as "variation time") for performing variable display of special symbols is shortened compared to when the time saving control is stopped. In this embodiment, while the time saving control is being executed, the winning probability of the normal symbol lottery is improved and the time for displaying the normal symbol fluctuations is shortened, compared to when the time saving control is stopped. In addition, during execution of the time saving control, compared to when the time saving control is stopped, the number of times the normal electric accessory 52a is opened is increased in the normal figure per game state, and the opening time of the normal electric accessory 52a is increased. It will be extended.

If you win the "normal map", the number of times the normal electric accessory 52a is opened is set to 1 [times] or 3 [times], and the opening time of the ordinary electric accessory 52a each time is 0.5 times. [s] or 2.0 [s]. At this time, while the time saving control is being executed, the number of times the normal electric accessory 52a is opened is set to 3 [times], and the opening time of the ordinary electric accessory 52a each time is set to 2.0 [s]. Set. On the other hand, while the time saving control is stopped, the number of times the normal electric accessory 52a is opened is set to 1 [times], and the opening time of the ordinary electric accessory 52a each time is set to 0.5 [s]. be done.

Furthermore, in the pachinko machine 1, the first special symbol lottery is executed when the game ball enters the first starting port 51, and the second special symbol lottery is executed when the game ball enters the second starting port 52. A special symbol lottery is executed. Then, when the first special symbol lottery or the second special symbol lottery is won, a jackpot game state is generated. In the jackpot game state, a round game is executed in which the special electric accessory 53a is displaced from the closed state to the open state, and a game ball can enter the jackpot opening 53.
In this embodiment, "Jackpot 1" and "Jackpot 2" are set as the types of jackpot game states that occur when the first special symbol lottery is won, and "Jackpot 1" and "Jackpot 2" occur when the second special symbol lottery is won. ``Jackpot 3'' to ``Jackpot 6'' are set as the types of jackpot game states.

When "Jackpot 1" is won, the stop symbol (display mode) corresponding to "Jackpot 1 symbol" is stopped and displayed on the special figure 1 display device. In addition, in the performance symbol display areas a1 to a4, stop symbols (display mode) corresponding to the "probable variable symbols" are stopped and displayed.
Here, the "probable variable pattern" means, for example, that the first performance symbol z1 that is stopped and displayed at the lottery result display position of the three first performance symbol display areas a1 to a3 is the same as "7, 7, 7", etc. The second effect pattern z2, which is arranged in "number patterns" indicating odd numbers and is stopped and displayed in the second effect pattern display area a4, is a display mode in which a predetermined color is displayed.
When the "Jackpot 2" is won, the stop symbol (display mode) corresponding to the "Jackpot 2 symbol" is stopped and displayed on the special figure 1 display device. Further, in the performance symbol display areas a1 to a4, stop symbols (display mode) corresponding to the "normal symbols" are stopped and displayed.
Here, the "normal symbol" means, for example, that the first performance symbol z1 that is stopped and displayed at the lottery result display position of the three first performance symbol display areas a1 to a3 is the same as "2, 2, 2", etc. The second effect pattern z2, which is arranged in "number patterns" indicating even numbers and is stopped and displayed in the second effect pattern display area a4, is a display mode in which the second effect pattern z2 shows a predetermined color.
When "Jackpot 3" is won, the stop symbol (display mode) corresponding to "Jackpot 3 symbol" is stopped and displayed on the special figure 2 display device. In addition, in the performance symbol display areas a1 to a4, stop symbols (display mode) corresponding to the "probable variable symbols" are stopped and displayed.
When "Jackpot 4" is won, the stop symbol (display mode) corresponding to "Jackpot 4 symbol" is stopped and displayed on the special figure 2 display device. In addition, in the performance symbol display areas a1 to a4, stop symbols (display mode) corresponding to the "probable variable symbols" are stopped and displayed.
When "Jackpot 5" is won, the stop symbol (display mode) corresponding to "Jackpot 5 symbol" is stopped and displayed on the special figure 2 display device. Further, in the performance symbol display areas a1 to a4, a stop symbol (display mode) corresponding to the "hidden symbol" is stopped and displayed.
Here, the "hidden symbol" means, for example, that the first performance symbol z1 that is stopped and displayed at the lottery result display position of the three first performance symbol display areas a1 to a3 is a predetermined number such as "1, 2, 3", etc. The display mode is such that the combination has regularity and the second performance symbol z2, which is stopped and displayed in the second performance symbol display area a4, shows a predetermined color.
When "Jackpot 6" is won, the stop symbol (display mode) corresponding to "Jackpot 6 symbol" is stopped and displayed on the special figure 2 display device. Further, in the performance symbol display areas a1 to a4, a stop symbol (display mode) corresponding to the "hidden symbol" is stopped and displayed.

On the other hand, if the special symbol lottery is unsuccessful (in the case of "losing"), the stop symbol (display mode) corresponding to the "losing symbol" will be stopped and displayed on the special symbol 1 display device or the special symbol 2 display device. . Further, in the performance symbol display areas a1 to a4, a stop symbol (display mode) corresponding to the "missing symbol" is stopped and displayed.
Here, the "missing symbol" means, for example, that the first production symbol z1 that is stopped and displayed in the three first production symbol display areas a1 to a3 is stopped and displayed in at least one area such as "1, 6, 9", etc. The numbers indicated by the "number symbols" that have been displayed are in a different combination from the numbers indicated by the "number symbols" that are stopped and displayed in other areas, and the second production symbol z2 that is stopped and displayed in the second production symbol display area a4. is a display mode in which the display shows a predetermined color.

When winning "Jackpot 1" to "Jackpot 6", a predetermined number of round games are executed in the jackpot game state.
In this embodiment, when "Jackpot 1", "Jackpot 2", "Jackpot 5", or "Jackpot 6" is won, the number of round games is set to 5 [times]. On the other hand, if "Jackpot 3" is won, the number of round games is set to 15 [times]. On the other hand, if "Jackpot 4" is won, the number of round games is set to 10 [times].
When winning "Jackpot 1" to "Jackpot 6", the maximum opening time of the special electric accessory 53a in each round game is set to a predetermined time (29.0 [s] in this embodiment). Ru. In each round game, the set maximum opening time has elapsed since the special electric accessory 53a was opened, and the number of game balls entering the big prize opening 53 in the round game is The process is terminated when one of the conditions is satisfied, that is, the predetermined upper limit number (in this embodiment, 10 [balls]) is reached.

In addition, in the pachinko machine 1, the game states related to the winning probability of special symbol drawings (first special symbol drawing and second special symbol drawing) are "special pattern low probability state" and "special pattern high probability state". is stipulated.
While the "special symbol low probability state" is occurring, the probability of winning the special symbol lottery is set to the first probability (hereinafter referred to as "low probability").
While the "special pattern high probability state" is occurring, the probability of winning the special symbol lottery is set to a second probability (hereinafter referred to as "high probability") higher than the first probability.
In addition, the main control board 200 sets the winning probability of each lottery so that the winning probability of the first special symbol lottery and the winning probability of the second special symbol lottery are synchronized. Here, the winning probability of the special symbol lottery refers to the probability of winning a "win"("jackpot1" to "jackpot 6") in which a jackpot game state occurs.
In particular, in the pachinko machine 1, the winning probability of the special symbol lottery depends on the combination of the setting value set in the setting value area and the gaming state (special pattern low probability state or special pattern high probability state). It becomes a probability.

Specifically, when the set value is "0" and the "special symbol low probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery is 1/319.69. On the other hand, when the set value is "0" and the "special symbol high probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery is 1/32.13.
On the other hand, when the set value is "1" and the "special symbol low probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery is 1/312.08. On the other hand, when the set value is "1" and the "special symbol high probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery is 1/31.36.
On the other hand, when the set value is "2" and the "special symbol low probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery is 1/304.82. On the other hand, when the set value is "2" and the "special symbol high probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery is 1/30.62.

On the other hand, when the set value is "3" and the "special symbol low probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery is 1/297.89. On the other hand, when the set value is "3" and the "special symbol high probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery becomes 1/29.93.
On the other hand, when the set value is "4" and the "special symbol low probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery is 1/291.27. On the other hand, when the set value is "4" and the "special symbol high probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery is 1/29.26.
On the other hand, when the set value is "5" and the "special symbol low probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery is 1/284.94. On the other hand, when the set value is "5" and the "special symbol high probability state" is occurring, the winning probability (jackpot probability) of the special symbol lottery is 1/28.62.

When "Jackpot 2" or "Jackpot 6" is won, a "special figure low probability state" occurs during the period from the end of the jackpot game state to the occurrence of the next jackpot game state.
On the other hand, in the case of winning "Jackpot 1" or "Jackpot 3" to "Jackpot 5", a "special figure high probability state" is generated in response to the end of the jackpot game state. In this embodiment, the "special pattern high probability state" is started in response to the end of the jackpot game state, and is ended in response to the start of the next jackpot game state (end of the stop display of the "big win pattern").
In addition, the "special pattern high probability state" is started in response to the end of the jackpot game state, and the number of special symbol drawings executed during the occurrence of the "special pattern high probability state" is a predetermined number of times (for example, 10,000[ It is also possible to have a configuration in which the game is terminated (a ``special figure low probability state'' is generated) in response to reaching the number of times]).

In addition, when winning "Jackpot 1" to "Jackpot 6", time saving control is executed after the jackpot game state ends.
The time saving control is started in response to the end of the jackpot game state, and the winning of the special symbol lottery (the "jackpot symbol" is stopped and displayed) and the notification display of the special symbol for a predetermined number of time savings (fluctuating display) and stop display) are executed.
When "Jackpot 2" or "Jackpot 6" is won, 100 [times] is set as the predetermined time saving number.
on the other hand. When winning "Jackpot 1" or "Jackpot 3" to "Jackpot 5", 10,000 [times] is set as the predetermined time saving number.

(About control commands)
Next, the control commands transmitted from the main control board 200 to the production control board 300 and the control commands transmitted and received between the main control board 200 and the payout control board 400 will be explained.
The main control board 200 and the production control board 300 are connected to each other via a serial communication harness. Here, the communication between the main control board 200 and the production control board 300 is performed only in one direction from the main control board 200 to the production control board 300, and the communication from the production control board 300 to the main control board 200 is Not done.
Each control command sent from the main control board 200 to the production control board 300 is composed of 1 byte of upper data indicating the type of control command and 1 byte of lower data indicating the content of the control command. There is.
Then, the main control board 200 transmits a control command composed of upper data and lower data to the production control board 300 by serial communication. When the production control board 300 receives a control command from the main control board 200, a serial communication reception interrupt occurs, and by this interrupt processing, data of the control command is stored in a predetermined area of the RAM.

In the pachinko machine 1, the control commands sent from the main control board 200 to the production control board 300 include a symbol type designation command, a fluctuation mode designation command, a fluctuation pattern designation command, a stop designation command, a game state designation command, and a pending number. Specified command, opening specified command, round start specified command, round end specified command, ending specified command, 1st read ahead specified command, 2nd read ahead specified command, 3rd read ahead specified command, error specified command, demo specified command, setting value specified Commands, game status designation commands, etc. are set.
The symbol type designation command is a command that designates the type of stopped symbol (stopped symbol number). Specifically, the symbol type designation command specifies one of the "missing symbols" and "jackpot 1 symbol" to "jackpot 6 symbols". The symbol type designation command is transmitted at the start of the variable display of special symbols. In this embodiment, the symbol type designation commands are set to correspond to each of the first special symbol lottery and the second special symbol lottery.

The variation mode designation command is a command that specifies the type of variation mode (variation mode number). The variation mode designation command specifies the variation time associated with the variation mode number by specifying the variation mode number. The variation mode designation command specifies the variation time of the first half period (aspect of the first half period of the variation production) of the variation display (variation production) of the special symbol.
In this embodiment, m (plural) types of variation modes are set, each of which is associated with a different variation time. The variation mode designation command specifies one of the m types of variation modes (variation mode numbers) ("variation mode m").

The variation pattern designation command is a command that specifies the type of variation pattern (variation pattern number). The fluctuation pattern designation command specifies a fluctuation pattern number and thereby designates a fluctuation time associated with the fluctuation pattern number. The variation pattern designation command specifies the variation time of the second half period (aspect of the second half period of the variation production) among the variation display (variation production) of the special symbols.
In this embodiment, n (plural) types of variation patterns are set, which are associated with mutually different variation times. The variation pattern designation command specifies one of the n types of variation patterns (variation pattern numbers) ("variation pattern n").
The fluctuation mode designation command and the fluctuation pattern designation command are transmitted at the start of the fluctuation display of special symbols.

The stop designation command is a command that designates the stop display of the special symbols (effect symbols z1, z2). The stop designation command is transmitted at the start of the stop display of the special symbol.
The gaming state designation command is a command that designates the gaming state (gaming state offset value).
Here, the "gaming state offset value" is information specifying the gaming state. In this embodiment, as the gaming state offset value, each combination of the value of the time saving control flag, the value of the special pattern high probability state flag, the value of the previous jackpot symbol flag, and the value of the number of revolutions after jackpot counter is used. The corresponding numerical value is set.
The gaming state designation command specifies one gaming state offset value. The gaming state designation command is transmitted when the power is turned on, when changing the special gaming phase, which will be described later, and the like.

The pending number specification command is a command that specifies the pending number. In this embodiment, the reservation number specification command specifies that the number of reservations (the number of special drawings 1 or 2) has increased by "1", that the number of reservations has decreased by "1", the number of reservations, etc. .
Here, the "special figure 1 pending number" refers to the number of notification displays (fluctuating display and stop display) of the first special symbol on the special figure 1 display device that are pending. In addition, the "special figure 2 pending number" refers to the number of notification displays (fluctuating display and stop display) of the second special symbol on the special figure 2 display device that are pending.
The pending number designation command is transmitted when the power is turned on, when game information is stored, when a variable display of special symbols starts, etc. In this embodiment, commands corresponding to each of the first special symbol lottery and the second special symbol lottery are set as the reservation number designation commands.

The opening designation command is a command that designates the start of the opening period (start of the jackpot gaming state). The opening designation command designates the type of jackpot game state (type of "jackpot symbol"). Specifically, the opening designation command designates one type among "1 jackpot symbol" to "6 jackpot symbols". The opening designation command is transmitted at the start of the opening period (at the start of the jackpot gaming state).
The round start designation command is a command that designates the start of a round game. The round start designation command is transmitted at the start of a round game.
The round end designation command is a command that designates the end of the round game. The round end designation command is sent at the end of the round game.
The ending designation command is a command that designates the start of the ending period. The ending designation command is sent at the start of the ending period.

The first look-ahead designation command is a command that designates the type of stop symbol (one type among "missing symbol" and "jackpot 1 symbol" to "jackpot 6 symbol"). In this embodiment, the first prefetch designation command is set to correspond to each of the first special symbol lottery and the second special symbol lottery.
The second prefetch designation command is a command that designates the contents of the variable mode. Specifically, the second look-ahead designation command indicates that the type of variation mode is undefined ("undefined value"), or that it is one of m types of variation modes (variation mode number) ("variation mode m"). ). The second prefetch designation command is transmitted when storing game information.
The third prefetch designation command is a command that designates the contents of the variation pattern. Specifically, the third look-ahead designation command indicates that the type of variation pattern is undefined (“indeterminate value”), or that it is one of n types of variation patterns (variation pattern number) (“variation pattern n”). ). The third prefetch designation command is transmitted when storing game information.

The error specification command is a command that specifies the occurrence of various errors. In this embodiment, the error designation command designates the occurrence of a vibration error, a magnetic error, a radio wave error, or a right-handed hit error. The error specification command is sent when the occurrence of various errors is detected.
The demo designation command is a command that designates the start of a customer waiting state. The demo designation command is sent at the start of the customer waiting state.
The setting value specification command is a command for specifying a setting value stored in the setting value area of the RAM 230. The setting value designation command is sent when the RAM is cleared, when the power is restored after being turned on, when the setting change state ends, when the setting confirmation state ends, and so on.
The game situation designation command is a command that designates the occurrence (start) or release (end) of a firing-enabled state. The gaming situation designation command is transmitted when the gaming enabled state occurs (starting time) and when the gaming enabled state is canceled (ending).

The main control board 200 and the payout control board 400 are connected to each other via a serial communication harness. Here, communication between the main control board 200 and the payout control board 400 is performed bidirectionally. Each control command transmitted and received between the main control board 200 and the payout control board 400 is composed of 1 byte of data.
Then, the main control board 200 transmits a control command to the payout control board 400 through serial communication. When the payout control board 400 receives a control command from the main control board 200, a serial communication reception interrupt occurs, and by processing this interrupt, data of the control command is stored in a predetermined area of the RAM. Further, the payout control board 400 transmits a control command to the main control board 200 by serial communication. When the main control board 200 receives a control command from the payout control board 400, a serial communication reception interrupt occurs, and the data of the control command is stored in a predetermined area of the RAM 230 by this interrupt processing.

In the pachinko machine 1, a prize ball number designation command and the like are set as control commands sent from the main control board 200 to the payout control board 400.
The prize ball number designation command is a command to designate the number of prize balls to be paid out. In this embodiment, the prize ball number designation command specifies the payout of n prize balls (n=1 to 15). The prize ball number designation command is transmitted when the payout control board 400 executes the payout operation of the prize balls.
In addition, in the pachinko machine 1, the control commands sent from the payout control board 400 to the main control board 200 include occurrence/cancellation of an error during payout, occurrence/cancellation of a full tank error, occurrence/cancellation of a ball jam error, etc. Control commands are set to specify each. Each control command is sent when the occurrence or release of various errors is detected.

(Processing executed by main control board 200)
Next, the processing executed by the main control board 200 will be explained.
First, the functions of the hardware configured in the main control board 200 will be explained.
When the pachinko machine 1 is powered on, the random number generation circuit 203 starts hardware random number update processing.
In the hard random number update process, each time one clock is input from the clock generation circuit 202 (in this embodiment, every 0.083 [μs]), the values of the first to third loop counters are changed within a predetermined range. (in the present embodiment, within the range of 0 to 65535) is updated by "1".

In addition, in the hard random number update process, every time 32 clocks are input from the clock generation circuit 202 (in this embodiment, every 2.666 [μs]), the value of the fourth loop counter is within a predetermined range (this In the embodiment, it is updated by "1" in the range of 0 to 10006).
Then, by the hard random number update process, the winning random number of the normal symbol lottery, the jackpot random number of the first special symbol lottery, the jackpot random number of the second special symbol lottery, and the reach group random number are updated. Note that the hardware random number update process is executed as a function of the random number generation circuit 203 (hardware), and is executed independently of the process executed by the CPU 210 based on software, which will be described later.

Further, when the power is turned on to the pachinko machine 1, the transmission shift registers of the command output ports 1 and 2 transmit the control commands stored in the FIFO buffer to the production control board 300 or the payout control board 400. Start control command sending processing. Note that the control command transmission process is executed as a function of the command output ports 1 and 2 (hardware), and is executed independently of the process executed by the CPU 210 based on software, which will be described later.

Next, the game control process executed by the CPU 210 of the main control board 200 based on the program (software) stored in the ROM 220 will be described.

(CPU initialization processing)
First, CPU initialization processing executed by the CPU 210 will be described.
FIG. 7 is a flowchart showing CPU initialization processing.
When the power is turned on to the pachinko machine 1, the CPU 210 starts the CPU initialization process shown in FIG. The CPU initialization process is a process based on a program for controlling the progress of the game. That is, the CPU initialization process is based on the program stored in the used area m1 (program area) of the ROM 220.
When the CPU initialization process is started, the process first moves to step S1-1.
In step S1-1, initial setting processing is executed, and the process moves to step S1-2. In the initial setting process, a startup program is read from the ROM 220, and settings necessary for executing various processes, such as register settings, are performed.

In the initial setting process, a RAM clear signal from the RAM clear switch 207, a detection signal from the setting key switch 208, and a detection signal from the inner frame open sensor 108 are read.
Specifically, the value set in the reception storage area corresponding to the RAM clear switch 207 is read twice, and based on the read result twice, the RAM clear switch 207 is set to the on state. Determine whether or not this has occurred. Then, the determination result is saved as switch information of the RAM clear switch 207. At this time, if it is determined that an on state has occurred, a value indicating that an on state has occurred (in this embodiment, "1") is saved as switch information, and the on state is not generated. If it is determined that no on state has occurred, a value (in this embodiment, "0") indicating that no on state has occurred is stored as switch information.

Also, the value set in the reception storage area corresponding to the setting key switch 208 is read twice, and the setting key switch 208 is turned on based on the reading result twice. Determine whether or not. Then, the determination result is saved as switch information of the setting key switch 208. At this time, if it is determined that an on state has occurred, a value indicating that an on state has occurred (in this embodiment, "1") is saved as switch information, and the on state is not generated. If it is determined that no on state has occurred, a value (in this embodiment, "0") indicating that no on state has occurred is stored as switch information.

Furthermore, the value set in the reception storage area corresponding to the inner frame open sensor 108 is read two times, and the inner frame open sensor 108 is set to the ON state based on the read result two times. Determine whether or not this is occurring. If it is determined that the on state has not occurred, the switch information of the setting key switch 208 is rewritten to a value (in this embodiment, "0") indicating that the on state has not occurred. On the other hand, if it is determined that an on state has occurred, the switch information of the setting key switch 208 is not rewritten.

In step S1-2, a wait processing time setting process is executed, and the process moves to step S1-3. In the wait processing time setting process, a predetermined wait processing time (3.1 [s] in this embodiment) is set in a timer counter. As a result, the timer counter starts measuring the set wait processing time.
In step S1-3, it is determined whether the wait processing time set in step S1-2 has elapsed, and if it is determined that the wait processing time has elapsed (Yes), the process moves to step S1-4, If it is determined that the wait processing time has not elapsed (No), the process of step S1-3 is repeated.

In step S1-4, RAM access permission processing is executed, and the process moves to step S1-5. In the RAM access permission process, necessary processes are executed to allow access to the work area of the RAM 230.
Specifically, in the RAM access permission process, a value corresponding to the access permission is stored as a RAM protect value in the RAM access protect area of the RAM 230. This allows the CPU 210 to access the RAM 230.

In step S1-5, gaming machine status flag acquisition processing is executed, and the process moves to step S1-6. In the gaming machine status flag acquisition process, a gaming machine status flag is acquired.
Specifically, in the gaming machine state flag acquisition process, the value (gaming machine state flag) stored in the gaming machine state flag area of the RAM 230 is saved (loaded) in the D register.
In step S1-6, it is determined whether the backup valid flag is normal or not. If it is determined that the backup valid flag is normal (Yes), the process moves to step S1-7, and the backup valid flag is normal. If it is determined that it is not (No), the process moves to step S1-18.
Here, if the value (backup valid flag) stored in the backup valid flag area of the RAM 230 is a predetermined valid value, it is determined that the backup valid flag is normal, and the value stored in the backup valid flag area is determined to be normal. is not a predetermined valid value, it is determined that the backup valid flag is not normal.

In step S1-7, a checksum calculation process is executed, and the process moves to step S1-8. In the checksum calculation process, a checksum is calculated based on the backup information.
Specifically, in the checksum calculation process, first, a checksum is calculated based on the information stored in the used area M1 (F000H to F1FFH) of the RAM 230 among the backup information.
Next, a checksum is calculated based on the information stored in the unused area M2 (F300H to F3FFH) of the RAM 230 among the backup information.
In step S1-8, it is determined whether the checksum calculated in step S1-7 is normal or not, and if it is determined that the checksum is normal (Yes), the process moves to step S1-9, If it is determined that the checksum is not normal (No), the process moves to step S1-18.
Here, "the checksum value of the usage area M1 calculated in step S1-7 matches the checksum value of the usage area M1 stored in the checksum area of the RAM 230" and "the checksum value of the usage area M1 calculated in step S1-7" - The checksum value of the unused area M2 calculated in step 7 must match the checksum value of the unused area M2 stored in the checksum area.'' Determine that the checksum is normal.
On the other hand, "the checksum value of the usage area M1 calculated in step S1-7 matches the checksum value of the usage area M1 stored in the checksum area of the RAM 230" and "the checksum value of the usage area M1 calculated in step S1-7" The checksum value of the unused area M2 calculated in step 7 must match the checksum value of the unused area M2 stored in the checksum area.'' If not, it is determined that the checksum is not normal.

In step S1-9, a power-on clear target area setting process is executed, and the process moves to step S1-10. In the power-on clear target area setting process, the used area M1 of the RAM 230 is cleared (initialized) in areas other than the setting value area and gaming machine status flag area (specifically, the checksum area, A backup valid flag area, an error related area, a normal game related area 1, a normal game related area 2, and a stack area) are set.
In step S1-10, it is determined whether or not the RAM clear switch 207 is in the on state, and if it is determined that the on state is not occurring (No), the process moves to step S1-11, If it is determined that the on state has occurred (Yes), the process moves to step S1-21.
Here, based on the switch information of the RAM clear switch 207 saved in step S1-1, it is determined whether the RAM clear switch 207 is in an on state. At this time, if a value indicating that an on state has occurred is stored as switch information, it is determined that an on state has occurred, and a value indicating that an on state has not occurred is saved. If it is, it is determined that an on state has not occurred.

In step S1-11, it is determined whether or not a game-enabled state has occurred (set). If it is determined that a game-enabled state has occurred (Yes), the process moves to step S1-12, and the game is started. If it is determined that the possible state has not occurred (No), the process moves to step S1-14.
Here, it is determined whether or not a game-enabled state has occurred based on the gaming machine state flag stored in the D register. At this time, if the gaming machine status flag stored in the D register has a value corresponding to a gaming enabled state, it is determined that a gaming enabled state has occurred, and if the value does not correspond to a gaming enabled state, the gaming It is determined that the possible state has not occurred.

In step S1-12, it is determined whether or not the setting confirmation condition is satisfied. If it is determined that the setting confirmation condition is satisfied (Yes), the process moves to step S1-13, and the setting confirmation condition is satisfied. If it is determined that this is not true (No), the process moves to step S1-14.
The "setting confirmation conditions" are that the gaming enabled state is occurring, the RAM clear switch 207 is not in the on state, the setting key switch 208 is in the on state, and This is true when the frame open sensor 108 is in the on state.
Here, in step S1-1, if the inner frame open sensor 108 is not in the on state, the switch information of the setting key switch 208 is rewritten to a value indicating that the on state is not occurring. As a result, when both the setting key switch 208 and the inner frame open sensor 108 are in the on state, a value indicating that the on state has occurred is saved as the switch information of the setting key switch 208. . On the other hand, if at least one of the setting key switch 208 and the inner frame open sensor 108 is not in the on state, a value indicating that the on state has not occurred is saved as the switch information of the setting key switch 208. be done.
Therefore, in step 1-12, it is determined whether the setting confirmation condition is satisfied based on the switch information of the setting key switch 208 saved in step S1-1. At this time, if a value indicating that an on state has occurred is saved as switch information, it is determined that the setting confirmation condition is met, and a value indicating that an on state has not occurred is saved. If so, it is determined that the setting confirmation condition is not satisfied.

In step S1-13, a setting confirmation state setting process is executed, and the process moves to step S1-14. In the setting confirmation state setting process, a value corresponding to the setting value confirmation state is set as a gaming machine state flag in the D register.
In step S1-14, a process for setting a region to be cleared upon power return is executed, and the process moves to step S1-15. In the clearing target area setting process when the power is restored, the area to be cleared (initialized) in the used area M1 of the RAM 230 is the setting value area, gaming machine status flag area, normal game related area 2, and other areas excluding the stack area. Areas (specifically, a checksum area, a backup valid flag area, an error-related area, and a normal game-related area 1) are set.

In step S1-15, initialization processing upon power recovery is executed, and the process moves to step S1-16. In the power-return initialization process, the range set in step S1-14 of the used area M1 of the RAM 230 is cleared (initialized).
In step S1-16, a sub-command transmission process is executed when the power is restored, and the process moves to step S1-17. In the power-return subcommand transmission process, a subcommand (power-return designation command) specifying that the power has been restored from power-off is stored in the subcommand output request buffer of the RAM 230 .
In step S1-17, a payout command transmission process is executed when the power is restored, and the process moves to step S1-32. In the payout command transmission process when the power is restored, a payout command specifying that the power has been restored from the power cut is stored in the payout command output request buffer of the RAM 230.

In step S1-18, a backup abnormal state setting process is executed, and the process moves to step S1-19. In the backup abnormal state setting process, a value corresponding to the backup abnormal state is set as a gaming machine state flag in the D register.
In step S1-19, an unused area read/write check process is executed, and the process moves to step S1-20. In the unused area read/write check process, the unused area M2 of the RAM 230 is cleared (initialized) and a read/write check is performed.
In step S1-20, abnormality clearing target area setting processing is executed, and the process moves to step S1-21. In the error clearing target area setting process, all areas (specifically, setting value area, gaming machine status flag area, checksum area, backup valid flag) are cleared (initialized) in the used area M1 of the RAM 230. area, error related area, normal game related area 1, normal game related area 2, and stack area).
In step S1-21, a used area read/write check process is executed, and the process moves to step S1-22. In the used area read/write check process, the range set in step S1-20 of the used area M1 of the RAM 230 is cleared (initialized) and a read/write check is performed.

In step S1-22, it is determined whether or not the result of the read/write check performed in steps S1-19 and S1-21 is normal, and if it is determined that the result of the read/write check is not normal (No), , the process moves to step S1-23, and if it is determined that the result of the read/write check is normal (Yes), the process moves to step S1-24.
In step S1-23, RAM abnormal state setting processing is executed, and the process moves to step S1-28. In the RAM abnormal state setting process, a value corresponding to the RAM abnormal state is set as a gaming machine state flag in the D register.
In step S1-24, it is determined whether or not the settings confirmation state has occurred (set). If it is determined that the settings confirmation state has occurred (Yes), the process moves to step S1-25, and the settings If it is determined that the confirmation state has not occurred (No), the process moves to step S1-26.
Here, it is determined whether a setting confirmation state has occurred based on the gaming machine state flag stored in the D register. At this time, if the gaming machine status flag stored in the D register is a value corresponding to the setting confirmation state, it is determined that the setting confirmation state has occurred, and if the value does not correspond to the setting confirmation state, the setting confirmation state is determined to have occurred. It is determined that the confirmation state has not occurred.
In step S1-25, a game enable state setting process is executed, and the process moves to step S1-26. In the game-enabled state setting process, a value corresponding to the game-enabled state is set as a gaming machine state flag in the D register.

In step S1-26, it is determined whether or not the setting change condition is satisfied. If it is determined that the setting change condition is satisfied (Yes), the process moves to step S1-27, and the setting change condition is satisfied. If it is determined that this is not true (No), the process moves to step S1-28.
The "setting change condition" is that the RAM clear switch 207 is turned on, the setting key switch 208 is turned on, and the inner frame open sensor 108 is turned on. It holds true if
Here, as described above, if both the setting key switch 208 and the inner frame open sensor 108 are in the on state, the switch information of the setting key switch 208 indicates that the on state has occurred. The value is saved. On the other hand, if at least one of the setting key switch 208 and the inner frame open sensor 108 is not in the on state, a value indicating that the on state has not occurred is saved as the switch information of the setting key switch 208. be done.
Therefore, in step 1-26, it is determined whether the setting change condition is satisfied based on the switch information of the RAM clear switch 207 and the switch information of the setting key switch 208, which were saved in step S1-1. .
At this time, if a value indicating that an on state has occurred is stored for both the switch information of the RAM clear switch 207 and the switch information of the setting key switch 208, the setting change condition is satisfied. It is determined that On the other hand, if a value indicating that an on state has not occurred is stored for at least one of the switch information of the RAM clear switch 207 and the switch information of the setting key switch 208, the setting change condition is satisfied. It is determined that the

In step S1-27, a setting change state setting process is executed, and the process moves to step S1-28. In the setting change state setting process, a value corresponding to the setting change state is set as a gaming machine state flag in the D register.
In step S1-28, a gaming machine state flag saving process is executed, and the process moves to step S1-29. In the gaming machine state flag saving process, the gaming machine state flag set in the D register is saved in the gaming machine state flag area of the RAM 230.
In step S1-29, a RAM clear subcommand transmission process is executed, and the process moves to step S1-30. In the RAM clear subcommand transmission process, a subcommand that specifies that RAM clearing has been executed (RAM clear designation command) is stored in the subcommand output request buffer of the RAM 230.
In step S1-30, RAM clear initialization processing is executed, and the process moves to step S1-31. In the RAM clear initialization process, the range set in step S1-9 or step S1-20 of the used area M1 of the RAM 230 is cleared (initialized).
In step S1-31, a RAM clear payout command transmission process is executed, and the process moves to step S1-32. In the RAM clear payout command transmission process, a payout command specifying that RAM clear has been executed is stored in the payout command output request buffer of the RAM 230.

In step S1-32, subcommand setting processing is executed, and the process moves to step S1-33. In the subcommand setting process, a power-on gaming machine state designation command that designates the current gaming machine state is stored in the subcommand output request buffer of the RAM 230.
Specifically, in the subcommand setting process, a power-on gaming machine state designation command that specifies the gaming machine state flag (gaming machine state) stored in the gaming machine state flag area of the RAM 230 is sent to the subcommand output request of the RAM 230. Store in buffer.
In step S1-33, subcommand group setting processing is executed, and the process moves to step S1-34. In the subcommand group setting process, the subcommand group is stored in the subcommand output request buffer of the RAM 230.
Here, the subcommand group includes a subcommand that specifies the power recovery phase, a subcommand that specifies the gaming state (gaming state offset value), a subcommand that specifies the firing position, and a stop symbol for the first special symbol. sub-command to specify the stop symbol of the second special symbol, sub-command to specify the number of reserved special figures 1, sub-command to specify the number of reserved special figures 2, sub-command to specify the value of the time-saving counter, RAM230 This includes a setting value specification command for specifying the setting value stored in the setting value area of .

In step S1-34, initial display time setting processing is executed, and the process moves to step S1-35. In the initial display time setting process, the initial display time of the performance display device 206 is set in the initial display timer.
In step S1-35, interrupt setting processing is executed, and the process moves to main loop processing (step S2-1). In the interrupt setting process, the CTC (counter/timer circuit), which is a peripheral device, is initialized.
Specifically, in the interrupt setting process, an interrupt vector register is set, and an interrupt count value (4.0 [ms] in this embodiment) is set in the CTC.

(main loop processing)
Next, the main loop processing executed by the CPU 210 will be explained.
FIG. 8 is a flowchart showing main loop processing.
Upon completion of the CPU initialization process (step S1-35) shown in FIG. 7, the CPU 210 starts the main loop process shown in FIG. The main loop process is a process based on a program for controlling the progress of the game. That is, the main loop process is based on the program stored in the used area m1 (program area) of the ROM 220.
When the main loop process is started, the process first moves to step S2-1.
In step S2-1, interrupt prohibition processing is executed, and the process moves to step S2-2. In the interrupt disabling process, an interrupt disabling state is set to disable interrupts of other processes. As a result, execution of power-off save processing, timer interrupt processing, etc., which will be described later, is prohibited during the period in which the interrupt prohibition state is set.
In step S2-2, an initial value random number update process is executed, and the process moves to step S2-3. In the initial value random number update process, the value of a loop counter for generating an initial value random number is updated.
Here, the "initial value random number" is a random number for determining the initial value and end value of soft random numbers (winning symbol random number, reach mode random number, fluctuation pattern random number, etc.) that are random numbers generated on the program.
That is, the value of the loop counter that generates the soft random number is updated within the range from a preset initial value to an end value. The initial value and end value of the loop counter that generates the soft random number are changed each time the value of the loop counter reaches the end value. At this time, the initial value and end value of the loop counter are determined based on the initial value random number.

In step S2-3, main command analysis processing is executed, and the process moves to step S2-4. In the main command analysis process, the main command received from the payout control board 400 (the control command sent from the payout control board 400 to the main control board 200) is analyzed, and processing according to the analysis result is executed.
In step S2-4, a subcommand transmission process is executed, and the process moves to step S2-5. In the subcommand transmission process, the subcommand stored in the subcommand output request buffer of the RAM 230 is output to the transmission data register of the output port 205 (command output port 1).
As a result, the subcommand input to the transmission data register is memorized (stored) in the FIFO buffer. Then, the subcommands stored in the FIFO buffer are transmitted to the production control board 300 in a predetermined order by the transmission shift register.
In step S2-5, interrupt permission processing is executed, and the process moves to step S2-6. In the interrupt enable process, the interrupt disabled state is canceled. As a result, execution of power-off save processing, timer interrupt processing, etc. is permitted during the period from execution of the interrupt enable processing in step S2-5 until execution of the interrupt disable processing in step S2-1. This is the interrupt permission period.
In step S2-6, other random number update processing is executed, and the process moves to step S2-1. In other random number update processing, soft random numbers excluding winning symbol random numbers (specifically, reach mode random numbers, fluctuation pattern random numbers, etc.) are updated.

(Evacuation processing when power is cut off)
Next, a description will be given of the power-off saving process executed by the CPU 210.
FIG. 9 is a flowchart showing the evacuation process when the power is cut off.
The main control board 200 includes a power cutoff detection circuit (not shown). The power cutoff detection circuit monitors the power supply voltage supplied from the power supply board 600 and outputs a power cutoff notice signal to the input port 204 when the value of the power supply voltage falls below a predetermined reference value.
When the CPU 210 receives the power cutoff notice signal, it starts the power cutoff saving process shown in FIG. 9 during the interrupt permission period of the main loop process. The evacuation process when the power is cut off is a process based on a program for controlling the progress of the game. That is, the power-off saving process is based on the program stored in the used area m1 (program area) of the ROM 220.

When the power-off saving process is started, the process first moves to step S3-1.
In step S3-1, register saving processing is executed, and the process moves to step S3-2. In the register saving process, the values of the registers used during execution of the main loop process are saved to the save area of the RAM 230.
In step S3-2, a power cutoff notice signal reading process is executed, and the process moves to step S3-3. In the power cutoff notice signal reading process, a power cutoff notice signal is read from the power cutoff detection circuit.
Specifically, in the power cutoff notice signal reading process, the value (“1” or “0”) set in the reception storage area corresponding to the power cutoff notice signal of the input port 204 is read.
In step S3-3, based on the value read in step S3-2 (the value set in the reception storage area corresponding to the power cutoff notice signal), it is determined whether the power cutoff notice signal is input from the power cutoff detection circuit. If it is determined that the power cutoff notice signal has been inputted (Yes), the process moves to step S3-4, and if it is determined that the power cutoff notice signal has not been inputted (No), the process proceeds to step S3-4. Then, the process moves to step S3-13.

In step S3-4, output port stop processing is executed, and the process moves to step S3-5. In the output port stop processing, output of control signals and control commands by the output ports 205 (output ports 0 to 4) is stopped.
Specifically, in the output port stop processing, the values of all bits included in the port registers of the output ports 205 (output ports 0 to 4) are initialized. As a result, output of control signals and control commands by the output ports 205 (output ports 0 to 4) is stopped.
In step S3-5, a backup valid flag setting process is executed, and the process moves to step S3-6. In the backup valid flag setting process, a predetermined valid value is stored in the backup valid flag area of the RAM 230.

In step S3-6, checksum storage processing is executed, and the process moves to step S3-7. In the checksum storage process, a checksum is calculated and stored.
Specifically, in the checksum storage process, first, a checksum is calculated based on information stored in the used area M1 (F000H to F1FFH) of the RAM 230. Then, the calculated checksum value is stored in the checksum area of the RAM 230.
Next, a checksum is calculated based on the information stored in the unused area M2 (F300H to F3FFH) of the RAM 230. Then, the calculated checksum value is stored in the checksum area.
In step S3-7, RAM access prohibition processing is executed, and the process moves to step S3-8. In the RAM access prohibition process, a process for prohibiting access to the RAM 230 is executed.
Specifically, in the RAM access prohibition process, a value corresponding to access prohibition is stored as a RAM protect value in the RAM access protect area of the RAM 230. As a result, access to the RAM 230 by the CPU 210 is prohibited.

In step S3-8, a loop counter setting process is executed, and the process moves to step S3-9. In the loop counter setting process, a predetermined number of times the power cutoff notice signal is read is set as the value of the return determination loop counter.
In step S3-9, a power cutoff notice signal reading process is executed, and the process moves to step S3-10. In the power cutoff notice signal reading process, a power cutoff notice signal is read from the power cutoff detection circuit.
Specifically, in the power cutoff notice signal reading process, the value (“1” or “0”) set in the reception storage area corresponding to the power cutoff notice signal of the input port 204 is read.
In step S3-10, based on the value read in step S3-9 (the value set in the reception storage area corresponding to the power cutoff notice signal), it is determined whether the power cutoff notice signal is input from the power cutoff detection circuit. If it is determined that the power cutoff notice signal has not been inputted (No), the process moves to step S3-11, and if it is determined that the power cutoff notice signal has been inputted (Yes). If so, the process moves to step S3-8.

In step S3-11, a loop counter update process is executed, and the process moves to step S3-12. In the loop counter update process, "1" is subtracted from the value set in the return determination loop counter.
In step S3-12, it is determined whether the value of the loop counter for return determination is "0" or not. If it is determined that the value of the loop counter for return determination is "0" (Yes), the CPU The process moves to initialization processing (step S1-1), and if it is determined that the value of the loop counter for return determination is not "0" (No), the process moves to step S3-9.
In step S3-13, register restoration processing is executed, the series of processing is completed, and the original processing is resumed. In the register restoration process, the register values saved in step S3-1 are restored. After the register restoration process is completed, the process returns to the main loop process (program address indicated by the stack pointer).

(timer interrupt processing)
Next, timer interrupt processing executed by the CPU 210 will be explained.
FIG. 10 is a flowchart showing timer interrupt processing.
The clock generation circuit 202 generates an interrupt request signal at every predetermined interrupt cycle (4.0 [ms] in this embodiment).
In response to the generation of the interrupt request signal, the CPU 210 starts the timer interrupt process shown in FIG. 10 during the interrupt permission period of the main loop process. The main loop process is a process based on a program for controlling the progress of the game. That is, the main loop process is based on the program stored in the used area m1 (program area) of the ROM 220.

When the timer interrupt process is started, first, the process moves to step S4-1.
In step S4-1, register saving processing is executed, and the process moves to step S4-2. In the register saving process, the values of all registers used during execution of the main loop process are saved to the save area of the RAM 230.
In step S4-2, interrupt permission processing is executed, and the process moves to step S4-3. In the interrupt permission process, interrupts are permitted.
In step S4-3, dynamic port output processing is executed, and the process moves to step S4-4. Dynamic port output processing will be described later.

In step S4-4, port input processing is executed, and the process moves to step S4-5. In port input processing, the status of each switch/sensor (each signal) is acquired.
The RAM 230 has an input information storage area corresponding to each switch/sensor (each signal input to the input port 204) connected to the input port 204 (input port 0 to input port 3), and an input information storage area corresponding to each switch/sensor (each signal input to the input port 204). On-state storage areas corresponding to the respective switches/sensors (each signal input to the input port 204) connected to the ports 0 to 3 are provided.
In the port input process, first, for each switch/sensor connected to the input port 204 (input port 0 to input port 3), information set in the reception storage area corresponding to the switch/sensor is acquired, The acquired information is saved (stored) in the input information storage area corresponding to the switch/sensor.
As a result, for each switch/sensor, if the detection signal from the switch/sensor is input (high level), "1" is saved in the input information storage area corresponding to the switch/sensor, and When the detection signal from the switch sensor is not input (low level), "0" is stored in the input storage area corresponding to the switch sensor.

Next, it is determined whether each switch/sensor connected to the input port 204 (input port 0 to input port 3) is in an on state. At this time, for each switch/sensor, the on state is determined based on the value saved in the input information storage area during the previous port input process and the value saved in the input information storage area during the current port input process. Determine whether it has occurred.
The "on state" refers to a state in which a detection signal is not input (low level) to a state in which a detection signal is input (high level).
If it is determined that an on-state has occurred for each switch/sensor, "1" is set in the on-state storage area corresponding to the switch/sensor. On the other hand, if it is determined that the on-state has not occurred for each switch/sensor, "0" is set in the on-state storage area corresponding to the switch/sensor.
In the following description, the value stored in the on-state storage area corresponding to each switch/sensor will be referred to as "switch bit data" of the switch/sensor.
In particular, the input port 1 is provided with a reception storage area corresponding to the handle detection signal input from the firing enable condition detection section 422. In the port input process, the information set in the reception storage area corresponding to the handle detection signal of input port 1 is acquired, and the acquired information is saved (stored) in the input information storage area corresponding to the handle detection signal. ) to be done.

In step S4-5, gaming machine status flag acquisition processing is executed, and the process moves to step S4-6. In the gaming machine status flag acquisition process, the gaming machine status flag stored in the gaming machine status flag area of the RAM 230 is acquired.
In step S4-6, it is determined whether or not a game-enabled state has occurred (set). If it is determined that a game-enabled state has not occurred (No), the process moves to step S4-7, and the game If it is determined that the possible state has occurred (Yes), the process moves to step S4-9.
Here, based on the gaming machine status flag acquired in step S4-5, it is determined whether or not a gaming enabled status has occurred. At this time, if the acquired gaming machine state flag has a value corresponding to a game-ready state, it is determined that a game-ready state has occurred, and if the value does not correspond to a game-ready state, a game-ready state is determined to have occurred. It is determined that the

In step S4-7, it is determined whether or not an abnormal state has occurred (set). If it is determined that an abnormal state has not occurred (No), the process moves to step S4-8, and if the abnormal state is If it is determined that it has occurred (Yes), the process moves to step S4-19.
Here, it is determined whether an abnormal state has occurred based on the gaming machine status flag acquired in step S4-5. At this time, if the acquired gaming machine state flag has a value corresponding to any one of the setting abnormal state, RAM abnormal state, and backup abnormal state, it is determined that an abnormal state has occurred. If the acquired gaming machine state flag does not have a value corresponding to any one of the setting abnormal state, RAM abnormal state, and backup abnormal state, it is determined that no abnormal state has occurred.

In step S4-8, setting-related processing is executed, and the process moves to step S4-19. Setting-related processing will be described later.
In step S4-9, timer update processing is executed, and the process moves to step S4-10. In the timer update process, various timers are updated.
Specifically, in the timer update process, the values of various timer counters (special game timer, normal game timer, security timer, etc.) are updated.
In step S4-10, an initial value random number update process is executed, and the process moves to step S4-11. The initial value random number update process in step S4-10 is the same process as the initial value random number update process in step S2-2.
Specifically, in the initial value random number update process, the value of a loop counter for generating an initial value random number is updated.
In step S4-11, a winning symbol random number update process is executed, and the process moves to step S4-12. In the winning pattern random number update process, the value of the loop counter for generating the winning pattern random number among the soft random numbers is updated.
In step S4-12, switch management processing is executed, and the process moves to step S4-13. In the switch management process, processes (such as obtaining various random numbers) are executed depending on the state of each switch 101, 102, and 104 (whether or not an on state is detected). The switch management process will be described later.

In step S4-13, special game management processing is executed, and the process moves to step S4-14. In the special game management process, the operation of the special figure display device and the operation of the special electric accessory 53a are managed. The special game management process will be described later.
In step S4-14, a normal game management process is executed, and the process moves to step S4-15. In the normal game management process, the operation of the normal figure display device and the operation of the normal electric accessory 52a are managed. The normal game management process will be described later.

In step S4-15, state management processing is executed, and the process moves to step S4-16. In the state management process, the occurrence and release of various errors (abnormal states) are monitored. Then, various settings (such as subcommand settings) are executed when the occurrence or cancellation of various errors is detected.
In addition, in the state management process, the value stored in the input information storage area corresponding to the handle detection signal (the value saved in the previous timer interrupt process and the value saved in the current timer interrupt process) is used. Then, it is determined whether the steering wheel detection signal has changed from a state in which it is not being input to a state in which it is being input. When it is determined that the handle detection signal has changed from the state in which it is not input to the state in which it is input, a game situation designation command that designates the occurrence of the firing enabled state is stored in the subcommand output request buffer of the RAM 230.
Furthermore, in the state management process, the value stored in the input information storage area corresponding to the handle detection signal (the value saved in the previous timer interrupt process and the value saved in the current timer interrupt process) is used. Then, it is determined whether the steering wheel detection signal has changed from being inputted to not being inputted. When it is determined that the handle detection signal has changed from being input to not being input, a game situation designation command for designating cancellation of the firing enabled state is stored in the subcommand output request buffer of the RAM 230.
In step S4-16, winning a prize opening switch processing is executed, and the process moves to step S4-17. In the winning opening switch processing, processing (updating various counters, etc.) is executed depending on the state of each switch 101 to 103, 105, and 106 (whether or not an on state is detected).

In step S4-17, a payout control management process is executed, and the process moves to step S4-18. In the payout control management process, a payout command is generated based on the value of the prize ball control counter set in step S4-16, and the generated payout command is transmitted.
In this embodiment, the prize ball control counter 1 stores the number of ball game balls that entered the big winning hole 53, and the number of ball game balls that entered the right other winning hole 54. A prize ball control counter 2 that stores the number of game balls that have entered the upper left, middle left, lower left and other winning ports 55 to 57, and a prize ball control counter 3 that stores the number of game balls that have entered the first starting port 51. A prize ball control counter 4 in which the number of game balls entered into the second starting port 52 is stored, and a prize ball control counter 5 in which the number of game balls entered into the second starting port 52 is stored are set.
In the payout control management process, first, it is determined whether the value of the prize ball control counter 1 is "1" or more. Then, when it is determined that the value of the prize ball control counter 1 is "1" or more, a payout command is generated that specifies the payout of a predetermined number (in this embodiment, 15 [balls]) of prize balls, The generated payout command is stored in the payout command output request buffer of the RAM 230. As a result, a payout command specifying the payout of a predetermined number of prize balls is transmitted to the payout control board 400. Thereafter, when the payout of the prize balls by the game ball payout device 440 is completed, the payout control board 400 transmits a main command specifying completion of the payout to the main control board 200. Then, "1" is subtracted from the value of the prize ball control counter 1 in response to the reception of the main command specifying the completion of the payout.

Next, it is determined whether the value of the prize ball control counter 2 is "1" or more. Then, when it is determined that the value of the prize ball control counter 2 is "1" or more, a payout command is generated that specifies the payout of a predetermined number (in this embodiment, 10 [balls]) of prize balls, The generated payout command is stored in the payout command output request buffer of the RAM 230. As a result, a payout command specifying the payout of a predetermined number of prize balls is transmitted to the payout control board 400. Thereafter, "1" is subtracted from the value of the prize ball control counter 2 in response to reception of the main command specifying completion of the payout.
Next, it is determined whether the value of the prize ball control counter 3 is "1" or more. Then, when it is determined that the value of the prize ball control counter 3 is "1" or more, a payout command is generated that specifies the payout of a predetermined number (in this embodiment, 10 [balls]) of prize balls, The generated payout command is stored in the payout command output request buffer of the RAM 230. As a result, a payout command specifying the payout of a predetermined number of prize balls is transmitted to the payout control board 400. Thereafter, "1" is subtracted from the value of the prize ball control counter 3 in response to reception of the main command specifying completion of the payout.

Next, it is determined whether the value of the prize ball control counter 4 is "1" or more. Then, when it is determined that the value of the prize ball control counter 4 is "1" or more, a payout command is generated that specifies the payout of a predetermined number (in this embodiment, 3 [balls]) of prize balls, The generated payout command is stored in the payout command output request buffer of the RAM 230. As a result, a payout command specifying the payout of a predetermined number of prize balls is transmitted to the payout control board 400. Thereafter, "1" is subtracted from the value of the prize ball control counter 4 in response to reception of the main command specifying completion of the payout.
Next, it is determined whether the value of the prize ball control counter 5 is "1" or more. Then, when it is determined that the value of the prize ball control counter 5 is "1" or more, a payout command is generated that specifies the payout of a predetermined number (in this embodiment, 1 [ball]) of prize balls, The generated payout command is stored in the payout command output request buffer of the RAM 230. As a result, a payout command specifying the payout of a predetermined number of prize balls is transmitted to the payout control board 400. Thereafter, "1" is subtracted from the value of the prize ball control counter 5 in response to the reception of the main command specifying the completion of the payout.

In step S4-18, a firing position designation management process is executed, and the process moves to step S4-19. In the firing position designation management process, processing related to designation of the firing position is executed.
Specifically, in the launch position designation management process, when changing from a state where the game ball is specified to be launched to the left path to a state where the game ball is specified to be launched to the right path (such as at the start of the jackpot game state), , sets "1" in the firing position designation flag area of the RAM 230, and stores in the subcommand output request buffer of the RAM 230 a subcommand that designates launching the game ball to the right path. As a result, a sub-command specifying launching of the game ball to the right path is transmitted to the production control board 300.
On the other hand, when changing the state from specifying the launch of the game ball to the right path to the state of specifying the launch of the game ball to the left path (such as when the time saving control ends), " 0”.

In step S4-19, external information management processing is executed, and the process moves to step S4-20. In the external information management process, external information (external signal) to be output to the hall computer (or data display device) is set.
In this embodiment, the external information output from the pachinko machine 1 to external devices (electronic devices such as hall computers and data display devices) includes symbol confirmation number information, starting opening information, jackpot information, security information, and out opening. Payout number information, error occurrence information, etc. are specified.
The "design confirmed number of times information" is external information regarding the number of executions of the special symbol lottery (fluctuating display and stop display of special symbols). The CPU 210 outputs an external signal corresponding to symbol confirmation number information to the hall computer (or data display device) every time the number of executions of the special symbol stop display reaches a predetermined number.

The "starting port information" is external information regarding the entry of game balls into the starting ports 51 and 52. The CPU 210 outputs an external signal corresponding to the starting port information to the hall computer (or data display device) every time the ON state of the detection signal input from the starting port switches 101, 102 is detected.
“Jackpot information” is external information regarding the occurrence of a jackpot gaming state. The main control board 200 outputs an external signal corresponding to jackpot information to the hall computer (or data display device) every time a jackpot gaming state occurs.
"Outlet payout information" is external information regarding the number of game balls discharged from the discharge path (or the number of game balls discharged from the outlet 58). The CPU 210 outputs an external signal corresponding to the out hole payout number information to the hole computer every time the value of the out pitch number counter for external information reaches a predetermined value.
"Security information" is external information indicating that a setting change state is occurring, a setting confirmation state is occurring, or various errors (abnormalities) are occurring. When the value of the security timer is "1" or more, the CPU 210 outputs an external signal corresponding to the security information to the hall computer.

In the external information management process, it is determined whether the value of the external information confirmation count counter has reached a predetermined value (1 [times] in this embodiment). If it is determined that the value of the external information confirmation number counter has reached a predetermined value, symbol confirmation number information (external signal) is stored in the port output request buffer of the RAM 230. Thereafter, a predetermined value (in this embodiment, 1 [times]) is subtracted from the value of the external information confirmation count counter. As a result, symbol confirmation number information (external signal) is output to the hole computer.
In the external information management process, it is determined whether the value of the external information starting port entry number counter has reached a predetermined value (in this embodiment, 1 [times]). If it is determined that the value of the external information starting port entry number counter has reached a predetermined value, the starting port information (external signal) is stored in the port output request buffer of the RAM 230. Thereafter, a predetermined value (in this embodiment, 1 [times]) is subtracted from the value of the external information starting port entry number counter. As a result, starting port information (external signal) is output to the hall computer.

Further, in the external information management process, it is determined whether the value of the external information jackpot number counter has reached a predetermined value (in this embodiment, 1 [times]). Then, when it is determined that the value of the external information jackpot number counter has reached a predetermined value, the jackpot information (external signal) is stored in the port output request buffer of the RAM 230. Thereafter, a predetermined value (in this embodiment, 1 [times]) is subtracted from the value of the external information jackpot number counter. As a result, jackpot information (external signal) is output to the hole computer.
In the external information management process, it is determined whether the value of the external information out pitch counter has reached a predetermined value (10 [balls] in this embodiment). Then, when it is determined that the value of the out pitch number counter for external information has reached a predetermined value, the out outlet payout information (external signal) is stored in the port output request buffer of the RAM 230. Thereafter, a predetermined value (in this embodiment, 10 [balls]) is subtracted from the value of the outside information out pitch number counter. As a result, the outlet payout information (external signal) is output to the hall computer.

Further, in the external information management process, it is determined whether the value (gaming machine status flag) stored in the gaming machine status flag area of the RAM 230 is a value corresponding to a gaming enabled status.
Then, it is determined that the value stored in the gaming machine status flag area is not a value corresponding to a gaming enabled status (corresponding to a setting change status, a setting confirmation status, an abnormal setting status, an abnormal RAM status, or an abnormal backup status). value), the security information is stored in the port output request buffer of the RAM 230. As a result, security information (external signal) is output to the hall computer.
Furthermore, in the external information management process, it is determined whether the value of the security timer is "1" or more. If it is determined that the value of the security timer is "1" or more, the security information is stored in the port output request buffer of the RAM 230. As a result, security information (external signal) is output to the hall computer.

In step S4-20, LED display setting processing is executed, and the process moves to step S4-21. In the LED display setting process, display data to be output to the main display device 60 or the performance display device 206 is set.
The RAM 230 is provided with a common 0 output request buffer (8 bits), a common 1 output request buffer (8 bits), a common 2 output request buffer (8 bits), and a common 3 output request buffer (8 bits). It is being
In the LED display setting process, first, the common 2 output request buffer is cleared (initialized), and the common 3 output request buffer is cleared (initialized). Specifically, each bit value of the common 2 output request buffer is set to "0", and each bit value of the common 3 output request buffer is set to "0".

Next, the gaming machine status flag stored in the gaming machine status flag area of the RAM 230 is acquired.
Then, when the acquired gaming machine state flag has a value corresponding to a game-enabled state, a normal time display data setting process, which will be described later, is executed. On the other hand, if the acquired gaming machine state flag is a value corresponding to a setting change state, a setting change display data setting process, which will be described later, is executed. On the other hand, if the acquired gaming machine state flag is a value corresponding to the setting confirmation state, a setting confirmation display data setting process, which will be described later, is executed. On the other hand, if the acquired gaming machine state flag is a value corresponding to an abnormal state (abnormal setting state, abnormal RAM state, or abnormal backup state), an abnormal time display data setting process to be described later is executed.

In the normal display data setting process, first, the value of the special figure 1 display symbol counter is acquired, and the display data (8 bits) corresponding to the acquired value of the special figure 1 display symbol counter is transferred to the common 0 output request buffer. Set.
As a result, the first special symbol is displayed by LED1 to LED8 among the light emitting elements constituting the main display device 60.
Next, the value of the special figure 2 display symbol counter is acquired, and display data (8 bits) corresponding to the acquired value of the special figure 2 display symbol counter is set in the common 1 output request buffer.
As a result, the second special symbol is displayed by the LEDs 9 to 16 among the light emitting elements constituting the main display device 60.
Next, the value of the common figure display pattern counter is acquired, and display data corresponding to the obtained value of the common figure display pattern counter is set as output data a.

Next, the values set in the special game phase flag area of the RAM 230 are "state before grand prize opening", "grand prize opening control state", "grand prize opening closed effective state", and "grand prize opening open state". It is determined whether the value specifies any special game phase among the "end wait state".
Then, the values set in the special game phase flag area are "state before grand prize opening opening", "grand prize opening control state", "great winning opening closing effective state", and "grand prize opening end wait state". ”, if it is determined that the value specifies one of the special game phases, the value set in the special symbol determination flag area of the RAM 230 (value corresponding to the type of jackpot symbol) is acquired and acquired. Display data corresponding to the value is set as output data b.
On the other hand, the values set in the special game phase flag area are "state before opening the big winning hole", "big winning hole opening control state", "big winning hole closing effective state", and "waiting state after opening the big winning hole". '', if it is determined that the value does not specify any special game phase, the output data b will not be set.

Next, the value set in the firing position designation flag area of the RAM 230 is acquired, and display data corresponding to the acquired value is set as output data c.
Next, display data (8 bits) obtained by ORing output data a to output data c is set in the common 2 output request buffer.
As a result, the normal symbols are displayed by the LEDs 17 and 18 among the light emitting elements constituting the main display device 60, and the number of round games executed during the jackpot gaming state (type of jackpot gaming state) is displayed by the LEDs 19 to 23. is displayed, and the LED 24 displays the path (left side path or right side path) in which the game ball should be launched.
Next, the value of the special figure 1 reservation number counter is acquired, and display data corresponding to the acquired value is set as output data d.
Next, the value of the special figure 2 reservation number counter is acquired, and display data corresponding to the acquired value is set as output data e.
Next, the value of the general figure reservation counter is acquired, and display data corresponding to the acquired value is set as output data f.
Next, it is determined whether or not it is time to restore the power.
When it is determined that the power is restored, the value set in the special figure high probability state flag area is acquired, and display data corresponding to the acquired value is set as output data g.
On the other hand, if it is determined that the power is not restored, the output data g is not set.
Next, the value set in the time saving control flag area of the RAM 230 is acquired, and display data corresponding to the acquired value is set as output data h.
Next, display data (8 bits) obtained by ORing output data d to output data h is set in the common 3 output request buffer.
As a result, among the light emitting elements constituting the main display device 60, the LEDs 25 and 26 display the number of reserved special symbols 1, the LEDs 27 and 28 display the number of reserved special symbols 2, and the LEDs 29 and 30 display the number of regular symbols reserved. The number of reservations is displayed, and the LED 31 displays the gaming status when the power is restored (occurring in a special pattern high probability state or in the special pattern low probability state), and the LED 32 indicates the current gaming state (execution of time saving control). (in progress or stopped) is displayed.

In the setting change display data setting process, information indicating that a setting change state is occurring is set in the common 0 output request buffer to common 2 output request buffer, and the settings stored in the setting value area of the RAM 230 are Information indicating the value is set in the common 3 output request buffer.
Specifically, the display data (8 bits) of "r" is set in the common 0 output request buffer, the display data (8 bits) of "n." is set in the common 1 output request buffer, and the "-" Display data (8 bits) is set in the common 2 output request buffer, and display data corresponding to the setting value stored in the setting value area of the RAM 230 is set in the common 3 output request buffer.
As a result, among the light emitting elements constituting the performance display device 206, the letter "r" is displayed by LED33 to LED40, the letter "n." is displayed by LED41 to LED48, and the letter "n." is displayed by LED49 to LED56. -" characters are displayed, and the LEDs 57 to 64 display numbers indicating the set values.

In the setting confirmation display data setting process, information indicating that a setting confirmation state is occurring is set in the common 0 output request buffer to common 2 output request buffer, and the settings stored in the setting value area of the RAM 230 are Information indicating the value is set in the common 3 output request buffer.
Specifically, the display data (8 bits) of "r" is set in the common 0 output request buffer, the display data (8 bits) of "n." is set in the common 1 output request buffer, and the RAM 230 is set. Display data corresponding to the set value stored in the value area is set in the common 3 output request buffer. Note that display data is not set for the common 2 output request buffer (it remains at the clear value).
As a result, among the light emitting elements constituting the performance display device 206, the letter "r" is displayed by the LEDs 33 to 40, the letter "n." is displayed by the LEDs 41 to 48, and the setting is made by the LEDs 57 to 64. A number indicating the value will be displayed. Note that the LEDs 49 to 56 are turned off.

In the abnormality display data setting process, information indicating that an abnormal state (setting abnormal state, RAM abnormal state, or backup abnormal state) is occurring is set in the common 0 output request buffer to common 2 output request buffer. At the same time, an error code corresponding to the abnormality that has occurred is set in the common 3 output request buffer.
Specifically, the display data (8 bits) of "E" is set in the common 0 output request buffer, the display data (8 bits) of "r." is set in the common 1 output request buffer, and the error that occurs is Display data (error code) corresponding to the state (setting abnormal state, RAM abnormal state, or backup abnormal state) is set in the common 3 output request buffer. Note that display data is not set for the common 2 output request buffer (it remains at the clear value).
As a result, among the light emitting elements constituting the performance display device 206, the letter "E" is displayed by LED33 to LED40, the letter "r." is displayed by LED41 to LED48, and the letter "r." is displayed by LED57 to LED64. A number indicating the code will be displayed. Note that the LEDs 49 to 56 are turned off.

In step S4-21, solenoid data setting processing is executed, and the process moves to step S4-22. In the solenoid data setting process, control data (drive data) to be output to each solenoid 64 and 65 is stored (set) in the port output request buffer of the RAM 230.
In step S4-22, port output processing is executed, and the process moves to step S4-23. In the port output process, various signals are output to the hall computer, each solenoid 64, 65, etc.
Specifically, in the port output process, various information (external signals, control signals, etc.) set in the port output request buffer is output to the output ports 205 (output ports 2, 3). As a result, the external signal set in the port output request buffer is output to the hall computer. Further, each of the solenoids 64 and 65 is driven and controlled based on the drive signal set in the port output request buffer.
In step S4-23, interrupt prohibition processing is executed, and the process moves to step S4-24. In the interrupt disabling process, an interrupt disabling state is set to disable interrupts of other processes. As a result, execution of power-off save processing, timer interrupt processing, etc., which will be described later, is prohibited during the period in which the interrupt prohibition state is set.

In step S4-24, test signal output processing is executed, and the process moves to step S4-25. In the test signal output process, test information (test signal) is set.
The test signal output process is based on a program for executing the process related to the test specified by the gaming machine regulations. That is, the test signal output process is based on the program stored in the unused area m2 (program area) of the ROM 220. The test signal tube is called during execution of timer interrupt processing.
Specifically, in the test signal output process, test information (test signal) indicating the internal state (jackpot game state, time saving control execution state, special symbol lottery probability state, etc.) is sent to the port output request buffer of the RAM 230. Remember.
In step S4-25, performance display device control processing is executed, and the process moves to step S4-26. The performance display device control process will be described later.
In step S4-26, register restoration processing is executed, the series of processing is completed, and the original processing is resumed. In the register restoration process, the register values saved in step S4-1 are restored. After the register restoration process is completed, the process returns to the main loop process (program address indicated by the stack pointer).

(Dynamic port output processing)
Next, the dynamic port output processing in step S4-3 will be explained.
FIG. 11 is a flowchart showing dynamic port output processing.
When the dynamic port output process is executed in step S4-3, as shown in FIG. 11, the process first moves to step S29-1.
In step S29-1, output data clearing processing is executed, and the process moves to step S29-2. In the output data clearing process, the A register is cleared (initialized). Specifically, "0" is set as each bit value of the A register.
In step S29-2, main display device data output processing is executed, and the process moves to step S29-3. In the main display device data output process, the value of the A register (the value cleared in step S29-1) is output to output port 0. As a result, output port 0 is cleared (initialized), and each data signal ("SEGDATA0" to "SEGDATA7") for controlling lighting of the main display device 60 becomes low level.

In step S29-3, performance display device data output processing is executed, and the process moves to step S29-4. In the performance display device data output process, the value of the A register (the value cleared in step S29-1) is output to the output port 4. As a result, the output port 4 is cleared (initialized), and each data signal ("7SEGDATA0" to "7SEGDATA7") for controlling the lighting of the performance display device 206 becomes low level.
In step S29-4, common selection processing is executed, and the process moves to step S29-5. In the common selection process, the value of the common counter is updated.
Specifically, in the common selection process, it is determined whether the value of the common counter has reached an upper limit value (in this embodiment, "3"). If it is determined that the value of the common counter has not reached the upper limit value, "1" is added to the value of the common counter. On the other hand, if it is determined that the value of the common counter has reached the upper limit value, a predetermined initial value (in this embodiment, "0") is set as the value of the common counter.

In step S29-5, common output processing is executed, and the process moves to step S29-6.
In the common output process, output data corresponding to the value of the common counter is output to output port 1.
That is, when the value of the common counter is "0", output data in which "COM0" is set to high level and "COM1", "COM2", and "COM3" are set to low level is output to output port 1. As a result, "COM0" is selected (output) among "COM0" to "COM3".
On the other hand, when the value of the common counter is "1", output data in which "COM1" is set to high level and "COM0", "COM2", and "COM3" are set to low level is output to output port 1. As a result, "COM1" is selected (output) among "COM0" to "COM3".
On the other hand, when the value of the common counter is "2", output data in which "COM2" is set to high level and "COM0", "COM1", and "COM3" are set to low level is output to output port 1. As a result, "COM2" is selected (output) among "COM0" to "COM3".
On the other hand, when the value of the common counter is "3", output data in which "COM3" is set to high level and "COM0", "COM1", and "COM2" are set to low level is output to output port 1. As a result, "COM3" is selected (output) among "COM0" to "COM3".

In addition, in the common output process, output data of the firing permission signal is output to the output port 1.
That is, first, it is determined whether or not a game-enabled state has occurred (set).
If it is determined that a game-enabled state has occurred, output data that sets the firing permission signal to a high level is output to the output port 1. As a result, a launch permission signal is output.
On the other hand, if it is determined that the game-enabled state has not occurred, output data that sets the firing permission signal to a low level is output to the output port 1. As a result, the output of the launch permission signal is stopped.
Here, based on the value (gaming machine state flag) stored in the gaming machine state flag area of the RAM 230, it is determined whether or not a game enabled state has occurred. At this time, if the value stored in the gaming machine state flag area is a value corresponding to a game-enabled state, it is determined that a game-enabled state has occurred, and if the value does not correspond to a game-enabled state, the game It is determined that the possible state has not occurred.
In this embodiment, the output of the firing permission signal is set only when it is determined in the common output process that a game-enabled state has occurred. As a result, the firing permission signal is output only while the game-enabled state is occurring (setting). However, in the common output process, the output of the firing permission signal may be set regardless of the gaming machine state. With this configuration, a launch permission signal can be output at all times while the main control board 200 is powered on.

In step S29-6, it is determined whether or not a game-enabled state has occurred (set). If it is determined that a game-enabled state has occurred (Yes), the process moves to step S29-7, and the game is started. If it is determined that the possible state has not occurred (No), the process moves to step S29-11.
Here, based on the value (gaming machine state flag) stored in the gaming machine state flag area of the RAM 230, it is determined whether or not a game enabled state has occurred. At this time, if the value stored in the gaming machine state flag area is a value corresponding to a game-enabled state, it is determined that a game-enabled state has occurred, and if the value does not correspond to a game-enabled state, the game It is determined that the possible state has not occurred.

In step S29-7, main display device data acquisition processing is executed, and the process moves to step S29-8. In the main display device data acquisition process, display data for the main display device 60 is acquired, and the acquired display data is set in the A register.
Specifically, in the main display device data acquisition process, first, the value of the common counter is checked. Then, among the common 0 output request buffer to common 3 output request buffer in the RAM 230, the display data set in the output request buffer corresponding to the confirmed common counter value is acquired, and the acquired display data is stored in the A register. Set.
At this time, if the value of the common counter is "0", the display data set in the common 0 output request buffer is acquired, and the acquired display data is set in the A register.
On the other hand, if the value of the common counter is "1", the display data set in the common 1 output request buffer is acquired, and the acquired display data is set in the A register.
On the other hand, when the value of the common counter is "2", the display data set in the common 2 output request buffer is acquired, and the acquired display data is set in the A register.
On the other hand, if the value of the common counter is "3", the display data set in the common 3 output request buffer is acquired, and the acquired display data is set in the A register.
Here, the display data acquired in the main display device data acquisition process is a common This is the display data set in the 0 output request buffer to the common 3 output request buffer.

In step S29-8, main display device data output processing is executed, and the process moves to step S29-9. In the main display device data output process, the display data set in the A register in step S29-7 is output to output port 0.
As a result, the data signals ("SEGDATA0" to "SEGDATA7") based on the display data set in the output request buffer (one output request buffer among the common 0 output request buffer to common 3 output request buffer) are transmitted to the source driver. 250a.
That is, the display of the main display device 60 is controlled based on the display data set in the output request buffer (one output request buffer among the common 0 output request buffer to common 3 output request buffer).

In step S29-9, interrupt prohibition processing is executed, and the process moves to step S29-10. In the interrupt disabling process, an interrupt disabling state is set to disable interrupts of other processes. As a result, execution of power-off save processing, timer interrupt processing, etc., which will be described later, is prohibited during the period in which the interrupt prohibition state is set.
In step S29-10, performance display device output processing is executed, the series of processing is completed, and the process moves to the next processing (step S4-4). The performance display device output process will be described later.

In step S29-11, performance display device data acquisition processing is executed, and the process moves to step S29-12. In the performance display device data acquisition process, display data for the performance display device 206 is acquired and the acquired display data is set in the A register.
Specifically, in the performance display device data acquisition process, first, the value of the common counter is checked. Then, among the common 0 output request buffer to common 3 output request buffer in the RAM 230, the display data set in the output request buffer corresponding to the confirmed common counter value is acquired, and the acquired display data is stored in the A register. Set.
At this time, if the value of the common counter is "0", the display data set in the common 0 output request buffer is acquired, and the acquired display data is set in the A register.
On the other hand, if the value of the common counter is "1", the display data set in the common 1 output request buffer is acquired, and the acquired display data is set in the A register.
On the other hand, when the value of the common counter is "2", the display data set in the common 2 output request buffer is acquired, and the acquired display data is set in the A register.
On the other hand, if the value of the common counter is "3", the display data set in the common 3 output request buffer is acquired, and the acquired display data is set in the A register.
Here, the display data acquired in the performance display device data acquisition process is the LED display setting process in step S4-20 included in the previous timer interrupt process (specifically, the display data setting process at the time of setting change, the setting confirmation In the time display data setting process or abnormal time display data setting process), the display data becomes the display data set in the common 0 output request buffer to common 3 output request buffer.

In step S29-12, a performance display device data output process is executed, the series of processes is completed, and the process moves to the next process (step S4-4). In the performance display device data output process, the display data set in the A register in step S29-11 is output to the output port 4.
As a result, the data signals ("7SEGDATA0" to "7SEGDATA7") based on the display data set in the output request buffer (one output request buffer among the common 0 output request buffer to common 3 output request buffer) are transmitted to the source driver. 250b.
That is, the display of the performance display device 206 is controlled based on the display data set in the output request buffer (one output request buffer among the common 0 output request buffer to common 3 output request buffer).

(Performance display device output processing)
Next, the performance display device output process in step S29-10 will be explained.
FIG. 12 is a flowchart showing performance display device output processing.
The performance display device output process is a process based on a program for controlling the display of the performance display device 206. That is, the performance display device output process is based on a program stored in the unused area m2 (program area) of the ROM 220. The performance display device output process is called during execution of the dynamic port output process.
When the performance display device output process is called in step S29-10, as shown in FIG. 12, the process first moves to step S30-1.
In step S30-1, register saving processing is executed, and the process moves to step S30-2. In the register saving process, the values of all registers used during execution of the process based on the program stored in the used area m1 are saved to the saving area of the RAM. Further, all stack pointer values used during execution of processing based on the program stored in the used area m1 are saved to the save area of the RAM.

In step S30-2, a performance display device data acquisition process is executed, and the process moves to step S30-3. In the performance display device data acquisition process, display data for the performance display device 206 is acquired and the acquired display data is set in the A register.
Specifically, in the performance display device data acquisition process, first, the value of the common counter is checked. Then, the display data set in the area corresponding to the confirmed common counter value of the identification segment output request buffer and the ratio segment output request buffer of the RAM 230 is obtained, and the obtained display data is set in the A register. .
At this time, if the value of the common counter is "0", the display data set in the upper 8 bits of the identification segment output request buffer is obtained, and the obtained display data is set in the A register.
On the other hand, when the value of the common counter is "1", the display data set in the lower 8 bits of the identification segment output request buffer is acquired, and the acquired display data is set in the A register.
On the other hand, if the value of the common counter is "2", the display data set in the upper 8 bits of the ratio segment output request buffer is obtained, and the obtained display data is set in the A register.
On the other hand, when the value of the common counter is "3", the display data set in the lower 8 bits of the ratio segment output request buffer is acquired, and the acquired display data is set in the A register.
Here, the display data acquired in the performance display device data acquisition process is set in the identification segment output request buffer or the ratio segment output request buffer in the performance display device control process in step S4-25 included in the previous timer interrupt process. The displayed data will be displayed.

In step S30-3, performance display device data output processing is executed, and the process moves to step S30-4. In the performance display device data output process, the display data set in the A register in step S30-2 is output to the output port 4.
As a result, data signals ("7SEGDATA0" to "7SEGDATA7") based on the display data set in the output request buffer (identification segment output request buffer or ratio segment output request buffer) are output to the source driver 250b.
That is, the display of the performance display device 206 is controlled based on the display data set in the output request buffer (identification segment output request buffer or ratio segment output request buffer).

In step S30-4, register restoration processing is executed, and the process moves to step S30-5. In the register restoration process, the value of the register saved in step S30-1 (the value of the register used during the execution of the process based on the program stored in the used area m1) and the value of the register saved in step S30-1 are The saved stack pointer value (the stack pointer value used during execution of the process based on the program stored in the used area m1) is restored.
In step S30-5, interrupt permission processing is executed, the series of processing ends, and the process moves to the next processing (step S4-4). In the interrupt enable process, the interrupt disabled state is canceled. This allows execution of power-off save processing, timer interrupt processing, and the like.

(Setting-related processing)
Next, the setting-related processing in step S4-8 will be explained.
FIG. 13 is a flowchart showing setting-related processing.
When the setting-related process is executed in step S4-8, the process first moves to step S37-1, as shown in FIG.
In step S37-1, it is determined whether or not a settings change state has occurred (set). If it is determined that a settings change state has occurred (Yes), the process moves to step S37-2, and the setting change state is set. If it is determined that the changed state has not occurred (No), the process moves to step S37-8.
Here, it is determined whether a setting change state has occurred based on the value (gaming machine state flag) stored in the gaming machine state flag area of the RAM 230. At this time, if the value stored in the gaming machine status flag area is a value corresponding to a setting change state, it is determined that a setting change state has occurred, and if the value stored in the gaming machine state flag area is not a value corresponding to a setting change state, It is determined that no change state has occurred.

In step S37-2, a setting value acquisition process is executed, and the process moves to step S30-3. In the setting value acquisition process, the setting values stored in the setting value area of the RAM 230 are acquired (loaded) and the acquired setting values are stored in the register.
In step S37-3, it is determined whether or not the RAM clear switch 207 has been pressed. If it is determined that the RAM clear switch 207 has been pressed (Yes), the process moves to step S37-4, and the RAM clear switch 207 is pressed. If it is determined that 207 has not been pressed (No), the process moves to step S37-5.
Here, if the RAM clear switch 207 is in the ON state, it is determined that the RAM clear switch 207 has been pressed, and if the ON state has not been generated, it is determined that the RAM clear switch 207 has not been pressed. judge.
In step S37-4, a setting value update process is executed, and the process moves to step S37-5. In the setting value update process, "1" is added to the setting value stored in the register.

In step S37-5, it is determined whether the setting value stored in the register is less than a predetermined setting comparison value (in this embodiment, "6"), and If it is determined that the set value is not less than the set comparison value (the set value is greater than or equal to the predetermined set comparison value) (No), the process moves to step S37-6, and the set value stored in the register is set to the predetermined set comparison value. If it is determined that it is less than the value (Yes), the process moves to step S37-7.
In step S37-6, a setting value initialization process is executed, and the process moves to step S37-7. In the setting value initialization process, a predetermined initial value (in this embodiment, "0") is overwritten as the setting value stored in the register.
In step S37-7, a setting value saving process is executed, and the process moves to step S37-8. In the setting value saving process, the setting values stored in the register are saved in the setting value area of the RAM 230.

In step S37-8, it is determined whether or not the setting key switch 208 is in the ON state, and if it is determined that the setting key switch 208 is not in the ON state (in the OFF state) (No), The process moves to step S37-9, and if it is determined that the setting key switch 208 is in the ON state (Yes), the series of processes is ended and the process moves to the next process (step S4-19). .
Here, if the setting key switch 208 is in the ON state, it is determined that the setting key switch 208 is in the ON state, and if the setting key switch 208 is not in the ON state, it is determined that the setting key switch 208 is in the ON state. It is determined that it has not been done.
In step S37-9, subcommand setting processing is executed, and the process moves to step S37-10. In the subcommand setting process, a setting-related end designation command (subcommand) is stored in the subcommand output request buffer of the RAM 230.

In step S37-10, subcommand group setting processing is executed, and the process moves to step S37-11. In the subcommand group setting process, the subcommand group is stored in the subcommand output request buffer of the RAM 230.
Here, the subcommand group includes a subcommand that specifies the gaming state (gaming state offset value), a subcommand that specifies the firing position, a subcommand that specifies the stop symbol of the first special symbol, and a subcommand that specifies the stop symbol of the second special symbol. Sub-command that specifies the symbol, sub-command that specifies the number of reserved special figures 1, sub-command that specifies the number of reserved special figures 2, sub-command that specifies the value of the time-saving counter, settings stored in the setting value area of RAM 230 Includes setting value specification commands that specify values.
In step S37-11, a ram set process is executed, the series of processes is completed, and the process moves to the next process (step S4-19). In the RAM set process, a game ready state is set as the gaming machine state.
Specifically, a value corresponding to the game-enabled state is saved as a value in the gaming machine state flag area of the RAM 230 (gaming machine state flag).

(Switch management processing)
Next, the switch management process in step S4-12 will be explained.
FIG. 14 is a flowchart showing switch management processing.
When the switch management process is executed in step S4-12, the process first moves to step S5-1, as shown in FIG.
In step S5-1, it is determined whether or not the on state of the gate switch 104 has been detected. If it is determined that the on state of the gate switch 104 has been detected (Yes), the process moves to step S5-2, and the gate If it is determined that the on state of the switch 104 has not been detected (No), the process moves to step S5-3.
In step S5-2, a normal pattern starting ball detection process is executed, and the process moves to step S5-3. The normal figure starting ball detection process will be described later.
Further, in the normal pattern starting ball detection process, it is determined whether or not the ball is being hit right-handed. If it is determined that the game is not in the right-handed batting period (it is in the left-handed batting period), "1" is added to the value of the right-handed batting error counter.
In this embodiment, the period during which one of the jackpot gaming states and the time saving control is occurring is the right-handed hitting period. On the other hand, the period in which the normal gaming state (the gaming state in which the jackpot gaming state is not occurring and the time saving control is stopped) is the left-handed hitting period.

In step S5-3, it is determined whether or not the on state of the special figure 1 starting port switch 101 has been detected, and if it is determined that the on state of the special drawing 1 starting port switch 101 has been detected (Yes), step If the process moves to S5-4 and it is determined that the ON state of the special figure 1 starting port switch 101 is not detected (No), the process moves to step S5-5.
In step S5-4, special figure 1 starting ball detection processing is executed, and the process moves to step S5-5. The special figure 1 starting ball detection process will be described later.
In step S5-5, it is determined whether or not the on state of the special figure 2 starting port switch 102 has been detected, and if it is determined that the on state of the special drawing 2 starting port switch 102 has been detected (Yes), step If the process moves to S5-6 and it is determined that the ON state of the special map 2 starting port switch 102 is not detected (No), the series of processes is ended and the process moves to the next process (step S4-13). do.
In step S5-6, special figure 2 starting ball detection processing is executed, the series of processing is completed, and the process moves to the next processing (step S4-13). The special figure 2 starting ball detection process will be described later.

(Full pattern starting ball detection process)
Next, the normal figure starting ball detection process in step S5-2 will be explained.
FIG. 15 is a flowchart showing the normal pattern starting ball detection process.
When the normal figure starting ball detection process is executed in step S5-2, as shown in FIG. 15, the process first moves to step S6-1.
In step S6-1, a general pattern random number acquisition process is executed, and the process moves to step S6-2. In the regular symbol random number acquisition process, a winning random number (random value) is acquired (loaded) from a loop counter corresponding to the regular symbol lottery.
In step S6-2, it is determined whether the value of the general figure reservation number counter is the upper limit value (in this embodiment, "4"), and if it is determined that the value of the ordinary figure reservation number counter is not the upper limit value If (No), the process moves to step S6-3, and if it is determined that the value of the general figure reservation counter is the upper limit value (Yes), the series of processes is ended and the next process (step S5-3) is performed. Move on to 3).
In step S6-3, a process for updating the number of reserved ordinary drawings counter is executed, and the process moves to step S6-4. In the general figure reservation number counter updating process, a value obtained by adding "1" to the value set in the ordinary figure reservation number counter is newly set in the ordinary figure reservation number counter.

In step S6-4, a general pattern random number storage process is executed, the series of processes is completed, and the process moves to the next process (step S5-3). In the normal figure random number storage process, the winning random number obtained in step S6-1 is stored in the normal figure game information storage area of the RAM 230 as normal figure game information.
The RAM 230 includes a storage area 0 where the game information of the game being played is stored, and a game information storage area where the game information of the game where the winning/loss determination of the game is pending is stored. has been done.
The general figure game information storage area is configured to include storage areas 1 to 4 as storage areas capable of storing general figure game information.
The priority order of each storage area is defined in order of priority: storage area 1, storage area 2, storage area 3, and storage area 4 (higher to lower). Then, for the standard game information stored in the standard game information storage area, the standard game winning/losing determination is performed in order from the one stored in the storage area with the highest priority order.
In the normal figure random number storage process, the winning random number obtained in step S6-1 is stored in the normal figure game information storage area as normal figure game information. At this time, the common figure game information is stored in the storage area with the highest priority among the vacant storage areas.
That is, when the current value of the number of reserved common symbols counter = "1", the winning random number obtained in step S6-1 is stored in the storage area 1. If the current value of the common figure reservation counter is "2", the winning random number obtained in step S6-1 is stored in the storage area 2. If the current value of the reserved number of common symbols counter = "3", the winning random number obtained in step S6-1 is stored in the storage area 3. If the current value of the reserved number of ordinary figures counter = "4", the winning random number obtained in step S6-1 is stored in the storage area 4.

(Special figure 1 starting ball detection process)
Next, the special figure 1 starting ball detection process in step S5-4 will be explained.
FIG. 16 is a flowchart showing the special figure 1 starting ball detection process.
When the special figure 1 starting ball detection process is executed in step S5-4, as shown in FIG. 16, first, the process moves to step S7-1.
In step S7-1, special symbol identification value setting processing is executed, and the process moves to step S7-2. In the special symbol identification value setting process, a special symbol identification value corresponding to the first special symbol lottery is set in the special symbol identification value setting area of the RAM 230. Further, "1" is added to the value of the external information starting port entry number counter.
In addition, in the special symbol identification value setting process, it is determined whether or not the right-handed hitting period is in progress. If it is determined that the game is not in the right-handed hitting period (it is in the left-handed hitting period), the value of the right-handed hitting error counter is reset (the value of the right-handed hitting error counter is set to "0").
In step S7-2, a pending number counter address setting process is executed, and the process moves to step S7-3. In the reservation number counter address setting process, the address of the special figure 1 reservation number counter is set in the reservation number counter address setting area of the RAM 230.
In step S7-3, a special symbol random number acquisition process is executed, the series of processes is completed, and the process moves to the next process (step S5-5). The special symbol random number acquisition process will be described later.

(Special figure 2 starting ball detection process)
Next, the special figure 2 starting ball detection process in step S5-6 will be explained.
FIG. 17 is a flowchart showing the special figure 2 starting ball detection process.
When the special figure 2 starting ball detection process is executed in step S5-6, as shown in FIG. 17, the process first moves to step S8-1.
In step S8-1, special symbol identification value setting processing is executed, and the process moves to step S8-2. In the special symbol identification value setting process, a special symbol identification value corresponding to the second special symbol lottery is set in the special symbol identification value setting area of the RAM 230. Further, "1" is added to the value of the external information starting port entry number counter.
In addition, in the special symbol identification value setting process, it is determined whether or not the right-handed hitting period is in progress. If it is determined that the game is not in the right-handed batting period (it is in the left-handed batting period), "1" is added to the value of the right-handed batting error counter.
In step S8-2, a pending number counter address setting process is executed, and the process moves to step S8-3. In the reservation number counter address setting process, the address of the special figure 2 reservation number counter is set in the reservation number counter address area of the RAM 230.
In step S8-3, a special symbol random number acquisition process is executed, the series of processes is completed, and the process moves to the next process (step S4-13). The special symbol random number acquisition process will be described later.

(Special pattern random number acquisition process)
Next, the special symbol random number acquisition processing in steps S7-3 and S8-3 will be explained.
FIG. 18 is a flowchart showing the special symbol random number acquisition process.
When the special symbol random number acquisition process is executed in steps S7-3 and S8-3, as shown in FIG. 18, the process first moves to step S9-1.
In step S9-1, special symbol identification value acquisition processing is executed, and the process moves to step S9-2. In the special symbol identification value acquisition process, the special symbol identification value set in the special symbol identification value setting area of the RAM 230 is acquired (loaded).
In step S9-2, a special figure reservation number acquisition process is executed, and the process moves to step S9-3. In the special figure reservation number acquisition process, the value of the special figure reservation number counter (special figure 1 reservation number counter or special figure 2 reservation number counter) specified by the address set in the reservation number counter address area (special figure 1 reservation number counter) number or special map 2 pending number).

In step S9-3, a special figure random number acquisition process is executed, and the process moves to step S9-4. In the special pattern random number acquisition process, various random numbers (random numbers) such as a jackpot random number, a hit pattern random number, a reach group random number, a reach mode random number, and a fluctuation pattern random number are acquired (loaded) from the loop counter corresponding to each lottery. At this time, a corresponding loop counter is selected based on the special symbol identification value acquired in step S9-1.
In step S9-4, it is determined whether the number of reserved special drawings (the number of reserved special drawings 1 or the number of reserved special drawings 2) obtained in step S9-2 is the upper limit value (in this embodiment, "4"). However, if it is determined that the number of reserved special drawings is not the upper limit value (No), the process moves to step S9-5, and if it is determined that the number of reserved special drawings is the upper limit value (Yes), a series of processing is performed. The process ends and moves on to the next process (step S4-13 or S5-5).
In step S9-5, a special figure reservation number counter update process is executed, and the process moves to step S9-6. In the special figure reservation number counter update process, the value set in the special figure reservation number counter (special figure 1 reservation number counter or special figure 2 reservation number counter) specified by the address set in the reservation number counter address area The value obtained by adding "1" to the above is newly set in the special figure pending number counter.

In step S9-6, special figure random number storage processing is executed, and the process moves to step S9-7. In the special figure random number storage process, the various random numbers acquired in step S9-3 are stored in the special figure game information storage area (special figure 1 game information) of the RAM 230 as special figure game information (special figure 1 game information or special figure 2 game information). information storage area or special figure 2 game information storage area).
The RAM 230 has storage area 0 where special figure game information during game execution is stored, special figure 1 game information storage area where special figure 1 game information whose start determination is pending, and special figure 1 game information storage area where start determination is pending. The special figure 2 game information storage area shown in FIG.
The special figure 1 game information storage area is configured to include storage areas 1 to 4 as storage areas capable of storing special figure 1 game information.
The priority order of each storage area is defined in order of priority: storage area 1, storage area 2, storage area 3, and storage area 4 (higher to lower). Then, the start determination of the special figure 1 game information stored in the special figure 1 game information storage area is performed in order from the one stored in the storage area with the highest priority.
The special figure 2 game information storage area is configured to include storage areas 1 to 4 as storage areas in which special figure 2 game information can be stored.
The priority order of each storage area is defined in order of priority: storage area 1, storage area 2, storage area 3, and storage area 4 (higher to lower). Then, the start determination of the special figure 2 game information stored in the special figure 2 game information storage area is performed in order from the one stored in the storage area with the highest priority.

In the special symbol random number storage process, if the special symbol identification value acquired in step S9-1 is a value corresponding to the first special symbol lottery, the various random numbers acquired in step S9-3 are stored as special symbol 1 game information. , is stored in the special figure 1 game information storage area. At this time, the various random numbers obtained in step S9-3 are stored in the storage area with the highest priority among the empty storage areas.
That is, when the current value of the special figure 1 reservation number counter = "1", the various random numbers obtained in step S9-3 are stored in the storage area 1. When the current value of the special figure 1 reservation number counter = "2", the various random numbers obtained in step S9-3 are stored in the storage area 2. When the current value of the special figure 1 reservation number counter is "3", the various random numbers obtained in step S9-3 are stored in the storage area 3. When the current value of the special figure 1 reservation number counter is "4", the various random numbers obtained in step S9-3 are stored in the storage area 4.
On the other hand, if the special symbol identification value acquired in step S9-1 is a value corresponding to the second special symbol lottery, the various random numbers acquired in step S9-3 are used as the special symbol 2 game information to play the special symbol 2 game. Store in the information storage area. At this time, the various random numbers obtained in step S9-3 are stored in the storage area with the highest priority among the empty storage areas.
That is, when the current value of the special figure 2 reservation number counter = "1", the various random numbers obtained in step S9-3 are stored in the storage area 1. When the current value of the special figure 2 reservation number counter is "2", the various random numbers obtained in step S9-3 are stored in the storage area 2. When the current value of the special figure 2 reservation number counter is "3", the various random numbers obtained in step S9-3 are stored in the storage area 3. When the current value of the special figure 2 reservation number counter is "4", the various random numbers obtained in step S9-3 are stored in the storage area 4.

In step S9-7, a command setting process for specifying the number of reservations is executed, and the process moves to step S9-8. In the reservation number designation command setting process, a reservation number designation command that specifies that the number of reserved special drawings (the number of reserved special drawings 1 or the number of reserved special drawings 2) has been increased by "1" is stored in the subcommand output request buffer of the RAM 230. do. At this time, if the special symbol identification value acquired in step S9-1 is a value corresponding to the first special symbol lottery, a reserved number designation command that specifies that the special symbol 1 reserved number has increased by "1" is stored in the sub-command output request buffer of the RAM 230, and if it is a value corresponding to the second special symbol lottery, a reservation number designation command that specifies that the special symbol 2 reservation number has increased by "1" is stored in the RAM 230. is stored in the subcommand output request buffer.

In step S9-8, a preliminary determination process is executed, the series of processes ends, and the process moves to the next process (step S4-13 or S5-5). In the preliminary determination process, the game information (special figure 1 game information or special figure 2 game information storage area) saved (stored) in the special figure game information storage area (special figure 1 game information storage area or special figure 2 game information storage area) in step S9-6 2 game information) (hereinafter referred to as "game information subject to preliminary determination"), various lottery results are pre-determined.
In this embodiment, preliminary determination of various lottery results is performed for all game information (special figure 1 game information and special figure 2 game information).
Note that for game information acquired (stored) during the occurrence of a jackpot game state, a configuration may be adopted in which preliminary determination of various lottery results is not performed. In addition, for the special figure 2 game information acquired (stored) while the time saving control is stopped, preliminary determination of various lottery results is not performed, and the special figure 1 game information acquired (stored) while the time saving control is being executed. Regarding this, a configuration may be adopted in which preliminary determination of various lottery results is not performed.

In the preliminary determination process, first, a preliminary special symbol per determination process is executed.
In the advance special pattern hit determination process, the result of the special symbol lottery ("jackpot" or "miss") is determined (preliminary special symbol hit determination).
The ROM 220 stores a special symbol winning/losing lottery table in which the jackpot values of the special symbol lottery are registered. In addition, the special drawing lottery table corresponds to each combination of the setting value (1 to 6) and the gaming state ("special drawing low probability state" or "special drawing high probability state"). A special drawing lottery table is stored.
Specifically, the special figure winning/losing lottery tables include a ``special figure winning/losing lottery table when setting value 1 is low accuracy'', a ``special figure winning/losing lottery table when setting value 1 is high accuracy'', and a ``special figure winning/losing lottery table when setting value 2 is low accuracy''. ``Chart winning/losing lottery table for setting value 2 high accuracy'', ``Special drawing winning/losing lottery table for setting value 3 low accuracy'', and ``Special drawing winning/losing lottery table for setting value 3 high accuracy'' , "Special chart winning/losing lottery table when setting value 4 is low", "Special drawing winning/losing drawing table when setting value 4 is high", "special drawing winning/losing drawing table when setting value 5 is low", and "setting value 4" 5 high accuracy special symbol winning/losing lottery table,""setting value 6 low accuracy special symbol winning/losing lottery table," and "setting value 6 high accuracy special symbol winning/losing lottery table" are stored.

In the "Special chart winning/losing lottery table when the setting value is 0 low probability", the setting value = "0" and "0" is set in the special chart high probability state flag area (occurrence of "special chart low probability state"). (inside), it is selected. In the "Special drawing lottery table when the set value is 0 low probability", among the jackpot random numbers "0" to "65535", "0" to "204" are registered as jackpot values.
In the "Special drawing lottery table when the setting value is 0 high probability", the setting value = "0" and "1" is set in the special drawing high probability state flag area (occurrence of "Special drawing high probability state"). (inside), it is selected. In the "set value 0 high probability special drawing lottery table", among the jackpot random numbers "0" to "65535", "0" to "2039" are registered as jackpot values.
In the "Special drawing lottery table when the setting value is 1 low probability", the setting value = "1" and "0" is set in the special drawing high probability state flag area (occurrence of "special drawing low probability state"). (inside), it is selected. In the "Special drawing lottery table when the set value 1 is low", among the jackpot random numbers "0" to "65535", "0" to "209" are registered as jackpot values.
In the "set value 1 high probability special chart winning/losing lottery table", the setting value = "1" and "1" is set in the special chart high probability state flag area (occurrence of "special chart high probability state"). (inside), it is selected. In the "setting value 1 high probability special drawing lottery table", among the jackpot random numbers "0" to "65535", "0" to "2089" are registered as jackpot values.
In the ``setting value 2 low probability special drawing lottery table'', setting value = ``2'' and ``0'' is set in the special drawing high probability state flag area (occurrence of ``special drawing low probability state''). (inside), it is selected. In the "setting value 2 low probability special drawing lottery table", among the jackpot random numbers "0" to "65535", "0" to "214" are registered as jackpot values.
In the "setting value 2 high probability special drawing lottery table", setting value = "2" and "1" is set in the special drawing high probability state flag area (occurrence of "special drawing high probability state"). (inside), it is selected. In the "setting value 2 high probability special drawing lottery table", among the jackpot random numbers "0" to "65535", "0" to "2139" are registered as jackpot values.

In the "Special chart winning/losing lottery table when the setting value is low 3", the setting value = "3" and "0" is set in the special chart high probability state flag area (occurrence of "special chart low probability state"). (inside), it is selected. In the "Special drawing lottery table when the set value 3 is low", among the jackpot random numbers "0" to "65535", "0" to "219" are registered as jackpot values.
In the "Special drawing lottery table when setting value 3 is high probability", the setting value = "3" and "1" is set in the special drawing high probability state flag area (occurrence of "Special drawing high probability state"). (inside), it is selected. In the "setting value 3 high probability special drawing lottery table", among the jackpot random numbers "0" to "65535", "0" to "2189" are registered as jackpot values.
In the "Special chart winning/losing lottery table when setting value 4 is low", setting value = "4" and "0" is set in the special chart high probability state flag area (occurrence of "special chart low probability state"). (inside), it is selected. In the "Special drawing lottery table when the set value 4 is low", among the jackpot random numbers "0" to "65535", "0" to "224" are registered as jackpot values.
In the "set value 4 high probability special chart winning/losing lottery table", the setting value = "4" and "1" is set in the special chart high probability state flag area (occurrence of "special chart high probability state"). (inside), it is selected. In the "setting value 4 high probability special drawing lottery table", among the jackpot random numbers "0" to "65535", "0" to "2239" are registered as jackpot values.
In the "Special drawing lottery table when the setting value is 5 low probability", the setting value = "5" and "0" is set in the special drawing high probability state flag area (occurrence of "special drawing low probability state"). (inside), it is selected. In the "Special drawing lottery table when the set value 5 is low", among the jackpot random numbers "0" to "65535", "0" to "229" are registered as jackpot values.
In the "Special drawing lottery table when setting value 5 is high probability", the setting value = "5" and "1" is set in the special drawing high probability state flag area (occurrence of "Special drawing high probability state"). (inside), it is selected. In the "setting value 5 high probability special drawing lottery table", among the jackpot random numbers "0" to "65535", "0" to "2289" are registered as jackpot values.

In the preliminary special pattern hit determination process, the value set in the setting value area (setting value) and the current gaming state (“special pattern high probability state” or “special pattern low probability state”) are checked. , reads out the special figure winning/losing lottery table corresponding to this confirmation result.
Then, the result of the special symbol lottery (“jackpot” or “miss”) is determined based on the jackpot random number included in the game information subject to preliminary determination and the read special symbol lottery table (preliminary special symbol hit determination). do.
Specifically, if the value of the jackpot random number included in the preliminary determination target game information matches the jackpot value registered in the read special symbol winning/losing lottery table, the result of the special symbol lottery is ” (successful).
On the other hand, if the value of the jackpot random number included in the game information subject to advance judgment does not match the jackpot value registered in the read special map winning/losing lottery table (if it matches the outlier value), a special The result of the symbol lottery is determined to be "unsuccessful" (failed).

In the preliminary determination process, next, a preliminary special symbol determination process is executed. In the advance special pattern determination process, the type of the stop symbol of the special symbol is determined (preliminary special design determination).
In the preliminary special pattern pattern determination process, when it is determined as a "jackpot" (winning) by the preliminary special pattern hit determination, the type of the "jackpot symbol" is determined (preliminary special pattern pattern determination).
The ROM 220 stores a jackpot symbol lottery table in which the correspondence between the winning symbol random numbers and the types of "jackpot symbols" is registered. Further, as jackpot symbol lottery tables, a first jackpot symbol lottery table corresponding to the first special symbol lottery and a second jackpot symbol lottery table corresponding to the second special symbol lottery are stored.
In the first jackpot symbol lottery table, "jackpot 1 symbol" and "jackpot 2 symbol" are registered as types of "jackpot symbol". On the other hand, in the second jackpot symbol lottery table, "Jackpot 3 symbols" to "Jackpot 6 symbols" are registered as types of "Jackpot symbols".
Then, when the preliminary determination target game information is the special figure 1 game information, the first jackpot symbol lottery table is read out. Then, the type of the jackpot symbol is determined based on the winning symbol random number included in the preliminary determination target game information and the read first jackpot symbol lottery table.
On the other hand, when the game information to be determined in advance is the special figure 2 game information, the second jackpot symbol lottery table is read. Then, the type of the jackpot symbol is determined based on the winning symbol random number included in the preliminary determination target game information and the read second jackpot symbol lottery table.
On the other hand, in the advance special symbol determination process, if the advance special symbol hit determination determines that it is a "miss" (rejected), the type of the stop symbol is determined to be a "miss symbol" (previous special symbol determination). .

In the preliminary determination process, next, a first prefetch designation command setting process is executed.
In the first prefetch designation command setting process, the first prefetch designation command that designates the type of stop symbol determined by the advance special symbol determination is stored in the subcommand output request buffer of the RAM 230.

In the preliminary determination process, next, a preliminary special symbol variation mode determination process is executed.
At this time, if it is determined to be a "miss" (rejected) by the advance special symbol winning determination, a prior special symbol fluctuation state determination process at the time of defeat, which will be described later, is executed. On the other hand, if it is determined that it is a "big hit" (winning) by the preliminary special symbol winning determination, a preliminary special symbol variation mode determination process at the time of winning, which will be described later, is executed.

In the advance special symbol variation mode determination process at the time of loss, first, advance random number type determination is performed.
In the preliminary random number type determination, it is determined which value the reach group random number included in the preliminary determination target game information is, "undefined value" or "fixed value."
Here, if the reach group random number included in the game information subject to preliminary determination is an "indeterminate value", when acquiring (memorizing) the game information (special figure 1 game information or special figure 2 game information), the variable mode number (primary fluctuation mode number) and fluctuation pattern number are not determined.
On the other hand, if the reach group random number included in the preliminary determination target game information is a "fixed value", when acquiring (storing) the game information (special figure 1 game information or special figure 2 game information) (step S9-8 (at the time of execution), the fluctuation mode number (primary fluctuation mode number) and fluctuation pattern number are determined.
In this embodiment, the value of the reach group random number is updated within the range of "0" to "10006". Of "0" to "10006", "0" to "8499" are defined as "undefined values", and "8500" to "10006" are defined as "fixed values".
Therefore, in advance random number type determination, if the value of the reach group random number included in the game information subject to advance determination is less than "8500", it is determined to be an "undefined value", and the reach group random number included in the game information subject to advance determination is determined to be an "indeterminate value". If the value of the random number is "8500" or more, it is determined to be a "fixed value".

In the advance special symbol fluctuation mode determination process at the time of rejection, if it is determined to be a "fixed value" by the prior random number type determination, further, advance reach group determination, advance fluctuation mode determination at the time of rejection, advance fluctuation pattern determination at the time of rejection, Execute.
In addition, in the advance special symbol fluctuation mode determination process at the time of rejection, if it is determined to be an "indeterminate value" by the prior random number type determination, the advance reach group determination, the advance fluctuation mode determination at the time of rejection, and the determination of the fluctuation pattern at the time of rejection are performed. Not executed.

In advance reach group determination, the reach group number (type of reach group) is determined.
The ROM 220 stores a reach group determination table in which the correspondence between reach group random numbers and reach group numbers (types of reach groups) is registered.
In addition, as a reach group judgment table, the reservation type (special figure 1 game information or special figure 2 game information), the number of reservations ("0" to "3"), and the game state (in a low probability state, in a time saving state, A reach group determination table corresponding to each of the combinations of (in a variable probability state or in a potential state) is stored.
Here, in this embodiment, a low probability state, a time saving state, a variable probability state, and a potential state are defined as the gaming states.
The "low probability state" is a gaming state in which the special figure low probability state is occurring and the time saving control is stopped. The "time saving state" is a gaming state in which the special figure low probability state is occurring and the time saving control is being executed. The "probability variable state" is a gaming state in which the special symbol high probability state is occurring and the time saving control is being executed. The "potential probability state" is a gaming state in which the special symbol high probability state is occurring and the time saving control is stopped.
In advance reach group determination, first check the reservation type (type of game information subject to advance determination (special figure 1 game information or special figure 2 game information), the number of reservations, and the game status, and then check the The corresponding reach group determination table is read. At this time, the number of reservations is assumed to be "0".
Then, the reach group number is determined based on the reach group random number included in the preliminary determination target game information and the read reach group determination table.

In advance variation mode determination at the time of rejection, the variation mode number (type of variation mode) is determined.
The ROM 220 stores a variable mode determination table in which the correspondence between the reach mode random number and the variable mode number (type of variable mode) is registered.
Further, as the variable mode determination table, a variable mode determination table at the time of losing and a variable mode determination table at the time of winning are stored.
Further, as a failure time fluctuation mode determination table, a loss time fluctuation mode determination table corresponding to each reach group number (each type of reach group) is stored.
In particular, in each fluctuation mode determination table, each reach mode random number is associated with a fluctuation mode number (type of fluctuation mode) and a fluctuation pattern determination table (information specifying the fluctuation pattern determination table). . As a result, the fluctuation mode number (type of fluctuation mode) and the fluctuation pattern determination table are simultaneously selected based on each fluctuation mode determination table.
In the advance change mode determination at the time of losing, first, the reach group number determined by the advance reach group determination is confirmed, and the change mode determination table at the time of failure corresponding to this confirmation result is read.
Then, the variable mode number (type of variable mode) and the variable pattern determination table are determined based on the reach mode random number included in the preliminary determination target game information and the read out variable mode determination table at the time of loss.

In advance variation pattern determination at the time of rejection, the variation pattern number (type of variation pattern) is determined.
The ROM 220 stores a variation pattern determination table in which the correspondence between variation pattern random numbers and variation pattern numbers (variation pattern types) is registered.
Furthermore, a plurality of variation pattern determination tables having different contents are stored as variation pattern determination tables.
In the advance fluctuation pattern determination at the time of rejection, first, the fluctuation pattern determination table determined by the advance fluctuation mode determination at the time of rejection is read.
Then, the variation pattern number (type of variation pattern) is determined based on the variation pattern random number included in the preliminary determination target game information and the read variation pattern determination table.

On the other hand, in the winning advance special symbol variation mode determination process, first, the winning advance variation mode determination is executed.
In the preliminary variation mode determination at the time of winning, the variation mode number (type of variation mode) is determined.
In the advance variable mode determination at the time of winning, first, the variable mode determination table at the time of winning is read.
Then, the variable mode number (type of variable mode) and the variable pattern determination table are determined based on the reach mode random number included in the preliminary determination target game information and the read winning variable mode determination table.

In the winning advance special symbol variation mode determination process, next, a winning advance variation pattern determination is executed.
In the preliminary variation pattern determination at the time of winning, the variation pattern number (type of variation pattern) is determined.
In the preliminary variation pattern determination at the time of winning, first, the fluctuation pattern determination table determined by the preliminary variation mode determination at the time of winning is read.
Then, the variation pattern number (type of variation pattern) is determined based on the variation pattern random number included in the preliminary determination target game information and the read variation pattern determination table.

In the preliminary determination process, next, second and third prefetch designation command setting processes are executed.
In the second and third look-ahead designation command setting processing, if it is determined to be a "miss" (rejected) by the preliminary special map hit determination and a "fixed value" by the preliminary random number type determination, A subcommand output request is made to the RAM 230 for a second read-ahead designation command that specifies the fluctuation mode number determined by the fluctuation mode determination, and a third read-ahead designation command that designates the fluctuation pattern number determined by the pre-failure fluctuation pattern determination. Store in buffer.
On the other hand, if it is determined to be a "miss" (rejected) by the preliminary special map hit determination, and if it is determined to be an "undefined value" by the preliminary random number type determination, a second look-ahead designation command that specifies the "undefined value" is issued. , and a third prefetch designation command that designates "undefined value" in the subcommand output request buffer of the RAM 230.
On the other hand, if it is determined to be a "big hit" (winning) by the advance special map hit determination, a second look-ahead designation command that specifies the variation mode number determined by the advance variation mode determination at the time of winning, and the advance variation pattern at the time of winning are sent. A third prefetch designation command that designates the variation pattern number determined by the determination is stored in the subcommand output request buffer of the RAM 230.

As described above, if the value of the reach group random number included in the game information subject to advance determination is a "fixed value", the fluctuation mode number and fluctuation pattern number are determined, and the determined fluctuation mode number and fluctuation pattern number are specified. The second and third prefetch designation commands are transmitted to the production control board 300.
On the other hand, if the value of the reach group random number included in the preliminary determination target game information is an "indeterminate value", the fluctuation mode number and the fluctuation pattern number are not determined, and the second and third A prefetch designation command is transmitted to the production control board 300.

(Special game management processing)
Next, the special game management process in step S4-13 will be explained.
FIG. 19 is a flowchart showing special game management processing.
In this embodiment, the phases/stages (hereinafter referred to as "special game phase") of a game executed based on a special symbol lottery (hereinafter referred to as "special game") include a "special symbol change waiting state", “Special figure fluctuation state”, “Special figure stop symbol display state”, “Great winning opening pre-opening state”, “Great winning opening control state”, “Great winning opening closing effective state”, and “Great winning opening opening end” Seven "wait states" are defined.
Then, in the special game phase flag area of the RAM 230, a value (special game phase flag) corresponding to one of the seven special game phases is set.
Further, the ROM 220 stores special game control modules (programs) corresponding to each special game phase as special game control modules (programs) for controlling (executing) special games.
In the special game management process, a special game control module corresponding to the value set in the special game phase flag area of the RAM 230 is selected, and a process based on the selected special game control module is executed.

Specifically, when the special game management process is executed in step S4-13, as shown in FIG. 19, the process first moves to step S10-1.
In step S10-1, special game phase acquisition processing is executed, and the process moves to step S10-2. In the special game phase acquisition process, the value (special game phase) set in the special game phase flag area of the RAM 230 is acquired (loaded).
In step S10-2, special game control module acquisition processing is executed, and the process moves to step S10-3. In the special game control module acquisition process, the special game control module corresponding to the value (special game phase) acquired in step S10-1 is read.
In step S10-3, special game control module execution processing is executed, a series of processing is completed, and the process moves to the next processing (step S4-14). In the special game control module execution process, a process based on the special game control module read in step S10-2 is started.
Specifically, if the value acquired in step S10-1 is a value corresponding to the "special pattern fluctuation waiting state", a special pattern fluctuation waiting process to be described later is started, and the "special pattern fluctuation state" is started. If the value corresponds to , the special figure fluctuation process described later is started, and if the value corresponds to the "special figure stop symbol display state", the special figure stop process described later is started, If the value corresponds to the "big winning opening pre-opening state", the big winning opening pre-opening process described below is started, and if the value corresponds to the "big winning opening opening control state", the processing described later will start. The big winning opening opening control process is started, and if the value corresponds to the "big winning opening closing valid state", the winning opening closing valid processing described later is started, and the state is changed to the "big winning opening opening end wait state". If it is a corresponding value, a special winning opening opening end wait process, which will be described later, is started.

(Special figure change waiting process)
Next, the special figure fluctuation waiting process executed in step S10-3 will be explained.
FIG. 20 is a flowchart showing the special figure fluctuation waiting process.
When the special figure fluctuation waiting process is executed in step S10-3, as shown in FIG. 20, first, the process moves to step S11-1.
In step S11-1, it is determined whether the value of the special figure 2 reservation number counter is "1" or more, and if it is determined that the value of the special figure 2 reservation number counter is not "1" or more (No) The process moves to step S11-2, and when it is determined that the value of the special figure 2 reservation number counter is "1" or more (Yes), the process moves to step S11-3.
In step S11-2, it is determined whether the value of the special figure 1 reservation number counter is "1" or more, and if it is determined that the value of the special figure 1 reservation number counter is "1" or more (Yes) Then, the process moves to step S11-3, and if it is determined that the value of the special figure 1 reservation number counter is not "1" or more (No), the process moves to step S11-16.

In step S11-3, a special figure reservation number update process is executed, and the process moves to step S11-4. In the special figure reservation number update process, the special figure reservation number (special figure 1 reservation number or special figure 2 reservation number) is updated.
Specifically, in the special figure reservation number update process, first, it is determined whether the value of the special figure 2 reservation number counter is "1" or more.
Then, when the value of the special figure 2 reservation number counter is "1" or more, a value (in this embodiment, "1") that specifies the game based on the special figure 2 game information is set as the special symbol discrimination flag setting value. At the same time as setting, "1" is subtracted from the value of the special figure 2 reservation number counter.
On the other hand, if it is determined that the value of the special figure 2 reservation number counter is not ``1'' or more (the value of the special figure 2 reservation number counter is ``0''), the special figure 1 game information is set as the special symbol discrimination flag setting value. A value (in this embodiment, "0") that specifies a game based on is set, and "1" is subtracted from the value of the special figure 1 reservation number counter.
In step S11-4, a command setting process for specifying the number of reservations is executed, and the process moves to step S11-5. In the reservation number designation command setting process, a reservation number designation command that specifies that the number of reserved special figures has decreased by "1" is stored in the subcommand output request buffer of the RAM 230.
Specifically, when the special symbol discrimination flag setting value = "1", a reservation number designation command that specifies that the special symbol 2 reservation number has decreased by "1" is stored in the subcommand output request buffer of the RAM 230.
On the other hand, when the special symbol discrimination flag setting value = "0", a pending number designation command specifying that the special symbol 1 pending number has decreased by "1" is stored in the subcommand output request buffer of the RAM 230.

In step S11-5, special symbol storage area shift processing is executed, and the process moves to step S11-6. In the special symbol storage area shift process, the storage area where game information is stored is shifted.
Specifically, when the special symbol discrimination flag setting value = "1", the storage contents of the storage area 1 of the special figure 2 game information storage area are shifted (moved) to the storage area 0. Next, the storage contents of the storage area 2 of the special figure 2 game information storage area are shifted to the storage area 1 of the special figure 2 game information storage area. Next, the storage contents of the storage area 3 of the special figure 2 game information storage area are shifted to the storage area 2 of the special figure 2 game information storage area. Next, the storage contents of the storage area 4 of the special figure 2 game information storage area are shifted to the storage area 3 of the special figure 2 game information storage area. Next, the storage contents of the storage area 4 of the special figure 2 game information storage area are cleared (initialized).
On the other hand, when the special symbol discrimination flag setting value = "0", the storage contents of the storage area 1 of the special symbol 1 game information storage area are shifted (moved) to the storage area 0. Next, the storage contents of the storage area 2 of the special figure 1 game information storage area are shifted to the storage area 1 of the special figure 1 game information storage area. Next, the storage contents of the storage area 3 of the special figure 1 game information storage area are shifted to the storage area 2 of the special figure 1 game information storage area. Next, the storage contents of the storage area 4 of the special figure 1 game information storage area are shifted to the storage area 3 of the special figure 1 game information storage area. Next, the storage contents of the storage area 4 of the special figure 1 game information storage area are cleared (initialized).

In step S11-6, a setting abnormality determination process is executed, and the process moves to step S11-7. In the setting abnormality determination process, occurrence of a setting abnormality is monitored.
Specifically, in the setting abnormality determination process, first, the setting values stored in the setting value area of the RAM 230 are acquired. Next, it is determined whether the acquired setting value is less than a predetermined setting comparison value (in this embodiment, "6").
If it is determined that the acquired setting value is not less than a predetermined setting comparison value (or more than a predetermined setting comparison value), the value of the gaming machine status flag area (gaming machine status flag) in the RAM 230 is set to an abnormal setting state. Save the corresponding value. Also, a subcommand specifying the occurrence of a setting abnormality is stored in the subcommand output request buffer. Then, the process moves to the next process (step S11-7).
On the other hand, if it is determined that the acquired setting value is less than the predetermined setting comparison value, the process moves to the next process (step S11-7).

In step S11-7, a special figure hit determination process is executed, and the process moves to step S11-8. In the special pattern hit determination process, the result of the special symbol lottery is determined (special pattern hit determination).
In the special pattern hit determination process, first, the setting value stored in the setting value area of the RAM 230 and the current gaming state ("special pattern high probability state" or "special pattern low probability state") are checked. , reads out the special figure winning/losing lottery table corresponding to this confirmation result.
Then, based on the jackpot random number included in the game information stored in storage area 0 and the read special symbol winning/losing lottery table, it is determined whether or not the result of the special symbol lottery is a "jackpot" (special symbol lottery). (Judge the figure).
Specifically, if the value of the jackpot random number included in the game information stored in storage area 0 matches the jackpot value registered in the read special symbol lottery table, the special symbol lottery is executed. The result is determined to be a “big hit” (winning).
On the other hand, if the value of the jackpot random number included in the game information stored in storage area 0 does not match the jackpot value registered in the read out special drawing lottery table (if it matches the outlier value) ), the result of the special symbol lottery is determined to be a "miss" (failure).

In step S11-8, a special symbol determination process is executed, and the process moves to step S11-9. In the special pattern determination process, the type of the stop pattern of the special pattern is determined (special pattern determination).
Specifically, in the special pattern determination process, first, it is determined whether or not it has been determined to be a "big hit" (winning) by the special symbol hit determination.
Then, when it is determined as a "jackpot" (winning) by the special symbol hit determination, the type of "jackpot symbol" is determined.
For this purpose, if the special symbol discrimination flag setting value is "0", the first jackpot symbol lottery table is read. Then, the type of the jackpot symbol is determined based on the winning symbol random number included in the game information stored in the storage area 0 and the read first jackpot symbol lottery table.
On the other hand, when the special symbol discrimination flag setting value is "1", the second jackpot symbol lottery table is read. Then, the type of the jackpot symbol is determined based on the winning symbol random number included in the game information stored in the storage area 0 and the read second jackpot symbol lottery table.
On the other hand, if it is determined as a "miss" (lost) by the special pattern hit determination, a "miss symbol" is determined as the type of the stopped symbol.
Next, a value corresponding to the determined type of stopped symbol is set in the special symbol determination flag area of the RAM 230.
In step S11-9, a symbol type designation command setting process is executed, and the process moves to step S11-10. In the symbol type designation command setting process, a symbol type designation command that designates the type of the stopped symbol determined in step S11-8 is stored in the subcommand output request buffer.

In step S11-10, a special figure stop symbol number determination process is executed, and the process moves to step S11-11. In the special figure stop symbol number determination process, the stop symbol number of the special symbol is determined.
The ROM 220 stores a stop symbol number lottery table in which the correspondence between the value of the winning symbol random number and the stop symbol number (seg data) is registered.
In addition, as the stop symbol number lottery table, there is a winning stop symbol number lottery table that corresponds to the case where the special symbol lottery (first special symbol lottery or second special symbol lottery) is won, and a special symbol lottery (first special symbol lottery). or a second special symbol lottery) is stored therein, a stop symbol number lottery table corresponding to a failure in the second special symbol lottery) is stored.
Further, as a winning stop symbol number lottery table, a winning stop symbol number lottery table corresponding to the first special symbol lottery and a winning stop symbol number lottery table corresponding to the second special symbol lottery are stored. .
In the special figure stop symbol number determination process, first, the result of the special figure hit determination is confirmed.
Then, when it is determined that it is a "big hit" (winning) by the special symbol hit determination, the special symbol discrimination flag setting value is confirmed, and the winning stop symbol number lottery table corresponding to this confirmation result is read out. Then, the stop symbol number is determined based on the winning symbol random number included in the game information stored in the storage area 0 and the read stop symbol number lottery table upon winning.
On the other hand, if it is determined as a "miss" (defective) by the special symbol winning determination, the stop symbol number lottery table at the time of failure is read out. Then, the stop symbol number is determined based on the winning symbol random number included in the game information stored in the storage area 0 and the read out stopping symbol number lottery table upon failure.
Next, the determined stop symbol number is stored in the stop symbol number storage area of the RAM 230.

In step S11-11, a special figure fluctuation pattern determination process is executed, and the process moves to step S11-12. In the special symbol variation pattern determination process, the variation mode (variation mode type and variation pattern type) of the special symbol is determined.
Specifically, in the special figure fluctuation pattern determination process, first, the result of the special figure hit determination is confirmed. Then, when the result of the special figure hit determination is "miss" (rejected), a special figure fluctuation state determination process at the time of failure, which will be described later, is executed. On the other hand, if the result of the special figure hit determination is a "big hit" (winning), a winning special figure variation mode determination process is executed, which will be described later.

In the special symbol variation mode determination process at the time of loss, reach group determination is first performed.
In the reach group determination, the reach group number (type of reach group) is determined.
In the reach group determination, first, check the reservation type (type of game information stored in storage area 0 (special figure 1 game information or special figure 2 game information), the number of reservations, and the game state, The reach group determination table corresponding to this confirmation result is read out.
Then, the type of reach group is determined based on the reach group random number included in the game information stored in storage area 0 and the read reach group determination table.
In the special symbol variation mode determination process at the time of loss, next, a variation mode determination at the time of loss is executed.
In the fluctuation mode determination at the time of rejection, the fluctuation mode number (type of fluctuation mode) and the fluctuation pattern determination table are determined.
In the failure time fluctuation mode determination, first, the reach group number determined by the reach group determination is confirmed, and the loss time fluctuation mode determination table corresponding to this confirmation result is read.
Then, based on the reach mode random number included in the game information stored in storage area 0 and the read out fluctuation mode determination table at the time of loss, the fluctuation mode number (type of fluctuation mode) and the fluctuation pattern determination table are determined. , is determined.
In the special symbol variation mode determination process at the time of losing, next, a variation pattern determination at the time of losing is executed.
In the fluctuation pattern determination at the time of losing, the fluctuation pattern number (type of fluctuation pattern) is determined.
In the determination of the fluctuation pattern at the time of rejection, first, the fluctuation pattern determination table determined by the fluctuation mode determination at the time of rejection is read out.
Then, the variable pattern number (type of variable pattern) is determined based on the variable pattern random number included in the game information stored in storage area 0 and the read variable pattern determination table.

On the other hand, in the special symbol variation mode determination process at the time of winning, first, the variation mode determination at the time of winning is executed.
In the winning variation mode determination, the variation mode number (variation mode type) and variation pattern table are determined.
In the determination of the variable mode at the time of winning, first, the variable mode determination table at the time of winning is read.
Then, based on the reach mode random number included in the game information stored in storage area 0 and the read winning time variation mode determination table, a variation mode number (type of variation mode) and a variation pattern determination table are determined. , is determined.
In the winning special symbol variation mode determination process, next, a winning variation pattern determination is performed.
In the winning variation pattern determination, the variation pattern number (type of variation pattern) is determined.
In the winning variation pattern determination, first, the variation pattern determination table determined by the winning variation mode determination is read.
Then, the variable pattern number (type of variable pattern) is determined based on the variable pattern random number included in the game information stored in storage area 0 and the read variable pattern determination table.

In step S11-12, a variable pattern command setting process is executed, and the process moves to step S11-13. In the variation pattern command setting process, a variation mode designation command that specifies the variation mode number (variation mode type) determined in step S11-11 is stored in the subcommand output request buffer.
Further, a fluctuation pattern designation command that designates the fluctuation pattern number (type of fluctuation pattern) determined in step S11-11 is stored in the subcommand output request buffer.
In step S11-13, a special figure fluctuation time setting process is executed, and the process moves to step S11-14. In the special symbol variation time setting process, the time for variable display of the special symbol is set.
Specifically, in the special figure variation time setting process, first, a variation time (hereinafter referred to as "variation time 1") corresponding to the variation mode number determined in step S11-11 is obtained.
Further, the variation time (hereinafter referred to as "variation time 2") corresponding to the variation pattern number determined in step S11-11 is acquired.
Then, the total time of the acquired variable time 1 and variable time 2 is calculated, and the calculated total time is set in the special game timer.

In step S11-14, special figure fluctuation display data setting processing is executed, and the process moves to step S11-15. In the special figure variable display data setting process, data for controlling the variable display of the special figure display device is set.
Specifically, in the special figure fluctuation display data setting process, first, a predetermined display time is set in the special figure display timer.
Next, when the special symbol discrimination flag setting value = "0", a predetermined initial value is set in the special symbol 1 display symbol counter. As a result, among the predetermined number of segments constituting the special figure 1 display device, the segment corresponding to the value of the special figure 1 display symbol counter is controlled to light up.
On the other hand, when the special symbol discrimination flag setting value is "1", a predetermined initial value is set in the special symbol 2 display symbol counter. As a result, among the predetermined number of segments constituting the special figure 2 display device, the segment corresponding to the value of the special figure 2 display symbol counter is controlled to light up.

In step S11-15, a special game phase update process is executed, the series of processes is completed, and the process moves to the next process (step S4-14). In the special game phase update process, a value corresponding to the "special figure changing state" is set in the special game phase flag area of the RAM 230.
In step S11-16, a customer waiting setting process is executed, the series of processes is completed, and the process moves to the next process (step S4-14). In the customer waiting setting process, the demo designation command is stored in the subcommand output request buffer of the RAM 230.

(Special figure fluctuation processing)
Next, the special figure fluctuation processing executed in step S10-3 will be explained.
FIG. 21 is a flowchart showing the special figure fluctuation processing.
When the special figure fluctuation processing is executed in step S10-3, as shown in FIG. 21, the process first moves to step S12-1.
In step S12-1, it is determined whether the value of the special game timer is "0" or not, and if it is determined that the value of the special game timer is not "0" (No), the process moves to step S12-2. However, if it is determined that the value of the special game timer is "0" (Yes), the process moves to step S12-4.
In step S12-2, it is determined whether the value of the special figure display timer is "0" or not. If it is determined that the value of the special figure display timer is "0" (Yes), step S12- 3, and if it is determined that the value of the special figure display timer is not "0" (No), the series of processes is ended and the process moves to the next process (step S4-14).
In step S12-3, special figure fluctuation display data update processing is executed, a series of processing is completed, and the process moves to the next processing (step S4-14). In the special figure variation display data update process, data for controlling the variable display of the special figure display device is updated.
Specifically, in the special figure fluctuation display data update process, when the variable display of the first special symbol is being executed, "1" is added to the value of the special symbol 1 display symbol counter. On the other hand, when the variable display of the second special symbol is being executed, "1" is added to the value of the special symbol 2 display symbol counter.

In step S12-4, a special figure stop display data setting process is executed, and the process moves to step S12-5. In the special figure stop display data setting process, data for controlling the stop display of the special figure display device is set.
Specifically, in the special figure stop display data setting process, the stop symbol number stored in the stop symbol number storage area of the RAM 230 is acquired.
Next, when the special symbol discrimination flag setting value = "0", the obtained stop symbol number (data corresponding to the stop symbol number) is set as the value of the special symbol 1 display symbol counter. As a result, among the predetermined number of segments constituting the special figure 1 display device, the segment corresponding to the set stop symbol number is controlled to light up (stop display).
On the other hand, when the special symbol discrimination flag setting value = "1", the obtained stop symbol number (data corresponding to the stop symbol number) is set as the value of the special symbol 2 display symbol counter. As a result, among the predetermined number of segments constituting the special figure 2 display device, the segment corresponding to the set stop symbol number is controlled to light up (stop display).

In step S12-5, a special figure stop time setting process is executed, and the process moves to step S12-6. In the special figure stop time setting process, a predetermined stop time is set in the special game timer.
In step S12-6, a stop designation command setting process is executed, and the process moves to step S12-7. In the stop designation command setting process, the stop designation command is stored in the subcommand output request buffer. Further, a predetermined number (in this embodiment, 1 [times]) is added to the value of the external information confirmation number counter.
In step S12-7, a special game phase update process is executed, a series of processes is completed, and the process moves to the next process (step S4-14). In the special game phase update process, a value corresponding to the "special figure stop symbol display state" is set in the special game phase flag area of the RAM 230.

(Special figure suspension processing)
Next, the special figure stopping process executed in step S10-3 will be explained.
FIG. 22 is a flowchart showing the special figure stopping process.
When the special figure stopping process is executed in step S10-3, as shown in FIG. 22, the process first moves to step S13-1.
In step S13-1, it is determined whether or not the value of the special game timer is "0". If it is determined that the value of the special game timer is "0" (Yes), the process proceeds to step S13-2. If it is determined that the value of the special game timer is not "0" (No), the series of processes is ended and the process moves to the next process (step S4-14).
In step S13-2, it is determined whether the type of the stopped symbol is a "jackpot symbol", and if it is determined that the type of the stopped symbol is not a "jackpot symbol" (No), the process moves to step S13-3. However, if it is determined that the type of the stopped symbol is a "jackpot symbol" (Yes), the process moves to step S13-6.
In step S13-3, it is determined whether or not the time saving control is being executed, and if it is determined that the time saving control is being executed (Yes), the process moves to step S13-4, where the time saving control is being executed. If it is determined that it is not (No), the process moves to step S13-5.
Here, if "1" is set in the time saving control flag area of the RAM 230, it is determined that the time saving control is being executed, and if "0" is set, the time saving control is executed. It is determined that it is not inside.

In step S13-4, time saving control management processing is executed, and the process moves to step S13-5. In the time saving control management process, it is determined whether or not to end the time saving control.
Specifically, in the time-saving control management process, first, a value obtained by subtracting "1" from the value of the time-saving counter is set as a new value of the time-saving counter.
Next, it is determined whether the value of the time saving counter is "0".
If it is determined that the value of the time saving counter is "0", "0" is set in the time saving control flag area of the RAM 230 (time saving control is stopped).
On the other hand, if it is determined that the value of the time saving counter is not "0", the state where "1" is set in the time saving control flag area of the RAM 230 is maintained (the state in which the time saving control is being executed is maintained).
In step S13-5, a special game phase update process is executed, the series of processes is completed, and the process moves to the next process (step S4-14). In the special game phase update process, a value corresponding to the "special symbol fluctuation waiting state" is set in the special game phase flag area of the RAM 230.
In step S13-6, a gaming state update process is executed, and the process moves to step S13-7. In the game state update process, the game state is updated.
Specifically, in the game state update process, "0" is set in the special symbol high probability state flag area of the RAM 230. Further, "0" is set in the time saving control flag area of the RAM 230.

In step S13-7, special electric role control data setting processing is executed, and the process moves to step S13-8. In the special electric accessory control data setting process, control data for controlling opening and closing of the special electric accessory 53a is set.
The ROM 220 stores special electric combination control tables corresponding to each type of "jackpot symbol". Each special electric role control table contains the effective time for closing the big winning hole, the closing time for the big winning hole, the number of round games, the number of opening/closing switches corresponding to each round game, and the control data (solenoid) corresponding to each opening/closing switch. control data, control time data), etc.
In the special electric role control data setting process, the special electric role control table corresponding to the type of "jackpot symbol" determined in step S11-8 is read out, and the read special electric role control table is stored in the special electric role control table of the RAM 230. Set to area.
Next, the special electric role continuous operation number counter is set to "0".

In step S13-8, opening time setting processing is executed, and the process moves to step S13-9. In the opening time setting process, a predetermined opening time is set in the special game timer with reference to the special power win control table set in the special power win control table area of the RAM 230.
In step S13-9, opening designation command setting processing is executed, and the process moves to step S13-10. In the opening designation command setting process, the opening designation command that designates the type of "jackpot symbol" determined in step S11-8 is stored in the subcommand output request buffer. Further, a predetermined number (in this embodiment, 1 [times]) is added to the value of the external information jackpot number counter.
In step S13-10, a special game phase update process is executed, a series of processes is completed, and the process moves to the next process (step S4-14). In the special game phase update process, a value corresponding to the "state before opening the big winning opening" is set in the special game phase flag area of the RAM 230.

(Pre-processing before opening the grand prize opening)
Next, the pre-processing for opening the big prize opening executed in step S10-3 will be explained.
FIG. 23 is a flowchart showing the pre-processing for opening the big winning opening.
When the big prize opening pre-opening process is executed in step S10-3, as shown in FIG. 23, first, the process moves to step S14-1.
In step S14-1, it is determined whether or not the value of the special game timer is "0". If it is determined that the value of the special game timer is "0" (Yes), the process proceeds to step S14-2. If it is determined that the value of the special game timer is not "0" (No), the series of processes is ended and the process moves to the next process (step S4-14).
In step S14-2, a special electric role continuous operation count update process is executed, and the process moves to step S14-3. In the special electric role continuous operation frequency counter update process, a value obtained by adding "1" to the value set in the special electric role continuous operation frequency counter is newly set in the special electric role continuous operation frequency counter.
In step S14-3, a round start designation command setting process is executed, and the process moves to step S14-4. In the round start designation command setting process, the round start designation command is stored in the subcommand output request buffer.

In step S14-4, a special electric role opening/closing switching count setting process is executed, and the process moves to step S14-5. In the special electric role opening/closing switching frequency setting process, the special electric role control table set in the special electric role control table area of the RAM 230 is referred to, and the opening/closing switching frequency corresponding to the value of the special electric role continuous operation counter is read out. . Then, the number of switching times that has been read out is set in the special power switching switching number counter.
Next, "0" is set as the value of the special electric prize winning number counter.
In step S14-5, special electric role opening/closing switching processing is executed, and the process moves to step S14-6. The special electric role opening/closing switching process will be described later.
In step S14-6, a special game phase update process is executed, the series of processes is completed, and the process moves to the next process (step S4-14). In the special game phase update process, a value corresponding to the "big winning opening control state" is set in the special game phase flag area of the RAM 230.

(Special electric opening/closing switching process)
Next, the special electric role opening/closing switching process in steps S14-5 and S16-3 will be explained.
FIG. 24 is a flowchart showing the special electric role opening/closing switching process.
When the special power opening/closing switching process is executed in steps S14-5 and S16-3, as shown in FIG. 24, the process first moves to step S15-1.
In step S15-1, it is determined whether the value of the special electric role switching number counter is "0" or not, and if it is determined that the value of the special electric role switching number counter is not "0" (No) The process moves to step S15-2, and if it is determined that the value of the special electric role opening/closing switching counter is "0" (Yes), the series of processes is ended and the next process (step S14-6 Or move on to S16-4).

In step S15-2, special electric role control data setting processing is executed, and the process moves to step S15-3. In the special electric accessory control data setting process, control data for controlling the special electric accessory 53a to an open state or a closed state is set.
Specifically, in the special power control data setting process, the special power control table set in the special power control table area of the RAM 230 is referred to, and the solenoid corresponding to the value of the special power opening/closing switching counter is set. Read control data. Then, the read solenoid control data (control data specifying energization or de-energization) is set in a predetermined area of the RAM 230. As a result, control of the special electric accessory solenoid 65 based on the set solenoid data is started, and the special electric accessory 53a is controlled to be in an open state or a closed state.

In step S15-3, special electric role control time setting processing is executed, and the process moves to step S15-4. In the special power control time setting process, a control time for continuing control based on the solenoid control data set in step S15-2 is set.
Specifically, in the special electric role control time setting process, the special electric role control table set in the special electric role control table area of the RAM 230 is referred to, and the control corresponding to the value of the special electric role opening/closing switching counter is performed. Read out the time. Then, the read control time is set in the special game timer.
In step S15-4, special electric role opening/closing switching frequency counter updating processing is executed, the series of processing is completed, and the process moves to the next processing (step S14-6 or S16-4). In the special electric role opening/closing switching frequency counter updating process, a value obtained by subtracting "1" from the value set in the special electric role opening/closing switching frequency counter is newly set in the special electric role opening/closing switching frequency counter.

(Big winning opening control process)
Next, the big prize opening control process executed in step S10-3 will be explained.
FIG. 25 is a flowchart showing the big winning opening control process.
When the big prize opening control process is executed in step S10-3, as shown in FIG. 25, first, the process moves to step S16-1.
In step S16-1, it is determined whether or not the value of the special game timer is "0". If it is determined that the value of the special game timer is "0" (Yes), the process proceeds to step S16-2. If it is determined that the value of the special game timer is not "0" (No), the process moves to step S16-4.
In step S16-2, it is determined whether the value of the special electric role opening/closing switching number counter is "0" or not, and if it is determined that the value of the special electric role opening/closing switching number counter is not "0" (No) The process moves to step S16-3, and if it is determined that the value of the special electric role opening/closing switching counter is "0" (Yes), the process moves to step S16-5.
In step S16-3, special electric role opening/closing switching processing (see FIG. 24) is executed, and the process moves to step S16-4.
In step S16-4, it is determined whether the value of the special electric prize winning number counter has reached a predetermined upper limit (in this embodiment, 10 [balls]), and the value of the special electric prize winning number counter has reached a predetermined upper limit value (10 [balls] in this embodiment). If it is determined that the upper limit has been reached (Yes), the process moves to step S16-5, and if it is determined that the value of the special electric award winning number counter has not reached the predetermined upper limit (No) Then, the series of processes is completed and the process moves to the next process (step S4-14).

In step S16-5, a big prize opening control end process is executed, and the process moves to step S16-6. In the grand prize opening control end process, solenoid control data specifying energization stop is set in a predetermined area of the RAM 230. As a result, the special electric accessory 53a is controlled to be in the closed state.
In step S16-6, a big prize opening closing effective time setting process is executed, and the process moves to step S16-7. In the special winning opening closing valid time setting process, the special electric winning opening control table set in the special electric winning opening control table area of the RAM 230 is referred to, and the predetermined big winning opening closing valid time (interval time) is set to the special game timer. Set to .
In step S16-7, a round end designation command setting process is executed, and the process moves to step S16-8. In the round end designation command setting process, the round end designation command is stored in the subcommand output request buffer.
In step S16-8, a special game phase update process is executed, the series of processes is completed, and the process moves to the next process (step S4-14). In the special game phase update process, a value corresponding to the "big winning opening closing valid state" is set in the special game phase flag area of the RAM 230.

(Big prize opening closure effective processing)
Next, the big winning opening closing validating process executed in step S10-3 will be explained.
FIG. 26 is a flowchart showing the big winning opening closing effective process.
When the big winning opening closing validating process is executed in step S10-3, as shown in FIG. 26, first, the process moves to step S17-1.
In step S17-1, it is determined whether or not the value of the special game timer is "0". If it is determined that the value of the special game timer is "0" (Yes), the process proceeds to step S17-2. If it is determined that the value of the special game timer is not "0" (No), the series of processes is ended and the process moves to the next process (step S4-14).

In step S17-2, it is determined whether the value of the special electric role continuous operation number counter has reached a specified value, and if it is determined that the value of the special electric role continuous operation number counter has not reached the specified value (No. ), the process moves to step S17-3, and if it is determined that the value of the special power continuous operation counter has reached the specified value (Yes), the process moves to step S17-5.
Here, with reference to the special electric role control table set in the special electric role control table area of the RAM 230, the number of round games specified in the special electric role control table is obtained as a specified value and the determination is made. .
In step S17-3, a big prize opening closing time setting process is executed, and the process moves to step S17-4. In the big winning opening closing time setting process, the special winning opening control table set in the special winning opening control table area of the RAM 230 is referred to, and a predetermined big winning opening closing time is set in the special game timer.
In step S17-4, a special game phase update process is executed, the series of processes is completed, and the process moves to the next process (step S4-14). In the special game phase update process, a value corresponding to the "state before opening the big winning hole" is set in the special game phase flag area of the RAM 230.

In step S17-5, ending time setting processing is executed, and the process moves to step S17-6. In the ending time setting process, the special power win control table set in the special power win control table area of the RAM 230 is referred to, and a predetermined ending time is set in the special game timer.
In step S17-6, ending designation command setting processing is executed, and the process moves to step S17-7. In the ending specification command setting process, the ending specification command is stored in the subcommand output request buffer.
In step S17-7, a special game phase update process is executed, the series of processes is completed, and the process moves to the next process (step S4-14). In the special game phase update process, a value corresponding to the "big winning opening end wait state" is set in the special game phase flag area of the RAM 230.

(Big prize opening end wait processing)
Next, the big winning opening opening end wait process executed in step S10-3 will be explained.
FIG. 27 is a flowchart showing the big winning opening opening end wait process.
When the big winning opening opening end wait process is executed in step S10-3, as shown in FIG. 27, the process first moves to step S18-1.
In step S18-1, it is determined whether or not the value of the special game timer is "0". If it is determined that the value of the special game timer is "0" (Yes), the process proceeds to step S18-2. If it is determined that the value of the special game timer is not "0" (No), the series of processes is ended and the process moves to the next process (step S4-14).

In step S18-2, a gaming state setting process is executed, and the process moves to step S18-3. In the game state setting process, a game state is set.
Specifically, in the game state setting process, the value of the special symbol high probability state flag in the RAM 230 is set according to the type of the stopped symbol (jackpot symbol).
At this time, if the type of the stopped symbol is "1 jackpot symbol" or "3 jackpot symbols" to "5 jackpot symbols", "1" is set in the special symbol high probability state flag area of the RAM 230. On the other hand, when the type of the stopped symbol is "2 jackpot symbols" or "6 jackpot symbols", "0" is set in the special symbol high probability state flag area of the RAM 230.
Next, a predetermined number of times of time saving is set in the time saving counter. At this time, if the type of the stop symbol is "2 jackpot symbols" or "6 jackpot symbols", 100 [times] is set as the predetermined time saving number. On the other hand, when the type of the stop symbol is "1 jackpot symbol" or "3 jackpot symbols" to "5 jackpot symbols", 10000 [times] is set as the predetermined time saving number. Further, "1" is set in the time saving control flag area of the RAM 230.
Next, a value corresponding to the type of jackpot symbol is set in the previous jackpot symbol flag area of the RAM 230.
In step S18-3, a special game phase update process is executed, a series of processes is completed, and the process moves to the next process (step S4-14). In the special game phase update process, a value corresponding to the "special symbol fluctuation waiting state" is set in the special game phase flag area of the RAM 230.

(Normal game management processing)
Next, the normal game management process in step S4-14 will be explained.
FIG. 28 is a flowchart showing the normal game management process.
Here, in this embodiment, as a phase/stage (hereinafter referred to as "normal game phase") of a game executed based on the normal symbol lottery (hereinafter referred to as "normal game"), "waiting for normal symbol fluctuation""State","Public figure fluctuating state", "Public figure stopped symbol display state", "Public figure electrical accessory opening state", "Public figure electric accessory opening control state", "Public figure electric accessory closing effective" Seven states are defined: ``state'' and ``common electric accessories release end wait state''.
Then, in the normal game phase flag area of the RAM 230, a value (normal game phase flag) corresponding to one of the seven normal game phases is set.
Further, the ROM 220 stores a normal game control module (program) corresponding to each normal game phase as a normal game control module (program) for controlling (executing) the normal game.
In the normal game management process, a normal game control module corresponding to the value set in the normal game phase flag area of the RAM 230 is selected, and processing based on the selected normal game control module is executed.

Specifically, when the normal game management process is executed in step S4-14, as shown in FIG. 28, the process first moves to step S19-1.
In step S19-1, a normal game phase acquisition process is executed, and the process moves to step S19-2. In the normal game phase acquisition process, the value (normal game phase) set in the normal game phase flag area of the RAM 230 is acquired (loaded).
In step S19-2, a normal game control module acquisition process is executed, and the process moves to step S19-3. In the normal game control module acquisition process, the normal game control module corresponding to the value (normal game phase) acquired in step S19-1 is read.

In step S19-3, a normal game control module execution process is executed, a series of processes is completed, and the process moves to the next process (step S4-15). In the normal game control module execution process, processing based on the normal game control module read in step S19-2 is started.
Specifically, if the value acquired in step S19-1 is a value corresponding to the "normal pattern fluctuation waiting state", a general pattern fluctuation waiting process to be described later is started, and the process corresponds to the "normal pattern fluctuation state". If it is a value, the process during normal pattern fluctuation will be started, which will be described later.If the value corresponds to the ``normal pattern stopped symbol display state'', the process during normal pattern fluctuation, which will be described later, will be started, If the value corresponds to the "normal electric accessory release control state", the normal electric accessory release pre-processing described below is started, and if the value corresponds to the "normal electric accessory release control state", the normal electric accessory release control processing described later is started. If the value corresponds to the "normal electric accessory closing valid state", the normal electric accessory closing valid processing described later is started, and if the value corresponds to the "normal electric accessory opening end wait state" , a normal electric accessory opening end wait process, which will be described later, is started.

(Public figure fluctuation waiting process)
Next, the normal pattern fluctuation waiting process executed in step S19-3 will be explained.
FIG. 29 is a flowchart showing the normal pattern fluctuation waiting process.
When the ordinary figure fluctuation waiting process is executed in step S19-3, as shown in FIG. 29, the process first moves to step S20-1.
In step S20-1, it is determined whether the value of the general figure reservation number counter is "1" or more, and if it is determined that the value of the general figure reservation number counter is "1" or more (Yes), , the process moves to step S20-2, and if it is determined that the value of the general figure reservation counter is not greater than "1" (No), the series of processes is ended and the process moves to the next process (step S4-15). do.

In step S20-2, a process for updating the number of reserved general drawings is executed, and the process moves to step S20-3. In the general map reservation number update process, the general map reservation number is updated.
Specifically, in the process of updating the number of reserved ordinary figures, first, "1" is subtracted from the value of the ordinary figure reserved number counter.
Next, the storage area where the general game information is stored is shifted. Specifically, the storage contents of storage area 1 of the standard game information storage area are shifted (moved) to storage area 0. Next, the storage contents of storage area 2 of the standard game information storage area are shifted to storage area 1 of the standard game information storage area. Next, the storage contents of the storage area 3 of the standard game information storage area are shifted to the storage area 2 of the standard game information storage area. Next, the storage contents of the storage area 4 of the standard game information storage area are shifted to the storage area 3 of the standard game information storage area. Next, the storage contents of the storage area 4 of the standard game information storage area are cleared (initialized).

In step S20-3, a normal pattern win/loss determination process is executed, and the process moves to step S20-4. In the normal symbol winning/losing determination process, the result of the normal symbol lottery is determined (common symbol winning/losing determination).
The ROM 220 stores a regular symbol winning/losing lottery table in which the winning values of the regular symbol lottery are registered. Further, as the normal symbol winning/losing lottery table, a common symbol winning/losing lottery table that corresponds to when the time saving control is being executed and a common symbol winning/losing lottery table that corresponds to when the time saving control is stopped are stored.
In the common symbol winning/losing lottery table corresponding to when the time saving control is stopped, winning values are registered so that the probability of winning becomes the first probability (in this embodiment, 1/99). On the other hand, in the common symbol winning/losing lottery table corresponding to the execution of the time saving control, the winning value is registered so that the winning probability is a second probability (in this embodiment, 1/1) that is higher than the first probability. ing.
In the winning/losing determination process for winning/losing coins, a winning random number included in the game information stored in storage area 0 and a winning/losing lottery table for coins corresponding to the current execution status of the time saving control (in progress or stopped), Based on this, the winning/losing determination of the normal pattern is executed.
Specifically, when the value of the winning random number included in the game information stored in the storage area 0 matches the winning value, the result of the normal symbol lottery is determined to be a "win" (winning).
On the other hand, when the value of the winning random number included in the game information stored in the storage area 0 does not match the winning value, the result of the normal symbol lottery is determined to be a "miss" (lost).

In step S20-4, a normal pattern stop symbol determination process is executed, and the process moves to step S20-5. In the normal pattern stop pattern determination process, the type (stop pattern number) of the normal pattern is determined (normal pattern stop pattern determination).
Specifically, in the normal pattern stopping pattern determination process, if it is determined as a "hit" (winning) by the normal pattern winning/losing judgment, the "normal pattern winning pattern" is set as the type of the stopping pattern (stopping pattern number). judge.
On the other hand, if it is determined as a "lost" (lost) by the winning/losing judgment of the normal symbol, a "losing symbol" is determined as the type of the stopped symbol (stopped symbol number).
Next, the determined type of stopped symbol (stopped symbol number) is stored in the stopped symbol storage area of the RAM 230.
In step S20-5, a normal figure fluctuation pattern determination process is executed, and the process moves to step S20-6. In the normal pattern variation pattern determination process, the type (variation pattern number) of the variation pattern of the normal symbol is determined (common pattern variation pattern determination).
Specifically, in the general pattern fluctuation pattern determination process, when the time saving control is stopped, the first type (in this embodiment, 2.0 The type corresponding to the variation time of [s] is determined.
On the other hand, when the time saving control is being executed, the second type (in this embodiment, the type corresponding to a fluctuation time of 0.5 [s]) is selected as the type of the regular pattern fluctuation pattern (fluctuation pattern number). Determine.

In step S20-6, a normal figure fluctuation time setting process is executed, and the process moves to step S20-7. In the ordinary figure fluctuation time setting process, the fluctuation time corresponding to the type (variation pattern number) of the ordinary figure fluctuation pattern determined in step S20-6 is acquired. Then, the obtained variable time is set in the normal game timer.
In step S20-7, a general figure fluctuation display data setting process is executed, and the process moves to step S20-8. In the ordinary figure fluctuation display data setting process, data for controlling the variable display of the ordinary figure display device is set.
Specifically, in the ordinary figure fluctuation display data setting process, first, a predetermined display time is set in the ordinary figure display timer.
Next, a predetermined initial value is set in the ordinary figure display symbol counter. As a result, among the predetermined number of segments constituting the ordinary figure display device, lighting of the segment corresponding to the value of the ordinary figure display symbol counter is controlled.
Next, predetermined segment data is set as segment data corresponding to the general map display device. As a result, the lighting of the segment corresponding to the set segment data among the predetermined number of segments constituting the general map display device is controlled.
In step S20-8, a normal game phase update process is executed, a series of processes is completed, and the process moves to the next process (step S4-15). In the normal game phase update process, a value corresponding to the "normal figure fluctuating state" is set in the normal game phase flag area of the RAM 230.

(Processing during general figure fluctuation)
Next, the normal pattern fluctuation process executed in step S19-3 will be explained.
FIG. 30 is a flowchart showing the normal pattern fluctuation process.
When the ordinary figure fluctuation process is executed in step S19-3, as shown in FIG. 30, the process first moves to step S21-1.
In step S21-1, it is determined whether the value of the normal game timer is "0" or not, and if it is determined that the value of the normal game timer is not "0" (No), the process moves to step S21-2. However, if it is determined that the value of the normal game timer is "0" (Yes), the process moves to step S21-4.
In step S21-2, it is determined whether the value of the general figure display timer is "0" or not, and if it is determined that the value of the general figure display timer is "0" (Yes), step S21- 3, and if it is determined that the value of the general figure display timer is not "0" (No), the series of processes is ended and the process moves to the next process (step S4-15).
In step S21-3, a regular figure fluctuation display data update process is executed, and the series of processes is completed and the process moves to the next process (step S4-15). In the ordinary figure fluctuation display data update process, data for controlling the variable display of the ordinary figure display device is updated.
Specifically, in the normal pattern fluctuation display data update process, "1" is added to the value of the normal pattern display symbol counter.

In step S21-4, ordinary figure stop display data setting processing is executed, and the process moves to step S21-5. In the ordinary figure stop display data setting process, data for controlling the stop display of the ordinary figure display device is set.
Specifically, in the normal symbol stop display data setting process, the stopped symbol number stored in the stopped symbol storage area of the RAM 230 is acquired.
Next, the acquired stop symbol number is set as the value of the ordinary symbol display symbol counter. As a result, among the predetermined number of segments constituting the ordinary figure display device, the segment corresponding to the value of the ordinary figure display symbol counter is controlled to be lit (displayed in a stopped state).
In step S21-5, a normal figure stop time setting process is executed, and the process moves to step S21-6. In the normal figure stop time setting process, a predetermined stop time is set in the normal game timer.
In step S21-6, a normal game phase update process is executed, a series of processes is completed, and the process moves to the next process (step S4-15). In the normal game phase update process, a value corresponding to the "normal pattern stop symbol display state" is set in the normal game phase flag area of the RAM 230.

(Processing during general map suspension)
Next, the general map stop process executed in step S19-3 will be explained.
FIG. 31 is a flowchart showing the normal map stop processing.
When the general map stop process is executed in step S19-3, as shown in FIG. 31, the process first moves to step S22-1.
In step S22-1, it is determined whether or not the value of the normal game timer is "0". If it is determined that the value of the normal game timer is "0" (Yes), the process proceeds to step S22-2. If it is determined that the value of the normal game timer is not "0" (No), the series of processes is ended and the process moves to the next process (step S4-15).
In step S22-2, it is determined whether or not the stopped symbol is a "symbol per common symbol", and if it is determined that the stopped symbol is not a "symbol per common symbol" (No), the process moves to step S22-3. However, if it is determined that the stopped symbol is a "normal symbol" (Yes), the process moves to step S22-4.
In step S22-3, a normal game phase update process is executed, a series of processes is completed, and the process moves to the next process (step S4-15). In the normal game phase update process, a value corresponding to the "normal pattern fluctuation waiting state" is set in the normal game phase flag area of the RAM 230.
In step S22-4, a normal electric utility control data setting process is executed, and the process moves to step S22-5. In the normal electric accessory control data setting process, control data for controlling the opening and closing of the ordinary electric accessory 52a is set.
The ROM 220 stores a normal electric utility control table corresponding to the execution status (in execution or stopped) of time saving control. Each normal power control table contains the time before normal power opening, normal power closing effective time, open end wait time, number of open/close switches, and control data (solenoid control data, control time) corresponding to each open/close switch. data) etc. are specified.
In the ordinary electric utility control data setting process, the ordinary electric utility control table corresponding to the execution status of the time saving control (running or stopped) is read out, and the read ordinary electric utility control table is stored in the ordinary electric utility control table area of the RAM 230. Set.
Next, with reference to the normal power control table set in the normal power control table area of the RAM 230, the number of opening/closing switching is read out. Then, the read-out switching frequency is set in the normal power switching switching frequency counter. In addition, "0" is set as the value of the number of ordinary winnings counter.

In step S22-5, a normal power role release pre-release time setting process is executed, and the process moves to step S22-6. In the normal power role pre-release time setting process, the normal power role control table set in the normal power role control table area of the RAM 230 is referred to, and a predetermined normal power role pre-release time is set in the normal game timer.
In step S22-6, a normal game phase update process is executed, the series of processes is completed, and the process moves to the next process (step S4-15). In the normal game phase update process, a value corresponding to the "normal electric accessory pre-release state" is set in the normal game phase flag area of the RAM 230.

(Normal electric accessory release pre-processing)
Next, the normal electric accessory release preprocessing executed in step S19-3 will be explained.
FIG. 32 is a flowchart showing the normal electric accessory opening pre-processing.
When the normal electric accessory release preprocessing is executed in step S19-3, as shown in FIG. 32, the process first moves to step S23-1.
In step S23-1, it is determined whether or not the value of the normal game timer is "0". If it is determined that the value of the normal game timer is "0" (Yes), the process proceeds to step S23-2. If it is determined that the value of the normal game timer is not "0" (No), the series of processes is ended and the process moves to the next process (step S4-15).
In step S23-2, a normal power opening/closing switching process is executed, and the process moves to step S23-3. The normal power opening/closing switching process will be described later.
In step S23-3, a normal game phase update process is executed, a series of processes is completed, and the process moves to the next process (step S4-15). In the normal game phase update process, a value corresponding to the "normal electric accessory opening control state" is set in the normal game phase flag area of the RAM 230.

(Normal power opening/closing switching process)
Next, the normal power opening/closing switching processing in steps S23-2 and S25-3 will be explained.
FIG. 33 is a flowchart showing the normal power opening/closing switching process.
When the normal power opening/closing switching process is executed in steps S23-2 and S25-3, as shown in FIG. 33, the process first moves to step S24-1.
In step S24-1, it is determined whether the value of the normal electric role opening/closing switching number counter is "0" or not, and if it is determined that the value of the ordinary electric role opening/closing switching number counter is not "0" (No) The process moves to step S24-2, and if it is determined that the value of the normal electric switch opening/closing switching counter is "0" (Yes), the series of processes is ended and the next process (step S23-3 Or move on to S25-4).
In step S24-2, a normal electric utility control data setting process is executed, and the process moves to step S24-3. In the normal electric accessory control data setting process, control data for controlling the ordinary electric accessory 52a to an open state or a closed state is set.
Specifically, in the normal power control data setting process, the normal power control table set in the normal power control table area of the RAM 230 is referred to, and the solenoid corresponding to the value of the normal power opening/closing switching counter is set. Read control data. Then, the read solenoid control data (control data specifying energization or de-energization) is set in a predetermined area of the RAM 230. As a result, control of the normal electric accessory solenoid 64 based on the set solenoid data is started, and the normal electric accessory 52a is controlled to be in an open state or a closed state.

In step S24-3, a normal power control time setting process is executed, and the process moves to step S24-4. In the normal power control time setting process, a control time for continuing control based on the solenoid control data set in step S24-2 is set.
Specifically, in the normal power control time setting process, the normal power control table set in the normal power control table area of the RAM 230 is referred to, and the control corresponding to the value of the normal power opening/closing switching counter is performed. Read out the time. Then, the read control time is set in the normal game timer.
In step S24-4, a process for updating a counter for the number of times the switch is switched to normal electric power is executed, and the series of processes is completed to proceed to the next process (step S23-3 or S25-4). In the normal electric role opening/closing switching frequency counter updating process, a value obtained by subtracting "1" from the value set in the normal electric role opening/closing switching frequency counter is newly set in the normal electric role opening/closing switching frequency counter.

(Normal electric accessory release control process)
Next, the normal electric accessory release control process executed in step S19-3 will be explained.
FIG. 34 is a flowchart showing the normal electric accessory opening control process.
When the normal electric accessory opening control process is executed in step S19-3, as shown in FIG. 34, the process first moves to step S25-1.
In step S25-1, it is determined whether the value of the normal game timer is "0" or not. If it is determined that the value of the normal game timer is "0" (Yes), the process proceeds to step S25-2. If it is determined that the value of the normal game timer is not "0" (No), the process moves to step S25-4.
In step S25-2, it is determined whether the value of the normal electric role opening/closing switching number counter is "0" or not, and if it is determined that the value of the ordinary electric role opening/closing switching number counter is not "0" (No) The process moves to step S25-3, and if it is determined that the value of the normal power opening/closing switching counter is "0" (Yes), the process moves to step S25-5.
In step S25-3, a normal power opening/closing switching process (see FIG. 33) is executed, and the process moves to step S25-4.
In step S25-4, it is determined whether or not the value of the ordinary electricity prize winning number counter has reached a predetermined upper limit value (in this embodiment, 3 [balls]), and the value of the ordinary electricity winning prize number counter reaches a predetermined value. If it is determined that the upper limit value has been reached (Yes), the process moves to step S25-5, and if it is determined that the value of the ordinary electric award winning number counter has not reached the predetermined upper limit value (No). Then, the series of processes is completed and the process moves to the next process (step S4-15).

In step S25-5, normal power release control termination processing is executed, and the process moves to step S25-6. In the normal power release control termination process, solenoid control data specifying energization stop is set in a predetermined area of the RAM 230. As a result, the normal electric accessory 52a is controlled to be in the closed state.
In step S25-6, a normal power closure effective time setting process is executed, and the process moves to step S25-7. In the normal power role closing valid time setting process, the normal power role closing valid time is set in the normal game timer with reference to the normal power role control table set in the normal power role control table area of the RAM 230.
In step S25-7, a normal game phase update process is executed, the series of processes is completed, and the process moves to the next process (step S4-15). In the normal game phase update process, a value corresponding to the "normal electric accessory closing valid state" is set in the normal game phase flag area of the RAM 230.

(Normal electric accessory closure effective processing)
Next, the ordinary electrically powered accessory closure validating process executed in step S19-3 will be explained.
FIG. 35 is a flowchart showing the normal electric accessory closure validating process.
When the normal electric accessory closure validating process is executed in step S19-3, as shown in FIG. 35, the process first moves to step S26-1.
In step S26-1, it is determined whether or not the value of the normal game timer is "0". If it is determined that the value of the normal game timer is "0" (Yes), the process proceeds to step S26-2. If it is determined that the value of the normal game timer is not "0" (No), the series of processes is ended and the process moves to the next process (step S4-15).
In step S26-2, an open end wait time setting process is executed, and the process moves to step S26-3. In the release end wait time setting process, a predetermined release end wait time is set in the normal game timer with reference to the normal power role control table set in the normal power role control table area of the RAM 230.
In step S26-3, a normal game phase update process is executed, a series of processes is completed, and the process moves to the next process (step S4-15). In the normal game phase update process, a value corresponding to the "normal electric accessory release end wait state" is set in the normal game phase flag area of the RAM 230.

(Normal electric accessory release end wait processing)
Next, the normal electric accessory opening end wait process executed in step S19-3 will be explained.
FIG. 36 is a flowchart showing the normal electric accessory opening end wait process.
When the normal electric accessory release end wait process is executed in step S19-3, as shown in FIG. 36, the process first moves to step S27-1.
In step S27-1, it is determined whether the value of the normal game timer is "0" or not. If it is determined that the value of the normal game timer is "0" (Yes), the process proceeds to step S27-2. If it is determined that the value of the normal game timer is not "0" (No), the series of processes is ended and the process moves to the next process (step S4-15).
In step S27-2, a normal game phase update process is executed, a series of processes is completed, and the process moves to the next process (step S4-15). In the normal game phase update process, a value corresponding to the "normal pattern fluctuation waiting state" is set in the normal game phase flag area of the RAM 230.

(Performance display device control processing)
Next, the performance display device control process in step S4-25 will be explained.
FIG. 37 is a flowchart showing performance display device control processing.
The performance display device control process is a process based on a program for controlling the display of the performance display device 206. That is, the performance display device control process is based on a program stored in the unused area m2 (program area) of the ROM 220. The performance display device control process is called during execution of the timer interrupt process.
When the performance display device control process is called in step S4-25, the process moves to step S38-1, as shown in FIG. 37.
In step S38-1, register saving processing is executed, and the process moves to step S38-2. In the register saving process, the values of all the registers used during the execution of the process based on the program stored in the used area m1 are saved to the saving area of the RAM. Further, all the stack pointer values used during execution of the process based on the program stored in the used area m1 are saved to the save area of the RAM.

In step S38-2, it is determined whether or not a game-enabled state has occurred (set), and if it is determined that a game-enabled state has occurred (Yes), the process moves to step S38-3, and the game If it is determined that the possible state has not occurred (No), the process moves to step S38-11.
Here, based on the value (gaming machine state flag) stored in the gaming machine state flag area of the RAM 230, it is determined whether or not a game enabled state has occurred. At this time, if the value stored in the gaming machine state flag area is a value corresponding to a game-enabled state, it is determined that a game-enabled state has occurred, and if the value does not correspond to a game-enabled state, the game It is determined that the possible state has not occurred.
In step S38-3, total out counter addition processing is executed, and the process moves to step S38-4.
In the total count counter addition process, it is determined whether the on state of the out switch 109 is detected. If it is determined that the on state of the out switch 109 has been detected, "1" is added to the value of the total out counter. On the other hand, if it is determined that the on state of the out switch 109 is not detected, the value of the total out counter is not added.

In step S38-4, it is determined whether or not the game is in a predetermined game state. If it is determined that the game is in a predetermined game state (Yes), the process moves to step S38-5, and it is determined that the game is not in a predetermined game state. If so (No), the process moves to step S38-7.
Here, the "predetermined gaming state" is a gaming state in which the "special figure low probability state" is occurring, the time saving control is stopped, and the jackpot gaming state is not occurring. .
In step S38-5, normal out counter addition processing is executed, and the process moves to step S38-6.
In the normal out counter addition process, it is determined whether the on state of the out switch 109 is detected. If it is determined that the on state of the out switch 109 has been detected, "1" is added to the value of the normal out counter. On the other hand, if it is determined that the on state of the out switch 109 has not been detected, the value of the out counter is not normally added.

In step S38-6, a normal prize ball counter addition process is executed, and the process moves to step S38-7.
In the normal prize ball counter addition process, first, it is determined whether or not the on state of the special figure 1 starting port switch 101 is detected. When it is determined that the on state of the special figure 1 starting port switch 101 is detected, the value of the normal prize ball counter is equal to the number of prize balls paid out according to the entry of game balls into the first starting port 51. Add "3". On the other hand, if it is determined that the ON state of the special figure 1 starting port switch 101 is not detected, the value of the normal prize ball counter is not added.
Next, it is determined whether the on state of the special figure 2 starting port switch 102 has been detected. When it is determined that the on state of the special figure 2 starting port switch 102 is detected, the value of the normal prize ball counter is the number of prize balls paid out according to the entry of game balls into the second starting port 52. Add "1". On the other hand, if it is determined that the ON state of the special figure 2 starting port switch 102 is not detected, the value of the normal prize ball counter is not added.
Next, it is determined whether or not the on state of the right winning port switch 105 has been detected. Then, when it is determined that the on state of the right winning hole switch 105 is detected, the value of the normal prize ball counter is added to "10" which is the number of prize balls paid out according to the entry of game balls into the right winning hole 54. ” is added. On the other hand, if it is determined that the on state of the right winning hole switch 105 is not detected, the value of the normal prize ball counter is not added.
Next, it is determined whether the on state of the left winning port switch 106 has been detected. Then, when it is determined that the ON state of the left winning hole switch 106 is detected, the value of the normal prize ball counter is the number of prize balls paid out according to the entry of game balls into the other left winning holes 55 to 57. Add "10". On the other hand, if it is determined that the on state of the left winning hole switch 106 is not detected, the value of the normal prize ball counter is not added.

In step S38-7, it is determined whether the value of the total out counter has reached the reference value, and if it is determined that the value of the total out counter has reached the reference value (Yes), step S38-8 If it is determined that the value of the total out counter has not reached the reference value (No), the process moves to step S38-9.
In this embodiment, the reference value=60000×n (n=integer). Note that "n" is a value indicating the current section, and "1" is set as the initial value.
In step S38-8, section update processing is executed, and the process moves to step S38-9. In the section update process, the section is updated.
In the section update process, first, the base ratio stored in base value buffer 1 of RAM 230 is shifted (moved) to base value buffer 2 of RAM 230.
Next, a predetermined initial value (in this embodiment, "0") is set as the value of the normal out counter. Further, a predetermined initial value (in this embodiment, "0") is set as the value of the normal prize ball counter.
Next, "1" is added to the value (n) indicating the current section. This updates the reference value.
In step S38-9, base ratio calculation processing is executed, and the process moves to step S38-10. In the base ratio calculation process, a base ratio is calculated.
Specifically, in the base ratio calculation process, the base ratio is calculated based on the value of the normal out counter and the value of the normal prize ball counter. Then, the calculated base ratio is stored in the base value buffer 1 of the RAM 230.
Here, the base ratio is the ratio of the value of the normal prize ball counter to the value of the normal out counter.

In step S38-10, a base ratio display data setting process is executed, and the process moves to step S38-11. In the base ratio display data setting process, display data to be output to the performance display device 206 is set.
The RAM 230 is provided with an identification segment output request buffer (16 bits) and a ratio segment output request buffer (16 bits).
In the base ratio display data setting process, first, which base ratio is to be displayed is selected from among the base ratio of the current section and the base ratio of the previous section.
Then, when displaying the base ratio of the current section is selected, information indicating that it is the base ratio of the current section is set in the identification segment output request buffer, and information indicating the base ratio of the current section is set. Set in the ratio segment output request buffer.
Specifically, the display data (8 bits) of "b" is set to the upper 8 bits of the identification segment output request buffer, and the display data (8 bits) of "b" is set to the lower 8 bits of the identification segment output request buffer. , set the display data corresponding to the tens digit of the base ratio stored in base value buffer 1 to the upper 8 bits of the ratio segment output request buffer, and set the display data corresponding to the tens digit of the base ratio stored in base value buffer 1 to The display data corresponding to the ones digit is set in the lower 8 bits of the ratio segment output request buffer.
As a result, among the light emitting elements constituting the performance display device 206, the letter "b" is displayed by LED33 to LED40, the letter "b" is displayed by LED41 to LED48, and the current value is displayed by LED49 to LED56. A number indicating the tens digit of the base ratio is displayed, and a number indicating the one digit of the current base ratio is displayed by the LEDs 57 to 64.

On the other hand, if you select to display the base ratio of the previous section, information indicating that it is the base ratio of the previous section is set in the identification segment output request buffer, and information indicating the base ratio of the previous section is set in the identification segment output request buffer. Set in the ratio segment output request buffer.
Specifically, the display data (8 bits) of "b" is set to the upper 8 bits of the identification segment output request buffer, and the display data (8 bits) of "c" is set to the lower 8 bits of the identification segment output request buffer. , set the display data corresponding to the tens digit of the base ratio stored in base value buffer 2 to the upper 8 bits of the ratio segment output request buffer, and set the display data corresponding to the tens digit of the base ratio stored in base value buffer 2 to the base ratio stored in base value buffer 2. The display data corresponding to the ones digit is set in the lower 8 bits of the ratio segment output request buffer.
As a result, among the light emitting elements constituting the performance display device 206, the letter "b" is displayed by LED33 to LED40, the letter "c" is displayed by LED41 to LED48, and the current value is displayed by LED49 to LED56. A number indicating the tens digit of the base ratio is displayed, and a number indicating the one digit of the current base ratio is displayed by the LEDs 57 to 64.

In step S38-11, register restoration processing is executed, and the process moves to step S38-12. In the register restoration process, the value of the register saved in step S38-1 (the value of the register used during the execution of the process based on the program stored in the used area m1) and the value of the register saved in step S38-1 are The saved stack pointer value (the stack pointer value used during execution of the process based on the program stored in the used area m1) is restored.
In step S38-12, interrupt permission processing is executed, the series of processing ends, and the process moves to the next processing (step S4-26). In the interrupt enable process, the interrupt disabled state is canceled. This allows execution of power-off save processing, timer interrupt processing, and the like.

(Various effects performed on pachinko machine 1)
Next, various performances executed in the pachinko machine 1 will be explained.

(Holding performance)
First, the hold performance (hold display) executed in the pachinko machine 1 will be explained.
In the pachinko machine 1, each game information (special figure 1 game information or special figure 2 game information) stored in the game information storage area (special figure 1 game information storage area and special figure 2 game information storage area) is The pending performance is executed.
A suspended performance means that the notification display (start judgment) of a special symbol based on the game information targeted for the suspended performance (hereinafter referred to as "game information subject to suspended performance") is suspended, or the suspended performance The effect is to suggest (notify) that a notification display of a special symbol based on target game information is being executed.
In the pending performance, a pending symbol h corresponding to the game information subject to the pending performance is displayed in the pending symbol display areas b1 to b3.

Specifically, in the reserved symbol display area b2, the four storage areas (storage area 1 to storage area 4) of the special figure 1 game information storage area are set as the display position (display part) where the reserved symbol h is displayed. Display positions corresponding to each are defined.
In addition, in the reserved symbol display area b3, the display position (display part) where the reserved symbol h is displayed corresponds to each of the four storage areas (storage area 1 to storage area 4) of the special drawing 2 game information storage area. The display position is specified.
Then, in a pending performance in which the special figure 1 game information is the target pending performance game information, a pending symbol h corresponding to the pending performance target game information is displayed in the pending symbol display areas b1 and b2.

That is, during the period in which the game information subject to pending performance is stored in the special figure 1 game information storage area (storage area 1 to storage area 4) (after the game information subject to pending performance is acquired, the start based on the game information subject to pending performance is (during the period before execution of the determination), in the pending symbol display area b2, a pending symbol h corresponding to the pending performance target game information is displayed.
At this time, the pending symbol h corresponding to the pending performance target game information is displayed at the display position corresponding to the storage area (storage area 1 to storage area 4) in which the suspended performance target game information is stored.
On the other hand, during the period in which the game information subject to pending performance is stored in storage area 0 (the period from the execution of the start determination based on the game information subject to pending performance to the end of the notification display of special symbols based on the game information subject to pending performance In the middle), a pending symbol h corresponding to the pending performance target game information is displayed in the pending symbol display area b1.
On the other hand, in a pending performance using the special figure 2 game information as the pending performance target game information, a pending symbol h corresponding to the pending performance target game information is displayed in the pending symbol display areas b1 and b3.
That is, during the period in which the game information subject to pending performance is stored in the special figure 2 game information storage area (storage area 1 to storage area 4) (after the game information subject to pending performance is acquired, the start based on the game information subject to pending performance is During the period before the execution of the determination), the pending symbol h corresponding to the pending performance target game information is displayed in the pending symbol display area b3.
At this time, the pending symbol h corresponding to the pending performance target game information is displayed at the display position corresponding to the storage area (storage area 1 to storage area 4) in which the suspended performance target game information is stored.
On the other hand, during the period in which the game information subject to pending performance is stored in storage area 0 (the period from the execution of the start determination based on the game information subject to pending performance to the end of the notification display of special symbols based on the game information subject to pending performance In the middle), a pending symbol h corresponding to the pending performance target game information is displayed in the pending symbol display area b1.

For example, the various random numbers obtained in step S9-3 are stored as special figure 1 game information in the storage area 3 of the special figure 1 game information storage area, and a pending performance targeting the special figure 1 game information is executed. In this case, in response to the start of the pending performance, the pending symbol h corresponding to the pending performance target game information is displayed at the display position corresponding to the storage area 3 of the pending symbol display area b2.
Thereafter, in response to the storage area for storing the game information subject to pending performance being shifted from the storage area 3 to the storage area 2, the display area of the pending symbol h corresponding to the game information subject to pending performance is shifted from the storage area 3 to the storage area 2. is shifted from the display position corresponding to storage area 2 to the display position corresponding to storage area 2.
In addition, in response to the storage area for storing the game information subject to pending performance being shifted from the storage area 2 to the storage area 1, the display area of the pending symbol h corresponding to the game information subject to pending performance is shifted from the storage area 2 to the storage area 1. is shifted from the display position corresponding to storage area 1 to the display position corresponding to storage area 1.
Furthermore, in response to the storage area for storing the game information subject to pending effect being shifted from the special figure 1 game information storage area (storage area 1) to the storage area 0, the pending symbol corresponding to the game information subject to pending effect is shifted. The display area of h is shifted from the reserved symbol display area b2 (display position corresponding to storage area 1) to the reserved symbol display area b1.
Then, in accordance with the end of the notification display of the special symbol based on the game information subject to pending performance, the display of the pending symbol h corresponding to the game information subject to pending performance in the pending pattern display area b1 is ended, and thereby the pending performance is ended. do.

In this embodiment, as the types of pending effects, a normal pending presentation and a pending preview presentation are defined.
The "normal pending performance" is a type of pending performance that does not suggest the result of the preliminary determination (step S9-8) based on the game information for the suspended performance.
In this embodiment, as the types (aspects) of the pending symbols h, normal pending and special pending are defined.
In the normal hold performance, the normal hold is displayed as the hold symbol h corresponding to the hold performance target game information.
A normal hold performance is when the game information for the hold performance (special figure 1 game information or special figure 2 game information) is stored in the game information storage area (special figure 1 game information storage area or special figure 2 game information storage area). It is started in response to and terminated in response to the end of the notification display of the special symbol based on the pending performance target game information.

(Pending notice performance)
The "pending notice performance" is a type of advance notice performance. In other words, the pending preview performance is a type of pending performance that suggests the result of the preliminary determination (step S9-8) based on predetermined game information by the aspect of the pending symbol h corresponding to the game information.
In the following explanation, the game information that is the target of the pending preview performance will be referred to as "game information subject to pending preview." Further, the pending symbol h corresponding to the pending advance notice target game information is referred to as the "notice target pending symbol hy".
In this embodiment, the pending notice performance is a performance that suggests the result of advance special symbol determination based on the pending notice target game information (specifically, the possibility of a "jackpot symbol").
It should be noted that the pending notice performance may be configured to suggest the result of advance special symbol variation pattern determination based on the pending notice target game information (specifically, the possibility of "super reach variation").
In the reservation notice performance, a special reservation is displayed as a notice target reservation symbol hy.
In this embodiment, "blue reservation", "green reservation", "purple reservation", and "red reservation" are defined as special reservation modes (types).
In the reservation notice performance, the aspect of the notice target pending symbol hy changes, and the result of the advance judgment based on the reservation notice target game information (specifically, The possibility that a jackpot gaming state will occur is suggested.
Here, the jackpot expectation of each form of special reservation is "red reservation", "purple reservation", "green reservation", "blue reservation" (high jackpot expectation → jackpot expectation It is stipulated to have a low degree of
“Jackpot expectation level” refers to the possibility (degree) of a jackpot gaming state occurring when the mode is selected.

When a hold notice effect is executed, one or more hold change triggers and hold change contents corresponding to each hold change trigger are set. In the reservation notice performance, in response to the arrival of each reservation change opportunity, the aspect of the notice target reservation symbol hy changes according to the reservation change content corresponding to the reservation change opportunity.
The "retention change opportunity" is an opportunity to change the aspect of the advance notice target reservation symbol hy. Moreover, the "retention change content" is the content in which the aspect of the preview target reservation symbol hy changes.
In this embodiment, the timing for changing the hold is defined as the start time of a variable performance corresponding to each piece of advance hold information, the start time of a variable performance corresponding to the game information subject to hold notice, etc. Then, when the suspension notice effect is executed, one or more suspension change triggers are set from among these suspension change triggers.
In this embodiment, the pending notice performance is executed for only the special figure 1 game information out of the special figure 1 game information and the special figure 2 game information.

(Variation effect)
Next, the variable performance executed in the pachinko machine 1 will be explained.
In the following explanation, the first performance symbol z1 displayed in the first performance symbol display area a1 is referred to as a "left symbol", and the first performance symbol z1 displayed in the first performance symbol display area a2 is referred to as a "middle symbol". , the first performance symbol z1 displayed in the first performance symbol display area a3 is defined as a "right symbol".
In addition, in this embodiment, during execution of the variable performance (the first half variable performance and the second half variable performance), the second performance symbol z2 is always variably displayed in the second performance symbol display area a4.

First, each aspect of the first half variation effect will be explained.
In pachinko machine 1, the variation mode numbers include a variation mode number corresponding to "pseudo series non-variation", a variation mode number corresponding to "pseudo series 2 variation", and a variation mode number corresponding to "pseudo series 3 variation". is stipulated.
Further, as the categories (types) of the first half variation performance, "pseudo continuous variation performance", "pseudo continuous 2 variation performance", and "pseudo continuous 3 variation performance" are defined.
Furthermore, one pattern or a plurality of patterns with different presentation contents are defined as patterns (aspects) belonging to each category of first-half variation presentation.
If the variation mode designation command specifies a variation mode number corresponding to "pseudo non-continuous variation", "pseudo non-continuous variation performance" is selected as the category of the first half variation performance. On the other hand, if the variation mode designation command specifies a variation mode number corresponding to "pseudo series 2 variations", "pseudo series 2 variations effect" is selected as the category of the first half variation effect. On the other hand, when the variation mode designation command specifies a variation mode number corresponding to "pseudo series 3 variations", "pseudo series 3 variations effect" is selected as the category of the first half variation effect.

The "pseudo continuous variable performance" includes a display performance in which a normal variable display of the first special symbol z1 is executed in each of the three first performance symbol display areas a1 to a3.
"Normal variable display" is a display in which the types of the first performance symbols z1 displayed at the lottery result display positions of the first performance symbol display areas a1 to a3 are sequentially replaced at a constant tempo.
The "lottery result display position" is the position where the first performance symbol z1 is stopped and displayed in the stop performance.
Specifically, in the "pseudo continuous variation performance", the normal variation display of each symbol is started sequentially in the order of the left symbol, middle symbol, and right symbol.

"Pseudo continuous variation performance"("Pseudo continuous 2 variation performance"/"Pseudo continuous 3 variation performance") is such that during execution of one special symbol variation display, the variation display of the first performance symbol z1 is This is a performance that is performed multiple times. Specifically, the pseudo continuous variation effect is configured to include a plurality of pseudo variation effects.
Here, the "pseudo-continuous two-variation performance" is configured to include two pseudo-variation performances. On the other hand, the "pseudo consecutive 3-variation effect" is configured to include three pseudo-variation effects.
In each pseudo fluctuation performance, after the normal fluctuation display of the first special symbol z1 is executed in each of the three first performance symbol display areas a1 to a3, a temporary stop display of the first performance symbol z1 is executed. It is composed of content display effects.
The "temporary stop display" is a pseudo stop display. Specifically, the temporary stop display is a display in which the first performance symbol z1 of one type remains in a state of moving in a predetermined manner (oscillation, rotation, etc.) at the lottery result display position.
The "stop display" is a display in which the first performance symbol z1 of one type remains in a stopped state at the lottery result display position.
Specifically, in each pseudo fluctuation performance, after the normal fluctuation display of each symbol starts in the order of the left symbol, middle symbol, and right symbol, the temporary stop of each symbol occurs in the order of the left symbol, right symbol, and middle symbol. Display is executed.
In particular, in each pseudo-variable performance, the combinations of the first performance symbol z1 temporarily stopped and displayed in the three first performance symbol display areas a1 to a3 are "missing eye,""reachingeye," and "chance eye." It will be a combination of any of these. Here, in the final pseudo-variable performance, the combination of the first performance symbols z1 that are temporarily stopped and displayed in the three first performance symbol display areas a1 to a3 becomes a "reach-to-reach" state, and a reach-to-reach state is established.
A "missing number" is a combination that is not included in the "jackpot symbol" (specifically, a combination in which the types of the left symbol, middle symbol, and right symbol are not the same) (excluding specific combinations described later).
The “reach eye” is a combination included in the “jackpot symbol” (specifically, a combination in which the types of the left symbol and the right symbol are the same).
"Chance" is a specific combination (for example, "1, 2, 3).
The "reach state" means that the first production symbol z1 is temporarily stopped and displayed in two of the three first production symbol display areas a1 to a3, and the first production symbol z1 that is temporarily stopped is displayed. The combination of performance symbols z1 is in a state of being a combination included in the "jackpot symbol".

Next, each aspect of the second half variation effect will be explained.
In pachinko machine 1, the following are defined as variation pattern numbers: a variation pattern number corresponding to "no reach variation", a variation pattern number corresponding to "normal reach variation", and a variation pattern number corresponding to "super reach variation". has been done.
Further, as the categories (types) of the second half variation performance, "non-reach variation performance", "normal reach variation performance", and "super reach variation performance" are defined.
Furthermore, one pattern or a plurality of patterns with different performance contents are defined as patterns (aspects) belonging to each category of second half variation performance.
Then, when the variation pattern designation command specifies a variation pattern number corresponding to "no reach variation", "no reach variation performance" is selected as the category of the second half variation performance. On the other hand, when the variation pattern designation command specifies a variation pattern number corresponding to "normal reach variation", "normal reach variation effect" is selected as the category of the second half variation effect. On the other hand, when the variation pattern designation command specifies a variation pattern number corresponding to "super reach variation", "super reach variation effect" is selected as the category of the second half variation effect.

The "no-reach variation performance" is a performance that is executed following the "pseudo-non-continuation variation performance."
In this embodiment, the "non-reach variable effect" is a "non-reach variable effect (miss)" that is executed when the result of the special map hit determination is a "miss", and a "non-reach variable performance (miss)" that is executed when the result of the special map hit determination is a "jackpot". ”, a “non-reach variable performance (jackpot)” is stipulated.
"No reach variation performance"("No reach variation performance (miss)"/"No reach variation performance (jackpot)") is the first special symbol z1 in each of the three first performance symbol display areas a1 to a3. It is configured to include a display effect of the content for which a normal variable display is executed.
Specifically, in the "no reach variation performance", after the normal variation display of the left symbol, middle symbol, and right symbol is executed, each symbol is temporarily stopped and displayed in the order of the left symbol, the middle symbol, and the right symbol.
At this time, in the "non-reach variable performance (missing)", the combination of the first performance symbols z1 temporarily stopped and displayed in the three first performance symbol display areas a1 to a3 becomes the "missing symbol".
On the other hand, in the "non-reach variable performance (jackpot)", the combination of the first performance symbols z1 temporarily stopped and displayed in the three first performance symbol display areas a1 to a3 becomes the "jackpot symbol".

The "normal reach variation performance" is a performance that is executed following the "pseudo continuous variation performance"("pseudo continuous 2 variation performance" and "pseudo continuous 3 variation performance").
In this embodiment, the "Normal reach variation effect" includes a "Normal reach variation effect (miss)" which is executed when the result of the special pattern hit determination is a "miss", and a "normal reach variation effect (miss)" which is executed when the result of the special pattern hit determination is a "jackpot". A “normal reach variation performance (jackpot)” that is executed in certain cases is defined.
"Normal reach variation performance"("Normal reach variation performance (miss)"/"Normal reach variation performance (jackpot)") is a performance that is executed during the formation of a reach state, and whether or not a "jackpot pattern" is established. The game is configured to include a display effect indicating that the "jackpot symbol" is not established or the "jackpot symbol" is established after the ``jackpot symbol'' is incited.
Specifically, in the "normal reach variation effect", after the ready-to-reach effect image is displayed during the period when the left symbol and the right symbol form the ready-to-reach state, the middle symbol is temporarily stopped and displayed.
At this time, in the "normal reach variation performance (missing)", a medium symbol of a type different from the left symbol and the right symbol is temporarily stopped and displayed (the "jackpot symbol" is not established).
On the other hand, in the "normal reach variation performance (jackpot)", the middle symbols of the same type as the left symbol and the right symbol are temporarily stopped and displayed (a "jackpot symbol" is established).
The "reach performance image" is a performance image that encourages the temporary stop display of the middle symbols of the same type as the left symbol and the right symbol (the establishment of a "jackpot symbol"). In this embodiment, an image in which a character included in the middle symbol performs a predetermined action and an image in which a predetermined effect is applied to the middle symbol are displayed as reach effect images.

The "super reach variation performance" is a performance that is executed following the "pseudo continuous variation performance"("pseudo continuous 2 variation performance" and "pseudo continuous 3 variation performance").
In this embodiment, the "super reach variation effect" includes a "super reach variation effect (miss)" that is executed when the result of the special map hit determination is a "miss", and a "super reach variation effect (miss)" that is executed when the result of the special map hit determination is a "jackpot". ”, a “super reach variation performance (jackpot)” is specified.
"Super reach variation performance"("Super reach variation performance (miss)"/"Super reach variation performance (jackpot)") is a performance that is executed during the formation of a reach state, and a "jackpot pattern" is established. After inciting whether or not, a display of content that avoids the formation of a "jackpot symbol" is executed, then the fluctuating display of the medium symbol is restarted, and then a display of content that progresses from a reach state to an advanced reach state is displayed. is executed and it is again asked whether or not the "jackpot symbol" is established, and then the system includes a display performance of the content that the "jackpot symbol" is not established or that the "jackpot symbol" is established.
The "developed ready-to-reach state" is a state in which the two first special symbols z1 forming the ready-to-reach state are displayed in a reduced size. In this embodiment, the left symbol and the right symbol forming the ready-to-reach state are reduced and displayed at the upper end of the display screen 31a, thereby forming the developed ready-to-reach state. In addition, during the period when the developed reach state is formed, the medium symbol will not be displayed.
Specifically, in the "super reach variation effect", during the period when the left symbol and the right symbol form a reach state, after the above reach effect image is displayed, within a type different from the left symbol and the right symbol. The symbol is temporarily stopped and displayed, then the fluctuating display of the middle symbol is resumed, and then the developed reach state is formed. During the period when the developed reach state is formed, the developed reach effect image is displayed, and then the middle symbol is displayed. The symbol is temporarily stopped and displayed.
At this time, in the "super reach variation effect (missing)", a medium symbol of a type different from the left symbol and the right symbol is temporarily stopped and displayed (the "jackpot symbol" is not established).
On the other hand, in the "super reach variation effect (jackpot)", medium symbols of the same type as the left symbol and the right symbol are temporarily stopped and displayed (a "jackpot symbol" is established).
The "developed reach performance image" is a performance image that encourages the temporary stop display of the middle symbols of the same type as the left symbol and the right symbol (the establishment of a "jackpot symbol"). In this embodiment, a predetermined background image is displayed as the developed reach effect image.

(Main preview performance)
Next, the main preview effect executed in the pachinko machine 1 will be explained.
"Main notice performance" is a performance that is executed during a variable performance, and is a performance that suggests the result of the start judgment (special pattern hit judgment, special pattern pattern judgment, special pattern fluctuation pattern judgment, etc.) related to the variable effect. It becomes.
In this embodiment, the main preview performance suggests the result of special symbol determination (specifically, the possibility of a "jackpot symbol").
In this embodiment, a plurality of types with different presentation contents are defined as the main preview presentation types.

(stop performance)
Next, a stop effect executed in the pachinko machine 1 will be explained.
The "stop performance" is a performance that is executed while the special symbol is stopped and displayed.
In the stop production, the first production pattern z1 is stopped and displayed in each of the three first production pattern display areas a1 to a3, and the second production pattern z2 is stopped and displayed in the second production pattern display area a4. .

(Jackpot performance)
Next, a jackpot performance executed in the pachinko machine 1 will be explained.
The jackpot performance is a performance executed while the jackpot game state is occurring.
In the pachinko machine 1, "Jackpot Performance 1" to "Jackpot Performance 6" are defined as categories (types) of jackpot performances.
Further, as a pattern (aspect) belonging to each category of jackpot performance, one pattern or a plurality of patterns with different performance contents are defined.
Then, when the opening designation command specifies the stop symbol number corresponding to "Jackpot 1 symbol", "Jackpot performance 1" is selected as the category of the jackpot performance. On the other hand, when the opening designation command specifies the stop symbol number corresponding to "Jackpot 2 symbols", "Jackpot performance 2" is selected as the category of the jackpot performance. When the opening designation command specifies the stop symbol number corresponding to "Jackpot 3 symbols", "Jackpot performance 3" is selected as the category of the jackpot performance. When the opening designation command specifies the stop symbol number corresponding to "Jackpot 4 symbols", "Jackpot performance 4" is selected as the category of the jackpot performance. When the opening designation command specifies a stop symbol number corresponding to "Jackpot 5 symbols", "Jackpot performance 5" is selected as the category of jackpot performance. When the opening designation command specifies a stop symbol number corresponding to "Jackpot 6 symbols", "Jackpot performance 6" is selected as the category of jackpot performance.

The jackpot performance includes an opening performance that is performed during the opening period, an interval performance that is performed during the interval period, a round performance that is performed during the round game, an ending performance that is performed during the ending period, etc. There is.
The "opening period" is a period from the start of the jackpot gaming state until the opening time has elapsed.
The "interval period" is the period from the end of the opening period to the start of the first round game, or the period from the end of each round game to the start of the next round game.
The ending period is a period from the end of the interval period after the end of the final round game until the ending time has elapsed.

(Processing executed by the production control board 300)
Next, the processing executed by the CPU 310 of the production control board 300 will be explained.
In this embodiment, command reception interrupt processing, sub-timer interrupt processing, and movable object interrupt processing, which will be described later, are executed by an interrupt handler. On the other hand, Vsync interrupt processing, sound interrupt processing, and lamp interrupt processing, which will be described later, are interrupt processing (tasks) that can be executed in parallel at the same time by multitasking.
Here, the Vsync interrupt process, the sound interrupt process, and the lamp interrupt process may also be configured as interrupt processes executed by an interrupt handler.

(Sub CPU initialization process)
First, the sub CPU initialization process executed by the CPU 310 of the production control board 300 will be described.
FIG. 38 is a flowchart showing sub CPU initialization processing.
A reset circuit (not shown) is provided on the production control board 300. The reset circuit generates a reset signal when the pachinko machine 1 is powered on.
The CPU 310 of the production control board 300 starts sub-CPU initialization processing shown in FIG. 38 in response to generation of a reset signal by the reset circuit.
When the sub CPU initialization process is started, first, the process moves to step S28-1.
In step S28-1, initial setting processing is executed, and the process moves to step S28-2. In the initial setting process, various initial settings necessary for starting production control are executed.
Specifically, in the initialization process, various registers, various timers, etc. used by the CPU 310 are initialized, and the CPU 310 is initialized.
In the initialization process, various internal devices (CPU work memory 311, CPU interface 312, host interface 313, CG bus interface 314, DRAM interface 315, VRAM 316, serial communication controller 317, transfer circuit 318, preloader circuit 319, The display circuit 320, graphics decoder circuit 321, drawing circuit 322, sound circuit 323, etc.) are initialized.
In particular, at this time, the value of the post-effector frequency correction parameter number register is initialized. As a result, a value (specifically, "0") specifying the "normal time/post-effector frequency correction parameter" is set in the post-effector frequency correction parameter number register. As a result, the post-effector 360 then performs frequency correction on the audio data of each channel according to the "normal time/post-effector frequency correction parameter."
In the initialization process, various external devices (control ROM 302, CGROM 303, DRAM 304, etc.) are initialized. At this time, a value (in this embodiment, "0") specifying a state in which the initial transfer described later is not completed is set in the initial transfer completion flag area of the DRAM 304. In addition, a value for specifying the "normal time/frequency correction parameter" (specifically, "0 ”) is set.

In step S28-2, initial transfer data setting processing is executed, and the process moves to step S28-3. In the initial transfer data setting process, information specifying data to be initially transferred is set.
Specifically, in the initial transfer data setting process, an initial transfer data list is set in a predetermined area of the DRAM 304, and a predetermined initial value (in this embodiment, "0") is set as the value of the data transfer counter. .
The "initial transfer data list" is a list of data to be transferred (preloaded) from the CGROM 303 to the preload area of the DRAM 304 when the power is turned on. In this embodiment, in the initial transfer data list, all compressed audio data among the data stored in the CGROM 303 is defined as data to be transferred.
Specifically, in the initial transfer data list, for all the compressed audio data stored in the CGROM 303, there is information (hereinafter referred to as "read address") that specifies the address of the storage area (storage area of the CGROM 303) from which each compressed audio data is read. ), information that specifies the address of the storage area (storage area of DRAM 304) in which the compressed audio data is to be written (hereinafter referred to as the "write address"), and information that specifies the order in which the compressed audio data is to be transferred. (Specifically, the value of the data transfer counter) and the correspondence are registered.

In step S28-3, digital amplifier setting processing is executed, and the process moves to step S28-4. In the digital amplifier setting process, the digital amplifier 305 is initialized.
Specifically, in the digital amplifier setting process, first, a reset signal is transmitted to the digital amplifier 305 (the signal input to the reset terminal is turned on). As a result, in the digital amplifier 305, various registers (frequency correction parameter setting register (frequency correction parameter setting section 1, frequency correction parameter setting section 2, and frequency correction parameter setting section 3), registers related to volume setting (correction), Registers related to terminal settings, status information setting registers, etc.) are initialized (cleared). At this time, a value corresponding to the normal state (specifically, "0") is set in the status information setting register.
In the digital amplifier setting process, next, "normal time/frequency correction parameters"("normal time/frequency correction parameter 1" to "normal time/frequency correction parameter 3") are transmitted to the digital amplifier 305.
As a result, the “normal frequency correction parameter” is set in the frequency correction parameter setting register of the digital amplifier 305. That is, in the frequency correction parameter setting section 1, "normal time/frequency correction parameter 1" is set, in the frequency correction parameter setting section 2, "normal time/frequency correction parameter 2" is set, and in the frequency correction parameter setting section 3, ""Normal/Frequency Correction Parameter 3" is set.
As a result, the digital amplifier 305 performs frequency correction on the audio data of channels 1 and 2 (upper left speaker and upper right speaker) in accordance with the "normal frequency correction parameter 1", and 2, frequency correction is performed on the audio data of channels 3 and 4 (center left speaker/center right speaker), and frequency correction is performed on the audio data of channel 5 (woofer) according to ``Normal frequency correction parameter 3''. Correction is performed.

In step S28-4, interrupt permission processing is executed, and the process moves to step S28-5. In the interrupt enable process, the interrupt disabled state is canceled. This makes it possible (permitted) to execute various interrupt processes.
In step S28-5, random number update processing is executed, and the process moves to step S28-6. In the random number update process, various random numbers for effects are updated.
In step S28-6, initial transfer processing is executed, and the process moves to step S28-7. The initial transfer process will be described later.

In step S28-7, status acquisition processing is executed, and the process moves to step S28-8. In the status information acquisition process, status information set in the status information setting register of the digital amplifier 305 is acquired.
In step S28-8, it is determined whether the status information acquired in step S28-7 has a value corresponding to an abnormal state (specifically, "1"), and the acquired status information corresponds to the abnormal state. If it is determined that the acquired status information is a value that corresponds to an abnormal state (Yes), the process moves to step S28-9, and if it is determined that the acquired status information is a value that does not correspond to an abnormal state (a value that corresponds to a normal state) (No ), the process moves to step S28-5.
In step S28-9, digital amplifier reset processing is executed, and the process moves to step S28-10. In the digital amplifier reset process, a reset signal is transmitted to the digital amplifier 305 (the signal input to the reset terminal of the digital amplifier 305 is turned on).
As a result, in the digital amplifier 305, various registers (frequency correction parameter setting register (frequency correction parameter setting section 1, frequency correction parameter setting section 2, and frequency correction parameter setting section 3), registers related to volume setting (correction), Registers related to terminal settings, status information setting registers, etc.) are initialized (cleared). At this time, a value corresponding to the normal state (specifically, "0") is set in the status information setting register.

In step S28-10, parameter restoration processing is executed, and the process moves to step S28-5. In the parameter restoration process, the value of the frequency correction parameter setting register of the digital amplifier 305 is restored based on the value set in the frequency correction parameter number setting area of the DRAM 304.
Specifically, in the parameter restoration process, first, the value of the frequency correction parameter number setting area 1 of the DRAM 304 is checked. Then, the frequency correction parameter corresponding to the value of the frequency correction parameter number setting area 1 is read from the control ROM 302 and the read frequency correction parameter is transmitted to the digital amplifier 305.
Next, the value of the frequency correction parameter number setting area 2 of the DRAM 304 is confirmed. Then, the frequency correction parameter corresponding to the value of the frequency correction parameter number setting area 2 is read from the control ROM 302, and the read frequency correction parameter is transmitted to the digital amplifier 305.
Next, the value in the frequency correction parameter number setting area 3 of the DRAM 304 is confirmed. Then, the frequency correction parameter corresponding to the value of the frequency correction parameter number setting area 3 is read from the control ROM 302, and the read frequency correction parameter is transmitted to the digital amplifier 305.

As a result, when the value of frequency correction parameter number setting area 1 is "0", "normal time/frequency correction parameter 1" is transmitted to the digital amplifier 305, and in frequency correction parameter setting section 1, "normal time/frequency correction parameter 1" is transmitted to the digital amplifier 305. "Time/frequency correction parameter 1" is restored. On the other hand, when the value of the frequency correction parameter number setting area 1 is "1", the "Jackpot frequency correction parameter 1" is transmitted to the digital amplifier 305, and the frequency correction parameter setting section 1 selects "Jackpot time/Frequency correction parameter 1".・Frequency correction parameter 1" is restored. On the other hand, when the value of the frequency correction parameter number setting area 1 is "2", the "time saving/frequency correction parameter 1" is transmitted to the digital amplifier 305, and the "time saving/frequency correction parameter 1" is transmitted to the digital amplifier 305, and the "time saving/frequency correction parameter 1" is・Frequency correction parameter 1" is restored.
Further, when the value of the frequency correction parameter number setting area 2 is "0", the "normal time/frequency correction parameter 2" is transmitted to the digital amplifier 305, and the frequency correction parameter setting section 2 selects "normal time/frequency correction parameter 2".・Frequency correction parameter 2" is restored. On the other hand, when the value of the frequency correction parameter number setting area 2 is "1", the "Jackpot frequency correction parameter 2" is transmitted to the digital amplifier 305, and the frequency correction parameter setting section 2 selects "Jackpot time frequency correction parameter 2".・Frequency correction parameter 2" is restored. On the other hand, when the value of the frequency correction parameter number setting area 2 is "2", the "time saving/frequency correction parameter 2" is transmitted to the digital amplifier 305, and the "time saving/frequency correction parameter 2" is transmitted to the digital amplifier 305, and the "time saving/frequency correction parameter 2" is・Frequency correction parameter 2" is restored.
Further, when the value of the frequency correction parameter number setting area 3 is "0", the "normal time/frequency correction parameter 3" is transmitted to the digital amplifier 305, and the frequency correction parameter setting section 3 selects "normal time/frequency correction parameter 3".・Frequency correction parameter 3" is restored. On the other hand, when the value of the frequency correction parameter number setting area 3 is "1", the "Jackpot frequency correction parameter 3" is transmitted to the digital amplifier 305, and the frequency correction parameter setting section 3 selects "Jackpot time/Frequency correction parameter 3".・Frequency correction parameter 3" is restored. On the other hand, when the value of the frequency correction parameter number setting area 3 is "2", the "time saving/frequency correction parameter 3" is transmitted to the digital amplifier 305, and the frequency correction parameter setting section 3 selects "time saving/frequency correction parameter 3".・Frequency correction parameter 3" is restored.

(Initial transfer processing)
Next, the initial transfer process in step S28-5 will be explained.
FIG. 39 is a flowchart showing the initial transfer process.
When the initial transfer process is executed in step S28-5, the process moves to step S44-1, as shown in FIG. 39.
In step S44-1, it is determined whether the value set in the initial transfer completion flag area is "1" or not, and the value set in the initial transfer completion flag area is not "1"("0"). ) (No), the process moves to step S44-2, and if it is determined that the value set in the initial transfer completion flag area is "1" (Yes), a series of The process ends and the process moves to the next process (step S28-4).

In step S44-2, SATA transfer processing is executed, and the process moves to step S44-3. In the SATA transfer process, data stored in the CGROM 303 is transferred (preloaded) to the preload area of the DRAM 304 according to the initial transfer data list set in step S28-1.
Specifically, in the SATA transfer process, first, the value of the data transfer counter is checked. Next, with reference to the initial transfer data list, the read address and write address corresponding to the confirmed value of the data transfer counter are obtained. Then, the data (compressed audio data) stored in the storage area specified by the acquired read data address is read, and the read data (compressed image data) is transferred to the storage area specified by the acquired write address. Remember.
In the SATA transfer process, next, "1" is added to the value of the data transfer counter.

In step S44-3, it is determined whether the initial transfer has been completed, and if it is determined that the initial transfer has been completed (Yes), the process moves to step S44-4, and it is determined that the initial transfer has not been completed. If so (No), the series of processes ends and the process moves to the next process (step S28-4).
Here, in step S44-3, it is determined based on the value of the data transfer counter whether or not transfer of all data registered in the initial transfer data list has been completed. If it is determined that the transfer of all data registered in the initial transfer data list has been completed, it is determined that the initial transfer has been completed, and the transfer of all data registered in the initial transfer data list is completed. If it is determined that the initial transfer has not been completed, it is determined that the initial transfer has not been completed.
In step S44-4, initial transfer completion flag setting processing is executed, the series of processing is completed, and the process moves to the next processing (step S28-3). In the initial transfer completion flag setting process, a value (in this embodiment, "1") that specifies a state in which the initial transfer is completed is set in the initial transfer completion flag area.

As described above, during the period from the execution of the initial setting process to the completion of the transfer (initial transfer) of all data registered in the initial transfer data list (all compressed audio data stored in the CGROM 303), the initial "0" is set in the transfer completion flag area. Then, during the period when "0" is set in the initial transfer completion flag area, the SATA transfer process of step S44-2 is repeatedly executed.
After that, in response to the completion of the transfer (initial transfer) of all data registered in the initial transfer data list (all compressed audio data stored in the CGROM 303), "1" is set in the initial transfer completion flag area. is set.
In particular, in this embodiment, in response to "1" being set in the initial transfer completion flag area, the control of audio output by the various speakers 22 (audio output processing by the sound circuit 323) and the control of the audio output by the various image display devices 31 are performed. , 32 (drawing processing by VDP).
That is, when "0" is set in the initial transfer completion flag area, control of audio output by the various speakers 22 (audio output processing by the sound circuit 323) and display of effect images by the various image display devices 31 and 32 are performed. control (drawing processing by VDP) and becomes impossible to execute.
On the other hand, when "1" is set in the initial transfer completion flag area, the output of audio by various speakers 22 is controlled (audio output processing by sound circuit 323), and the various image display devices 31 and 32 display effect images. control (drawing processing using VDP).
On the other hand, in this embodiment, before the transfer of all data registered in the initial transfer data list (all compressed audio data stored in the CGROM 303) is completed (the initial transfer completion flag area is set to "1"). control of the drive (light emission) of the various lamps 20 and 21 (lamp drive processing by the lamp controller 317a), and control of the drive of the various motors 23 (various movable bodies) (motor drive processing by the motor controller 317b). ), a state occurs in which it is possible to execute .
That is, after the initial setting process is executed, the drive (light emission) of the various lamps 20 and 21 (lamp drive process by the lamp controller 317a) and the various A state occurs in which it is possible to control the drive of the motor 23 (various movable bodies) (motor drive processing by the motor controller 317b).

(Command reception interrupt processing)
Next, the command reception interrupt process executed by the CPU 310 of the production control board 300 will be explained.
The CPU 310 of the production control board 300 executes a command reception interrupt process (not shown) in response to receiving the control command from the main control board 200.
In the command reception interrupt process, the control command received from the main control board 200 is memorized (stored) in the reception buffer area of the DRAM 304 of the production control board 300.

(Sub-timer interrupt processing)
Next, the sub-timer interrupt process executed by the CPU 310 of the production control board 300 will be explained.
FIG. 40 is a flowchart showing sub-timer interrupt processing.
The production control board 300 is configured to include a clock generation circuit. The clock generation circuit generates a clock pulse signal at predetermined intervals.
The CPU 310 of the production control board 300 starts the sub-timer interrupt process shown in FIG. 40 at predetermined intervals based on the generation of clock pulses by the clock generation circuit. When the sub-timer interrupt process is started, the process first moves to step S31-1.
In step S31-1, register saving processing is executed, and the process moves to step S31-2. In the register saving process, the value of the register is saved to the saving area of the DRAM 304.

In step S31-2, a timer update process is executed, and the process moves to step S31-3. In the timer update process, the values of various timers (effect scenario timer, etc.) provided in the effect control board 300 are updated. Specifically, predetermined values (values corresponding to predetermined cycles) are added or subtracted from the values of various timers.
In step S31-3, command analysis processing is executed, and the process moves to step S31-4. In the command analysis process, the control commands stored in the reception buffer of the DRAM 304 of the production control board 300 are analyzed, and processing according to the received control commands is executed. The command analysis process will be described later.

In step S31-4, time schedule management processing is executed, and the process moves to step S31-5. In the time schedule management process, the progress of the performance is managed based on the performance scenario data set in the performance scenario setting area and the value of the performance scenario timer corresponding to the performance scenario data.
Specifically, in the time schedule management process, it is determined whether or not there is any process data whose start time has arrived for each performance scenario data set in the performance scenario setting area. If it is determined that there is process data whose start time has come, each command information (message) included in the process data is stored in the corresponding buffer area.
At this time, command information regarding the display effect (command information specifying the start of the display effect, command information specifying the end of the display effect, etc.) is stored in the display command buffer area.
On the other hand, command information regarding sound production (command information specifying the start of sound production, etc.) is stored in the sound command buffer area.
On the other hand, command information regarding the lamp performance (command information specifying the start of the lamp performance, etc.) is stored in the lamp command buffer area.
On the other hand, command information regarding the movable body performance (command information specifying the start of the movable body performance, etc.) is stored in the movable body command buffer area.

In step S31-5, register restoration processing is executed, and the sub-timer interrupt processing is ended. In the register restoration process, the register values saved in step S31-1 are restored.

(Command analysis processing)
Next, the command analysis process in step S31-3 will be explained.
FIG. 41 is a flowchart showing command analysis processing.
When the command analysis process is executed in step S31-3, the process moves to step S32-1, as shown in FIG.
In step S32-1, a set value command reception process is executed, and the process moves to step S32-2.
In the setting value command reception process, it is determined whether a setting value designation command has been received. When it is determined that a setting value designation command has been received, a value corresponding to the setting value specified by the setting value designation command is stored (set) in the setting value storage area of the DRAM 304 of the production control board 300.

In step S32-2, a gaming state command reception process is executed, and the process moves to step S32-3.
In the gaming state command reception process, it is determined whether a gaming state designation command has been received. If it is determined that a gaming state designation command has been received, various performance flags are set.
In step S32-3, pending command reception processing is executed, and the process moves to step S32-4. The pending command reception process will be described later.
In step S32-4, a prefetch command reception process is executed, and the process moves to step S32-5. The prefetch command reception process will be described later.
In step S32-5, variable command reception processing is executed, and the process moves to step S32-6. The variable command reception process will be described later.
In step S32-6, a stop command reception process is executed, and the process moves to step S32-7. The stop command reception process will be described later.
In step S32-7, opening command reception processing is executed, and the process moves to step S32-8. The opening command reception process will be described later.

In step S32-8, a game status command reception process is executed, and the series of processes is completed and the process moves to the next process (step S31-4).
In the gaming situation command reception process, first, it is determined whether or not a gaming situation designation command has been received. If it is determined that a gaming situation designation command has been received, a gaming situation setting process to be described later is executed. On the other hand, if it is determined that the gaming situation designation command has not been received, the process moves to the next process (step S31-4) without executing the gaming situation setting process.
In the game situation setting process, a game situation designation command is analyzed.
When the occurrence of a firing ready state is specified by the gaming situation designation command, a value (for example, "1 ”). In addition, an effect suggesting (notifying) that a firing state is occurring is started.
On the other hand, if the release of the launchable state is specified by the game status designation command, a value (for example, "0 ”). Also, the effect suggesting (notifying) that a firing ready state is occurring is ended.

(Pending command reception processing)
Next, the pending command receiving process in step S32-3 will be explained.
FIG. 42 is a flowchart showing the pending command reception process.
When the pending command receiving process is executed in step S32-3, the process moves to step S36-1, as shown in FIG. 42.
In step S36-1, it is determined whether or not the reservation number designation command has been received. If it is determined that the reservation number designation command has been received (Yes), the process moves to step S36-2, and the reservation number designation command is received. If it is determined that the information has not been received (No), the series of processes is ended and the process moves to the next process (step S32-4).
In step S36-2, it is determined whether the pending number specification command specifies an increase in the pending number (the pending number increases by "1"), and whether the pending number specification command specifies an increase in the pending number. If it is determined that there is a pending number (Yes), the process moves to step S36-3, and it is determined that the pending number designation command does not specify an increase in the pending number (specifies that the pending number has decreased by "1"). If determined (No), the process moves to step S36-4.

In step S36-3, a pending number addition process is executed, the series of processes is completed, and the process moves to the next process (step S32-4).
In the reservation number addition process, first, it is determined whether the reservation number designation command specifies an increase in the number of special drawings 1 reservation.
If it is determined that the reserved number designation command specifies an increase in the number of special drawings 1 reserved, the value obtained by adding "1" to the value set in the special drawing 1 reserved number counter is added as a new value. Set in the special figure 1 pending number counter. In addition, a normal pending performance corresponding to the newly acquired (stored) special figure 1 game information is started.
At this time, among the four display positions included in the reserved symbol display area b2, the display area for displaying the reserved symbol h is the storage area (storage area 1 to A display position corresponding to storage area 4) is set. Here, the storage area (storage area 1 to storage area 4) in which the newly acquired special figure 1 game information is stored is determined based on the value of the special figure 1 pending number counter.

On the other hand, if it is determined that the reservation number specification command specifies an increase in the number of special drawings 2 reservations, a new value is added to the value set in the special drawings 2 reservation number counter by adding "1". Set in the special figure 2 reservation number counter. In addition, the normal pending performance corresponding to the newly acquired (stored) special figure 2 game information is started.
At this time, among the four display positions included in the reserved symbol display area b3, the storage area (storage area 1 to A display position corresponding to storage area 4) is set. Here, the storage area (storage area 1 to storage area 4) in which the newly acquired special figure 2 game information is stored is determined based on the value of the special figure 2 pending number counter.

In step S36-4, a pending number subtraction process is executed, the series of processes is completed, and the process moves to the next process (step S32-4).
In the reservation number subtraction process, first, it is determined whether the reservation number designation command specifies subtraction of the number of special drawings 1 reservation.
If it is determined that the reservation number specification command specifies the subtraction of the number of special drawings 1 reservation, the value obtained by subtracting "1" from the value set in the special drawing 1 reservation number counter is added as a new value. Set in the special figure 1 pending number counter. Furthermore, the display position of each pending symbol h displayed in the pending symbol display area b2 is shifted (moved).
Specifically, the pending performance corresponding to the pending symbol h displayed in the pending symbol display area b1 is ended. As a result, the display of the pending symbol h corresponding to the terminated pending performance is ended.
In addition, when the reserved symbol h is displayed in the display position corresponding to the storage area 1 in the reserved symbol display area b2, the display position of the reserved symbol h is changed to the reserved symbol display area b2 (corresponding to the storage area 1). display position) to the reserved symbol display area b1.
In addition, when the reserved symbol h is displayed at the display position corresponding to the storage area 2 in the reserved symbol display area b2, the display position of the reserved symbol h is changed from the display position corresponding to the storage area 2 to the storage area 1. Shift to the display position corresponding to .
In addition, when the reserved symbol h is displayed at the display position corresponding to the storage area 3 in the reserved symbol display area b2, the display position of the reserved symbol h is changed from the display position corresponding to the storage area 3 to the storage area 2. Shift to the display position corresponding to .
In addition, when the reserved symbol h is displayed at the display position corresponding to the storage area 4 in the reserved symbol display area b2, the display position of the reserved symbol h is changed from the display position corresponding to the storage area 4 to the storage area 3. Shift to the display position corresponding to .

On the other hand, if it is determined that the reservation number specification command specifies the subtraction of the number of special drawings 2 reservations, the value obtained by subtracting "1" from the value set in the special drawings 2 reservation number counter is set as a new value. Set in the special figure 2 reservation number counter. In addition, the display position of each pending symbol h displayed in the pending symbol display area b3 is changed (shifted).
Specifically, the pending performance corresponding to the pending symbol h displayed in the pending symbol display area b1 is ended. As a result, the display of the pending symbol h corresponding to the terminated pending performance is ended.
In addition, when the reserved symbol h is displayed in the display position corresponding to the storage area 1 in the reserved symbol display area b3, the display position of the reserved symbol h is changed to the reserved symbol display area b3 (corresponding to the storage area 1). display position) to the reserved symbol display area b1.
In addition, when the reserved symbol h is displayed at the display position corresponding to the storage area 2 in the reserved symbol display area b3, the display position of the reserved symbol h is changed from the display position corresponding to the storage area 2 to the storage area 1. Shift to the display position corresponding to .
In addition, when the reserved symbol h is displayed at the display position corresponding to the storage area 3 in the reserved symbol display area b3, the display position of the reserved symbol h is changed from the display position corresponding to the storage area 3 to the storage area 2. Shift to the display position corresponding to .
In addition, when the reserved symbol h is displayed at the display position corresponding to the storage area 4 in the reserved symbol display area b3, the display position of the reserved symbol h is changed from the display position corresponding to the storage area 4 to the storage area 3. Shift to the display position corresponding to .

(Prefetch command reception processing)
Next, the prefetch command reception process in step S32-4 will be explained.
FIG. 43 is a flowchart showing the prefetch command reception process.
When the prefetch command reception process is executed in step S32-4, the process moves to step S33-1, as shown in FIG. 43.
In step S33-1, it is determined whether or not the prefetch designation commands (first prefetch designation command, second prefetch designation command, and third prefetch designation command) have been received, and if it is determined that the prefetch designation command has been received (Yes). ), the process moves to step S33-2, and if it is determined that the prefetch designation command has not been received (No), the series of processes is ended and the process moves to the next process (step S32-5).

In step S33-2, a prefetch information analysis process is executed, and the process moves to step S33-3. In the prefetch information analysis process, the information specified by the prefetch designation command is stored in a predetermined area of the DRAM 304 of the production control board 300 as pending information.
The DRAM 304 of the production control board 300 is set with a pending information storage area that can store pending information. In addition, as a reservation information storage area, a first reservation information storage area corresponding to the first special symbol lottery (special symbol 1 game information storage area of RAM 230) and a second reservation information storage area corresponding to the second special symbol lottery (special symbol 2 game information storage area of RAM 230) ) is set.
The first pending information storage area includes storage areas 1 to 4 as storage areas capable of storing pending information. In the first pending information storage area, pending information corresponding to the special figure 1 game information stored in the special figure 1 gaming information storage area is stored. That is, the reservation information stored in the storage area 1 of the first reservation information storage area corresponds to the special figure 1 game information stored in the storage area 1 of the special figure 1 game information storage area. Further, the reservation information stored in the storage area 2 of the first reservation information storage area corresponds to the special figure 1 game information stored in the storage area 2 of the special figure 1 game information storage area. Further, the reservation information stored in the storage area 3 of the first reservation information storage area corresponds to the special figure 1 game information stored in the storage area 3 of the special figure 1 game information storage area. Further, the reservation information stored in the storage area 4 of the first reservation information storage area corresponds to the special figure 1 game information stored in the storage area 4 of the special figure 1 game information storage area.
The second pending information storage area includes storage areas 1 to 4 as storage areas capable of storing pending information. Then, in the second pending information storage area, pending information corresponding to the special figure 2 game information stored in the special figure 2 gaming information storage area is stored. That is, the reservation information stored in the storage area 1 of the second reservation information storage area corresponds to the special figure 2 game information stored in the storage area 1 of the special figure 2 game information storage area. Further, the pending information stored in the storage area 2 of the second pending information storage area corresponds to the special figure 2 game information stored in the storage area 2 of the special figure 2 game information storage area. Further, the reservation information stored in the storage area 3 of the second reservation information storage area corresponds to the special figure 2 game information stored in the storage area 3 of the special figure 2 game information storage area. Further, the pending information stored in the storage area 4 of the second pending information storage area corresponds to the special figure 2 game information stored in the storage area 4 of the special figure 2 game information storage area.
Each piece of pending information includes symbol information indicating the type of stopped symbol, first variation information indicating the content of the variation mode ("variation mode number" or "indeterminate value"), and content of the variation pattern ("variation pattern number" or second fluctuation information indicating "undefined value").

In the prefetch information analysis process, first, it is determined whether the received first prefetch designation command corresponds to the first special symbol lottery.
Then, if it is determined that the received first pre-read designation command corresponds to the first special symbol lottery, the type of stop symbol specified by the first pre-read designation command ("missing symbol" or "jackpot p symbol" ”), the contents of the fluctuation mode specified by the second read-ahead specification command (“variation mode m” or “undefined value”), and the contents of the fluctuation pattern specified by the third read-ahead specification command (“variation pattern n” or “ "indeterminate value") is analyzed to generate symbol information corresponding to the type of the analyzed stop symbol, first fluctuation information corresponding to the analyzed fluctuation mode content, and second fluctuation information corresponding to the analyzed fluctuation pattern content. Generate change information and pending information including. Then, the generated suspension information is stored (saved) in the first suspension information storage area.
On the other hand, if it is determined that the received first pre-read designation command corresponds to the second special symbol lottery, the type of stop symbol specified by the first pre-read designation command ("missing symbol" or "jackpot p symbol") ”), the contents of the fluctuation mode specified by the second read-ahead specification command (“variation mode m” or “undefined value”), and the contents of the fluctuation pattern specified by the third read-ahead specification command (“variation pattern n” or “ "indeterminate value") is analyzed to generate symbol information corresponding to the type of the analyzed stop symbol, first fluctuation information corresponding to the analyzed fluctuation mode content, and second fluctuation information corresponding to the analyzed fluctuation pattern content. Generate change information and pending information including. Then, the generated reservation information is stored (saved) in the second reservation information storage area.
In the following description, the suspension information stored in the suspension information storage area in step S33-2 will be referred to as "pre-read target suspension information." Furthermore, among the suspension information stored in the first suspension information storage area, suspension information for which notification display (fluctuating display and stop display) is performed before the pre-read target suspension information is referred to as "advance suspension information."

In step S33-3, it is determined whether or not the pre-reading notice effect is being executed. If it is determined that the pre-reading notice effect is not being executed (No), the process moves to step S33-4, and the pre-reading notice effect is being executed. If it is determined that the process is being executed (Yes), the series of processes ends and the process moves to the next process (step S32-5).
In this embodiment, during execution of the pre-read preview performance, "1" is set in the pre-read preview performance flag area of the DRAM 304 of the performance control board 300. Therefore, in step S33-3, it is determined whether or not the pre-read preview performance is being executed based on whether "1" is set in the pre-read preview performance flag area.
In step S33-4, it is determined whether or not the pre-reading notice performance execution conditions are satisfied, and if it is determined that the pre-reading notice performance execution conditions are satisfied (Yes), the process moves to step S33-5, and the pre-reading notice performance execution conditions are If it is determined that the condition is not satisfied (No), the series of processes is ended and the process moves to the next process (step S32-5).
In this embodiment, (1) the pre-read target pending information is pending information corresponding to the special figure 1 game information, (2) a predetermined number (in this embodiment, "2") or more of advance pending information is stored. (3) There is no advance hold information indicating the type (variation pattern number) belonging to "Normal reach variation" or "Super reach variation" as the type of variation pattern, (4) Time saving control is stopped. (5) that a jackpot gaming state is not occurring, it is determined that the pre-read preview effect execution condition is satisfied.
Note that the contents of the pre-read preview performance execution conditions can be changed as appropriate. In other words, as a configuration in which it is determined that the look-ahead preview performance execution condition is satisfied when one or more of the conditions (1) to (5) above are satisfied, rather than all of the conditions (1) to (5) above. I don't mind. In addition, other conditions different from the conditions (1) to (5) above may be included as the pre-read preview performance execution conditions.

In step S33-5, a pre-read preview effect lottery process is executed, and the process moves to step S33-6. In the pre-read preview performance lottery process, a pre-read preview performance lottery is executed to determine whether or not to execute the pre-read preview performance.
The control ROM 302 of the performance control board 300 stores a pre-read preview performance lottery table in which winning values for the pre-read preview performance lottery are registered.
In the advance notice performance lottery process, first, the pending notice appearance designation information stored in the pending notice appearance designation information setting area is checked. If the non-appearance designation information is set in the pending preview appearance designation information setting area, the pre-read preview performance lottery is not executed (it is determined not to perform the pre-read preview performance). On the other hand, if appearance designation information is set in the pending preview appearance designation information setting area, a pre-read preview performance lottery is executed.
In the pre-read preview performance lottery, first, a pre-read preview performance lottery random number is obtained from a predetermined random number counter. Then, based on the acquired pre-read preview performance lottery random number and the pre-read preview performance lottery table, it is determined whether or not to execute the pre-read preview performance.
In step S33-6, it is determined whether or not the player has won the pre-read preview effect lottery executed in step S33-5. If it is determined that the pre-read preview effect lottery has been won (Yes), the process proceeds to step S33-7. If it is determined that the pre-read preview performance lottery has been unsuccessful (No), the series of processes is ended and the process moves to the next process (step S32-5).

In step 33-7, a pre-read preview effect setting process is executed, and the series of processes is completed and the process moves to the next process (step S32-5). In the pre-read notice performance setting process, the contents of the pre-read notice performance (pending notice performance) are set.
Specifically, in the pre-read preview performance setting process, first, a pending final mode selection process is executed. In the pending final mode selection process, the final pending mode is selected and set.
The "final mode of suspension" refers to the mode of the pending symbol hy to be previewed that finally changes in the pending preview presentation.
The control ROM 302 of the production control board 300 stores a pending final color lottery table in which the correspondence between the pending final mode random number and the pending final mode is registered.
In addition, as the pending final mode lottery table, pending final mode lottery tables corresponding to each type of variation pattern are stored.
In the pending final mode selection process, first, a pending final mode lottery random number is obtained from a predetermined random number counter. Further, the type of variation pattern indicated by the pre-read target suspension information is confirmed, and the suspension final mode lottery table corresponding to this confirmation result is read out. Then, the final suspension mode is selected (determined) based on the obtained suspension final mode lottery random number and the read suspension final mode lottery table.

In the pre-read preview performance setting process, next, a pending change opportunity selection process is executed. In the pending change trigger selection process, a pending change trigger is selected and set.
The control ROM 302 of the performance control board 300 stores a reservation change opportunity lottery table in which the correspondence between reservation change opportunity lottery numbers and reservation change patterns is registered.
The “holding change pattern” is information (scenario data) that specifies a combination of holding change triggers.
In addition, as a reservation change opportunity lottery table, a reservation change opportunity lottery table corresponding to each combination of the number of special drawings 1 reservation ("2" to "4") and the final mode of reservation is stored.
In the reservation change opportunity selection process, first, a reservation change opportunity lottery random number is obtained from a predetermined random number counter. In addition, the number of reserved special drawings 1 and the final reservation mode selected in the reservation final mode selection process are confirmed, and the reservation change opportunity lottery table corresponding to the confirmation result is read out. Then, based on the obtained reservation change opportunity lottery random number and the read reservation change opportunity lottery table, the reservation notice performance number is determined (determined). Then, the performance scenario data corresponding to the determined pending preview performance number is read out, and the read performance scenario data and the performance scenario timer corresponding to the performance scenario data are set in the performance scenario area.

In the pre-read preview performance setting process, next, a pending change content selection process is executed. In the pending change content selection process, the pending change content corresponding to each pending change trigger is selected and set.
Specifically, in the reservation change content selection process, as the reservation change contents corresponding to each reservation change trigger, the aspect of the pending symbol hy to be notified before the change and the aspect of the pending symbol hy to be notified after the change are selected. Set.
In this embodiment, among the one or more hold change triggers set in the hold change trigger selection process, each hold change trigger is selected in order from the hold change trigger that arrives (occurs) later (later hold change trigger). The pending change content corresponding to the change trigger is selected.
For example, if 3 [times] pending change triggers are set in the pending change trigger selection process, the order is the 3rd (last) pending change trigger, the 2nd pending change trigger, and the 1st pending change trigger. , the pending change content corresponding to each pending change trigger is selected.
In addition, when selecting the pending change contents corresponding to each pending change trigger, first, the aspect of the pending symbol hy to be notified after the change is selected, and then the aspect of the pending symbol hy to be notified prior to the change is selected. selected. At this time, as the mode of the preview target pending symbol hy before the change, a mode with a lower expectation level is determined as compared to the mode of the preview target pending symbol hy after the change. As a result, the mode of the preview target pending symbol hy changes (promotes) to a highly expected mode in response to the arrival of each pending change opportunity.
The control ROM 302 of the production control board 300 stores a pending change content lottery table in which the correspondence between the pending change content lottery random number and the form of the preview target pending symbol hy before the change is registered.
Further, as the reservation change content lottery table, a reservation change content lottery table corresponding to each aspect of the reservation symbol h (aspect of the preview target reservation symbol hy after change) is stored.
In the reservation change content lottery table corresponding to each aspect of the reservation symbol h (aspect of the notice target reservation symbol hy after the change), as the aspect of the notice target reservation symbol hy before the change, the notice target reservation symbol hy after the change is Only the modes with lower expectations compared to the modes are registered.
In the pending change content selection process, first, the pending change content is selected for the final pending change trigger from among the pending change triggers set in the pending change trigger selection process. To do this, first, the mode of the preview target pending symbol hy after the change related to the final pending change trigger is selected. At this time, the pending final mode selected in the pending final mode selection process is selected as the mode of the notice target pending symbol hy after the change related to the final pending change trigger. Next, the mode of the pending symbol hy to be previewed before the change related to the final pending change trigger is selected. To do this, first, a pending change content lottery random number is obtained from a predetermined random number counter. Further, the reservation change content lottery table corresponding to the aspect of the preview target reservation symbol hy after the change selected for the last reservation change trigger is read out. Then, based on the acquired reservation change content lottery random number and the read reservation change content lottery table, the mode of the preview target reservation symbol hy before the change related to the last reservation change trigger is selected.
In the pending change content selection process, next, the pending change content is selected for each pending change trigger, excluding the final pending change trigger, from among the pending change triggers set in the pending change trigger selection process. At this time, the reservation change contents corresponding to each reservation change trigger are determined in order from the reservation change trigger that arrives later.
In order to determine the pending change content corresponding to each pending change trigger, first, the mode of the preview target pending symbol hy after the change related to the pending change trigger is determined. At this time, the mode of the preview target pending symbol hy before the change that has already been selected for the next pending change trigger is selected as the mode of the preview target pending symbol hy after the change related to the current reservation change trigger. Next, the mode of the pending symbol hy to be previewed before the change related to the current pending change trigger is determined. To do this, first, a pending change content lottery random number is obtained from a predetermined random number counter. Further, the reservation change content lottery table corresponding to the aspect of the preview target reservation symbol hy after the change selected for the current reservation change trigger is read out. Then, based on the obtained reservation change content lottery random number and the read reservation change content lottery table, the mode of the preview target reservation symbol hy before the change related to the current reservation change trigger is selected.
In the hold change content selection process, next, the hold change content selected for each hold change trigger is set in the area corresponding to the hold change trigger in the production scenario setting area. As a result, in response to the arrival of each reservation change opportunity, the aspect of the notice target reservation symbol hy changes (promotes) according to the reservation change content set for the reservation change opportunity.

In the pre-read preview performance setting process, next, "1" is set in the pre-read preview performance flag area of the DRAM 304 of the performance control board 300.
Through the above steps, the pending notice performance is started.
In addition, by a process not shown in the drawings, "0" is set in the pre-read preview performance flag area in response to the end of the pending preview performance.

(Fluctuating command reception processing)
Next, the variable command reception process in step S32-5 will be explained.
FIG. 44 is a flowchart showing the variable command reception process.
When the fluctuation command reception process is executed in step S32-5, the process moves to step S34-1, as shown in FIG.
In step S34-1, it is determined whether or not a predetermined control command has been received. If it is determined that a predetermined control command has been received (Yes), the process moves to step S34-2, and the predetermined control command is received. If it is determined that the information has not been received (No), the series of processes is ended and the process moves to the next process (step S32-6).
Here, the predetermined control commands include a symbol type designation command, a fluctuation mode designation command, and a fluctuation pattern designation command.
In step S34-2, a stop effect determination process is executed, and the process moves to step S34-3. In the stop performance determination process, a stop performance number (aspect of the stop performance) is determined.
Specifically, in the stop performance determination process, a stop performance number (aspect of the stop performance) is determined based on the type of stop symbol specified by the symbol type designation command. Then, the determined stop performance number is stored in the stop performance number storage area of the DRAM 304 of the performance control board 300.

In step S34-3, a variable effect determination process is executed, and the process moves to step S34-4. In the variable performance determination process, a variable performance number (aspect of the variable performance) is determined.
Specifically, in the variable performance determining process, first, a first half variable performance determining process is executed to determine a first half variable performance number (form of the first half variable performance).
The control ROM 302 of the performance control board 300 stores a first-half variation performance lottery table in which the correspondence between a variation mode number (type of variation mode) and a first-half variation performance number (aspect of first-half variation performance) is registered. .
In the first half variable performance determination process, first, the first half variable performance lottery table is read. Then, among the first-half variable performance numbers registered in the first-half variable performance lottery table, the first-half variable performance number corresponding to the variable mode number specified by the variable mode designation command is determined (selected).

In the variable performance determining process, next, a second half variable performance determining process is executed to determine a second half variable performance number (form of the second half variable performance).
The control ROM 302 of the performance control board 300 stores a second half variation performance lottery table in which the correspondence between the variation pattern number (type of variation pattern) and the second half variation performance number (aspect of the second half variation performance) is registered. .
In the second half variable effect determination process, first, the second half variable effect lottery table is read. Then, from among the second-half variation performance numbers registered in the second-half variation performance lottery table, the second-half variation performance number corresponding to the variation pattern number specified by the variation pattern designation command is determined (selected).

In step S34-4, a preview effect determination process is executed, and the process moves to step S34-5. In the preview performance determination process, a main preview performance number (aspect of the main preview performance) is selected.
The control ROM 302 of the performance control board 300 stores a preview performance lottery table in which the correspondence between the preview performance random number and the main preview performance number (aspect of the main preview performance) is registered.
Further, as a preview performance lottery table, a preview performance lottery table corresponding to each stop symbol number (each type of stop symbol) is stored.
To determine the mode of the main preview performance, first, a preview performance lottery random number is obtained from a predetermined random number counter. Further, the stop symbol number specified by the stop symbol designation command is confirmed, and the preview performance lottery table corresponding to this confirmation result is read out. Then, the main preview performance number is determined (determined) based on the acquired preview performance lottery random number and the read preview performance lottery table.

In step S34-5, a variable effect setting process is executed, the series of processes is completed, and the process moves to the next process (step S32-6). In the variable performance setting process, performance scenario data for the variable performance is set.
Specifically, in the variable effect setting process, effect scenario data corresponding to the first half variable effect number determined in step S34-3 and effect scenario data corresponding to the second half variable effect number determined in step S34-3 are set. read out.
Next, the read performance scenario data are combined to generate performance scenario data related to the variable performance. Then, the generated performance scenario data and the performance scenario timer corresponding to the performance scenario data are set in the performance scenario setting area.
Further, the performance scenario data corresponding to the main preview performance number determined in step S34-4 is read out. Then, the read performance scenario data and the performance scenario timer corresponding to the performance scenario data are set in the performance scenario setting area. As a result, the main preview performance is started at a predetermined timing while the variable performance is being executed.

(Stop command reception processing)
Next, the stop command receiving process in step S32-6 will be explained.
FIG. 45 is a flowchart showing the stop command reception process.
When the stop command receiving process is executed in step S32-6, the process moves to step S35-1 as shown in FIG. 45.
In step S35-1, it is determined whether or not a stop designation command has been received. If it is determined that a stop designation command has been received (Yes), the process moves to step S35-2, and if a stop designation command has been received. If it is determined that there is no one (No), the series of processes is ended and the process moves to the next process (step S32-7).
In step S35-2, a stop effect start process is executed, a series of processes is completed, and the process moves to the next process (step S32-7). In the stop performance start process, performance scenario data for the stop performance is set.
Specifically, in the stop performance setting process, the stop performance number stored in the stop performance number storage area is acquired, and the performance scenario data corresponding to the acquired stop performance number is read. Then, the read performance scenario data and the performance scenario timer corresponding to the performance scenario data are set in the performance scenario setting area. As a result, a stop performance (stop display of performance symbols z1 and z2) is started.

(Opening command reception processing)
Next, the opening command reception process in step S32-7 will be explained.
FIG. 46 is a flowchart showing opening command reception processing.
When the opening command reception process is executed in step S32-7, the process moves to step S39-1 as shown in FIG. 46.
In step S39-1, it is determined whether or not an opening designation command has been received, and if it is determined that an opening designation command has been received (Yes), the process moves to step S39-2 and the opening designation command is not received. If it is determined that there is no one (No), the series of processes is ended and the process moves to the next process (step S32-8).
In step S39-2, a winning effect setting process is executed, the series of processes is completed, and the process moves to the next process (step S32-8). In the winning performance setting process, performance scenario data for the winning performance is set.
Specifically, in the winning performance setting process, a winning performance number is selected according to the type of stop symbol specified by the opening designation command. Further, performance scenario data corresponding to the selected winning performance number is read out. Then, the read performance scenario data and the performance scenario timer corresponding to the performance scenario data are set in the performance scenario setting area. This starts the winning performance.

(Vsync interrupt processing)
Next, the Vsync interrupt processing executed by the CPU 310 of the production control board 300 will be explained.
FIG. 47 is a flowchart showing Vsync interrupt processing.
The synchronization signal generation circuit of the display circuit 320 generates a vertical synchronization signal (Vsync) at predetermined intervals (sets the vertical synchronization signal to high level).
The CPU 310 of the production control board 300 starts the Vsync interrupt process shown in FIG. 47 at every second predetermined period based on the generation of the vertical synchronization signal by the synchronization signal generation circuit. When the Vsync interrupt processing is started, first, the process moves to step S40-1.
In step S40-1, it is determined whether the value set in the initial transfer completion flag area is "1" or not, and it is determined that the value set in the initial transfer completion flag area is "1". If (Yes), the process moves to step S40-2, and if it is determined that the value set in the initial transfer completion flag area is not "1" (it is "0") (No), the corresponding Vsync Ends interrupt processing.

In step S40-2, frame buffer switching processing is executed, and the process moves to step S40-3. In the frame buffer switching process, the designation of the frame buffer area (designation of the drawing area/designation of the output area) is switched.
Specifically, in the frame buffer switching process, of the two frame buffer areas, the designation of the frame buffer area specified as the drawing area is switched from the drawing area to the output area, and the frame buffer area specified as the output area is switched from the drawing area to the output area. Switch the area specification from the output area to the drawing area.

In step S40-3, drawing command buffer switching processing is executed, and the process moves to step S40-4. In the drawing command buffer switching process, the designation of the drawing command buffer area (designation of the construction area/designation of the transfer area) is switched.
Specifically, in the drawing command buffer switching process, of the two drawing command buffer areas, the designation of the drawing command buffer area specified as the construction area is switched from the construction area to the transfer area, and the designation of the drawing command buffer area specified as the transfer area is switched from the construction area to the transfer area. Switch the designation of the drawing command buffer area from the transfer area to the construction area.
In step S40-4, drawing/output start processing is executed, and the process moves to step S40-5. In the drawing/output start process, the start of the drawing process by the drawing circuit 322 is specified, and the start of the output process by the display circuit 320 is specified.
Specifically, in the drawing/output start process, a value specifying the start of the drawing process is set in the drawing register of the microcomputer 301. As a result, the drawing process by the drawing circuit 322 is started. That is, the drawing circuit 322 uses the compressed image data for one frame stored (preloaded) in the preload area of the DRAM 304 to generate drawing data for one frame in the frame buffer area designated as the drawing area. will be started.
In addition, in the drawing/output start process, a value specifying the start of the output process is set in the display register of the microcomputer 301. As a result, output processing by the display circuit 320 is started. That is, the display circuit 320 starts generating and outputting a video signal based on one frame of drawing data generated in the frame buffer area designated as the output area.

In step S40-5, drawing command transfer start processing is executed, and the process moves to step S40-6. In the drawing command transfer start process, the start of the transfer process by the transfer circuit 318 is specified, and the start of the preload process by the preloader circuit 319 is specified.
Specifically, in the drawing command transfer start process, a value is set in the data transfer register of the microcomputer 301 to specify the start of the transfer process for transferring the display list to the preloader circuit 319. As a result, the transfer process by the transfer circuit 318 is started. That is, the transfer circuit 318 starts transferring the display list generated in the drawing command buffer area designated as the transfer area to the preloader circuit 319.
Further, in the drawing command transfer start process, a value specifying the start of the preload process is set in the display preloader register of the microcomputer 301. As a result, preload processing by the preloader circuit 319 is started. That is, the preloader circuit 319 transfers one frame of compressed image data specified by the display list (drawing command) transferred by the transfer circuit 318 (transfer from CGROM 303 to the preload area of DRAM 304), and transfers the display list (transfer from CGROM 303 to the preload area of DRAM 304). The rewriting of the drawing command) will begin.

In step S40-6, command construction task wake-up processing is executed, and the Vsync interrupt processing is ended. The command construction task wake-up process sets the wake-up of the command construction task process. This starts command construction task processing, which will be described later.

(Command construction task processing)
Next, the command construction task processing executed in step S40-6 will be explained.
FIG. 48 is a flowchart showing command construction task processing.
When the command construction task process is woken up in step S40-6, the process moves to step S46-1, as shown in FIG.
In step S46-1, it is determined whether or not unanalyzed command information is stored in the display command buffer area, and if it is determined that unanalyzed command information is stored (Yes), step S46- If it is determined that unanalyzed command information is not stored (No), the process moves to step S46-3.
In step S46-2, command information analysis processing is executed, and the process moves to step S46-1. In the command information analysis process, unanalyzed command information is analyzed, and processing is executed according to the result of the analysis.
Specifically, in the command information analysis process, if the unanalyzed command information is command information that specifies the start of a display effect, first, from among the animation tables stored in the control ROM 302, the display specified by the command information is selected. Read the animation table corresponding to the production number. Then, in the animation table setting area of the DRAM 304, the read animation table, the frame rate corresponding to the animation table, and display priority information corresponding to the animation table are set (stored/registered). At this time, the frame rate setting table is referred to, the frame rate corresponding to the index number assigned to the animation table is acquired, and the acquired frame rate is set.
On the other hand, if the unanalyzed command information is command information that specifies the end of a display effect, select the animation table that corresponds to the display effect number specified by the command information from among the animation tables set in the animation table setting area. Clear (erase).

In step S46-3, command construction processing is executed, and the command construction task processing is ended. In the command construction process, a display list is constructed in the drawing command buffer area specified as the construction area.
Specifically, in the command construction process, first, a frame information update process is executed.
In the frame information update process, frame information is updated for all animation tables set in the animation table setting area.
Specifically, in the frame information update process, for each animation table set in the animation table setting area, the following frame information is replaced with the currently selected frame information as the target frame information for constructing the display list. Select rank frame information.
In the command construction process, next, command construction processing is executed.
In the command construction process, a display list is constructed in the drawing command buffer area specified as the construction area.
Specifically, in the command construction process, first, a drawing command is generated for each animation table set in the animation table setting area. To do this, among the frame information specified in each animation table, the frame information selected as the target for constructing the display list is acquired. Then, a drawing command is generated based on the acquired frame information.
Here, the drawing command includes the image address of the image data used for drawing, the magnification at the time of drawing the image data (enlargement rate/reduction rate), the coordinates for drawing the image data (coordinates in the frame buffer area), the image data The transmittance (transparency, transparency, transparency), etc. when drawing is specified.
In the command construction process, next, the drawing commands generated for all the animation tables set in the animation table setting area are arranged in a predetermined order to construct a display list.
At this time, the order of the drawing commands corresponding to the animation table is set based on the display priority information of each animation table set in the animation table setting area.
In other words, among the multiple drawing commands, the drawing command with a lower display priority is executed before the drawing command with a higher display priority. They are arranged to build a display list. In other words, the display list is constructed by arranging the plurality of drawing commands so that the drawing command with the lower display priority among the plurality of drawing commands is executed first in the drawing process based on the drawing command. .

(sound interrupt processing)
Next, the sound interrupt process executed by the CPU 310 of the production control board 300 will be described.
FIG. 49 is a flowchart showing sound interrupt processing.
The CPU 310 of the production control board 300 starts the sound interrupt process shown in FIG. 49 at predetermined intervals based on the generation of clock pulses by the clock generation circuit. When the sound interrupt process is started, the process first moves to step S41-1.
In step S41-1, it is determined whether the value set in the initial transfer completion flag area is "1" or not, and it is determined that the value set in the initial transfer completion flag area is "1". If (Yes), the process moves to step S41-2, and if it is determined that the value set in the initial transfer completion flag area is not "1" (it is "0") (No), the corresponding sound is Ends interrupt processing.

In step S41-2, command information analysis processing is executed, and the sound interruption processing is ended. In the command information analysis process, it is determined whether unanalyzed command information is stored in the sound command buffer area, and if it is determined that unanalyzed command information is stored, the command information is processed according to the unanalyzed command information. Execute the specified processing.
Specifically, in the command information analysis process, the command list corresponding to the sound production control number specified by the unanalyzed command information is read from the control ROM 302, and the read command list is set in the control register of the sound circuit 323. As a result, the sound circuit 323 operates according to the command list set in the control register.

(Lamp interrupt processing)
Next, the lamp interrupt process executed by the CPU 310 of the production control board 300 will be explained.
FIG. 50 is a flowchart showing lamp interrupt processing.
The CPU 310 of the production control board 300 starts the lamp interrupt process shown in FIG. 50 at predetermined intervals based on the generation of clock pulses by the clock generation circuit. When the lamp interrupt process is started, the process first moves to step S42-1.
In step S42-1, command information analysis processing is executed, and the lamp interrupt processing is ended. In the command information analysis process, it is determined whether unanalyzed command information is stored in the lamp command buffer area, and if it is determined that unanalyzed command information is stored, the command information is analyzed according to the unanalyzed command information. Execute the specified processing.
Specifically, in the command information analysis process, if the unanalyzed command information is command information that specifies the start of a lamp performance, the compressed lamp drive data corresponding to the lamp performance number specified by the command information is read and read out. Set the compressed lamp drive data to the lamp register. As a result, the lamp controller 317a controls the lamp performance (driving (lighting) of the various lamps 20 and 21) according to the compressed lamp drive data set in the lamp register.

(Movable body interrupt processing)
Next, the movable body interrupt process executed by the CPU 310 of the production control board 300 will be explained.
FIG. 51 is a flowchart showing movable body interrupt processing.
The CPU 310 of the production control board 300 starts the movable body interrupt process shown in FIG. 51 at predetermined intervals based on the generation of clock pulses by the clock generation circuit. When the movable body interrupt process is started, the process first moves to step S43-1.
In step S43-1, register saving processing is executed, and the process moves to step S43-2. In the register saving process, the value of the register is saved to the saving area of the DRAM 304.
In step S43-2, command information analysis processing is executed, and the process moves to step S43-3. In the command information analysis process, it is determined whether unanalyzed command information is stored in the movable object command buffer area, and if it is determined that unanalyzed command information is stored, the unanalyzed command information is Execute the appropriate processing.
Specifically, in the command information analysis process, if the unanalyzed command information is command information specifying the start of a movable object performance, the compression motor drive data specified by the command information is read out, and the read compression motor drive data is is set in the motor register. As a result, the motor controller 317b controls the movable body performance (driving of various motors 23 (various movable bodies)) according to the compression motor drive data set in the motor register.
In step S43-3, register restoration processing is executed, and the movable body interrupt processing is ended. In the register restoration process, the register values saved in step S43-1 are restored.

(Function of pachinko machine 1)
The pachinko machine 1 includes a plurality of speakers 22 (upper left speaker, upper right speaker, middle left speaker, middle right speaker, lower speaker, and woofer). Then, when the volume of the woofer exceeds a predetermined value, it is possible to reduce the volume of the lower speaker.
As a result, when the volume of the woofer exceeds a predetermined value, the volume of the lower speaker is reduced without reducing the volume of the woofer, thereby reducing the current consumption of the lower speaker. Therefore, it is possible to suppress an increase in the total current consumption of the various speakers 22 while preventing the impression of the frequency band corresponding to the woofer from becoming weak. Therefore, it is possible to suppress an increase in current consumption while suppressing a decrease in the effect of sound production.
Furthermore, the pachinko machine 1 includes a plurality of audio buses (audio data processing system/audio data transmission system). Based on the volume of the audio data assigned to the audio buses 6 and 8, the volume of the audio data assigned to the audio bus 5 can be adjusted.
As a result, when the volume of the audio data assigned to the audio buses 6 and 8 exceeds the threshold, the volume of the audio data assigned to the audio buses 6 and 8 is not decreased, and the audio data assigned to the audio bus 5 is By reducing the volume of the data, it is possible to reduce the current consumption when outputting the audio reproduced by the audio bus 5. Therefore, it is possible to prevent the impression of the audio (frequency band) reproduced by the audio buses 6 and 8 from becoming weak, and to suppress an increase in current consumption when outputting audio. Therefore, the objective is to suppress an increase in current consumption while suppressing a decrease in the effect of sound production.

In particular, in the pachinko machine 1, audio based on the audio data assigned to the audio bus 8 is not output from the speaker.
This makes it possible to control whether or not to adjust the volume of audio data assigned to the audio bus 5, depending on whether or not audio data is assigned to the audio bus 8.
Furthermore, in the pachinko machine 1, the same audio data as the audio data assigned to the audio bus 6 is assigned to the audio bus 8, and the audio data is assigned to the audio bus 5 based on the volume of the audio data assigned to the audio bus 8. It is possible to adjust the volume of the recorded audio data.
As a result, while outputting audio based on the audio data assigned to the audio bus 6 (hereinafter referred to as "specific audio data"), depending on whether or not specific audio data is assigned to the audio bus 8, It becomes possible to control whether or not to adjust the volume of the assigned audio data.
Further, in the pachinko machine 1, in the sound production A, the volume of the audio data assigned to the audio bus 5 is adjusted based on the volume of the audio data assigned to the audio buses 6 and 8, and in the sound production B, the volume of the audio data assigned to the audio bus 5 is adjusted. The volume of the audio data assigned to the audio bus 5 is not adjusted based on the volume of the audio data assigned to the buses 6 and 8.
This makes it possible to increase the variety of sound effects.

(Modification 1)
Although the embodiments of the present invention have been described above, various changes can be made to the embodiments described above.
For example, in the embodiment described above, the ducker 355 is set to reduce the volume of the audio bus 5 to which the lower speaker is connected based on the input from the audio bus 8 to which no speaker is connected.
However, the ducker 355 may be set to reduce the volume of the audio bus 5 to which the lower speaker is connected based on the input of the audio bus 6 to which the woofer is connected.
Even with this configuration, when the volume of the woofer exceeds a predetermined value, it is possible to suppress an increase in the total current consumption by the various speakers 22 by reducing the volume of the lower speaker without reducing the volume of the woofer. becomes.

(Modification 2)
Further, in the above embodiment, the compressed audio data stored in the CGROM 303 is preloaded into the preload area of the DRAM 304, and the sound production is executed based on the compressed audio data preloaded into the preload area. .
However, the compressed audio data stored in the CGROM 303 may not be preloaded into the preload area of the DRAM 304, and the sound production may be performed based on the compressed audio data stored in the CGROM 303.

1 Pachinko machine 22 Speaker 200 Main control board 300 Performance control board 301 Microcomputer 302 Control ROM
303 CGROM
304 DRAM
305 Digital amplifier 310 CPU
323 Sound circuit

Claims (2)

comprising a plurality of processing systems including a first processing system and a second processing system ,
Since the sound output means is not connected to the first processing system, the sound output means does not output sound based on the audio data assigned to the first processing system,
A gaming machine characterized in that it is possible to adjust the volume of audio data assigned to the second processing system based on the volume of audio data assigned to the first processing system. comprising a plurality of processing systems including a first processing system, a second processing system, and a third processing system ,
Audio data common to the audio data assigned to the third processing system is assigned to the first processing system by a common volume with the third processing system, and the audio data is assigned to the first processing system. A gaming machine characterized in that it is possible to adjust the volume of the audio data assigned to the second processing system based on the volume of the audio data.

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