JP7374850B2 - Power converter control device and control method - Google Patents

Description

The present invention relates to a control device and a control method for a power converter that converts a DC voltage into a three-phase AC voltage to drive a three-phase AC load, and particularly relates to a power converter or a power converter that uses an overmodulation mode in which a modulated wave is saturated. The present invention relates to a control device and control method suitable for a three-level circuit power converter.

In order to drive an AC motor (motor) that operates at a variable speed, it is necessary to convert DC power supplied by a DC power source into AC power of a desired frequency and voltage.
Generally, a power conversion device (inverter device) that converts DC power into AC power is composed of a main circuit using semiconductor switching elements and a control device that controls the semiconductor switching elements. A desired frequency and voltage are generated by pulse width modulation control (PWM control).

In the field of railway vehicles, AC motors (motors) are driven using power conversion devices (inverter devices) made up of semiconductor switching elements. The switching frequency has to be suppressed mainly due to restrictions on element loss.

For this reason, in the field of railway vehicles, power conversion devices (inverter devices) are generally driven in an asynchronous PWM mode in which the drive frequency (inverter frequency) and switching frequency are asynchronous in the low speed range, and In this range, a method is adopted in which the drive frequency (inverter frequency) and switching frequency are switched to synchronized PWM mode in which the switching frequency is synchronized.

As described in Patent Document 1, in order to output an AC voltage as large as possible within a limited DC power supply voltage, there are many examples of adopting an overmodulation mode in which a modulated wave is saturated in an asynchronous PWM mode. In normal asynchronous PWM mode, that is, a mode in which the modulated wave is not saturated (hereinafter referred to as "sine wave modulation mode"), switching is always performed every carrier wave period, whereas in overmodulation mode, the modulated wave is saturated. No switching is performed during this period.

FIG. 12 is a diagram showing an example of operation in overmodulation mode in a two-level circuit. As shown in FIG. 12, during the period in which the maximum amplitude of the sinusoidal U-phase modulated wave y _mu exceeds the amplitude of the carrier wave, the U-phase upper arm gate signal G _1u does not perform switching.

Similarly, in a three-level circuit, as described in Patent Document 1, the asynchronous PWM mode has two types of modes: dipolar modulation mode and unipolar modulation mode, and these modes are switched according to the output voltage. ing.

FIG. 13 is a diagram illustrating an example of operation in unipolar modulation mode in a three-level circuit. In the unipolar modulation mode in a three-level circuit, the U-phase modulated wave y _mu common to the upper and lower sides is compared with the upper and lower carrier waves, and gate signals G _1u to G _4u of the U-phase 1st to 4th arms are output. ing. In FIG. 13, during the period when the modulated wave y _mu is positive, the gate signal G _1u of the first arm performs switching, and the gate signal G _4u of the fourth arm stops switching. On the other hand, during the period in which the modulated wave y _mu is negative, the gate signal G _1u of the first arm stops switching, and the gate signal G _4u of the fourth arm performs switching.

In this way, the overmodulation mode and the unipolar modulation mode of the three-level circuit have in common that there is a period during which switching is stopped during the fundamental wave period, but they also have common problems. These common issues will be explained using drawings.
FIG. 14 is a diagram showing an example of operation in overmodulation mode in a two-level circuit. In FIG. 14, the control period is set to 1/2 of the carrier wave period.

In the sine wave modulation mode, pulse rising or falling operations are performed alternately every control period. On the other hand, in the overmodulation mode, it is necessary to continuously perform pulse rising or falling operations while the modulated wave is saturated.

In FIG. 14, the modulated wave is saturated in control periods (1) and (2), and pulse rising operations are performed continuously at the beginnings of control periods (1) and (2).

On the other hand, FIG. 15 is a diagram illustrating an operation example in which the modulated wave is saturated in the control period (1) but is not saturated in the control period (2). If you start the pulse at the beginning of control period (1), even if you try to start the pulse after Tpu from the beginning of control period (2), the pulse will not start because the pulse has already started at the beginning of control period (2). It remains on and a pulse error occurs. The output voltage is excessive by Tpu in terms of time.

Comparing the case shown in Fig. 14 and the case shown in Fig. 15, the modulated wave is still saturated in the control period (1), but the difference between the two cases is that the modulated wave in the control period (2) It is the size of That is, when determining the pulse of control period (1), it is necessary to use the modulated wave of control period (2) of the next period.

The technology described in Patent Document 2 is intended to solve such problems, and when determining the pulse of control period (1), the modulated wave of control period (2) is predicted (in Patent Document 2, (described as "read ahead").
FIG. 16 is a diagram showing a specific example of operation (successful example) when making this prediction. Even if the modulated wave is saturated in the control period (1), if the predicted value of the modulated wave in the control period (2) is not saturated, the pulse is caused to fall at the end of the control period (1).

Japanese Patent Application Publication No. 5-344739 Japanese Patent Application Publication No. 9-308262

The technique described in Patent Document 2 poses no problem if the predicted value of the modulated wave in the next cycle is correct, but the predicted value is not always correct. The predicted value of the modulated wave of the next period is estimated by directly extending the magnitude of the modulated wave of the current period and the phase of the current period. When current control is performed every control cycle, when the next cycle actually arrives and the modulated wave is calculated again using the result of current control, it is possible that the modulated wave will be different from the predicted value.

FIG. 17 is a diagram showing an operation example (failure example) when the prediction of the modulated wave is incorrect. In the operation example shown in Figure 17, the modulated wave in control period (2) was initially predicted as not being saturated (the predicted value indicated by the dotted line in the figure), and the pulse was dropped at the end of control period (1). . However, when the modulated wave is actually calculated at the control period (2), the modulated wave is saturated, and even if you try to start the pulse at the beginning of the control period (2), the protection period of the switching element The pulse must be started after the minimum off time T _off (as shown in the figure) has elapsed, and the output voltage will be insufficient by the minimum off time T _off . In other words, it can be seen that a pulse error occurs even if the prediction is incorrect.
Here, the minimum off time T _off is a protection period from when the switching element is turned off until the next on operation is permitted. Similarly, there is also a minimum on time _{T on} which is a protection period from when the switching element is turned on until it is next allowed to turn off.

Generally, in a switching element, the voltage applied to the switching element temporarily fluctuates greatly during a switching operation. In order to prevent destruction of the switching element, a protection period is provided during which the next switching operation is prohibited during a transient state from the start of the switching operation until it settles into a steady state.

However, in recent years, as motors have become more efficient and have lower resistance, the following problems have arisen even when the probability of incorrect prediction is very low.
FIG. 18 is a diagram showing an example of a motor current waveform when the conventional technology (the technology described in Patent Document 2) is applied to an inverter of a three-level circuit that drives an induction motor. As time passes, the output voltage also increases, and the PWM mode is switched from the dipolar modulation mode of the asynchronous PWM mode to the unipolar modulation mode and then to the synchronous PWM mode. Among these, the unipolar modulation mode of the asynchronous PWM mode tends to cause pulse errors, and as shown in FIG. 18, it can be seen that the pulsations and vibrations of the excitation current and torque current are large.

By applying the technique described in Patent Document 2, the probability of pulse errors occurring is suppressed to a low level, but in rare cases, predictions may be incorrect. Particularly in high-efficiency motors, the penalty for erroneous prediction becomes very large. The reason for this will be explained using FIG. 20. FIG. 20 is a diagram illustrating problems with this prior art. Since the technique described in Patent Document 2 performs predictive calculation of the modulated wave when the modulated wave crosses zero, there is a possibility that the prediction is incorrect and a pulse error occurs when the modulated wave crosses zero. In this case, since the magnetic flux applied to the motor is a value obtained by integrating the voltage applied to the motor, even if the pulse error (voltage error) is applied for a moment, the motor magnetic flux will cause a DC error. Further, since the motor magnetic flux is in a proportional relationship with the motor current (this proportionality coefficient is called inductance), the phase current of the motor similarly causes a DC error.

The DC error in the phase current of the motor is attenuated by the resistance component of the motor, so it will disappear after a sufficient amount of time has passed. However, in recent years, as the efficiency of motors has increased, the resistance component has become smaller, and DC errors in the motor's phase currents have remained for a long time. Here, when the phase current of the motor having a DC error is converted into an excitation current component and a torque current component by rotational coordinate transformation, it becomes a component that oscillates at the fundamental frequency. Such vibration components cause noise and vehicle body vibration, and therefore need to be suppressed. If the vibration frequency is low, it can be suppressed by current control or the like, but if the vibration frequency becomes high, it becomes difficult to suppress even by current control.

In order to solve such problems, a typical control device according to the present invention is used as a control device for a power converter that generates switching pulses that drive switching elements that constitute a power converter that converts DC voltage into AC voltage. is equipped with a pulse command calculator that calculates a pulse command value used when generating switching pulses based on a comparison between a modulated wave and a carrier wave for each control period determined by the switching frequency, and the pulse command calculator includes: A first command calculation unit that calculates a first command value using the current value of the modulated wave of the current control cycle and the predicted value of the modulated wave of the next control cycle, and a first command calculation unit that stores the previous value of the pulse command value of the previous control cycle. , a correction amount calculation unit that calculates a pulse correction amount using the prediction error obtained from the previous value and the current value of the first command value of the current control cycle; It is characterized by being comprised of a pulse command correction section that uses the pulse command as a command value.

According to the control device for a power converter according to the present invention, in a PWM mode in which a pulse is temporarily stopped within a fundamental wave period, such as an overmodulation mode of an asynchronous PWM mode or a unipolar modulation mode of a three-level circuit, the next value of a modulated wave ( Even if the predicted value is incorrect, it is possible to suppress the occurrence of pulse errors. Thereby, it is possible to suppress DC errors in the phase currents of the motor and to suppress vibrations in the excitation current and torque current.

1 is a diagram showing an outline of a configuration example when the present invention is applied to a two-level circuit of an inverter. 2 is a diagram showing a detailed configuration of a pulse command generator 21 shown in FIG. 1. FIG. 3 is a diagram showing a detailed configuration of the U-phase pulse command calculator 32 shown in FIG. 2. FIG. 3 is a diagram showing a detailed configuration of a pulse correction amount calculator 35 shown in FIG. 2. FIG. 4 is a diagram showing the operation of the prediction error detector 43 shown in FIG. 3. FIG. 4 is a diagram showing the operation of the pulse corrector 41 shown in FIG. 3. FIG. 1 is a diagram showing an outline of a configuration example when the present invention is applied to a three-level circuit of an inverter; FIG. 8 is a diagram showing a detailed configuration of a pulse command generator 81 shown in FIG. 7. FIG. 9 is a diagram showing a detailed configuration of the U-phase pulse command calculator 92 shown in FIG. 8. FIG. 10 is a diagram showing the operation of the prediction error detector 104 shown in FIG. 9. FIG. 10 is a diagram showing the operation of the pulse corrector 101 shown in FIG. 9. FIG. FIG. 3 is a diagram illustrating an example of operation in overmodulation mode in a two-level circuit. FIG. 3 is a diagram illustrating an example of operation in unipolar modulation mode in a three-level circuit. FIG. 3 is a diagram illustrating an example of operation in overmodulation mode in a two-level circuit. FIG. 7 is a diagram illustrating an example of operation when prediction of a modulated wave is not performed. FIG. 6 is a diagram illustrating an example of operation when a modulated wave is predicted successfully. FIG. 6 is a diagram illustrating an example of an operation when prediction of a modulated wave fails. FIG. 3 is a diagram showing an example of a motor current waveform when a conventional technique is applied. FIG. 3 is a diagram showing an example of a motor current waveform when the present invention is applied. FIG. 2 is a diagram illustrating problems of the prior art. 2 is a diagram showing the operation of the U-phase gate signal generator 22 shown in FIG. 1. FIG. 8 is a diagram showing the operation of the U-phase gate signal generator 82 shown in FIG. 7. FIG.

Embodiments 1 and 2 will be described below as modes for carrying out the present invention with reference to the drawings.

FIG. 1 is a diagram showing an outline of a configuration example when the present invention is applied to a two-level circuit of an inverter, which is a power converter, as a first embodiment of the present invention.

The power converter according to the first embodiment has an AC motor 1 connected to the output side, receives DC voltage from a DC voltage source via a smoothing capacitor 10,
a U-phase upper arm element 11 that connects the positive side potential of the DC voltage (hereinafter simply referred to as "positive side potential") and the U-phase terminal of the AC motor 1;
a U-phase lower arm element 12 that connects the negative side potential of the DC voltage (hereinafter simply referred to as "negative side potential") and the U-phase terminal of the AC motor 1;
a V-phase upper arm element 13 that connects the positive side potential and the V-phase terminal of the AC motor 1;
a V-phase lower arm element 14 that connects the negative side potential and the V-phase terminal of the AC motor 1;
It is composed of a W-phase upper arm element 15 that connects the positive potential and the W-phase terminal of the AC motor 1, and a W-phase lower arm element 16 that connects the negative potential and the W-phase terminal of the AC motor 1.

A control device 20 that controls the power converter uses the fundamental wave phase θ, the fundamental wave phase increment Δθ, and the modulation rate Y _mr as input signals, and sends gate signals to the upper and lower arm elements 11 to 16 of the U to W phases. G _1u , G _1v , G _1w , G _2u , G _2v and G _2w are output.

Further, this control device 20 inputs the fundamental wave phase θ, the fundamental wave phase increment Δθ, and the modulation rate Y _mr , and calculates the corrected U to W phase pulse change times T _pu ″, T _pv ″, and T _pw ″. a pulse command generator 21 that outputs pulse change directions F _pu , F _pv and F _pw of U to W phases;
a U-phase gate signal generator 22 that receives the corrected U-phase pulse change time T _pu ″ and U-phase pulse change direction F _pu as input and outputs U-phase upper and lower arm gate signals G _1u and G _2u ;
A V-phase gate signal generator 23 receives the corrected V-phase pulse change time T _pv ″ and V-phase pulse change direction F _pv as input, and outputs V-phase upper/lower arm gate signals G _1v and G _2v ;
It is composed of a W-phase gate signal generator 24 that receives the corrected W-phase pulse change time T _pw ″ and W-phase pulse change direction F _pw as input, and outputs W-phase upper/lower arm gate signals G _1w and G _2w . .

Here, all of the U to W phase gate signal generators 22 to 24 have the same internal configuration, and only the input and output signals are different. Therefore, as a representative example, the operation of the U-phase gate signal generator 22 will be explained using FIG. 21.

The U-phase gate signal generator 22 inputs the corrected U-phase pulse change time T _pu ″ and the U-phase pulse change direction F _pu for each control period, and calculates the value F _pu ′ of the previous cycle of the U-phase pulse change direction. Here, the pulse change time T _pu ″ indicates the time of change from the beginning of the control period, and in FIG. 21, the beginning of the control period is indicated by a “▼” mark.

F _pu and F _pu ' take either a rising or falling value, and each takes a binary value of ±1, where +1 is a rising case and -1 is a falling case. Therefore, with these combinations, there are a total of four states (states (A) to (D) as shown in FIG. 21).

Next, operations in states (A) to (D) will be explained.
In the case of state (A), since the gate signal G _1u of the U-phase upper arm was raised in the previous cycle, there is no change even if an attempt is made to raise G _1u in the current cycle.

In the case of state (B), since the gate signal G _1u of the U-phase upper arm was raised in the previous cycle, G _1u is lowered after T _pu ″ has elapsed from the beginning of the current cycle.

In the case of state (C), since the gate signal G _1u of the U-phase upper arm was lowered in the previous cycle, G _1u is raised after T _pu ″ has elapsed from the beginning of the current cycle.

In the case of state (D), since the gate signal G _1u of the U-phase upper arm was lowered in the previous cycle, there is no change even if an attempt is made to lower G _1u in the current cycle.

On the other hand, since the gate signal G _2u of the U-phase lower arm has a complementary relationship with the gate signal G _1u of the U-phase upper arm, common to states (A) to (D), one of them is turned on. When one is on, the other is always off.

FIG. 2 is a diagram showing a detailed configuration of the pulse command generator 21 shown in FIG. 1.
The pulse command generator 21 inputs the fundamental wave phase θ, the fundamental wave phase increment Δθ, and the modulation rate Y _mr , and generates the corrected U to W phase pulse change times T _pu ″, T _pv ″, T _pw ″, and U ~ W phase pulse change directions F _pu , F _pv and F _pw are output.

Further, the pulse command generator 21 includes a U-phase pulse command calculator 32, a V-phase pulse command calculator 33, a W-phase pulse command calculator 34, a pulse correction amount calculator 35, a subtracter 30, and an adder 31. Ru.

It is assumed that the U-phase voltage phase θ _u is equal to the fundamental wave phase θ. The subtracter 30 inputs the fundamental wave phase θ and outputs the V-phase voltage phase θ _v delayed by 120 degrees, and the adder 31 inputs the fundamental wave phase θ and outputs the W-phase voltage phase θ w delayed by 120 degrees _. Output.

The U-phase pulse command calculator 32 inputs the U-phase voltage phase θ _u , the fundamental wave phase increment Δθ, the modulation rate Y _mr , and the pulse correction amount ΔT _c output by the pulse correction amount calculator 35 , and outputs the corrected The U-phase pulse change time T _pu ″, the U-phase pulse change direction F _pu , and the U-phase prediction error ΔT _u are output.

The V-phase pulse command calculator 33 inputs the V-phase voltage phase θ _v , the fundamental wave phase increment Δθ, the modulation rate Y _mr , and the pulse correction amount ΔT _c output from the pulse correction amount calculation 35 , and receives the corrected The V-phase pulse change time T _pv '', the V-phase pulse change direction F _pv and the V-phase prediction error ΔT _v are output.

The W-phase pulse command calculator 34 inputs the W-phase voltage phase θ _w , the fundamental wave phase increment Δθ, the modulation rate Y _mr , and the pulse correction amount ΔT _c output from the pulse correction amount calculator 35 , and outputs the corrected The W-phase pulse change time T _pw '', the W-phase pulse change direction F _pw and the W-phase prediction error ΔT _w are output.

The pulse correction amount calculator 35 inputs the prediction errors ΔT _u , ΔT _v and ΔT _w of each phase outputted by the U to W phase pulse command calculations 32 to 34, and outputs the pulse correction amount ΔT _c .

The internal configurations of the U to W phase pulse command calculators 32 to 34 are all the same, and only the input and output signals are different. Therefore, the details of the U-phase pulse command calculator 32 will be explained using FIG. 3 as a representative example.

FIG. 3 is a diagram showing a detailed configuration of the U-phase pulse command calculator 32 shown in FIG. 2. As shown in FIG.
The U-phase pulse command calculator 32 includes an ideal pulse command calculator 40, a pulse corrector 41, a delay circuit 42, and a prediction error detector 43.

The ideal pulse command calculator 40 inputs the U-phase voltage phase θ _u , the fundamental wave phase increment Δθ, and the modulation rate Y _mr , and outputs the ideal U-phase pulse change time T _pu and the U-phase pulse change direction F _pu .

The delay circuit 42 inputs the U-phase pulse change direction F _pu and outputs the value of the previous cycle (previous value) F _pu '.

The pulse corrector 41 inputs the ideal U-phase pulse change time T _pu , the U-phase pulse change direction F _pu , the previous value F pu _' , and the pulse correction amount ΔT _c , and calculates the corrected U-phase pulse change time T. Output _pu ''.

The prediction error detector 43 inputs the ideal U-phase pulse change time T _pu , the U-phase pulse change direction F _pu and the previous value F _pu' , and outputs the U-phase prediction error ΔT _u .

Next, the operation of the ideal pulse command calculator 40 will be explained.
The U-phase modulated wave y _mu1 of the current cycle and the predicted value y _mu2 of the U-phase modulated wave of the next cycle are expressed as follows using the U-phase voltage phase θ _u , the fundamental wave phase increment Δθ, and the modulation rate Y _mr .
y _mu1 =Y _mr ×sin(θ _u )
y _mu2 =Y _mr ×sin(θ _u +Δθ)

Further, 1/2 of the reciprocal of the carrier wave frequency (carrier wave period) is set as the control period _Tc , and the gradient (upward/downward) of the carrier wave is switched for each control period _Tc . At this time, the ideal U-phase pulse change time T _pu and U-phase pulse change direction F _pu are determined as follows.
・When y _mu1 ≧+1 and y _mu2 ≧+1, F _pu =+1, T _pu =0
・When y _mu1 ≦-1 and y _mu2 ≦-1, F _pu =-1, T _pu =0
・Other than the above,
- When the carrier wave has an upward slope, F _pu = -1, T _pu = T _c × (1+y _mu1 )/2
- When the carrier wave is downward slope, F _pu = +1, T _pu = T _c × (1-y _mu1 )/2

The ideal pulse command calculator 40 reduces the pulse error as much as possible by using the predicted value of the next period's modulated wave, and if the predicted value is correct, the pulse is accurately output.

Next, the operation of the prediction error detector 43 will be explained using FIG. 5.
As shown in FIG. 3, the prediction error detector 43 inputs the ideal U-phase pulse change time T _pu , the U-phase pulse change direction F _pu , and the previous value F _pu ' for each control period, and calculates the U-phase prediction error ΔT. Output _u . Here, the ideal pulse change time T _pu indicates the time of change from the beginning of the control cycle. Similarly, the actual pulse change time T _pu ' also indicates the time of change from the beginning of the control period. The actual pulse change time T _pu ' is a pulse change time that can actually be output, taking into consideration constraints such as the minimum on time and minimum off time of the switching element.

In the case of state (A), since the gate signal G _1u of the U-phase upper arm was raised in the previous cycle, there is no change even if an attempt is made to raise G _1u in the current cycle. In this case, since it is equivalent to raising G _1u at the beginning of the control period, the actual pulse change time T _pu '=0. At this time, U-phase pulse error ΔT _u =T _pu -T _pu '≧0. Since ΔT _u ≧0, the output voltage of the U phase becomes an excessive output voltage.

In the case of state (B), since the gate signal G _1u of the U-phase upper arm was raised in the previous cycle, ideally, G _1u is lowered after T _pu has elapsed from the beginning of the current cycle. However, due to the limitations of the switching elements, G _1u is actually turned down after T _pu '. At this time, the U-phase pulse error ΔT _u =T _pu '−T _pu .

In the case of state (C), since the gate signal G _1u of the U-phase upper arm was lowered in the previous cycle, ideally, G _1u is raised after T _pu has elapsed from the beginning of the current cycle. However, due to the limitations of the switching elements, G _1u is actually started up after T _pu '. At this time, the U-phase pulse error ΔT _u =T _pu -T _pu '.

In the case of state (D), since the gate signal G _1u of the U-phase upper arm was lowered in the previous cycle, there is no change even if an attempt is made to lower G _1u in the current cycle. In this case, since it is equivalent to falling G _1u at the beginning of the control period, the actual pulse change time T _pu '=0. At this time, the U-phase pulse error ΔT _u =T _pu ′−T _pu ≦0. Since ΔT _u ≦0, the output voltage of the U phase becomes insufficient.

Furthermore, the operation of the pulse corrector 41 will be explained using FIG.
As shown in FIG. 3, the pulse corrector 41 inputs the ideal U-phase pulse change time T _pu , the U-phase pulse change direction F _pu , the previous value F _pu ′, and the pulse correction amount ΔT _c for each control cycle, The corrected U-phase pulse change time T _pu ″ is output. Here, the ideal pulse change time T _pu indicates the time of change from the beginning of the control cycle. Similarly, the corrected pulse change time T _pu ″ also indicates the time that changes from the beginning of the control cycle.

In the case of state (A), since the gate signal G _1u of the U-phase upper arm was raised in the previous cycle, there is no change even if an attempt is made to raise G _1u in the current cycle. In this case, it is equivalent to starting G _1u at the beginning of the control cycle, so only when the pulse correction amount ΔT _c =T _pu , the pulse change time after correction T _pu ″=T _pu - ΔT _c . Then, T _pu ″=0, and accurate pulses can be output. If the pulse correction amount ΔT _c ≠T _pu , the pulse cannot be completely corrected and a pulse error remains.

In the case of state (B), since the gate signal G _1u of the U-phase upper arm was raised in the previous cycle, ideally, G _1u is lowered after T _pu has elapsed from the beginning of the current cycle. However, in reality, G _1u is stopped after the corrected pulse change time T _pu ″=T _pu +ΔT _c has elapsed.

In the case of state (C), since the gate signal G _1u of the U-phase upper arm was lowered in the previous cycle, ideally, G _1u is raised after T _pu has elapsed from the beginning of the current cycle. However, in reality, G _1u is started after the corrected pulse change time T _pu ″=T _pu −ΔT _c has elapsed.

In the case of state (D), since the gate signal G _1u of the U-phase upper arm was lowered in the previous cycle, there is no change even if an attempt is made to lower G _1u in the current cycle. In this case, it is equivalent to falling G _1u at the beginning of the control cycle, so only when the pulse correction amount ΔTc = -T _pu , the pulse change time after correction T _pu '' = T _pu + ΔT _c . , T _pu ″=0, and accurate pulses can be output. If the pulse correction amount ΔT _c ≠−T _pu , the pulse cannot be completely corrected and a pulse error remains.

To summarize the above, there are four states (A) to (D) depending on the combination of the U-phase pulse change direction F _pu and the previous value F _pu ′, but among these, states (B) and (C) are In this case, the pulse can be corrected according to the desired pulse correction amount ΔT _c . On the other hand, in the cases of states (A) and (D), the pulse may not be completely corrected and a pulse error may remain.

FIG. 4 is a diagram showing a detailed configuration of the pulse correction amount calculator 35 shown in FIG. 2. As shown in FIG.
The pulse correction amount calculator 35 inputs the prediction errors ΔT _u , ΔT _v and ΔT _w output by the U to W phase pulse command calculations 32 to 34, and outputs the pulse correction amount ΔT _c .

The pulse correction amount calculator 35 includes a maximum value selection circuit 50, a minimum value selection circuit 51, and a correction amount selection circuit 52.

The maximum value selection circuit 50 inputs the prediction errors ΔT _u , ΔT _v and ΔT _w and a zero value, and outputs the maximum value ΔT _max of these inputs.

The minimum value selection circuit 51 inputs the prediction errors ΔT _u , ΔT _v and ΔT _w and a zero value, and outputs the minimum value ΔT _min of these inputs.

The correction amount selection circuit 52 inputs the maximum value ΔT _max and minimum value ΔT _min of the prediction error, and outputs the pulse correction amount ΔT _c .

An example of the operation of the correction amount selection circuit 52 is shown.
i) When ΔT _max >0 and ΔT _min <0, ΔT _c =0
ii) When ΔT _max >0 and ΔT _min =0, ΔT _c =ΔT _max
iii) When ΔT _max =0 and ΔT _min <0, ΔT _c =ΔT _min
iv) When ΔT _max =0 and ΔT _min =0, ΔT _c =0

In most cases, the three-phase prediction errors ΔT _u , ΔT _v and ΔT _w are zero values, and even when they take non-zero values, only one phase has a probability that two phases take non-zero values at the same time. is considered to be very low. Therefore, in most cases, one of the cases ii) to iv above occurs, and case i) is considered to rarely occur. Therefore, in the above operation example, nothing is intentionally done in case i), and the pulse correction amount ΔT _c =0.

FIG. 7 is a diagram showing an outline of a configuration example when the present invention is applied to a three-level circuit of an inverter as a second embodiment of the present invention.
The power converter according to the second embodiment connects the AC motor 1 to the output side, receives DC voltage from a DC voltage source through a series circuit of an upper smoothing capacitor 60 and a lower smoothing capacitor 61,
The U-phase first arm element 62 and the U-phase are connected in series between the positive potential of the DC voltage supplied by the upper smoothing capacitor 60 (hereinafter simply referred to as "positive potential") and the U-phase terminal of the AC motor 1. second arm element 63,
A U-phase third arm element 64 connected in series between the negative potential of the DC voltage supplied by the lower smoothing capacitor 61 (hereinafter simply referred to as "negative potential") and the U-phase terminal of the AC motor 1 is connected in series. U-phase fourth arm element 65,
The connection point potential between the upper smoothing capacitor 60 and the lower smoothing capacitor 61 (hereinafter referred to as "neutral point potential"), and the connection point between the U-phase first arm element 62 and the U-phase second arm element 63. A U-phase first clamp diode 66 connected between the
a U-phase second clamp diode 67 connected between the neutral point potential and the connection point between the U-phase third arm element 64 and the U-phase fourth arm element 65;
a V-phase first arm element 68 and a V-phase second arm element 69 connected in series between the positive side potential and the V-phase terminal of the AC motor 1;
a V-phase third arm element 70 and a V-phase fourth arm element 71 connected in series between the negative side potential and the V-phase terminal of the AC motor 1;
a V-phase first clamp diode 72 connected between the neutral point potential and the connection point between the V-phase first arm element 68 and the V-phase second arm element 69;
a V-phase second clamp diode 73 connected between the neutral point potential and the connection point between the V-phase third arm element 70 and the V-phase fourth arm element 71;
a W-phase first arm element 74 and a W-phase second arm element 75 connected in series between the positive side potential and the W-phase terminal of the AC motor 1;
a W-phase first arm element 76 and a W-phase fourth arm element 77 connected in series between the negative side potential and the W-phase terminal of the AC motor 1;
A W-phase first clamp diode 78 connected between the neutral point potential and the connection point between the W-phase first arm element 74 and the W-phase second arm element 75; It is composed of a W-phase second clamp diode 79 connected between the arm element 76 and the connection point of the W-phase fourth arm element 77.

A control device 80 included in the power converter inputs the fundamental wave phase θ, the fundamental wave phase increment Δθ, and the modulation rate Y _mr , and controls the first to fourth arm elements 62 to 65, 68 to 71, and 74 of the U to W phases. -77 output gate signals G _1u , G _1v , G _1w , G _2u , G _2v , G _2w , G _3u , G 3v , G _3w , G _4u , G _4v and _{G 4w .}

Further, this control device 80 inputs the fundamental wave phase θ, the fundamental wave phase increment Δθ, and the modulation rate Y _mr ,
Corrected U to W phase pulse change times T _pu ″, T _pv ″, T _pw ″, T _nu ″, T _nv ″, and T _nw ″ and U to W phase pulse change directions F _pu , F _pv , F _pw , a pulse command generator 81 that outputs F _nu , F _nv and F _nw ;
The corrected U-phase pulse change times T _pu '' and T _nu '' and U-phase pulse change directions F _pu and F _nu are input, and U-phase 1st to 4th arm gate signals G _1u , G _2u , G _3u and G _{4u are} input. a U-phase gate signal generator 82 that outputs
The corrected V-phase pulse change times T _pv ″ and T _nv ″ and V-phase pulse change directions F _pv and F _nv are input, and the V-phase 1st to 4th arm gate signals G _1v , G _2v , G _3v and G _{4v are} input. The V-phase gate signal generator 83 outputs the corrected W-phase pulse change times T _pw '' and T _nw '' and the W-phase pulse change directions F _pw and F _nw , and outputs the W-phase 1st to 4th arm gates. It is composed of a W-phase gate signal generator 84 that outputs signals G _1w , G _2w , G _3w and G _4w .

The U-phase gate signal generator 82 inputs the corrected U-phase pulse change times T _pu ″ and T _nu ″ and the U-phase pulse change directions F _pu and F _nu , and generates the U-phase first to fourth arm gate signals G _1u , G _2u , G _3u and G _4u .

The V-phase gate signal generator 83 inputs the corrected V-phase pulse change times T _pv '' and T _{nv '} ' and V-phase pulse change directions F _pv and F _nv , and generates the V-phase first to fourth arm gate signals G _1v , G _2v , G _3v and G _4v .

The W-phase gate signal generator 84 inputs the corrected U-phase pulse change times T _pw '' and T _nw '' and W-phase pulse change directions F _pw and F _nw , and generates the W-phase first to fourth arm gate signals G _1w. , G _2w , G _3w and G _4w .

All of the U to W phase gate signal generators 82 to 84 have the same internal configuration, and only the input and output signals are different. Therefore, as a representative example, the operation of the U-phase gate signal generator 82 will be explained using FIG. 22.

The U-phase gate signal generator 82 calculates the corrected U-phase first arm pulse change time T _pu ″, U-phase fourth arm pulse change time T _nu ″, and U-phase first arm pulse for each control cycle. The change direction F _pu and the pulse change direction F _nu of the U-phase fourth arm are input, and the values F _pu ' and F _nu ' of the previous cycle in the U-phase pulse change direction are stored. Here, the pulse change times T _pu ″ and T _nu ″ indicate changing times from the beginning of the control period, and in FIG. 22, the beginning of the control period is indicated by a “▼” mark.

F _pu , F _nu , F _pu ′ and F _nu ′ take either the value of start-up or fall, and if it is +1 for start-up and -1 for fall, then they are each ±1 of 2 Takes a value. However, in order to prevent arm short circuits, it is prohibited to start up both F _pu and F _nu within the same control cycle. That is, F _pu =+1 and F _nu =+1, and there are three combinations of F _pu and F _nu . Similarly, there are three combinations of the previous values F _pu ' and F _nu '. Therefore, with these combinations, there are a total of nine states (hereinafter referred to as states (A) to (I) as shown in FIG. 22).

Next, operations in states (A) to (I) will be explained.
In the case of state (A), in the previous cycle, the gate signal G _1u of the U-phase first arm was raised and the gate signal G _4u of the U-phase fourth arm was lowered, so in the current cycle, G _1u is raised. Even if I try to turn it up and turn down _G4u , there is no change.

In the case of state (B), in the previous cycle, the gate signal G _1u of the U-phase first arm was raised and the gate signal G _4u of the U-phase fourth arm was lowered, so T _pu ″ from the beginning of the current cycle. G _1u is turned off after 3 seconds have elapsed. On the other hand, there is no change in G _4u .

In the case of state (C), in the previous cycle, the gate signal _G1u of the U-phase first arm was raised and the gate signal _G4u of the U-phase fourth arm was lowered, so T _pu '' from the beginning of the current cycle. G _1u is brought down after T nu ″ has elapsed, and G _4u is started up after T _nu ″ has elapsed.

In the case of state (D), in the previous cycle, the gate signal G _1u of the U-phase first arm fell and the gate signal G _4u of the U-phase fourth arm fell, so T _pu ″ from the beginning of the current cycle. G _1u is started up after 3 seconds have elapsed.On the other hand, there is no change in G _4u .

In the case of state (E), in the previous cycle, the gate signal G _1u of the U-phase first arm was brought down and the gate signal G _4u of the U-phase fourth arm was brought down, so in the current cycle, G _1u is brought down. Even if I try to lower the G _4u , there is no change.

In the case of state (F), in the previous cycle, the gate signal G _1u of the U-phase first arm fell, and the gate signal G _4u of the U-phase fourth arm fell, so T _nu ″ from the beginning of the current cycle G _4u is started up after 3 seconds have elapsed.On the other hand, there is no change in G _1u .

In the case of state (G), in the previous cycle, the gate signal G _1u of the U-phase first arm fell and the gate signal G _4u of the U-phase fourth arm rose, so T _nu ″ from the beginning of the current cycle. G _4u is brought down after T pu ″ has elapsed, and G _1u is started up after T _pu ″ has elapsed.

In the case of state (H), in the previous cycle, the gate signal G _1u of the U-phase first arm fell and the gate signal G _4u of the U-phase fourth arm rose, so T _nu ″ from the beginning of the current cycle. G _4u is turned down after 4 seconds have elapsed. On the other hand, there is no change in G _1u .

In the case of state (I), in the previous cycle, the gate signal G _1u of the U-phase first arm was brought down and the gate signal G _4u of the U-phase fourth arm was raised, so in the current cycle, G _1u is brought down. Even if I try to lower it and start up G _4u , there is no change.

Note that, common to states (A) to (I), the gate signal G _2u of the U-phase second arm has a complementary relationship with the gate signal G _4u of the U-phase fourth arm, and when one of them is on, , the other is always turned off. Further, the gate signal G _3u of the U-phase third arm is complementary to the gate signal G _1u of the U-phase first arm, and when one is on, the other is always off.

FIG. 8 is a diagram showing a detailed configuration of the pulse command generator 81 shown in FIG. 7.
The pulse command generator 81 inputs the fundamental wave phase θ, the fundamental wave phase increment Δθ, and the modulation rate Y _mr , and generates the corrected U to W phase pulse change times T _pu ″, T _pv ″, T _pw ″, T _nu '', _Tnv '', and _Tnw '' and the U to W phase pulse change directions _Fpu , _Fpv , _Fpw , _Fnu , _Fnv , and _Fnw are output.

The pulse command generator 81 includes a U-phase pulse command calculator 92, a V-phase pulse command calculator 93, a W-phase pulse command calculator 94, a pulse correction amount calculator 95, a subtracter 90, and an adder 91. Ru. Here, it is assumed that the U-phase voltage phase θ _u is equal to the fundamental wave phase θ. The subtracter 90 inputs the fundamental wave phase θ and outputs a V-phase voltage phase θ _v delayed by 120 degrees. The adder 91 inputs the fundamental wave phase θ and outputs a W-phase voltage phase θ _w advanced by 120 degrees.

The U-phase pulse command calculator 92 inputs the U-phase voltage phase θ _u , the fundamental wave phase increment Δθ, the modulation rate Y _mr , and the pulse correction amount ΔT _c output by the pulse correction amount calculator 35, and outputs the corrected U Phase pulse change times T _pu ″ and T _nu ″, U-phase pulse change directions F _pu and F _nu , and U-phase prediction error ΔT _u are output.

The V-phase pulse command calculator 93 inputs the V-phase voltage phase θ _v , the fundamental wave phase increment Δθ, the modulation rate Y _mr , and the pulse correction amount ΔT _c output by the pulse correction amount calculator 35 , and receives the corrected V Phase pulse change times T _pv ″ and T _nv ″, V-phase pulse change directions F _pv and F _nv , and V-phase prediction error ΔT _v are output.

The W-phase pulse command calculator 94 inputs the W-phase voltage phase θ _w , the fundamental wave phase increment Δθ, the modulation rate Y _mr , and the pulse correction amount ΔT _c output from the pulse correction amount calculator 35 , and outputs the corrected W Phase pulse change times T _pw ″ and T _nw ″, W-phase pulse change directions F _pw and F _nw , and W-phase prediction error ΔT _w are output.

The pulse correction amount calculator 35 may have exactly the same configuration as the pulse correction amount calculator 35 shown in FIG.

The internal configurations of the U to W phase pulse command calculators 92 to 94 are all the same, and only the input and output signals are different. Therefore, as a representative example, the detailed configuration of the U-phase pulse command calculator 92 will be explained using FIG. 9.

FIG. 9 is a diagram showing a detailed configuration of the U-phase pulse command calculator 92 shown in FIG. 8.
The U-phase pulse command calculator 92 includes an ideal pulse command calculator 100, a pulse corrector 101, delay circuits 102 and 103, and a prediction error detector 104.

The ideal pulse command calculator 100 inputs the U-phase voltage phase θ _u , the fundamental wave phase increment Δθ, and the modulation rate Y _mr , and calculates the ideal U-phase pulse change times T _pu and T _nu and the U-phase pulse change direction F _pu . Output F _nu .

The delay circuit 102 inputs the U-phase pulse change direction F _pu and outputs the value of the previous cycle (previous value) F _pu '.
The delay circuit 103 inputs the U-phase pulse change direction F _nu and outputs the value of the previous cycle (previous value) F _nu '.

The pulse corrector 101 inputs the ideal U-phase pulse change times T _pu and T _nu , the U-phase pulse change directions F _pu and F _nu , the previous values F _pu ′ and F _nu ′, and the pulse correction amount ΔT _c . The U-phase pulse change times T _pu ″ and T _nu ″ are output.

The prediction error detector 103 inputs the ideal U-phase pulse change times T _pu and T _nu , the U-phase pulse change directions F _pu and F _nu , and the previous values F _pu ′ and F _nu ′, and calculates the U-phase prediction error ΔT _u . Output.

Next, the operation of the ideal pulse command calculator 100 will be explained.
The U-phase modulated wave y _mu1 of the current cycle and the predicted value y _mu2 of the U-phase modulated wave of the next cycle are calculated as follows using the U-phase voltage phase θ _u , the fundamental wave phase increment Δθ, and the modulation rate Y _mr . represent.
y _mu1 =Y _mr ×sin(θ _u )
y _mu2 =Y _mr ×sin(θ _u +Δθ)

Further, 1/2 of the reciprocal of the carrier wave frequency (carrier wave period) is set as the control period _Tc , and the gradient (upward/downward) of the carrier wave is switched for each control period. At this time, the ideal U-phase pulse change time T _pu and U-phase pulse change direction F _pu are determined as follows.
・When y _mu1 ≧+1 and y _mu2 ≧+1, F _pu =+1, T _pu =0
・When y _mu1 < 0 and y _mu2 < 0, F _pu = -1, T _pu = 0
- In cases other than the above, y _mu1 ′=max (0, y _mu1 ),
・When the carrier wave has an upward slope, F _pu = -1, T _pu = T _c × (0+y _mu1 ')
・When the carrier wave is downward slope, F _pu = +1, T _pu = T _c × (1-y _mu1 ')

Further, the ideal U-phase pulse change time T _nu and the U-phase pulse change direction F _nu are determined as follows.
・When y _mu1 ≦-1 and y _mu2 ≦-1, F _nu =+1, T _nu =0
・When y _mu1 > 0 and y _mu2 > 0, F _nu = -1, T _nu = 0
・Other than the above,
- When the carrier wave has an upward slope, F _nu = +1, T _nu = T _c × (1 + y _mu1 )
・When the carrier wave has a downward slope, F _nu = -1, T _nu = T _c × (0-y _mu1 )

The ideal pulse command calculator 100 reduces the pulse error as much as possible by using the predicted value of the modulated wave of the next cycle, and if the predicted value is correct, the pulse is accurately output.

The operation of the prediction error detector 104 will be explained using FIG. 10.
Ideal pulse change times T _pu and T _nu indicate times of change from the beginning of the control period. Similarly, the actual pulse change times T _pu ' and T _nu ' indicate the time of change from the beginning of the control period. The actual pulse change times T _pu ' and T _nu ' indicate the pulse change times that can actually be output, taking into consideration constraints such as the minimum on-time and minimum off-time of the switching element.

In the case of state (A), in the previous cycle, the gate signal G _1u of the U-phase first arm was raised and the gate signal G _4u of the U-phase fourth arm was lowered, so in the current cycle, G _1u is raised. Even if I try to turn it up and turn down _G4u , there is no change. In this case, since it is equivalent to raising G _1u and falling G _4u at the beginning of the control period, the actual pulse change times T _pu ′=0 and T _nu ′=0. At this time, the U-phase pulse error ΔT _u =T _pu -T _pu '+T _nu -T _nu '.

In the case of state (B), in the previous cycle, the gate signal G _1u of the U-phase first arm was raised and the gate signal G _4u of the U-phase fourth arm was lowered, so ideally, the current cycle After T _pu has elapsed from the beginning, G _1u is turned off. However, due to the limitations of the switching elements, in reality, G _1u falls after T _pu ′, resulting in an error of T _pu ′−T _pu . On the other hand, there is no change in _G4u . Since this is equivalent to lowering G _4u at the beginning of the control period, the actual pulse change time T _nu '=0, resulting in an error of T _nu - _{T nu} '. Combining these, the U-phase pulse error ΔT _u =T _pu ′−T _pu +T _nu −T _nu ′ is obtained.

In the case of state (C), in the previous cycle, the gate signal G _1u of the U-phase first arm is raised and the gate signal G _4u of the U-phase fourth arm is lowered, so ideally, the current cycle After T _pu has elapsed from the beginning, G _1u is turned off. However, due to the limitations of the switching elements, in reality, G _1u falls after T _pu ′, resulting in an error of T _pu ′−T _pu . On the other hand, regarding G _4u , ideally, G _4u is started up after T _nu has elapsed from the beginning of the current cycle. However, due to the limitations of the switching elements, G _4u is actually turned on after T _nu ′, resulting in an error of T _nu ′−T _nu . Combining these, ΔT _u =T _pu ′−T _pu +T _nu ′−T _nu .

In the case of state (D), in the previous cycle, the gate signal G _1u of the U-phase first arm fell and the gate signal G _4u of the U-phase fourth arm fell, so ideally, the current cycle Start up G _1u after T _pu has elapsed from the beginning. However, due to the limitations of the switching elements, G _1u is actually turned on after T _pu ′, which causes an error of T _pu −T _pu ′. On the other hand, there is no change in _G4u . Since this is equivalent to lowering G _4u at the beginning of the control period, the actual pulse change time T _nu '=0, resulting in an error of T _nu - _{T nu} '. Combining these, the U-phase pulse error ΔT _u =T _pu −T _pu ′+T _nu −T _nu ′ is obtained.

In the case of state (E), in the previous cycle, the gate signal G _1u of the U-phase first arm was brought down and the gate signal G _4u of the U-phase fourth arm was brought down, so in the current cycle, G _1u is brought down. Even if I try to lower the G _4u , there is no change. In this case, since it is equivalent to falling G _1u and falling G _4u at the beginning of the control period, the actual pulse change times T _pu ′=0 and T _nu ′=0. At this time, the U-phase pulse error ΔT _u =T _pu ′−T _pu +T _nu −T _nu ′.

In the case of state (F), in the previous cycle, the gate signal G _1u of the U-phase first arm fell, and the gate signal G _4u of the U-phase fourth arm fell, so ideally, the current cycle Start up G _4u after T _nu has elapsed from the beginning. However, due to the limitations of the switching elements, G _4u is actually turned on after T _nu ′, resulting in an error of T _nu ′−T _nu . On the other hand, G _1u remains unchanged. Since this is equivalent to falling G _1u at the beginning of the control period, the actual pulse change time T _pu ′=0, and an error of T _pu ′−T _pu occurs. Combining these, the U-phase pulse error ΔT _u =T _pu ′−T _pu +T _nu ′−T _nu .

In the case of state (G), in the previous cycle, the gate signal G _1u of the U-phase first arm was lowered and the gate signal G _4u of the U-phase fourth arm was raised, so ideally, the current cycle Start up G _1u after Tpu has elapsed from the beginning. However, due to the limitations of the switching elements, G _1u is actually turned on after T _pu ′, which causes an error of T _pu −T _pu ′. On the other hand, regarding G _4u , ideally, G _4u is brought down after T _nu has elapsed from the beginning of the current cycle. However, due to the limitations of the switching elements, G _4u is actually turned down after T _nu ′, resulting in an error of T _nu −T _nu ′. Combining these, ΔT _u =T _pu -T _pu '+T _nu -T _nu '.

In the case of state (H), in the previous cycle, the gate signal G _1u of the U-phase first arm was lowered and the gate signal G _4u of the U-phase fourth arm was raised, so ideally, the current cycle After T _nu has elapsed from the beginning, G _4u is turned off. However, due to the limitations of the switching elements, G _4u is actually turned down after T _nu ′, resulting in an error of T _nu −T _nu ′. On the other hand, G _1u remains unchanged. Since this is equivalent to falling G _1u at the beginning of the control period, the actual pulse change time T _pu ′=0, and an error of T _pu ′−T _pu occurs. Combining these, the U-phase pulse error ΔT _u =T _pu ′−T _pu +T _nu −T _nu ′ is obtained.

In the case of state (I), in the previous cycle, the gate signal G _1u of the U-phase first arm was brought down and the gate signal G _4u of the U-phase fourth arm was raised, so in the current cycle, G _1u is brought down. Even if I try to lower it and start up G _4u , there is no change. In this case, since it is equivalent to falling G _1u and rising G _4u at the beginning of the control period, the actual pulse change times T _pu ′=0 and T _nu ′=0. At this time, the U-phase pulse error ΔT _u =T _pu ′−T _pu +T _nu ′−T _nu .

Next, the operation of the pulse corrector 101 will be explained using FIG. 11.
Ideal pulse change times T _pu and T _nu indicate times of change from the beginning of the control period. Similarly, the corrected pulse change times T _pu ″ and T _pu ″ indicate the time of change from the beginning of the control period.

In the case of state (A), in the previous cycle, the gate signal G _1u of the U phase upper arm was raised and G _4u was brought down, so in the current cycle, trying to raise G _1u and bring down G _4u There is no change. In this case, since it is equivalent to raising G1u and lowering _G4u at the beginning of the control cycle, the pulse correction amount ΔT _c = T _pu + T _nu and at least one of T _pu and T _nu will be a zero value. Only in this case, the corrected pulse change time T _pu ″=0, T _nu ″=0, and accurate pulses can be output. If the pulse correction amount ΔT _c ≠T _pu +T _nu or both T _pu and T _nu are non-zero values, the pulse cannot be completely corrected and a pulse error remains.

In the case of state (B), in the previous cycle, the gate signal G _1u of the U-phase upper arm was raised and G _4u was lowered, so there is no change in G _4u . In this case, since it is equivalent to falling G _4u at the beginning of the control period, a pulse error of +T _nu occurs. In order to add a predetermined pulse correction amount ΔT _c while canceling out this pulse error, ideally, G _1u is lowered after T _pu has elapsed from the beginning of the current cycle. However, in reality, G1u falls after the corrected pulse change time T _pu ″=T _pu +ΔT _c −T _nu has elapsed.

In the case of state (C), since the gate signal G _1u of the U-phase upper arm is raised and the gate signal G _4u is lowered in the previous cycle, both G _1u and G _4u can be changed. Therefore, in the second embodiment, the pulse correction amount ΔT _c is equally divided, and ideally, G _1u is reduced after T _pu has elapsed from the beginning of the current cycle, but in reality, G _1u is It falls after the pulse change time T _pu ″=T _pu +ΔT _c /2 has elapsed.On the other hand, ideally, G _4u is started after T _nu has elapsed from the beginning of the current cycle, but in reality, G _4u is started. It is started after the corrected pulse change time T _nu ″=T _nu +ΔT _c /2 has elapsed.

In the case of state (D), in the previous cycle, the gate signal G _1u of the U-phase upper arm was lowered and G _4u was lowered, so there is no change in G _4u . In this case, since it is equivalent to falling G _4u at the beginning of the control period, a pulse error of +T _nu occurs. In order to add a predetermined pulse correction amount ΔT _c while canceling out this pulse error, ideally, G _1u is raised after T _pu has elapsed from the beginning of the current cycle. However, in reality, G _1u is started after the corrected pulse change time T _pu ″=T _pu −ΔT _c +T _nu has elapsed.

In the case of state (E), in the previous cycle, the gate signal G _1u of the U-phase upper arm fell and the gate signal G _4u fell, so there is no change in both G _1u and G _4u . In this case, since it is equivalent to falling G _1u and falling G _4u at the beginning of the control cycle, the pulse correction amount ΔT _c = T _nu - T _pu and at least one of T _pu and T _nu is a zero value. Only in this case, the corrected pulse change time T _pu ″=0, T _nu ″=0, and accurate pulses can be output. If the pulse correction amount ΔT _c ≠T _nu −T _pu or both T _pu and T _nu are non-zero values, the pulse cannot be completely corrected and a pulse error remains.

In the case of state (F), in the previous cycle, the gate signal G _1u of the U-phase upper arm was lowered and G _4u was lowered, so there is no change in G _1u . In this case, since it is equivalent to falling G _1u at the beginning of the control period, a pulse error of -T _pu occurs. In order to add a predetermined pulse correction amount ΔT _c while canceling out this pulse error, ideally, G _4u is started after T _nu has elapsed from the beginning of the current cycle. However, in reality, G _4u is started after the corrected pulse change time T _nu ″=T _nu +ΔT _c +T _pu has elapsed.

In the case of state (G), in the previous cycle, the gate signal G _1u of the U-phase upper arm falls and G _4u rises, so both G _1u and G _4u can be changed. Therefore, in the second embodiment, the pulse correction amount ΔT _c is equally divided, and ideally, G _1u is started after T _pu has elapsed from the beginning of the current cycle, but in reality, G _1u is Starts up after the pulse change time T _pu ″=T _pu −ΔT _c /2 has elapsed. On the other hand, ideally, G _4u is turned down after T _nu has elapsed from the beginning of the current cycle, but in reality, G _4u It falls after the pulse change time T _nu ″=T _nu −ΔT _c /2 after correcting has elapsed.

In the case of state (H), in the previous cycle, the gate signal G _1u of the U-phase upper arm was lowered and G _4u was raised, so there is no change in G _1u . In this case, since it is equivalent to falling G _1u at the beginning of the control period, a pulse error of -T _pu occurs. In order to add a predetermined pulse correction amount ΔT _c while canceling out this pulse error, ideally, G _4u is turned off after T _nu has elapsed from the beginning of the current cycle. However, in reality, G _4u is stopped after the corrected pulse change time T _nu ″=T _nu −ΔT _c −T _pu has elapsed.

In the case of state (I), in the previous cycle, the gate signal G _1u of the U-phase upper arm was lowered and G _4u was raised, so there is no change in both G _1u and G _4u . In this case, it is equivalent to falling G _1u and rising G _4u at the beginning of the control cycle, so the pulse correction amount ΔT _c = -T _pu -T _nu and at least one of T _pu and T _nu is a zero value. Only in this case, the corrected pulse change time T _pu ″=0, T _nu ″=0, and accurate pulses can be output. If the pulse correction amount ΔT _c ≠−T _nu −T _pu or both T _pu and T _nu are non-zero values, the pulse cannot be completely corrected and a pulse error remains.

By adopting the above-described configuration, the power converter control device according to the present invention can reliably detect a pulse error even if the predicted value of the modulated wave of the next cycle is incorrect. This pulse error can be corrected as long as possible.

FIG. 19 is a diagram showing an example of a motor current waveform when the second embodiment of the present invention is applied to a three-level inverter that drives an induction motor. The conditions are the same as the example of the motor current waveform when the prior art shown in FIG. 18 is applied. When compared with the characteristics shown in FIG. 18, it can be seen that the pulsations and vibrations of the excitation current and torque current in the unipolar modulation section can be dramatically suppressed.

1: AC motor 10: Smoothing capacitors 11, 13, 15: U to W phase upper arm elements 12, 14, 16: U to W phase lower arm elements 20: Power converter control device (2-level circuit)
21: Pulse command generator (2 level circuit)
22, 23, 24: U to W phase gate signal generator (2 level circuit)
30, 31: Subtractor, adder 32, 33, 34: U to W phase pulse command calculator (2-level circuit)
35: Pulse correction amount calculator 40: Ideal pulse calculator (2-level circuit)
41: Pulse corrector (2 level circuit)
42: Delay circuit 43: Prediction error detector (2-level circuit)
50: Maximum value selection circuit 51: Minimum value selection circuit 52: Correction amount selection circuit 60, 61: Upper/lower smoothing capacitors 62, 68, 74: U to W phase first arm elements 63, 69, 75: U ~W phase second arm elements 64, 70, 76: U~W phase third arm elements 65, 71, 77: U~W phase fourth arm elements 66, 72, 78: U~W phase first clamp diode 67 , 73, 79: U to W phase second clamp diode 80: Power converter control device (3-level circuit)
81: Pulse command generator (3-level circuit)
82, 83, 84: Gate signal generator (3-level circuit)
90: Subtractor 91: Adder 92, 93, 94: U to W phase pulse command calculator (3-level circuit)
100: Ideal pulse calculator (3-level circuit)
101: Pulse corrector (3-level circuit)
102, 103: Delay circuit 104: Prediction error detector (3-level circuit)
θ : Fundamental wave phase θ _u , θ _v , θ _w : Voltage phase Δθ : Increment of fundamental wave phase Y _mr : Modulation rate y _mu : U phase modulation wave G _1u , G _1v , G _1w : Upper arm gate signal (2 level circuit)
:1st arm gate signal (3-level circuit)
G _2u , G _2v , G _2w : Lower arm gate signal (2-level circuit)
:2nd arm gate signal (3 level circuit)
G _3u , G _3v , G _3w : Third arm gate signal (3-level circuit)
G _4u , G _4v , G _4w : 4th arm gate signal (3-level circuit)
T _c : Control period T _pu , T _pv , T _pw : Ideal pulse change time (2-level circuit)
: Ideal 1st arm pulse change time (3-level circuit)
T _nu , T _nv , T _nw : Ideal 4th arm pulse change time (3-level circuit)
T _pu ′, T _pv ′, T _pw ′: Actual pulse change time (two-level circuit)
:Actual 1st arm pulse change time (3-level circuit)
T _nu ′, T _nv ′, T _nw ′: Actual 4th arm pulse change time (3-level circuit)
T _pu ″, T _pv ″, T _pw ″: Pulse change time after correction (2-level circuit)
: First arm pulse change time after correction (3-level circuit)
T _nu ″, T _nv ″, T _nw ″: 4th arm pulse change time after correction (3-level circuit)
F _pu , F _pv , F _pw : Pulse change direction (2-level circuit)
: Pulse change direction of the 1st arm (3-level circuit)
F _nu , F _nv , F _nw : Pulse change direction of fourth arm (3-level circuit)
F _pu ′, F _pv ′, F _pw ′: Previous value of pulse change direction (2-level circuit)
: Previous value of pulse change direction of 1st arm (3-level circuit)
F _nu ′, F _nv ′, F _nw ′: Previous value of pulse change direction of 4th arm (3-level circuit)
ΔT _u , ΔT _v , ΔT _w : Prediction error ΔT _c : Pulse correction amount ΔT _max : Maximum value of three-phase prediction error ΔT _min : Minimum value of three-phase prediction error

Claims (10)

A control device for a power converter that generates switching pulses that drive switching elements constituting a power converter that converts DC voltage to AC voltage,
comprising a pulse command calculator that calculates a pulse command value used when generating the switching pulse based on a comparison between a modulated wave and a carrier wave for each control period determined by a switching frequency;
The pulse command calculator is
a first command calculation unit that calculates a first command value using a current value of the modulated wave in the current control cycle and a predicted value of the modulated wave in the next control cycle;
a correction amount calculation unit that stores a previous value of the pulse command value in the previous control cycle and calculates a pulse correction amount using a prediction error obtained from the previous value and the current value of the first command value in the current control cycle; and,
A control device for a power converter, comprising: a pulse command correction section that corrects the first command value using the pulse correction amount to obtain the pulse command value. The power converter control device according to claim 1,
The AC voltage is a three-phase AC voltage,
The switching pulse is generated based on a comparison between the modulated wave and the carrier wave for each of the three phases,
The first command calculation unit calculates the first command value for each of the three phases using the current value of the modulated wave in the current control cycle and the predicted value of the modulated wave in the next control cycle,
The correction amount calculating section stores the previous value of the pulse command value of the previous control cycle for each of the three phases, and stores the previous value of the pulse command value of the previous control cycle, and calculates the value of the pulse command value calculated from the previous value and the current value of the first command value of the current control cycle. calculating the pulse correction amount using the prediction error;
A control device for a power converter, wherein the pulse command correction section corrects the first command value by the pulse correction amount to obtain the pulse command value for each of the three phases. The power converter control device according to claim 2,
A control device for a power converter, wherein the correction amount calculating unit calculates the pulse correction amount common to the three phases using the prediction errors of the three phases. The power converter control device according to claim 3,
The power converter is characterized in that the correction amount calculation unit calculates a non-zero value among the maximum value and the minimum value as the pulse correction amount from the maximum value and minimum value of the three-phase prediction errors. Control device. A control device for a power converter according to any one of claims 1 to 4,
The correction amount calculation unit calculates the prediction error by adding a protection period of the switching element to a previous value of the pulse command value of the previous control cycle and a current value of the first command value of the current control cycle. A control device for a power converter. A switching pulse that drives a switching element that constitutes a power converter that converts DC voltage to AC voltage is generated using a pulse command value by comparing a modulated wave and a carrier wave at each control period determined by the switching frequency. Occasionally,
a first step of calculating a first command value using the current value of the modulated wave in the current control cycle and the predicted value of the modulated wave in the next control cycle;
a second step of determining a prediction error from the previous value of the pulse command value saved in the previous control cycle and the current value of the first command value of the current control cycle, and determining a pulse correction amount from the prediction error;
and a third step of correcting the first command value using the pulse correction amount to obtain the pulse command value. A method for controlling a power converter according to claim 6, comprising:
The AC voltage is a three-phase AC voltage,
A method for controlling a power converter, in which each of the first to third steps is executed for each of three phases. A method for controlling a power converter according to claim 7,
The method for controlling a power converter, wherein the second step calculates the pulse correction amount common to the three phases using the prediction errors of the three phases. A method for controlling a power converter according to claim 8, comprising:
The control of the power converter is characterized in that the second step calculates a non-zero value among the maximum value and the minimum value from the maximum value and minimum value of the prediction error in the three phases as the pulse correction amount. Method. A method for controlling a power converter according to any one of claims 6 to 9,
The second step is characterized in that the prediction error is obtained by adding the protection period of the switching element to the previous value of the pulse command value of the previous control cycle and the current value of the first command value of the current control cycle. A power converter control method.

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