JP7371077B2 - Coding and decoding of control signaling with section-based redundancy checking - Google Patents

Description

Claim of priority under 35 U.S.C. 119 This application is filed under U.S. Provisional Patent Application Nos. 62/344,031 and 2016, filed June 1, 2016, each of which is incorporated herein by reference in its entirety. Claims priority and benefit of U.S. Provisional Patent Application No. 62/346,291 filed June 6, 2017, which claims priority to U.S. Patent Application No. 15/607,161 filed May 26, 2017 It is.

Certain aspects of the techniques described below relate generally to wireless communications, and more particularly to methods and apparatus for convolutional coding/tail-biting convolutional coding with sectional redundancy checks.

In all modern wireless communication link transmitters, the output bit sequence from an error correction code may be mapped to a sequence of complex modulation symbols. These symbols may then be used to create a waveform suitable for transmission over a wireless channel. In particular, as data rates increase, decoding performance at the receiver side can become a limiting factor on the achievable data rate.

The following summarizes some aspects of the disclosure in order to provide a basic understanding of the described technology. This summary is not an extensive overview of all contemplated features of the disclosure, does not identify key or critical elements of all aspects of the disclosure, and does not identify the scope of any or all aspects of the disclosure. It is not intended to determine. Its sole purpose is to present some concepts of one or more aspects of the disclosure in a summary form as a prelude to the more detailed description that is presented later.

Certain aspects of the present disclosure provide techniques and apparatus for convolutional coding/tail-biting convolutional coding with section-based redundancy checking. Embodiments may enable and provide fast and efficient coding techniques for error detection for the entire payload and additional error detection capabilities for sectional payloads with sectional redundancy checking. can. Sectional redundancy checking aims to provide additional insight (into error symptoms) to enable encoding/decoding for improved performance. Section-based CRC, also referred to as multiple CRC segments or multiple segments of CRC, allows for additional granularity to the CRC information, resulting in improved code block error rate performance and/or reduced decoding complexity. The techniques provide the construction of new coding structures that allow for improved decoding performance and/or reduced decoding complexity using insight into error symptoms.

Some aspects provide a method for wireless communication. The method generally includes the steps of: obtaining a payload to be transmitted; partitioning the payload into a plurality of payload sections; deriving redundancy check information for each respective payload section of the plurality of payload sections; merging redundancy check information for each payload section with a plurality of payload sections to form a sequence; and generating a codeword by encoding the bit sequence using an encoder.

Some aspects provide an apparatus for wireless communication. The apparatus generally includes the steps of: obtaining a payload to be transmitted; partitioning the payload into a plurality of payload sections; deriving redundancy check information for each respective payload section of the plurality of payload sections; and configured to merge redundancy check information for each payload section with a plurality of payload sections to form a sequence and generate a codeword by encoding the bit sequence using an encoder. at least one processor. The device also generally includes memory coupled to at least one processor.

Some aspects provide an apparatus for wireless communication. The apparatus generally includes means for obtaining a payload to be transmitted, means for partitioning the payload into a plurality of payload sections, and deriving redundancy check information for each respective payload section of the plurality of payload sections. means for merging redundancy check information for each payload section with a plurality of payload sections to form a bit sequence; and generating a codeword by encoding the bit sequence using an encoder. and means for.

Some aspects provide non-transitory computer-readable media for wireless communications. The non-transitory computer-readable medium is generally capable of obtaining a payload to be transmitted, partitioning the payload into a plurality of payload sections, and deriving redundancy checking information for each respective payload section of the plurality of payload sections. , code for merging redundancy check information for each payload section with multiple payload sections to form a bit sequence, and generating a codeword by encoding the bit sequence using an encoder. including.

Some aspects provide a method for wireless communication. The method generally includes the steps of: receiving a codeword including a plurality of payload sections; decoding the plurality of payload sections of the codeword; and verifying the section based on redundancy check information corresponding to the section.

Some aspects provide an apparatus for wireless communication. The apparatus generally receives a codeword that includes a plurality of payload sections, decodes the plurality of payload sections of the codeword, and decodes each decoded payload section of the plurality of payload sections into the decoded payload section. at least one processor configured to: verify the section based on redundancy check information corresponding to the section;

Some aspects provide an apparatus for wireless communication. The apparatus generally includes means for receiving a codeword including a plurality of payload sections, means for decoding the plurality of payload sections of the codeword, and means for decoding each decoded payload section of the plurality of payload sections. and means for verifying based on redundancy check information corresponding to the decrypted payload section.

Some aspects provide non-transitory computer-readable media for wireless communications. A non-transitory computer-readable medium generally receives a codeword that includes multiple payload sections, decodes the multiple payload sections of the codeword, and decodes each decoded payload section of the multiple payload sections. and code for performing verification based on redundancy check information corresponding to the decrypted payload section.

The techniques may be embodied in methods, apparatus, and computer program products. Other aspects, features, and embodiments of the invention will be apparent to those skilled in the art from consideration of the following description of certain exemplary embodiments of the invention in conjunction with the accompanying figures. Although features of the invention may be described below with respect to several embodiments and figures, all embodiments of the invention may incorporate one or more of the advantageous features described herein. can include. In other words, although one or more embodiments may be described as having several advantageous features, one or more of such features may also be described herein as having a number of advantageous features. It may be used according to various embodiments of the invention. Similarly, although example embodiments may be described below as embodiments of devices, systems, or methods, such example embodiments may be implemented in a variety of devices, systems, and methods. I hope you understand what you get.

In order that the above features of the present disclosure may be understood in detail, what has been schematically described above may be explained more specifically by reference to embodiments, some of which are illustrated in the accompanying drawings. . However, the accompanying drawings depict only some typical aspects of the disclosure and therefore should not limit the scope of the disclosure, as this description may apply to other equally valid aspects. Please note that this should not be considered.

FIG. 1 illustrates an example wireless communication system in accordance with certain aspects of the present disclosure. FIG. 2 is a block diagram of an access point and user terminal in accordance with certain aspects of the present disclosure. 1 is a block diagram of an example wireless device in accordance with certain aspects of the present disclosure. FIG. FIG. 2 is a block diagram illustrating a decoder in accordance with certain aspects of the present disclosure. FIG. 2 is a block diagram illustrating a decoder in accordance with certain aspects of the present disclosure. FIG. 3 is a diagram illustrating an example of convolutional coding. FIG. 3 illustrates an example of a Viterbi algorithm for decoding a convolutionally coded bitstream, according to some embodiments. FIG. 2 illustrates an example of encoding via tail-biting convolutional codes (TBCC), according to some embodiments. FIG. 3 illustrates an example of a Viterbi algorithm for decoding a TBCC encoded bitstream, according to some embodiments. FIG. 3 illustrates an example iterative process of the Viterbi algorithm for decoding a TBCC encoded bitstream, according to some embodiments. FIG. 3 is a diagram illustrating example operations for wireless communication in accordance with certain aspects of the present disclosure. FIG. 3 is a diagram illustrating an example interleaving/concatenation pattern for redundancy check information in accordance with certain aspects of the present disclosure. FIG. 3 is a diagram illustrating example operations for wireless communication in accordance with certain aspects of the present disclosure. FIG. 3 illustrates an example four-state CC/TBCC with redundancy checking in accordance with certain aspects of the present disclosure. FIG. 3 illustrates an example four-state CC/TBCC with redundancy checking in accordance with certain aspects of the present disclosure. FIG. 3 illustrates an encoder configured to perform enhanced TBCC list decoding in accordance with aspects of the present disclosure. FIG. 3 illustrates a decoder configured to perform enhanced TBCC list decoding in accordance with aspects of the present disclosure.

Aspects of the present disclosure provide new code structures. The structure provides and enables improved decoding performance and/or reduced decoding complexity using error symptom insight. This may occur, for example, by partitioning the payload into multiple sections and deriving redundancy check information for each of the sections. Without changing the total number of redundancy check bits and payload bits, aspects of this disclosure present techniques for providing additional insight into decoding error symptoms. In doing so, certain advanced countermeasures can achieve improved code block error rate performance and/or reduced decoding complexity while remaining insensitive to the total false positive rate. Enabling provides improved encoder/decoder designs and techniques.

Exemplary Wireless Communication Systems The techniques described herein may include orthogonal frequency division multiplexing (OFDM) networks, time division multiple access (TDMA) networks, frequency division multiple access (FDMA) networks, orthogonal FDMA (OFDMA) networks, single It can be used in various wireless communication networks such as carrier FDMA (SC-FDMA) networks, code division multiple access (CDMA) networks, etc. The terms "network" and "system" are often used interchangeably. A CDMA network may implement a radio technology such as Universal Terrestrial Radio Access (UTRA), CDMA2000. UTRA includes wideband CDMA (W-CDMA) and low chip rate (LCR). CDMA2000 covers the IS-2000, IS-95, and IS-856 standards. A TDMA network may implement a radio technology such as Global System for Mobile Communications (GSM). OFDMA networks include advanced UTRA (E-UTRA), IEEE802.11, IEEE802.16 (for example, WiMAX (World Wide Interoperability for Microwave Access)), IEEE802.20, Flash-OFDM (registered trademark), etc. Wireless technology may also be implemented. UTRA, E-UTRA, and GSM are part of the Universal Mobile Telecommunication System (UMTS). Long Term Evolution (LTE) and Long Term Evolution Advanced (LTE-A) are upcoming releases of UMTS that use E-UTRA. UTRA, E-UTRA, GSM(R), UMTS, and LTE will be described in a document from an organization named "3rd Generation Partnership Project" (3GPP). CDMA2000 is described in a document from an organization named "3rd Generation Partnership Project 2" (3GPP2). CDMA2000 is described in a document from an organization named "3rd Generation Partnership Project 2" (3GPP2). These various wireless technologies and standards are known in the art. For clarity, some aspects of the present techniques are described below for LTE and LTE-A.

The teachings herein may be incorporated into (eg, implemented within or executed by) various wired or wireless devices (eg, nodes). In some aspects, the node includes a wireless node. Such a wireless node may, for example, provide connectivity to or to a network (eg, a wide area network such as the Internet or a cellular network) via a wired or wireless communication link. In some aspects, a wireless node implemented in accordance with the teachings herein may include an access point or an access terminal.

An access point (“AP”) is a Node B, Radio Network Controller (“RNC”), eNode B, Base Station Controller (“BSC”), Base Transceiver Station (“BTS”), Base Station (“BS”) , Transceiver Function (“TF”), Wireless Router, Wireless Transceiver, Basic Service Set (“BSS”), Enhanced Service Set (“ESS”), Radio Base Station (“RBS”), or any other terminology? , may be realized as or known as any of them. In some implementations, the access point may include a set-top box kiosk, media center, or any other suitable device configured to communicate via a wireless or wired medium.

Access terminal (“AT”) may refer to access terminal, subscriber station, subscriber unit, mobile station, remote station, remote terminal, user terminal, user agent, user device, user equipment, user station, or any other terminology. may include, be realized as, or be known as. In some implementations, the access terminal may include a cellular telephone, a cordless telephone, a Session Initiation Protocol ("SIP") telephone, a wireless local loop ("WLL") station, a personal digital assistant ("PDA"), a wireless connectivity capability. The computer may include a handheld device, station (“STA”), or some other suitable processing device connected to a wireless modem. Accordingly, one or more aspects taught herein may include a telephone (e.g., a cellular phone or smartphone), a computer (e.g., a laptop), a portable communication device, a portable computing device (e.g., a personal digital assistant), Tablets, entertainment devices (e.g., music or video devices, or satellite radio), television displays, flip cams, security video cameras, digital video recorders (DVRs), global positioning system devices, sensors, industrial equipment, medical devices incorporated into an implantable device, wearable, mammalian implanted device, vehicle or vehicle component, drone, Internet of Things device, or any other suitable device configured to communicate via a wireless or wired medium. obtain.

Referring to FIG. 1, a multiple access wireless communication system according to one aspect is illustrated. In one aspect of the disclosure, the wireless communication system from FIG. 1 may be an orthogonal frequency division multiplexing (OFDM)-based wireless mobile broadband system. An access point 100 (AP) may include multiple antenna groups, one antenna group including antennas 104 and 106, another antenna group including antennas 108 and 110, and an additional antenna group including antennas 112 and 114. include. Although only two antennas per antenna group are shown in FIG. 1, more or fewer antennas per antenna group may be utilized. An access terminal 116 (AT) may be in communication with antennas 112 and 114 that transmit information to the access terminal 116 via a forward link 120 and access terminal 116 via a reverse link 118. Receive information from terminal 116. Access terminal 122 may be in communication with antennas 106 and 108 that transmit information to access terminal 122 over forward link 126 and from access terminal 122 over reverse link 124. Receive information. In an FDD system, communication links 118, 120, 124, and 126 may use different frequencies for communication. For example, forward link 120 may use a different frequency than the frequency used by reverse link 118.

Each group of antennas and/or the area in which they are designed to communicate is often referred to as a sector of the access point. In one aspect of the disclosure, each antenna group may be designed to communicate to access terminals within a sector of the area covered by access point 100.

For communicating over forward links 120 and 126, access point 100 transmit antennas may utilize beamforming to improve the forward link signal-to-noise ratio for different access terminals 116 and 122. can. Additionally, by using beamforming to transmit to access terminals that are randomly distributed throughout its coverage, an access point can use beamforming to transmit to adjacent There is less interference to access terminals within the cell.

FIG. 2 illustrates a transmitter system 210 (e.g., also known as an access point/base station) and a receiver system 250 (e.g., as an access terminal) within a wireless communication system, e.g., a MIMO system 200 in which aspects of the present disclosure may be implemented. 1 shows a block diagram of an embodiment of the invention. At transmitter system 210, traffic data for several data streams is provided from a data source 212 to a transmit (TX) data processor 214.

In one aspect of the disclosure, each data stream may be transmitted via a respective transmit antenna. TX data processor 214 formats, codes, and interleaves the traffic data for each data stream based on the particular coding scheme selected for that data stream to provide coded data.

Coded data for each data stream may be multiplexed with pilot data using OFDM techniques. Pilot data is generally a known data pattern that can be processed in a known manner and used in a receiver system to estimate channel response. The multiplexed pilot and coded data for each data stream are then combined with the particular modulation scheme selected for that data stream (e.g., BPSK, QPSK, m-QPSK, or m-QPSK) to provide modulation symbols. QAM) based on the modulation (ie, symbol mapping). The data rate, coding, and modulation for each data stream may be determined by instructions executed by processor 230.

Modulation symbols for all data streams are then provided to TX MIMO processor 220, which can further process the modulation symbols (eg, for OFDM). TX MIMO processor 220 then provides N _T modulation symbol streams to N _T transmitters (TMTR) 222a through 222t. In some aspects of this disclosure, TX MIMO processor 220 applies beamforming weights to the symbols of the data stream and the antenna from which the symbols are transmitted.

Each transmitter 222 receives and processes a respective symbol stream to provide one or more analog signals, and further conditions (e.g., amplifies, filters, and upconverts) the analog signals to create a MIMO channel. provides a modulated signal suitable for transmission over the N _T modulated signals from transmitters 222a through 222t are then transmitted from N _T antennas 224a through 224t, respectively.

At receiver system 250, the transmitted modulated signals may be received by N _R antennas 252a through 252r, and the received signal from each antenna 252 may be provided to a respective receiver (RCVR) 254a through 254r. . Each receiver 254 conditions (e.g., filters, amplifies, and downconverts) its respective received signal, digitizes the conditioned signal, provides samples, and further processes the samples to provide corresponding A "received" symbol stream may be provided.

An RX data processor 260 then receives the N _R received symbol streams from the N _R receivers 254 and processes them based on receiver processing techniques to produce N _T "decoded" symbol streams. provide. RX data processor 260 then demodulates, deinterleaves, and decodes each detected symbol stream to recover the traffic data for the data stream. Processing by RX data processor 260 may be complementary to processing performed by TX MIMO processor 220 and TX data processor 214 in transmitter system 210.

Processor 270 periodically determines which precoding matrix to use. Processor 270 creates a reverse link message that includes a matrix index portion and a rank value portion. Reverse link messages may comprise various types of information regarding the communication link and/or the received data stream. The reverse link messages are then processed by a TX data processor 238, which also receives traffic data for several data streams from a data source 236, modulated by a modulator 280, conditioned by transmitters 254a-254r, and transmitted to the transmitter system. Sent back to 210.

At transmitter system 210, a modulated signal from receiver system 250 is received by antenna 224, conditioned by receiver 222, demodulated by demodulator 240, and processed by RX data processor 242 to transmit the modulated signal to receiver system 250. Extract the reverse link messages sent by. Processor 230 then determines which precoding matrix to use to determine the beamforming weights and then processes the extracted messages.

FIG. 3 illustrates various components that may be used in a wireless device 302 that may be utilized within the wireless communication system 1 of FIG. Wireless device 302 is one example of a device that may be configured to implement various methods described herein. For example, in some cases, as described in more detail below, a wireless communication device may obtain a payload to be transmitted, partition the payload into multiple payload sections, and perform a process for each of the multiple sections. A codeword is generated by deriving redundancy check information for a section, merging the redundancy check information for each section with multiple sections to form a bit sequence, and encoding the bit sequence using an encoder. and generating the information. In other cases, as described in more detail below, a wireless device generally receives a codeword that includes multiple payload sections, decodes the multiple payload sections of the codeword, and and verifying each decoded payload section of the payload sections based on redundancy check information corresponding to the decoded payload section. According to some aspects, wireless device 302 may be access point 100 from FIG. 1 or any of access terminals 116, 122.

Wireless device 302 may include a processor 304 that controls the operation of wireless device 302. Processor 304 may also be referred to as a central processing unit (CPU). Memory 306, which can include both read-only memory (ROM) and random access memory (RAM), provides instructions and data to processor 304. A portion of memory 306 may include nonvolatile random access memory (NVRAM). Processor 304 generally performs logical and arithmetic operations based on program instructions stored in memory 306. The instructions in memory 306 may be executable to implement the methods described herein.

Wireless device 302 may also include a housing 308 that may include a transmitter 310 and a receiver 312 to enable transmission and reception of data between wireless device 302 and a remote location. Transmitter 310 and receiver 312 may be combined into transceiver 314. Single or multiple transmit antennas 316 may be attached to housing 308 and electrically coupled to transceiver 314. Wireless device 302 may also include multiple transmitters, multiple receivers, and multiple transceivers (not shown).

Wireless device 302 may also include a signal detector 318 that may be used to detect and quantify the level of the signal received by transceiver 314. Signal detector 318 may detect signals such as total energy, energy per subcarrier per symbol, power spectral density, and other signals. Wireless device 302 may also include a digital signal processor (DSP) 320 for use in processing signals.

Additionally, the wireless device may also include an encoder 322 for use in encoding signals for transmission and a decoder 324 for use in decoding received signals. According to some aspects, encoder 322 may perform encoding (eg, by performing operations 1100 shown in FIG. 11) in accordance with some aspects presented herein. Additional details of encoder 322 are discussed in more detail below. According to some aspects, decoder 324 may perform decoding (eg, by performing operations 1300 shown in FIG. 11) in accordance with some aspects presented herein. Additional details of decoder 324 are discussed in more detail below.

The various components of wireless device 302 may be coupled together by bus system 326, which may include, in addition to a data bus, a power bus, a control signal bus, and a status signal bus. Processor 304 may be configured to access instructions stored in memory 306 to perform connectionless access in accordance with aspects of the present disclosure discussed below.

FIG. 4 shows a portion of a radio frequency (RF) modem 404 that may be configured to provide encoded messages for wireless transmission. In one example, an encoder 406 within a base station (eg, AP 100 and/or 210) (or an access terminal on a reverse path, such as 116 and/or 250) receives message 402 for transmission. Message 402 may include data and/or encoded audio or other content for a receiving device. Encoder 406 (which may correspond to encoder 322 of wireless device 302) typically uses an appropriate modulation and coding scheme (MCS) selected based on a configuration defined by base station 100/210 or another network entity. ) to encode the message.

In some cases, encoder 406 may encode the message using techniques described below (eg, by performing operations 1100 shown in FIG. 11). For example, in some cases, as described in more detail below, encoder 406 obtains a payload to be transmitted, partitions the payload into multiple payload sections, and provides redundancy checking information for each section of the multiple sections. A codeword (e.g., encoded bitstream 408) may be generated by deriving and merging redundancy check information for each section with multiple sections to form a bit sequence, and encoding the bit sequence. .

According to aspects, the encoded bitstream 408 generated by the encoder 406 is then provided to a mapper 410 that generates a sequence of Tx symbols 412, where the Tx symbols 412 are modulated, amplified, or otherwise may be processed to generate an RF signal 416 for transmission through antenna 418.

FIG. 5 shows an RF modem 510 that may be configured to receive and decode wirelessly transmitted signals containing encoded messages (e.g., messages encoded using tail-biting convolutional codes described below). Shows a part of. In various examples, a modem 510 for receiving signals may reside at an access terminal, at a base station, or at any other suitable device or means for performing the described functions. Antenna 502 provides an RF signal 416 (ie, the RF signal generated in FIG. 4) to an access terminal (eg, access terminal 116, 122, and/or 250). RF chain 506 may process and demodulate RF signal 416 and provide a sequence of symbols 508 to demapper 512, which generates a bitstream 514 representing the encoded message.

Decoder 516 (which may correspond to decoder 324 of wireless device 302) then decodes the m-bits from the encoded bitstream using a coding scheme (e.g., TBCC encoding scheme, Polar code encoding scheme, etc.). can be used to decode the information string. Decoder 516 may comprise a Viterbi decoder, an algebraic decoder, a butterfly decoder, or another suitable decoder. In one example, the Viterbi decoder uses the known Viterbi algorithm to find the sequence of signaling states (Viterbi path) that most likely corresponds to the received bitstream 514. Bitstream 514 may be decoded based on statistical analysis of LLRs calculated for bitstream 514. In one example, the Viterbi decoder can compare and select the correct Viterbi path that defines the sequence of signaling states using a likelihood ratio test to generate the LLR from the bitstream 514. The likelihood ratio (e.g., LLR) for each candidate Viterbi path is determined using the likelihood ratio to determine which path is most likely to reveal the sequence of symbols that generated the bitstream 514. Multiple candidate Viterbi paths can be statistically compared using a likelihood ratio test that compares logarithms. A decoder 516 then performs a bitstream based on the LLR to determine a message 518 containing data and/or encoded voice or other content transmitted from a base station (e.g., AP 100 and/or 210). 514 can be decoded. A decoder may decode bitstream 514 (eg, by performing operations 1300 shown in FIG. 13) in accordance with aspects of the disclosure presented below. For example, in some cases, a decoder receives a codeword that includes multiple sections, decodes the multiple sections of the codeword, and decodes each of the multiple sections based on redundancy check information corresponding to the decoded sections. The decrypted section may be verified.

According to some aspects, a convolutional coding algorithm may be used to encode a stream of bits (eg, as described with respect to FIG. 4) and generate encoded codewords. FIG. 6 shows an example of convolutional coding in which a stream of information bits is encoded. As illustrated, encoding starts with a known bit sequence (eg, 000 in this example), and each encoded bit may be generated as a function of the previous bit. The same known bit sequence is appended at the end, as shown in FIG.

As shown in FIG. 7, the encoded codeword may be decoded using a trellis structure. In a trellis structure, each stage within the trellis has one of several states (eg, eight states if each bit is encoded based on the previous three bits). Each transition from one state to another is a function of the previous bits, and a "new" payload bit is encoded. In the illustrated example, the first bit is '1', so the transition is from state '000' in the first stage to state '001' in the second stage (and then to state '001' in the second stage). The state "001" in the stage is up to "011" in the third stage, and so on). Therefore, there are only a finite number of valid decoding paths through the trellis. This is because the effectiveness of the decoding path is a function of the bits used for encoding (ie, the previous bits and the "new" bits being encoded). Although Figure 7 shows a trellis structure with eight states, the trellis structure can have any number of states depending on how many "previous bits" are used to encode the "new" payload bits. It should be understood that it may include

As explained above and shown in Figure 7, the starting and ending states are both facts that are known and can be exploited during decoding (e.g., a decoding path through a trellis that does not start and end with known states). may be considered ineligible). For example, referring to Figure 7, assuming that the starting state is known to be [000] (e.g., as shown), any decoding path that does not end with an ending state of [000] will automatically may be considered ineligible. For example, a decoding path with a starting state of [000] and an ending state of [111] may be considered ineligible.

FIG. 8 shows an example of encoding a stream of bits using a tail-biting convolutional code (TBCC). The TBCC algorithm is so named because the "tail" end of the bits are appended to the beginning of the encoded bitstream, eg, as shown. Therefore, in this case, the starting and ending states are the same (as in Figure 7), but the state is not fixed (rather, it depends on the value of the tail bit). In the illustrated example, the value of the tail bit (and therefore the starting and ending states) is "010". Therefore, as shown by the solid line in Figure 9, since the first bit is "1", the transition is from the starting state "010" in the first stage to the state "101" in the second stage ( Then, the "101" state in the second stage is up to "011" in the third stage, and so on). Using the TBCC decoding trellis, all decoding paths that do not start and end in the same state (although initially unknown) can be considered disqualified, as shown in FIG. For example, again assume the starting state is "010". However, in this example shown by the solid line in FIG. 9, the starting state (ie, "010") does not match the ending state (eg, "001"). Therefore, this decoding path may be considered ineligible.

As shown in FIG. 10, one algorithm for decoding a TBCC encoded codeword is through a series of iterations. For example, in a first iteration, a decoder (eg, decoders 324 and/or 516) may begin building a decoding trellis with each state starting with equal weight. At the end of trellis construction (e.g., after the last iteration), decoder 324 and/or 516 identifies a number of best states and then performs a backtrace output over a range of stages for the decoded bits; A decoding path may be selected based on metrics (eg, path metrics, tail byte checking, etc.) generated during these iterations to derive decoding bits.

Exemplary Polar Codes As mentioned above, Polar codes may be used to encode a stream of bits for transmission. Polar codes are the first provably capacity-achieving coding scheme with approximately linear encoding and decoding complexity (within the block length). Polar codes are widely considered as candidates for error correction in next generation wireless systems. Polar codes have many desirable properties, such as a deterministic construction (based on the fast Hadamard transform), a very low and predictable error floor, and simple successive cancellation (SC)-based decoding. have

Polar codes are linear block codes of length N=2 ⁿ , and their generator matrix is the matrix

It is constructed using the nth Kronecker power of , and is denoted by G ⁿ . For example, equation (1) shows the generation matrix obtained for n=3.

According to some aspects, a codeword may be generated (eg, by a BS) by using a generator matrix to encode a number of input bits (eg, information bits). For example, given some bits u=(u ₀ , u ₁ , ..., u _N-1 ), the resulting codeword vector x=(x ₀ , x ₁ , ..., x _{N- 1} ) can be generated by encoding the input bits using the generator matrix G. This resulting codeword may then be rate matched (eg, using techniques described herein), transmitted by the base station via a wireless modem, and received by the UE.

When the received vector is decoded (e.g., by the UE) using a decoder (e.g., decoder 516), such as a sequential cancellation (SC) decoder or a sequential cancellation list (SCL) decoder, the bits u ₀ ^i-1 All estimated bits, u _i , have a given error probability, assuming that is decoded correctly and that it tends to be 0 or 0.5. Moreover, the ratio of estimated bits to low error probability tends to be the capacity of the underlying channel. Polar code can transmit information using the K most trusted bits while setting or freezing the remaining (NK) bits to a predetermined value, such as 0, for example as described below. This utilizes a phenomenon called channel polarization.

For very large N, the Polar code transforms the channel into N parallel "virtual" channels for N information bits. If C is the capacity of the channel, there are approximately N*C channels that are completely noiseless and there are N(1-C) channels that are completely noisy. The basic polar coding scheme then involves freezing (i.e., not transmitting) information bits that should be transmitted along a completely noisy channel, and transmitting information only along a completely noisy channel. Accompany. For small to moderate N, this polarization is not perfect in the sense that there may be some channels that are neither completely useless nor completely noiseless (i.e., channels in transition). Depending on the rate of transition, these channels during transition are either frozen or used for transmission.

Example Encoding and Decoding of Control Signaling with Sectional Redundancy Check Using Convolutional Coding (CC) and/or Tail-biting Convolutional Coding (TBCC) to encode a stream of control signaling bits for transmission In legacy communication standards, a cyclic redundancy check (CRC) typically uses precoded control signaling bits to aid in detecting errors in the decoded payload corresponding to a stream of precoded control signaling bits. Contained within a stream of signaling bits. For example, given a stream of precoded bits, a CRC may be computed based on the stream of precoded bits, known as a global CRC, and appended to the end of the stream of precoded bits. The stream of pre-encoded bits containing the global CRC is then encoded using a specific encoding scheme (e.g., low-density parity check (LDPC), Polar code, tail-biting convolutional code (TBCC), convolutional code (CC), etc.) and The encoded codeword may be encoded using the transmitted encoded codeword. On the receiving end, a receiver receives and decodes the codeword (e.g., according to the particular encoding scheme used to encode the codeword) and determines whether the codeword is a codeword based on the included CRC. You can check whether it was properly decoded.

An N-bit cyclic redundancy check can naturally give an expected false positive rate in 2^-N. However, other than decoding error detection provided by a global CRC (i.e., one CRC for the payload) (e.g., for block retransmission in a hybrid automated repeat request (H-ARQ) process), legacy techniques is a set of 'E' incorrectly decoded bits confined to a particular section of the codeword, and the same 'E' number of incorrectly decoded bits sparsely distributed within the entire decoded codeword. It cannot give additional insight into the error symptoms of the transmission, such as showing the bits as opposed.

Therefore, without changing the total number of redundancy check bits and payload bits, aspects of the present disclosure allow certain advanced countermeasures (e.g., trellis path pruning) to be performed while keeping the total false positive rate unaffected. control signaling to provide additional insight into the decoding error symptoms, which may benefit the decoder by allowing it to achieve improved code block error rate performance and/or reduced decoding complexity. Present techniques. That is, aspects of the present disclosure improve decoding performance by, for example, partitioning a payload (e.g., control signaling, data, etc.) into multiple payload sections and deriving redundancy check information for each of the control signaling payload sections. The present invention provides a new code structure that enables the use of error symptom insight to improve code and/or reduce decoding complexity.

FIG. 11 illustrates example operations 1100 for wireless communications to improve decoding performance and/or reduce decoding complexity. These techniques may be applied to wireless transmissions such as control signaling and/or data signaling in various scenarios as desired. According to some aspects, operations 1100 are performed by any suitable wireless transmitting device, such as a base station (e.g., AP 100, 210), a user terminal (e.g., AT 116, 250), and/or wireless device 302. obtain. Although operations 1100 are shown for illustrative purposes, they may be ordered or augmented in various ways as desired.

Various implementation configurations may be utilized to implement operations 1100. For example, a wireless transmitting device may include one or more of the components shown in FIGS. 2 and 3. These components may be configured to perform the operations described herein. For example, antenna 224, receiver/transmitter 222, TX data processor 214, processor 230, and/or memory 232 of access point 210 shown in FIG. 2 may perform the operations described herein. Additionally or alternatively, the antenna 252, receiver/transmitter 254, TX data processor 238, modulator 280, processor 270, and/or memory 272 of the access terminal 250 shown in FIG. It can be executed. Additionally or alternatively, one or more of processor 304, memory 306, transceiver 314, DSP 320, encoder 322, decoder 324, and/or antenna 316 shown in FIG. 3 perform the operations described herein. It can be configured as follows.

Generally, operations 1100 indicate a series of actions for efficient wireless communication. Operation 1100 begins at 1102 by obtaining a payload to be transmitted. At 1104, the wireless transmitting device can partition the payload into multiple payload sections. Partitioning may involve segmenting an arrangement of information into sections, and the number and size of sections may vary as desired. At 1106, the wireless transmitting device derives redundancy check information for each respective payload section of the plurality of payload sections. At 1108, the wireless transmitting device merges the plurality of payload sections with redundancy check information associated with or for each payload section. Merging them can result in a bit sequence representing aggregated merged redundancy check information. Merging may also include combining bits in various ways as desired, such that the final result obtained represents the information input to the merging function. At 1110, the wireless transmitting device generates a codeword by encoding the bit sequence using an encoder. Although not shown, operation 1100 may also include a wireless transmitting device transmitting the codeword to a wireless receiving device for decoding.

Partitioning as explained above can occur in a variety of ways. As mentioned above, the payload (which does not always include CRC/parity information) may first be partitioned into N payload sections by the wireless transmitting device. The N payload sections can vary and change in size, scope, detail, priority, importance, ranking, etc. Partitioning allows us to obtain a set of information to form the "P" (i.e., payload) sequence {P0, P1,..., PN-1}. According to some currently preferred aspects, in some cases the payload may include control information bits/signaling. In other aspects, the payload may optionally include other types of signaling or data. In summary, embodiments provide flexible configurations for length and location for section-based CRCs that allow dynamic and on-the-fly adjustment in desired scenarios.

The segmented information bits may be used as a basis for deriving error correction or redundancy check information. Derivation may generally involve using information bits (ie, one set of information) in some way to create or obtain other information (ie, another second set of information). According to some aspects, each payload section may then be used by a wireless transmitting device to independently derive redundancy check information corresponding to that payload section. According to some aspects, the redundancy check information is transmitted to the wireless receiving device ( For example, it may be used by a separate wireless device 302).

In some cases, redundancy check information may include an error detection code. This can be included as a "section-based" CRC, also referred to as a sectional decoded redundancy check (SDRC). In other cases, the redundancy check information may include one or more parity bits, eg, as described in more detail below. In other cases, redundancy check information is most likely passed through one or more trellis stages of a list decoder, known as a sectional in-trellis redundancy check (SITRC). / May contain information that can be used by the list decoder to determine the correct decoding path.

According to some aspects, a wireless transmitting device may derive redundancy check information. It uses an independent scheme corresponding to each section of the P-sequence (e.g., section (CRC, parity bit information, etc.). According to aspects, the redundancy check information derived for each section may include one or more bits and may be of equal or unequal length. That is, in some cases, the redundancy check information derived for the first section (e.g., P0) has the same number of bits as the redundancy check information derived for the second section (e.g., P1). or a different number of bits.

Additionally, in some cases, the wireless transmitting device may derive a global CRC for the full payload, eg, as shown in FIG. 12. A global CRC may cover each section of a multi-sectional payload (ie, a P sequence). A global CRC may be included within a C sequence according to some embodiments. In some cases, a global CRC may be derived from a multi-section payload combined with a section-based CRC.

Additionally, other variations of sectioned redundancy check information are possible, according to some aspects. For example, in some cases, the section expression coverage of the redundancy check information is that {C0} of the C sequence covers {P0} of the P sequence, C1 of the C sequence covers {P0, P1} of the P sequence, and so on. can be defined to be similar.

Further, in some cases, deriving redundancy check information may be performed for any "X" number of payload sections. For example, according to a determined rate and a certain type of traffic or desired reliability of traffic. For example, for ultra-reliable low-latency communications (URLLC) and/or mission-critical (MiCr) type traffic (e.g. payload reliability It is desirable to have redundancy checking information frequently derived (to ensure Accordingly, the wireless transmitting device may determine the rate for deriving/inserting redundancy check information into a section of the payload based on, for example, the type of traffic or the desired reliability of the traffic/payload. In some instances, it may be desirable to omit or not utilize CRC segment information.

According to some aspects, the advantages of using the techniques described herein are many. For example, the benefit of having section-wise redundancy check information used in the scheme described above (e.g., covering corresponding sections of the payload) is that wireless The receiving device's decoder is able to determine whether individual sections of the codeword were correctly received/decoded. This is because the codeword only contains a single 16-bit global CRC, and the decoder can only determine that the entire payload was received/decoded in error when the global CRC fails. It is relative to other cases. Accordingly, knowledge as to whether a particular section of the codeword was improperly received/recoded causes the wireless receiving device to send a request to the wireless transmitting device to retransmit the particular section of the codeword. It may be possible to do so. Additionally, the section-based redundancy check information allows the decoder to optionally perform additional processing/actions based on knowledge of pass/fail of some sections of the payload.

According to some aspects, a wireless transmitting device divides a payload section (e.g., a P-sequence) and a section formula and applicable A bit sequence containing global redundancy check information (eg, a C sequence) can be derived, if any. Other merging functions may also be used as needed to accomplish the creation of representative merged CRC information.

According to some aspects, merging (eg, interleaving/concatenation/insertion) may be performed according to one or more different patterns. For example, as shown at 1202, the first section P0 of the payload is concatenated with the corresponding section-style redundancy check information (e.g., C ₀ ) for the first section of the payload to form a new sequence. The first section of the payload and its corresponding sectional redundancy check information may then be compared to the second section of the payload (e.g., P ₁ ) and its corresponding sectional redundancy check information (e.g., C ₁ ), and the same applies hereinafter. In some cases (eg, at 1206), a global redundancy check information section (eg, global CRC) may be concatenated at the end of this new sequence.

According to aspects, the size of the CRC information may vary, and thus, by way of example, the size of the section-based redundancy check information may also vary. In some cases, this variation in size may be based on whether a global redundancy check information section is included. For example, for a global redundancy check information section, the section-based redundancy check information (eg, C ₀ and C ₁ ) may include more bits if the global redundancy check information section is included. Further, in some cases, the size of each redundancy check information section may vary from section to section. For example, in some cases, C ₀ may be greater or less than C ₁ (ie, may include more or fewer bits). Additionally, in some cases, the size of the redundancy check information section corresponding to a section of the payload may be zero (eg, this section of the payload has no redundancy check information).

In some cases, an interleaving/concatenation pattern may be predefined for the merge sequence. This may include scenarios where the payload section is not followed immediately by the corresponding section-based redundancy check information (eg, P ₀ is not followed immediately by C ₀ ). The interleaving/concatenation pattern can be advantageous because in some cases, a single error symptom can affect up to K consecutive bits at the receiver. Therefore, it may be advantageous to separate P ₀ and its corresponding C ₀ so that a single error symptom does not extend across both P _{0 and C 0 .}

In some cases, payload sections may be manipulated differently to form new or merged sequences. For example, each section of the payload may be concatenated together to form a sectional payload portion (e.g., P ₀ to P _N-1 ), and the sectional redundancy check information for each section may be may be connected at the terminal end. For example, as shown at 1204, this shows the resulting merged sequence formed from the individualized treatment of the sections. In some cases (eg, at 1208), a global CRC may be concatenated at the end of this new sequence.

Regarding interleaving/concatenation patterns (eg, as explained above), some choices of patterns may produce a separation in the sequence between P _k and C _k for a given k. This separation may be essential for redundant check information error detection due to the relationship between the code constraint length and the typical bit length of one single error symptom. In other words, the interleaving/concatenation pattern may be based on the relationship between the code constraint length and the bit length of the defined error symptom. For example, the TBCC constraint length may have the property that a single error event does not extend beyond the constraint length of decoding bits. This is because the decoder's linear feedback shift register memory can be "flushed out" for that single error that exceeds the constraint length. Thus, in some cases, redundancy check information (eg, CRC) of size "C" may ensure detection of one or more decoding errors totaling no more than "C" bits. However, in some cases, error detection is not guaranteed for errors totaling more than "C" bits.

The number of bits used for section-wise redundancy check information (eg, section-wise CRC) may be the same as in the legacy case in some configurations. This may include, for example, having only a global CRC and no section-based CRC. For example, in legacy cases, the global CRC may contain 16 bits. Now, for the example concatenation shown at 1208, assuming the number of sections for the pre-encoded data or CRC is 2 (i.e., 2 sections), the two section expression CRC (e.g., C ₀ , C ₁ ) may include 6 bits, and a single global CRC (eg, CRC _Global ) may include 4 bits. Therefore, the total number of bits used for section expression/global CRC is still 16 bits.

According to some aspects, the resulting merged sequence of bits (i.e., the merged P and C sequence) is then encoded by a wireless transmitting device using an encoder (e.g., such as the encoder shown in FIG. 5). can be encoded into one single codeword. According to aspects, the encoders merge using a convolutional code (CC) encoding scheme, a tail-biting convolutional code (TBCC) encoding scheme, or any other suitable coding scheme (e.g., a Polar code). A bit sequence can be encoded.

The codeword may then be transmitted by a wireless transmitting device over a wireless medium and received by a wireless receiving device for decoding, eg, as described below.

FIG. 13 illustrates example operations 1300 for wireless communications, eg, to improve decoding performance and/or reduce decoding complexity, in accordance with certain aspects of this disclosure. According to some aspects, operations 1300 are performed by any suitable wireless receiving device, such as a base station (e.g., AP 100, 210), an access terminal (e.g., AT 116, 250), and/or wireless device 302. obtain.

A wireless receiving device may include one or more components shown in FIGS. 2 and 3 that may be configured to perform the operations described herein. For example, antenna 224, receiver/transmitter 222, TX data processor 214, processor 230, and/or memory 232 of access point 210 shown in FIG. 2 may perform the operations described herein. Additionally or alternatively, the antenna 252, receiver/transmitter 254, TX data processor 238, modulator 280, processor 270, and/or memory 272 of the access terminal 250 shown in FIG. It can be executed. Additionally or alternatively, one or more of processor 304, memory 306, transceiver 314, DSP 320, encoder 322, decoder 324, and/or antenna 316 shown in FIG. 3 perform the operations described herein. It can be configured as follows.

According to some aspects, act 1300 may complement act 1100. For example, acts 1100 may be performed by a wireless transmitting device to generate (and transmit) a codeword, and acts 1300 may be performed by a wireless receiving device to receive and decode the codeword.

Operations 1300 begin at 1302 by receiving a codeword that includes multiple payload sections. At 1304, the wireless receiving device decodes the multiple payload sections of the codeword. At 1306, the wireless receiving device verifies each decoded payload section of the plurality of payload sections based on redundancy check information corresponding to the decoded payload section.

As mentioned above, the redundancy check information may include error correction codes, such as section-based CRCs, derived for different sections of the payload. According to some aspects, a wireless receiving device decodes a received codeword that includes multiple sections, and determines whether each section of the decoded codeword was correctly decoded based on a section formula CRC for each section. can be verified. Additionally, in some cases, a wireless receiving device may verify a decoded codeword based on a global CRC included within the codeword.

As mentioned above, in some cases the redundancy check information includes parity information (eg, a single parity bit). This information may be derived from at least one of state information or route information. The state or route information may be based on a trellis stage of a list decoder within the wireless receiving device.

In some cases, the wireless receiving device may decode the received codeword based on a technique called Sectional Intrellis Redundancy Check (SITRC), which is performed through a trellis stage of a list decoder within the wireless receiving device. Information within the codeword (i.e., redundancy check information) is used to determine the most likely/accurate decoding path of one or more sections of the codeword.

According to some aspects, generating a codeword with redundancy check information that includes SITRC information may be similar to generating a codeword with SDRC information (i.e., section-based CRC). One difference is that a section-based CRC uses section-based path or state derivation logic (i.e., information to determine one or more most likely/accurate decoding paths) for each section of the codeword. It is possible that it can be replaced with In other words, the redundancy check information for the SITRC may include section expression paths or state derivation logic for each section of the codeword.

FIG. 14 illustrates a four-state CC/TBCC with SITRC derived from the final memory state, according to some aspects of the present disclosure. For example, as shown in FIG. 14, during decoding of a section of the codeword, the SITRC may generate a list for the first section (e.g., by using the decoding techniques described above), as shown at 1402. It may involve a wireless receiving device determining a list of possible decoding paths through a trellis stage of a decoder. The wireless receiving device then generates a list of most likely/accurate decoding paths for the first section based on the redundancy check information (e.g., section formula paths or state derivation logic), e.g., as shown at 1404. The list of possible decoding paths may be pruned to determine. For example, if a particular decoding path in the list of possible decoding paths for a particular section of the payload fails to satisfy the redundancy check information (e.g., fails the CRC), then this particular decoding path may be pruned (eg, discarded).

According to some aspects, the list of most likely/accurate decoding paths (e.g., those that satisfy redundancy check information/pass CRC) is then decoded by decoding the codeword and decoding the decoded section. can be used to verify. In some cases, the trellis quality of the list decoder may be improved by allowing these CRC-passing decoding path candidates to utilize available resources (e.g., states and stages) within the trellis. For example, assume that a middle section of a payload fails its section formula CRC, and its adjacent preceding and subsequent sections both pass their respective section formula CRCs. Now, according to an aspect, with the knowledge and belief that two adjacent sections pass their section formula CRC, the intermediate failing section will e.g. As such, by using the state information for sections that pass their CRC, we can directly exploit knowledge of the state of sections that pass their CRC. Accordingly, in some cases, the decoder may use this information to attempt to re-decode the failed intermediate section.

In some cases, during decoding, the wireless receiving device determines that for a particular section of the codeword, there are no possible decoding paths (e.g., all decoding paths have been pruned from the list of possible decoding paths). If so, the wireless receiving device may terminate decoding early. This is because none of the decoding paths results in a codeword that is properly decoded. According to aspects, this early termination reduces decoding complexity and power consumption. This is because the decoder does not have to attempt to decode codewords that end up being undecodable because there are no decoding paths left.

According to some aspects, such a SITRC may include a sectional payload CC/TBCC memory state or trellis path information, e.g., a predefined function such as sectional_redundancy_check = f(sectional_payload_memory_state_or_trellis_path_info), as shown in FIG. 14, for example. This can be achieved by taking input from

FIG. 15 illustrates a four-state CC/TBCC with SITRC derived from a 2-bit CRC (X2+X1+1) over the trellis path bits, according to some aspects of the present disclosure. For example, during decoding of the payload section of the codeword, the wireless receiving device may determine a list of possible decoding paths through the trellis stage of the list decoder for the first section, as shown, for example, at 1402. The wireless receiving device then prunes the list of possible decoding paths based on the state information or route information for that payload section to determine the list of most likely/accurate decoding paths for that payload section. obtain. As discussed above, if no decoding paths survive pruning (eg, all decoding paths are pruned), the wireless receiving device may terminate decoding early.

According to some aspects, the main advantage of SITRC compared to SDRC is related to the application of CRC data. For example, decoders benefit in that knowledge of redundancy checks can be directly applied during decoder trellis construction by quantitatively reflecting redundancy checks in the state metrics used to decode codewords. Obtainable. This allows the decoder to always strive to find the most likely/accurate number of path candidates before deriving the decoded bits. However, SDRC requires a complete decoding procedure before a decoded redundancy check can be applied.

According to aspects, SDRC provides several benefits when used with Polar code. For example, polar decoding (SC/SCL) is performed sequentially on the information bits (u0, u1, u2,...) (as explained above), and the decoded information bits with lower indexes are The decoded information bits with index can be derived and examined earlier. According to an aspect, in order to support multiple information priorities by applying SDRC in the Polar code, a section of the payload and its corresponding section expression CRC may cover higher priority information, while , other sections of the payload (and their corresponding CRCs) may cover lower priority information. For example, payloads are often comprised of multiple parameter fields, which may or may not be of equal priority with respect to the timing of application. Assuming that each parameter field is also accompanied by a corresponding section expression CRC, decoding the second section of the payload after decoding the first section of the payload and ensuring that its corresponding CRC passes. The decoding result for the first section of the payload may already be used by other modem modules before it even begins. Such a priority scheme is possible for Polar codes when decoding is highly sequential.

According to an aspect, applications of such sectioned CRC (e.g., in Polar code) include enhanced mobile broadband (eMBB) and certain downlink control (DCI) such as resource block (RB) allocation. The information is more time-critical as it is needed for demodulation reference signal (DMRS) channel estimation/equalization at the demodulator front end (DEM Front), while other DCI fields (Modulation and Coding Scheme (MSC) or New Data Indicators (NDI), etc.) are less time-critical as they are only used in the demodulator back end (DEM Back). Without section-based CRC, such type of multi-priority signaling cannot be easily supported.

In some cases, certain sections of the codeword cannot be properly decoded. For example, during the verification process, the wireless receiving device may determine that one or more sections of the codeword were not properly decoded based on redundancy check information. In some cases, if the wireless receiving device determines that one or more sections of the codeword were not properly decoded, the wireless receiving device may retransmit those one or more improperly decoded sections. A request may be sent (eg, to a wireless transmitting device) requesting. In other cases, the wireless receiving device uses the information that one or more sections were not properly decoded to perform more advanced decoding operations to attempt to decode the one or more sections. may be executed. For example, the wireless receiving device may attempt to decode the codeword using a higher performance and more complex decoding algorithm (eg, a decoder with a larger list size).

Additionally, although aspects of this disclosure are described using section-based redundancy check information with a TBCC/CC encoding scheme, the techniques presented above may also be used with other encoding schemes, such as Polar codes. Please note that it is also good.

FIG. 16 illustrates an encoder 1600 configured to encode a payload, according to aspects of the present disclosure. According to aspects, encoder 1600 may include encoder 322 and/or encoder 406. As shown, encoder 1600 includes several electrical circuits configured to perform the operations 1100 shown in FIG. 11, for example. For example, encoder 1600 includes electrical circuitry 1602 for obtaining a payload to be transmitted. Additionally, encoder 1600 includes electrical circuitry 1604 for partitioning the payload into multiple payload sections. In addition, encoder 1600 includes electrical circuitry 1606 for deriving redundancy check information for each respective payload section of the plurality of payload sections. In addition, encoder 1600 includes electrical circuitry 1608 for merging redundancy check information for each payload section with multiple payload sections to form a bit sequence. Additionally, encoder 1600 includes electrical circuitry 1610 for generating codewords by encoding bit sequences using the encoder.

FIG. 17 illustrates a decoder 1700 configured to decode codewords encoded using the techniques presented herein, according to aspects of the present disclosure. According to aspects, decoder 1700 may include decoder 324 and/or decoder 516. As shown, decoder 1700 includes several electrical circuits configured to perform the operations 1300 shown in FIG. 13, for example. For example, decoder 1700 includes electrical circuitry 1702 for receiving a codeword that includes multiple payload sections. Additionally, decoder 1700 includes electrical circuitry 1704 for decoding multiple payload sections of a codeword. In addition, decoder 1700 includes electrical circuitry 1706 for verifying each decoded payload section of the plurality of payload sections based on redundancy check information corresponding to the decoded payload section.

The methods disclosed herein comprise one or more steps or actions for implementing the described method. The method steps and/or actions may be interchanged with each other without departing from the scope of the claims. In other words, unless a particular order of steps or actions is specified, the order and/or use of particular steps and/or actions may be modified without departing from the scope of the claims.

Those of skill in the art would understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description refer to voltages, electrical currents, electromagnetic waves, magnetic fields or particles, light fields or particles, or May be represented by any combination.

The various operations of the methods described above may be performed by any suitable means capable of performing the corresponding functions. The means may include various hardware and/or software components and/or modules, including, but not limited to, circuits, application specific integrated circuits (ASICs), or processors.

For example, means for processing, means for generating, means for obtaining, means for partitioning, means for determining, means for deriving, means for merging, means for verifying. , the means for concatenating, the means for interleaving, the means for decoding, and the means for encoding the TX data processor 214, the processor 230, and/or the RX data processor 242 of the access point 210 shown in FIG. , or a processing system that may include one or more processors, such as TX data processor 238, processor 270, and/or RX data processor 260 of access terminal 250 shown in FIG. Additionally, the means for transmitting and the means for receiving may comprise TMTR/RCVR 222 of access point 210 or TMTR/RCVR 252 of access terminal 250.

According to some aspects, such means are configured to perform the corresponding functions by implementing the various algorithms described above (e.g., in hardware or by executing software instructions). may be implemented by a processing system configured to.

Those skilled in the art will further appreciate that the various example logic blocks, modules, circuits, and algorithm steps described with respect to the disclosure herein may be implemented as electronic hardware, computer software, or a combination of both. . To clearly illustrate this compatibility of hardware and software, various example components, blocks, modules, circuits, and steps have been described above generally with respect to their functionality. Whether such functionality is implemented as hardware or software depends on the particular application and design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in various ways for each particular application, and such implementation decisions should not be construed as causing a departure from the scope of this disclosure.

Various example logic blocks, modules, and circuits described with respect to the disclosure herein include general purpose processors, digital signal processors (DSPs), and special purpose processors designed to perform the functions described herein. integrated circuits (ASICs), field programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination thereof. be. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration). You may.

The steps of the methods or algorithms described with respect to the disclosure herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module resides in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art. There are cases. An exemplary storage medium is coupled to the processor such that the processor can read information from, and/or write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and storage medium may reside within an ASIC. ASICs may reside in user terminals. In the alternative, the processor and the storage medium may reside as separate components in a user terminal.

In one or more example embodiments, the described functionality may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other suitable program code means for carrying instructions or data structures. may include any other medium that can be used for transport or storage in the form of a general purpose or special purpose computer, or for access by a general purpose or special purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software uses coaxial cable, fiber optic cable, twisted pair wire, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave to connect websites, servers, or other remote When transmitted from a source, coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disc and disc as used herein refer to compact disc (disc) (CD), laser disc (disc), optical disc (disc), digital versatile disc (disc) (DVD), floppy (registered trademark) disc, and BLU-RAY (registered trademark) disc, discs usually reproduce data magnetically, while discs reproduce data using a laser. Replay data optically. Combinations of the above should also be included within the scope of computer-readable media.

As used herein, the phrase referring to "at least one of" a list of items refers to any combination of those items that includes a single member. As an example, "at least one of a, b, or c" is intended to include a, b, c, a-b, a-c, b-c, and a-b-c.

The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications of this disclosure will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not limited to the examples and designs described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

100 access points (AP)
104 Antenna
106 Antenna
108 Antenna
110 Antenna
112 Antenna
114 Antenna
116 Access Terminal (AT)
118 Communication link, reverse link
120 Communication link, forward link
122 Access Terminal
124 Communication link, reverse link
126 Communication link, forward link
200 MIMO system
210 Transmitter system, access point
212 Data Source
214 Transmit (TX) Data Processor
220TX MIMO processor
222 Transmitter (TMTR), receiver/transmitter
222a transmitter (TMTR)
222t transmitter (TMTR)
224a antenna
224t antenna
230 processor
232 Memory
236 data source
238 TX data processor
240 Demodulator
242 RX Data Processor
250 Receiver System, Access Terminal
252a antenna
252r antenna
254 Receiver/Transmitter
254a transmitter
254r transmitter
260 RX data processor
270 processor
272 Memory
280 modulator
302 Wireless Device
304 processor
306 Memory
308 Housing
310 transmitter
312 receiver
314 transceiver
316 transmitting antenna
318 Signal Detector
320 Digital Signal Processor (DSP)
322 encoder
324 decoder
326 bus system
402 messages
404 Radio Frequency (RF) Modem
406 encoder
408 encoded bitstream
410 Mapper
412 Tx symbol
414 Tx Chain
416 RF signal
418 Antenna
502 antenna
506 RF Chain
508 symbols
510 modem
512 Demapper
514 bitstream
516 decoder
518 messages
1100 operation
1300 operations
1600 encoder
1602 Electrical circuit
1604 Electrical circuit
1606 Electrical circuit
1608 Electrical circuit
1610 Electrical circuit
1700 decoder
1702 Electrical circuit
1704 Electrical circuit
1706 Electrical circuit

Claims (21)

A method for wirelessly transmitting data according to wireless technology, the method comprising:
obtaining a payload to be sent;
partitioning the payload into a sequence of two or more payload sections;
For each respective payload section of said sequence of two or more payload sections,
deriving redundancy check information for each of the payload sections;
interleaving the respective payload sections and the derived redundancy check information into a bit sequence;
generating a codeword by encoding the bit sequence for transmission;
transmitting the codeword over a wireless channel according to the wireless technology. deriving a global error detection code based on the sequence of two or more payload sections;
2. The method of claim 1, further comprising merging the global error detection code with the bit sequence. The redundancy check information may include one of a cyclic redundancy check (CRC), parity information, or information that can be used by the list decoder to determine one or more correct decoding paths through a trellis stage of the list decoder. 2. The method of claim 1, comprising: 2. The method of claim 1, wherein the codeword is encoded using a tail-biting convolutional code (TBCC) encoding scheme or a convolutional code (CC) encoding scheme, and the payload includes control information. The size of the redundancy check information for a first payload section of the sequence of two or more payload sections is different from the size of the redundancy check information for a second payload section of the sequence of two or more payload sections. The method described in Section 1. A method for wirelessly transmitting data according to wireless technology, the method comprising:
obtaining a payload to be sent;
partitioning the payload into a sequence of two or more payload sections;
For each respective payload section of said sequence of two or more payload sections,
deriving redundancy check information for each of the payload sections;
concatenating the respective payload sections and the derived redundancy check information into a bit sequence;
generating a codeword by encoding the bit sequence for transmission;
transmitting the codeword over a wireless channel according to the wireless technology. deriving a global error detection code based on the sequence of two or more payload sections;
7. The method of claim 6, further comprising merging the global error detection code with the bit sequence. The redundancy check information may include one of a cyclic redundancy check (CRC), parity information, or information that can be used by the list decoder to determine one or more correct decoding paths through a trellis stage of the list decoder. 7. The method of claim 6, comprising: 7. The method of claim 6, wherein the codeword is encoded using a tail-biting convolutional code (TBCC) encoding scheme or a convolutional code (CC) encoding scheme, and the payload includes control information. The size of the redundancy check information for a first payload section of the sequence of two or more payload sections is different from the size of the redundancy check information for a second payload section of the sequence of two or more payload sections. The method described in Section 6. A device for wirelessly transmitting data according to wireless technology, the device comprising:
obtaining the payload to be sent; and
partitioning the payload into a sequence of two or more payload sections;
For each respective payload section of said sequence of two or more payload sections,
deriving redundancy check information for each of the payload sections;
interleaving the respective payload sections and the derived redundancy check information into a bit sequence;
generating a codeword by encoding the bit sequence for transmission;
and transmitting the codeword over a wireless channel according to the wireless technology;
An apparatus comprising a memory coupled to the at least one processor. the at least one processor,
deriving a global error detection code based on the sequence of two or more payload sections;
12. The apparatus of claim 11, further configured to: merge the global error detection code with the bit sequence. The redundancy check information may include one of a cyclic redundancy check (CRC), parity information, or information that can be used by the list decoder to determine one or more correct decoding paths through a trellis stage of the list decoder. 12. The apparatus of claim 11, comprising: 12. The apparatus of claim 11, wherein the codeword is encoded using a tail-biting convolutional code (TBCC) encoding scheme or a convolutional code (CC) encoding scheme, and the payload includes control information. The size of the redundancy check information for a first payload section of the sequence of two or more payload sections is different from the size of the redundancy check information for a second payload section of the sequence of two or more payload sections. Apparatus according to paragraph 11. A device for wirelessly transmitting data according to wireless technology, the device comprising:
obtaining the payload to be sent; and
partitioning the payload into a sequence of two or more payload sections;
For each respective payload section of said sequence of two or more payload sections,
deriving redundancy check information for each of the payload sections;
concatenating the respective payload sections and the derived redundancy check information into a bit sequence;
generating a codeword by encoding the bit sequence for transmission;
and transmitting the codeword over a wireless channel according to the wireless technology;
An apparatus comprising a memory coupled to the at least one processor. the at least one processor,
deriving a global error detection code based on the sequence of two or more payload sections;
17. The apparatus of claim 16, further configured to: merge the global error detection code with the bit sequence. The redundancy check information may include one of a cyclic redundancy check (CRC), parity information, or information that can be used by the list decoder to determine one or more correct decoding paths through a trellis stage of the list decoder. 17. The apparatus of claim 16, comprising: 17. The apparatus of claim 16, wherein the codeword is encoded using a tail-biting convolutional code (TBCC) encoding scheme or a convolutional code (CC) encoding scheme, and the payload includes control information. The size of the redundancy check information for a first payload section of the sequence of two or more payload sections is different from the size of the redundancy check information for a second payload section of the sequence of two or more payload sections. Apparatus according to paragraph 16. 2. The method of claim 1, wherein the codeword is encoded using a Polar code encoding scheme.

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