JP7359617B2 - power supply - Google Patents

Description

The present invention relates to a power supply device.

For example, Patent Document 1 describes a power supply device that uses an auxiliary power source to back up power supply to a power supply target when the main power supply fails. The main power source and the auxiliary power source are connected in parallel to the power supply target. For example, when an abnormality in the main power supply is detected based on the current supplied from the main power supply to the power supply target, the controller of the power supply device shuts off the power supply path between the main power supply and the power supply target, and at the same time shuts off the power supply path between the auxiliary power supply and the power supply target. Connect the power supply route between the

Japanese Patent Application Publication No. 2008-302825

Depending on the product specifications, for example, it may be possible to determine whether there is an abnormality in the main power source by comparing the voltage of the main power source with a threshold value, and to switch between the main power source and the auxiliary power source in accordance with the determination result. However, in this case, the following concerns arise. For example, when the voltage of the main power source fluctuates in the vicinity of a threshold value, there is a risk that the main power source and the auxiliary power source will be switched frequently due to repeated determinations of normality and abnormality.

An object of the present invention is to provide a power supply device that can supply stable power to a power supply target.

A power supply device that can achieve the above purpose has an auxiliary power source for the main power supply that supplies power to the power supply target, and whether the power supply status from the main power supply to the power supply target is normal based on the power supplied to the power supply target. an analog circuit that generates a status signal indicating whether there is an abnormality; 2, and a power supply switching circuit that switches the power supply for the power supply target between the main power supply and the auxiliary power supply according to the output state of the retention circuit. There is. The holding circuit switches its own output state from the first state to the second state when the state signal changes from a state indicating normality of the power supply state to a state indicating abnormality, and the holding circuit switches its own output state from the first state to the second state, and The second state is maintained regardless of changes in the state signal.

According to this power supply device, when the status signal generated by the analog circuit changes from a state indicating normality to a state indicating an abnormality regarding the power supply status from the main power supply to the power supply target, and then returns to a state indicating normality again. In any case, the output state of the holding circuit is held at the second state indicating the previous abnormality. Therefore, after the power source for the power supply target is switched from the main power source to the auxiliary power source, it is suppressed from immediately returning from the auxiliary power source to the main power source. Therefore, after the power supply for the power supply target is switched from the main power supply to the auxiliary power supply, the power from the auxiliary power supply is stably supplied to the power supply target.

In the above power supply device, the power supply switching circuit includes a first switching circuit that opens and closes a first power supply path for supplying power from the main power supply to the power supply target, and a first switching circuit that opens and closes a first power supply path for supplying power from the main power supply to the power supply target, and a first switching circuit that supplies power from the auxiliary power supply to the power supply target. It is preferable to have a second switching circuit that opens and closes a second power supply path for supplying power. In this case, the analog circuit generates the state signal based on power obtained through a detection point set between the first switching circuit and the power supply target in the first power supply path. Good too.

According to this power supply device, it is possible to deal with not only an abnormality in the power supply state caused by an abnormality in the main power supply, but also an abnormality in the power supply state caused by an abnormality in the first switching circuit. That is, regardless of whether the abnormality in the power supply state to the power supply target is caused by the main power supply or the first switching circuit, the power supply for the power supply target can be switched from the main power supply to the auxiliary power supply. Therefore, regardless of whether the abnormality in the power supply state to the power supply target is caused by the main power supply or the first switching circuit, the power from the auxiliary power supply is stably supplied to the power supply target.

In the above power supply device, the second power feeding path may be connected between the first switching circuit and the power feeding target in the first power feeding path.
According to this power supply device, when the power supply for the power supply target is switched from the main power supply to the auxiliary power supply, the power of the auxiliary power supply is supplied to the power supply target via the second power supply path. At this time, since the power supply state from the auxiliary power source to the power supply target is normal, the analog circuit generates a status signal indicating that the power supply state to the power supply target is normal. However, after the holding circuit switches its own output state from the first state to the second state, it holds the second state regardless of the change in the state signal. Therefore, after the power source for the power supply target is switched from the main power source to the auxiliary power source, it is suppressed from immediately returning from the auxiliary power source to the main power source.

In the above power supply device, the power supply switching circuit includes a first switching circuit that opens and closes a first power supply path for supplying power from the main power supply to the power supply target, and a first switching circuit that opens and closes a first power supply path for supplying power from the main power supply to the power supply target, and a first switching circuit that supplies power from the auxiliary power supply to the power supply target. It is preferable to have a second switching circuit that opens and closes a second power supply path for supplying power. In this case, the analog circuit controls the analog circuit based on a comparison result between a threshold voltage and a voltage obtained through a detection point set between the main power supply and the first switching circuit in the first power supply path. A status signal may also be generated.

According to this power supply device, a status signal indicating that the power supply status to the power supply target is normal and a status signal indicating that the power supply status to the power supply target is abnormal is generated in the analog circuit due to voltage fluctuation of the main power supply. There is a possibility that the status signal shown in the figure is repeatedly generated. However, after the holding circuit switches its own output state from the first state to the second state, it holds the second state regardless of the change in the state signal. Therefore, after the power source for the power supply target is switched from the main power source to the auxiliary power source, it is suppressed from immediately returning from the auxiliary power source to the main power source. That is, it is possible to suppress frequent switching of the power supply to the power supply target between the main power supply and the auxiliary power supply, so that stable power can be supplied to the power supply target.

In the above power supply device, it is determined whether the power supply state to the power supply target is normal or abnormal based on the power of the main power supply, and when the determination result switches from abnormality to normal, the output of the holding circuit It is preferable to include a control circuit for returning the state from the second state to the first state.

According to the above power supply device, the control circuit appropriately controls the return of the output state of the holding circuit from the second state to the first state. Therefore, the power to the power supply target can be appropriately returned from the auxiliary power source to the main power source.

According to the power supply device of the present invention, switching between the main power source and the auxiliary power source can be performed more appropriately.

FIG. 1 is a configuration diagram of a steering device to which a first embodiment of a power supply device is applied. FIG. 1 is a circuit diagram of a first embodiment of a power supply device. FIG. 3 is a circuit diagram of a second embodiment of the power supply device.

<First embodiment>
A first embodiment in which a power supply device is applied to a steering device will be described below.
As shown in FIG. 1, the steering device 1 includes a steering mechanism 2, an assist mechanism 3, a steering control device 4, and a power supply device 5.

The steering mechanism 2 has a steering shaft 11 and a steered shaft 12. A steering wheel 13 is fixed to a first end of the steering shaft 11. A pinion gear 14 is provided at a second end of the steering shaft 11 that is opposite to the steering wheel 13 . The pinion gear 14 meshes with a rack gear 15 provided on the steered shaft 12. The rotational motion of the steering shaft 11 is converted into reciprocating linear motion in the axial direction of the steered shaft 12 through engagement between the pinion gear 14 and the rack gear 15. This reciprocating linear motion of the steered shaft 12 is transmitted to the left and right steered wheels 17, 17 via tie rods 16, 16 connected to both ends of the steered shaft 12, so that the steered wheels 17, 17 are steered. Corners are changed.

The assist mechanism 3 includes a motor 21 and a speed reducer 22. A three-phase brushless motor is used as the motor 21, and a worm gear mechanism is used as the reducer 22. The motor 21 is connected to the steering shaft 11 via a reduction gear 22. The reducer 22 reduces the rotation of the motor 21 and transmits the reduced rotational force to the steering shaft 11 . That is, the torque of the motor 21 is transmitted as a steering assist force to the steering shaft 11 via the reducer 22, thereby assisting the driver's steering operation.

The steering control device 4 is connected to an on-vehicle main power source 6 via a power source device 5. As the main power source 6, a battery is used, for example. The steering control device 4 operates by consuming power from a main power source 6 supplied via a power source device 5. The steering control device 4 controls power supply to the motor 21 according to detection results from various sensors provided in the vehicle. Examples of the sensors include a torque sensor 31 and a vehicle speed sensor 32. Torque sensor 31 is provided on steering shaft 11 and detects steering torque T. Vehicle speed sensor 32 detects vehicle speed V. The steering control device 4 calculates a target assist force based on the steering torque T and the vehicle speed V, and supplies electric power to the motor 21 to cause the assist mechanism 3 to generate the target assist force.

<Power supply>
Next, the configuration of the power supply device 5 will be explained.
As shown in FIG. 2, the power supply device 5 includes an auxiliary power supply 40, a power supply switching circuit 50, a voltage detection circuit 60, a power supply control circuit 70, an analog determination circuit 80, and a latch circuit 90.

The power supply device 5 has a first power supply path L1 for supplying power from the main power source 6 to the steering control device 4, and a second power supply path L2 for supplying power from the auxiliary power source 40 to the steering control device 4. have. The second power supply route L2 is connected to the connection point P1 of the first power supply route L1. Electric power from the auxiliary power supply 40 is supplied to the steering control device 4 via a portion of the second power supply path L2 and the first power supply path L1. As the auxiliary power source 40, a power storage device capable of charging and discharging electric charge, such as a lithium ion capacitor, is employed.

The power supply switching circuit 50 includes a first switching circuit 51, a second switching circuit 52, a first drive circuit 53, and a second drive circuit 54.
The first switching circuit 51 is provided between the main power supply 6 and the connection point P1 on the first power supply path L1. The first switching circuit 51 has a first FET 55 (field-effect-transistor) and a second FET 56. The first FET 55 and the second FET 56 are P-channel type, and are turned on by applying a negative voltage.

The source terminal S of the first FET 55 is connected to the high potential side of the main power supply 6. A drain terminal D of the first FET 55 is connected to a drain terminal D of the second FET 56. A source terminal S of the second FET 56 is connected to the steering control device 4 via the first power supply path L1. The gate terminal G of the first FET 55 and the gate terminal G of the second FET 56 are connected to the first drive circuit 53, respectively.

The second switching circuit 52 is provided on the second power feeding path L2. The second switching circuit 52 has a third FET 57 and a fourth FET 58. The third FET 57 and the fourth FET 58 are N-channel type, and are turned on by applying a positive voltage. A drain terminal D of the third FET 57 is connected to the high potential side of the auxiliary power supply 40. The source terminal S of the third FET 57 is connected to the source terminal S of the fourth FET 58. The drain terminal D of the fourth FET 58 is connected to the connection point P1 of the first power supply path L1 via the second power supply path L2. The gate terminal G of the third FET 57 and the gate terminal G of the fourth FET 58 are connected to the second drive circuit 54, respectively.

The power supply control circuit 70 is a digital circuit that handles digital signals. The power supply control circuit 70 is connected to the connection point P2 of the first power supply path L1 via the voltage detection circuit 60. The connection point P2 is set between the main power supply 6 and the first switching circuit 51 on the first power supply path L1. Further, the power supply control circuit 70 is also connected to the first drive circuit 53 and the second drive circuit 54.

The power supply control circuit 70 detects the voltage V2 at the connection point P2 through the voltage detection circuit 60, and detects an abnormality in the main power supply 6 based on the detected voltage V2. The power supply control circuit 70 determines whether there is an abnormality in the main power supply 6 by comparing the voltage V2 at the connection point P2 and the threshold voltage V _th1 . The threshold voltage V _th1 is a voltage value that serves as a reference when determining an abnormality such as a voltage drop in the main power supply 6, and is set by experiment or simulation.

The power supply control circuit 70 determines that the main power supply 6 is normal when the voltage V2 at the connection point P2 exceeds the threshold voltage V _th1 . Further, the power supply control circuit 70 determines that an abnormality has occurred in the main power supply 6 when a state in which the voltage V2 at the connection point P2 does not exceed the threshold voltage V _th1 continues for a set time. The predetermined time is set based on the viewpoint of avoiding erroneously determining that a temporary drop in the voltage V2 due to noise or the like is an abnormality in the main power supply 6.

Incidentally, the power supply control circuit 70 can control the switching of the first switching circuit 51 through the first drive circuit 53. Further, the power supply control circuit 70 can control switching of the second switching circuit 52 through the second drive circuit 54.

The analog determination circuit 80 detects an abnormality in the main power supply 6 separately from the power supply control circuit 70. The analog determination circuit 80 has a voltage dividing circuit 81 and a comparison circuit 82.
The voltage dividing circuit 81 has a voltage dividing resistor 83 and a voltage dividing resistor 84. These voltage dividing resistors 83 and 84 are connected in series with each other. An end of the voltage dividing resistor 83 opposite to the voltage dividing resistor 84 is connected to a connection point P3 of the first power supply path L1. This connection point P3 is set between the connection point P1 and the steering control device 4. The end of the voltage dividing resistor 84 opposite to the voltage dividing resistor 83 is connected to ground. A connection point P4 between the voltage dividing resistor 83 and the voltage dividing resistor 84 is connected to the comparison circuit 82.

Comparison circuit 82 includes a comparator 85 and a pull-up resistor 86. A positive input terminal of the comparator 85 is connected to a connection point P4 between the voltage dividing resistors 83 and 84 in the voltage dividing circuit 81. Therefore, the voltage V3 at the connection point P3 divided by the voltage dividing circuit 81 is applied to the positive input terminal of the comparator 85. The negative input terminal of comparator 85 is set as a reference terminal. The voltage applied to the negative input terminal of comparator 85 is fixed to a predetermined reference voltage. A threshold voltage V _th2 is applied to the negative input terminal of the comparator 85 as a reference voltage generated by a reference voltage generation section (not shown). A positive power supply terminal of the comparator 85 is connected to a reference voltage generation section. A negative power supply terminal of the comparator 85 is connected to ground. The output terminal of comparator 85 is connected to latch circuit 90 .

The comparator 85 compares the voltage V3 at the connection point P3 and the threshold voltage V _th2 , which is a reference voltage, and generates a high-level or low-level control signal SC depending on the comparison result. The comparator 85 performs high-level control when the voltage V3 at the connection point P3 applied to the positive input terminal is larger than the threshold voltage _Vth2 , which is the reference voltage, that is, when the main power supply 6 is normal. Generate signal SC. The comparator 85 controls the low level control when the voltage V3 at the connection point P3 applied to the positive input terminal is smaller than the threshold voltage _Vth2 which is the reference voltage, that is, when the main power supply 6 is abnormal. Generate signal SC. The control signal SC also functions as a status signal indicating whether the status of the main power supply 6 is normal or abnormal.

A pull-up resistor 86 is provided between the reference voltage generator and the output terminal of the comparator 85. The pull-up resistor 86 is provided to stabilize the control signal SC output from the output terminal of the comparator 85.

The latch circuit 90 maintains the output state in a reset state or a set state based on two input signals. The latch circuit 90 has a set terminal S and a reset terminal R as input terminals. Furthermore, the latch circuit 90 has two output terminals Q and ^Q- . The set terminal S is connected to the output terminal of the comparator 85. The reset terminal R is connected to the output port of the power supply control circuit 70. The output terminal Q is connected to a first drive circuit 53 and a second drive circuit 54, respectively. Output terminal ^Q- is not used. However, the relationship between output terminal Q and output terminal Q ^- , that is, the logic level, is always reversed. The truth table of latch circuit 90 is as shown in Table 1.

The latch circuit 90 holds the logic level as the output state of the output terminal Q based on the combination of the logic level of the set terminal S and the logic level of the reset terminal R according to the truth table shown in Table 1. When both the logic level of the set terminal S and the logic level of the reset terminal R are low level "0", the logic level of the output terminal Q becomes low level "0". When the logic level of the set terminal S is a low level "0" and the logic level of the reset terminal R is a high level "1", the logic level of the output terminal Q becomes a high level "1". When the logic level of the set terminal S is a high level "1" and the logic level of the reset terminal R is a low level "0", the logic level of the output terminal Q becomes a low level "0". When both the logic level of the set terminal S and the logic level of the reset terminal R are high level "1", the logic level of the output terminal Q is maintained at the previous logic level (No Change).

When the logic level of the output terminal of the latch circuit 90 is low level, the first drive circuit 53 applies a negative gate voltage Vg1 to the gate terminal G of the first FET 55 and the gate terminal G of the second FET 56, respectively. Apply. Since the first FET 55 and the second FET 56 are each turned on, power from the main power source 6 is supplied to the steering control device 4 via the first power supply path L1. Further, when the logic level of the output terminal of the latch circuit 90 is low level, the second drive circuit 54 applies the gate voltage Vg2 to the gate terminal G of the third FET 57 and the gate terminal G of the fourth FET 58. Not applied. Since the third FET 57 and the fourth FET 58 are each turned off, power from the auxiliary power source 40 is not supplied to the steering control device 4. Therefore, when the main power source 6 is normal, the main power source 6 serves as the power source for the steering control device 4.

The first drive circuit 53 does not apply the gate voltage Vg1 to the gate terminal G of the first FET 55 and the gate terminal G of the second FET 56 when the logic level of the output terminal of the latch circuit 90 is high level. . Since the first FET 55 and the second FET 56 are each turned off, power from the main power source 6 is not supplied to the steering control device 4. Further, when the logic level of the output terminal of the latch circuit 90 is at a high level, the second drive circuit 54 has a positive gate with respect to the gate terminal G of the third FET 57 and the gate terminal G of the fourth FET 58, respectively. Apply voltage Vg2. Since the third FET 57 and the fourth FET 58 are each turned on, the power of the auxiliary power supply 40 is supplied to the steering control device 4 via the second power supply path L2. Therefore, if the main power source 6 is abnormal, the auxiliary power source 40 serves as the power source for the steering control device 4.

<Operation of the first embodiment>
Next, the operation of the first embodiment will be explained.
The power supply control circuit 70 controls the first FET 55 and the second FET 56 through the first drive circuit 53 when the vehicle power is switched from off to on, for example, when an initial check (initial inspection) of the vehicle is performed. At the same time, the third FET 57 and the fourth FET 58 are respectively turned off through the second drive circuit 54. Thereby, electric power from the main power source 6 is supplied to the steering control device via the first power supply path L1.

When the main power supply 6 is normal, the voltage V2 at the connection point P2 of the first power supply path L1 detected through the voltage detection circuit 60 exceeds the threshold voltage V _th1 , and the voltage V2 at the connection point P2 of the first power supply path L1 is detected through the voltage detection circuit 60. The voltage V3 of P3 exceeds the threshold voltage V _th2 , which is the reference voltage of the comparator 85.

At this time, the power supply control circuit 70 indicates that the main power supply 6 is normal because the state in which the voltage V2 at the connection point P2 detected through the voltage detection circuit 60 does not exceed the threshold voltage _Vth1 does not continue for a predetermined period of time. judge. Further, the power supply control circuit 70 generates a low-level electrical signal SR for the latch circuit 90. Therefore, the logic level of the reset terminal R of the latch circuit 90 is maintained at the low level "0". Furthermore, since the voltage V3 at the connection point P3 exceeds the threshold voltage V _th2 , which is the reference voltage of the comparator 85, the comparator 85 generates a high-level control signal SC. Therefore, the logic level of the set terminal S of the latch circuit 90 is maintained at a high level "1". Therefore, the logic level of the output terminal Q of the latch circuit 90 is maintained at the low level "0". The relationship between each terminal of the latch circuit 90 and the logic level is as shown in the following equation (1).

(S,R,Q)=(1,0,0)...(1)
After completing the initial check of the vehicle, the power supply control circuit 70 applies a high-level electric signal SR to the reset terminal R of the latch circuit 90 in order to bring the latch circuit 90 into a predetermined initial state. As a result, the logic level of the reset terminal R changes from low level "0" to high level "1". In this case, the latch circuit 90 retains the previous output state. Therefore, the logic level of the output terminal Q is maintained at low level "0". The logic level of each terminal of the latch circuit 90 in the initial state is as shown in the following equation (2).

(S,R,Q)=(1,1,0)...(2)
As shown in equation (2), the logic level of the output terminal Q of the latch circuit 90 is maintained at the low level "0". Therefore, the first drive circuit 53 turns on the first FET 55 and the second FET 56, respectively. Further, the second drive circuit 54 turns off the third FET 57 and the fourth FET 58, respectively. That is, the power source for the steering control device 4 is switched to the main power source 6. Electric power from the main power source 6 is supplied to the steering control device 4 via the first power supply path L1.

Next, a case where an abnormality occurs in the main power supply 6 will be explained.
If, for example, the voltage V3 at the connection point P3 drops to a value smaller than the threshold voltage _Vth2 , which is the reference voltage of the comparator 85, due to an abnormality occurring in the main power supply 6, the set terminal S is set to a low level control signal. A signal SC is applied. At this time, the logic level of the set terminal S changes from high level "1" to low level "0". Further, the logic level of the output terminal Q changes from low level "0" to high level "1". The logic level of each terminal of the latch circuit 90 at this time is as shown in the following equation (3).

(S,R,Q)=(0,1,1)...(3)
As shown in equation (3), the logic level of the output terminal Q of the latch circuit 90 is maintained at a high level "1". Therefore, the first drive circuit 53 turns off the first FET 55 and the second FET 56, while the second drive circuit 54 turns on the third FET 57 and the fourth FET 58, respectively. That is, the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40. Power from the auxiliary power supply 40 is supplied to the steering control device 4 via the second power supply path L2 and the first power supply path L1.

As power is supplied from the auxiliary power source 40 to the steering control device 4, the voltage V3 at the connection point P3, which is divided by the voltage dividing circuit 81, is applied to the positive input terminal of the comparator 85. The voltage V3 at this time shows a normal value based on the voltage of the auxiliary power supply 40. Therefore, the voltage V3 has a value larger than the threshold voltage V _th2 , which is the reference voltage of the comparator 85. Therefore, comparator 85 generates a high level control signal SC. Therefore, the logic level of the set terminal S of the latch circuit 90 changes from low level "0" to high level "1". In this case, the latch circuit 90 retains the previous output state. The logic level of each terminal of the latch circuit 90 at this time is as shown in the following equation (4).

(S,R,Q)=(1,1,1)...(4)
As shown in equation (4), the logic level of the output terminal Q is maintained at high level "1". Therefore, the first drive circuit 53 keeps the first FET 55 and the second FET 56 off, while the second drive circuit 54 keeps the third FET 57 and the fourth FET 58 on. do. That is, the state in which the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40 is maintained. After the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40, the power source for the steering control device 4 is prevented from immediately returning to the main power source 6.

Incidentally, the latch circuit 90 may be omitted as the power supply device 5, and the switching of the first switching circuit 51 and the switching of the second switching circuit 52 may be controlled based on the control signal SC generated by the comparator 85. However, if this configuration is adopted, the following concerns arise.

As described above, when the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40, the comparator 85 generates a high-level control signal SC indicating that the main power source 6 is normal. Based on this control signal SC, the first drive circuit 53 turns on the first FET 55 and the second FET 56, while the second drive circuit 54 turns off the third FET 57 and the fourth FET 58. That is, even though the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40 due to the detection of an abnormality in the main power source 6, the power of the auxiliary power source 40 is supplied to the steering control device 4. Due to this, there is a possibility that the power supply for the steering control device 4 may be unintentionally returned from the auxiliary power supply 40 to the main power supply 6. In this regard, in this embodiment, the state of switching to the auxiliary power supply 40 is maintained by the latch circuit 90.

Next, a case will be described in which the main power source 6 returns to a normal state while the power source for the steering control device 4 is switched to the auxiliary power source 40.
When the main power supply 6 returns to the normal state, the value of the voltage V3 at the connection point P3 applied to the positive input terminal of the comparator 85 exceeds the threshold voltage V _th2 , which is the reference voltage of the comparator 85. At this time, the comparator 85 generates a high level control signal SC. Therefore, the logic level of the set terminal S changes from low level "0" to high level "1". In this case, since the previous output state is held in the latch circuit 90, the logic level of the output terminal Q is maintained at the high level "1". The logic level of each terminal of the latch circuit 90 at this time is as shown in the following equation (5).

(S,R,Q)=(1,1,1)...(5)
Further, when the main power supply 6 returns to a normal state, the voltage V2 at the connection point P2 detected through the voltage detection circuit 60 exceeds the threshold voltage V _th1 . When it is determined that the main power supply 6 has returned to a normal state, the power supply control circuit 70 returns the latch circuit 90 to its initial state. Specifically, it is as follows.

The power supply control circuit 70 once applies a low-level electric signal SR to the reset terminal R of the latch circuit 90. As a result, the logic level of the reset terminal R changes from high level "1" to low level "0", and the logic level of the output terminal Q changes from high level "1" to low level "0". The logic level of each terminal of the latch circuit 90 at this time is as shown in the following equation (6).

(S,R,Q)=(1,0,0)...(6)
As shown in equation (6), the logic level of the output terminal Q of the latch circuit 90 is maintained at the low level "0". Therefore, the first drive circuit 53 turns on the first FET 55 and the second FET 56, while the second drive circuit 54 turns off the third FET 57 and the fourth FET 58, respectively. That is, the power for the steering control device 4 is returned from the auxiliary power source 40 to the main power source 6. Electric power from the main power source 6 is supplied to the steering control device 4 via the first power supply path L1.

Next, the power supply control circuit 70 applies a high-level electric signal SR to the reset terminal R of the latch circuit 90. As a result, the logic level of the reset terminal R changes from low level "0" to high level "1". In this case, since the previous output state is held in the latch circuit 90, the logic level of the output terminal Q is maintained at the low level "0". That is, the latch circuit 90 returns to its initial state. The logic level of each terminal of the latch circuit 90 at this time is as shown in the following equation (7).

(S, R, Q) = (1, 1, 0) ... (7)
As shown in equation (7), the logic level of the output terminal Q of the latch circuit 90 is maintained at the low level "0". Therefore, the power source for the steering control device 4 is maintained in a state where it is switched to the main power source 6.

<Effects of the first embodiment>
Therefore, according to the first embodiment, the following effects can be obtained.
(1) When the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40, the voltage of the first power supply path L1 returns to the normal value as the power supply from the auxiliary power source 40 to the steering control device 4 starts. Even in this case, the state in which the power source for the steering control device 4 is switched to the auxiliary power source 40 is maintained by the latch circuit 90. Therefore, after the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40, it is avoided that the power source is immediately returned to the main power source 6. Therefore, power from the auxiliary power source 40 is stably supplied to the steering control device 4.

(2) When it is determined that the main power supply 6 has returned to a normal state, the power supply control circuit 70 transmits an electric signal SR to a latch circuit for returning power to the steering control device 4 from the auxiliary power supply 40 to the main power supply 6. It is applied to the reset terminal R of 90. By inverting the logic level of the output terminal Q of the latch circuit 90, the power source for the steering control device 4 is switched from the auxiliary power source 40 to the main power source 6. Since the logic level of the output terminal Q of the latch circuit 90 is appropriately controlled by the power supply control circuit 70, the power for the steering control device 4 can be appropriately returned from the auxiliary power supply 40 to the main power supply 6. Further, since the power supply control circuit 70 more accurately determines whether the main power supply 6 returns to the normal state, reliability in returning the power supply to the steering control device 4 to the main power supply 6 can be ensured.

(3) Unlike a digital circuit, the analog determination circuit 80 directly determines the voltage of the first power supply path L1 to the steering control device 4. Therefore, even if power supply to the steering control device 4 becomes difficult not only due to an abnormality in the main power supply 6 but also, for example, in the first switching circuit 51 provided in the first power supply path L1, the steering control device 4 It is possible to switch the power source for the main power source 6 from the auxiliary power source 40.

(4) The second power supply route L2 is connected between the first switching circuit 51 and the steering control device 4 in the first power supply route L1. Then, when the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40, the power of the auxiliary power source 40 is supplied to the power supply target via the second power supply path L2. At this time, since the power supply state from the auxiliary power supply 40 to the steering control device 4 is normal, the analog determination circuit 80 generates a high-level control signal SC indicating that the power supply state to the steering control device 4 is normal. . However, the latch circuit 90 switches the logic level of the output terminal Q from a low level to a high level when the control signal SC indicates an abnormality in the power supply state, and also switches the logic level of the output terminal Q from a low level to a high level. The logic level of output terminal Q is held at high level regardless of the output terminal Q. Therefore, after the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40, it is suppressed from immediately returning from the auxiliary power source 40 to the main power source 6.

(5) The analog determination circuit 80 performs a determination process on the voltage V3 at the connection point P3 without digitizing the voltage V3. Therefore, the analog determination circuit 80 can quickly switch the power source for the steering control device 4 between the main power source 6 and the auxiliary power source 40 to the extent that the voltage V3 is not digitized.

<Second embodiment>
Next, a second embodiment of the power supply device will be described. This embodiment differs from the first embodiment in the points where the analog determination circuit 80 monitors the voltage.

As shown in FIG. 3, the voltage dividing resistor 83 of the analog determination circuit 80 is connected to the connection point P3 of the first power supply path L1, and this connection point P3 is connected to the main power supply 6 in the first power supply path L1. It is set between the first switching circuit 51 and the first switching circuit 51 . When these configurations are adopted as the power supply device 5, the following concerns arise.

That is, the voltage V3 at the connection point P3 divided by the voltage dividing circuit 81 is applied to the positive input terminal of the comparator 85. For example, when the value of voltage V3 fluctuates in the vicinity of threshold voltage _Vth2 , which is the reference voltage of comparator 85, due to voltage fluctuations of main power supply 6, the logic level of control signal SC generated by comparator 85 becomes high level. There is a concern that it frequently switches between high and low levels.

Therefore, when the power supply device 5 adopts a configuration in which the switching of the second switching circuit 52 is controlled based on the control signal SC generated by the comparator 85, the power source for the steering control device 4 is connected to the main power source 6 and the auxiliary power source 4. There is a possibility that noise may occur in the electric power supplied to the steering control device 4 due to frequent switching between the two. As a result, there is a concern that it will be difficult to supply stable power to the steering control device 4.

In this regard, according to the present embodiment, after the value of the voltage V3 falls below the threshold voltage _Vth2 , which is the reference voltage of the comparator 85, due to fluctuations in the voltage V3 at the connection point P3, the Even when the voltage changes to a value exceeding the threshold voltage V _th2 , the logic level of the output terminal Q of the latch circuit 90 is maintained at the high level "1". Therefore, it is possible to suppress frequent switching of the power source for the steering control device 4 between the main power source 6 and the auxiliary power source 40.

<Action of the second embodiment>
Next, the operation of the second embodiment will be explained.
When the main power supply 6 is normal, the voltage V2 at the connection point P2 of the first power supply path L1 detected through the voltage detection circuit 60 exceeds the threshold voltage V _th1 , and the voltage V2 at the connection point P2 of the first power supply path L1 is detected through the voltage detection circuit 60. The voltage V3 of P3 exceeds the threshold voltage V _th2 , which is the reference voltage of the comparator 85.

When the vehicle power source is switched from OFF to ON, the power source control circuit 70 determines that the main power source 6 is normal. Further, the power supply control circuit 70 generates a low-level electrical signal SR for the latch circuit 90. Therefore, the logic level of the reset terminal R of the latch circuit 90 is maintained at the low level "0". Further, since the voltage V3 at the connection point P3 exceeds the threshold voltage V _th2 which is the reference voltage, the comparator 85 generates the high level control signal SC. As a result, the logic level of the set terminal S of the latch circuit 90 is maintained at a high level "1". Therefore, the logic level of the output terminal Q of the latch circuit 90 is maintained at the low level "0". The relationship between each terminal of the latch circuit 90 and the logic level is as shown in the following equation (8).

(S,R,Q)=(1,0,0)...(8)
After completing the initial check of the vehicle, the power supply control circuit 70 applies a high-level electric signal SR to the reset terminal R of the latch circuit 90 in order to bring the latch circuit 90 into an initial state. As a result, the logic level of the reset terminal R changes from low level "0" to high level "1". In this case, since the previous output state is held in the latch circuit 90, the logic level of the output terminal Q is maintained at the low level "0". The logic level of each terminal of the latch circuit 90 in the initial state is as shown in the following equation (9).

(S,R,Q)=(1,1,0)...(9)
As shown in equation (2), the logic level of the output terminal Q of the latch circuit 90 is maintained at the low level "0". Therefore, the first drive circuit 53 turns on the first FET 55 and the second FET 56, respectively. Further, the second drive circuit 54 turns off the third FET 57 and the fourth FET 58, respectively. That is, the power source for the steering control device 4 is switched to the main power source 6. Electric power from the main power source 6 is supplied to the steering control device 4 via the first power supply path L1.

Thereafter, when the voltage V3 at the connection point P3 falls below the threshold voltage _Vth2 , which is the reference voltage of the comparator 85, due to voltage fluctuations in the main power supply 6, the set terminal S of the latch circuit 90 is set to a low level control. A signal SC is applied. At this time, the logic level of the set terminal S changes from high level "1" to low level "0". Further, the logic level of the output terminal Q changes from low level "0" to high level "1". The logic level of each terminal of the latch circuit 90 at this time is as shown in the following equation (10).

(S,R,Q)=(0,1,1)...(10)
As shown in equation (3), the logic level of the output terminal Q of the latch circuit 90 is maintained at a high level "1". Therefore, the first drive circuit 53 turns off the first FET 55 and the second FET 56, while the second drive circuit 54 turns on the third FET 57 and the fourth FET 58, respectively. That is, the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40. Power from the auxiliary power supply 40 is supplied to the steering control device 4 via the second power supply path L2 and the first power supply path L1.

Thereafter, when the voltage V3 at the connection point P3 again exceeds the threshold voltage _Vth2 , which is the reference voltage of the comparator 85, due to voltage fluctuations in the main power supply 6, the set terminal S of the latch circuit 90 receives a high level signal. A control signal SC is applied. As a result, the logic level of the set terminal S changes from low level "0" to high level "1". However, in this case, since the previous output state is held in the latch circuit 90, the logic level of the output terminal Q is maintained at the high level "1". The logic level of each terminal of the latch circuit 90 at this time is as shown in the following equation (11).

(S, R, Q) = (1, 1, 1) ... (11)
As shown in equation (11), the logic level of the output terminal Q is maintained at high level "1". Therefore, the first drive circuit 53 keeps the first FET 55 and the second FET 56 off, while the second drive circuit 54 keeps the third FET 57 and the fourth FET 58 on. do. That is, the state in which the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40 is maintained. After the power source for the steering control device 4 is switched from the main power source 6 to the auxiliary power source 40, the power source for the steering control device 4 is prevented from immediately returning to the main power source 6.

<Effects of the second embodiment>
Therefore, according to the second embodiment, the following effects can be obtained.
(6) Due to the voltage V3 at the connection point P3 applied to the positive input terminal of the comparator 85 changing due to voltage fluctuations in the main power supply 6, the threshold voltage at which the voltage V3 is the reference voltage of the comparator 85 It is conceivable that the voltage repeatedly exceeds and falls below V _th2 . In this regard, according to the present embodiment, even when the voltage V3 immediately returns to a value exceeding the threshold voltage V _th2 after falling below the threshold voltage V _th2 , the output state of the latch circuit 90 remains unchanged. The previous state, that is, the state when the voltage V3 was lower than the threshold voltage V _th2 is maintained. Therefore, it is possible to suppress frequent switching of the power source for the steering control device 4 between the main power source 6 and the auxiliary power source 40. Therefore, by suppressing the generation of noise in the power supplied to the steering control device 4, stable power can be supplied to the steering control device 4. Further, the operation of the power supply device 5 can be stabilized.

(7) The power supply control circuit 70 and the analog determination circuit 80 directly detect the voltage of the main power supply 6. Therefore, the voltage of the main power source 6 can be detected more accurately.
<Other embodiments>
Note that the first and second embodiments may be modified and implemented as follows.

- N-channel types may be adopted as the first FET 55 and the second FET 56, and P-channel types may be adopted as the third FET 57 and the fourth FET 58.
- Mechanical switches may be employed as the first FET 55 and the second FET 56, as well as the third FET 57 and the fourth FET 58.

- The second power supply route L2 may be provided independently of the first power supply route L1. That is, the auxiliary power source 40 and the steering control device 4 may be directly connected through the second power supply path L2.

- The specific configurations of the voltage dividing circuit 81 and the comparison circuit 82 may be changed as appropriate. For example, a configuration in which the pull-up resistor 86 is omitted may be adopted as the comparison circuit 82.
- As the analog determination circuit 80, a configuration in which the voltage dividing circuit 81 is omitted may be adopted. In this case, the comparator 85 of the comparison circuit 82 is provided with a withstand voltage performance sufficient to withstand the voltage V3 at the connection point P3 that is not divided. Further, the threshold voltage Vth2, which is the reference voltage of the comparator 85, is adjusted as appropriate depending on the voltage applied to the positive input terminal of the comparator 85.

- The comparison circuit 82 may determine whether there is an abnormality in the main power supply 6, for example, by comparing the value of the current at the connection point P3 with a threshold current.
- As the power supply control circuit 70, a configuration may be adopted in which the function of determining abnormality of the main power supply 6 based on the voltage V2 of the connection point P2 detected through the voltage detection circuit 60 is omitted. In this case, the power supply control circuit 70 can recognize whether the main power supply 6 is normal or abnormal based on the logic level of the output terminal of the latch circuit 90, for example.

- The steering device 1 to which the power supply device 5 is applied may be an electric power steering device of a type that applies the torque of the motor 21 to the steered shaft 12. Further, the steering device 1 to which the power supply device 5 is applied may be a steer-by-wire type steering device.

- The power supply target of the power supply device 5 is not limited to the steering control device 4. The power supply target of the power supply device 5 may be a control device of an airbag device or a control device of a brake device. Moreover, the power supply target of the power supply device 5 may be a control device for a drive motor in an automatic guided vehicle or an electric vehicle.

4... Steering control device (power supply target), 6... Main power supply, 40... Auxiliary power supply, 50... Power supply switching circuit, 51... First switching circuit, 52... Second switching circuit, 70... Power supply control circuit (control circuit ) 80...Analog determination circuit (analog circuit), 90...Latch circuit (holding circuit), L1...First power supply path, L2...Second power supply path, P3...Connection point (detection point), SC...Control signal ( status signal).

Claims (5)

An auxiliary power source for the main power source that supplies power to the power supply target;
a voltage detection circuit that detects the voltage of the main power supply;
The power supply control circuit is a digital circuit that handles digital signals, and the power supply control circuit determines whether the main power supply is normal or abnormal based on the voltage of the main power supply detected through the voltage detection circuit, and based on the determination result. A power supply device comprising: a power supply control circuit that generates an instruction in response;
Captures the power supplied to the power supply target, determines whether the state of power supply from the main power source to the power supply target is normal or abnormal based on the captured power , and generates a status signal indicating the determination result. analog circuit and
a holding circuit that switches and holds its own output state between a first state when the power supply state is normal and a second state when the power supply state is abnormal according to the state signal;
a power supply switching circuit that switches the power supply for the power supply target between the main power supply and the auxiliary power supply according to an instruction from the power supply control circuit or an output state of the holding circuit;
The holding circuit switches its own output state from the first state to the second state when the state signal changes from a state indicating normality of the power supply state to a state indicating abnormality, and the holding circuit switches its own output state from the first state to the second state, and A power supply device that maintains the second state regardless of changes in a state signal. The power supply switching circuit includes a first switching circuit that opens and closes a first power supply path for supplying power from the main power source to the power supply target, and a first switching circuit that opens and closes a first power supply route for supplying power from the main power supply to the power supply target, and a first switching circuit for supplying power from the auxiliary power supply to the power supply target. It has a second switching circuit that opens and closes the second power supply path,
The analog circuit generates the state signal based on power obtained through a detection point set between the first switching circuit and the power supply target in the first power supply path. power supply. The power supply device according to claim 2, wherein the second power supply path is connected between the first switching circuit and the power supply target in the first power supply path. The power supply switching circuit includes a first switching circuit that opens and closes a first power supply path for supplying power from the main power source to the power supply target, and a first switching circuit that opens and closes a first power supply route for supplying power from the main power supply to the power supply target, and a first switching circuit for supplying power from the auxiliary power supply to the power supply target. It has a second switching circuit that opens and closes the second power supply path,
The analog circuit generates the status signal based on a comparison result between a voltage obtained through a detection point set between the main power supply and the first switching circuit in the first power supply path and a threshold voltage. The power supply device according to claim 1, which generates a power supply device. The power supply control circuit is configured to return the output state of the holding circuit from the second state to the first state when a determination result as to whether the main power supply is normal or abnormal changes from abnormal to normal. The power supply device according to any one of claims 1 to 4.