JP7345623B1 - Manufacturing method of film forming member - Google Patents

Abstract

The present invention provides a method for manufacturing a film-forming member that can improve the crystallinity of a buffer layer. A method for manufacturing a film forming member 1 includes a coating step of forming a coating layer 55 containing gallium nitride on a portion of a front surface 521 of a susceptor 52 excluding a substrate mounting surface 522a; This step is performed after the forming step and includes a buffer layer forming step of forming a buffer layer containing aluminum nitride on the substrate 2 placed on the substrate placing surface 522a of the susceptor 52. [Selection diagram] Figure 6

Description

The present invention relates to a method for manufacturing a film-forming member.

Patent Document 1 describes a step of forming a buffer layer made of aluminum nitride (AlN) on a sapphire substrate to obtain a substrate layer, and a step of laminating a semiconductor layer made of a group III nitride semiconductor on the substrate layer. A method for manufacturing a nitride semiconductor light emitting device is disclosed.

JP 2021-166308 Publication

In the method for manufacturing a nitride semiconductor light emitting device described in Patent Document 1, there is room for improvement from the viewpoint of improving the crystallinity of the buffer layer.

The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a method for manufacturing a film-forming member that can improve the crystallinity of a buffer layer.

In order to achieve the above object, the present invention includes a coating step of forming a coating layer containing gallium nitride on a portion of the front surface of a susceptor other than the substrate mounting surface, and a step of forming a coating layer containing gallium nitride after the step of forming the coating layer. a buffer layer forming step of forming a buffer layer containing aluminum nitride on the substrate placed on the substrate mounting surface of the susceptor; , provides a method for manufacturing a film-forming member in which the buffer layer is formed so that gallium nitride forming the coating layer is thermally decomposed .

According to the present invention, it is possible to provide a method for manufacturing a film-forming member that can improve the crystallinity of a buffer layer.

FIG. 2 is a schematic diagram schematically showing an example of a film forming member in the first embodiment. FIG. 2 is a schematic cross-sectional view of a film forming apparatus in the first embodiment. FIG. 3 is a plan view of a susceptor in the first embodiment. 3 is a flowchart for explaining a wafer manufacturing method in the first embodiment. FIG. 2 is a schematic cross-sectional view showing a film forming apparatus in which a coating layer is formed on the front surface of a susceptor in the first embodiment. FIG. 2 is a schematic cross-sectional view of the film forming apparatus in a state where a substrate is placed on a substrate placement surface in a substrate placement step in the first embodiment. 1 is a schematic diagram showing a schematic configuration of a light emitting element in a first embodiment. FIG. 7 is a flowchart for explaining the first wafer manufacturing process in the second embodiment. FIG. 7 is a schematic cross-sectional view showing a film forming apparatus in a state in which an initial coating layer and a coating layer are formed on a susceptor and a substrate is placed on a susceptor in a second embodiment. It is a graph showing the relationship between the thickness of the coating layer and the mix value of the buffer layer of the manufactured film-forming member in an experimental example.

[First embodiment]
A first embodiment of the present invention will be described with reference to FIGS. 1 to 7. The embodiments described below are shown as preferred specific examples for carrying out the present invention, and some portions specifically illustrate various technical matters that are technically preferable. However, the technical scope of the present invention is not limited to this specific embodiment.

First, the film forming member 1 manufactured by the manufacturing method of this embodiment will be described. FIG. 1 is a schematic diagram schematically showing an example of a film forming member 1. As shown in FIG. FIG. 1 is only a schematic diagram, and the ratio of the dimensions of each layer does not necessarily match the actual one.

The film forming member 1 has a buffer layer 3 containing aluminum nitride (AlN) on a substrate 2. The buffer layer 3 contains aluminum nitride (AlN). In this embodiment, an example is shown in which the film forming member 1 is a wafer having a buffer layer 3 and a semiconductor stacked structure 4 on a substrate 2. Other film forming members 1 include, for example, a template in which a buffer layer 3 is formed on a substrate 2, a light emitting element to be described later that is formed by processing a wafer, and the like. In this embodiment, the film forming member 1 is also referred to as a wafer 1.

(Wafer 1)
The wafer 1 is used for manufacturing light emitting elements such as laser diodes and light emitting diodes (LEDs), for example. In this embodiment, the wafer 1 is used to manufacture LEDs as light emitting elements that emit ultraviolet light with a center wavelength of 240 nm or more and 365 nm or less (for example, deep ultraviolet light with a center wavelength of 280 nm or less). The light emitting element will be described later. Note that the wafer 1 may be used for manufacturing semiconductor devices other than light emitting elements.

The wafer 1 includes a substrate 2, a buffer layer 3 formed on the substrate 2, and a semiconductor stacked structure 4 formed on the buffer layer 3.

Substrate 2 is a sapphire substrate containing a single crystal of sapphire (Al ₂ O ₃ ). Although the substrate 2 has a disk shape, an orientation flat (so-called orientation flat) or a notch may be formed in a part to indicate the crystal orientation of the substrate 2. The thickness of the substrate 2 can be, for example, 400 μm or more and 1000 μm or less. The main surface of the substrate 2 is, for example, a c-plane. Note that the expression that the main surface of the substrate 2 is the c-plane includes the case where the main surface of the substrate 2 has an off angle with respect to the c-plane. A buffer layer 3 is formed on the main surface of the substrate 2.

Buffer layer 3 is made of aluminum nitride. In this embodiment, gallium (Ga) is present at least at the end of the buffer layer 3 on the substrate 2 side. This is due to the fact that the buffer layer 3 was formed using a susceptor on which a coating layer containing gallium nitride (GaN) was formed, as will be described later. The buffer layer 3 has a thickness of, for example, 1.5 μm or more and 4.5 μm or less. A semiconductor stacked structure 4 is formed on the opposite side of the buffer layer 3 from the substrate 2.

The semiconductor stacked structure 4 is, for example, a stacked structure of a binary or ternary group III nitride semiconductor represented by Al _a Ga _1-a N (0≦a≦1). Note that a part of nitrogen (N) may be replaced with phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), or the like.

The semiconductor stacked structure 4 includes, in order from the substrate 2 side, an n-type semiconductor layer 41 doped with an n-type impurity, an active layer 42, and a p-type semiconductor layer 43 doped with a p-type impurity. Each of the n-type semiconductor layer 41, the active layer 42, and the p-type semiconductor layer 43 may be formed of a single layer, or may be formed of multiple layers. For example, the active layer 42 may have a single quantum well structure having a single well layer, or a multiple quantum well structure having a plurality of well layers. Further, in the semiconductor stacked structure 4, if the n-type semiconductor layer 41, the active layer 42, and the p-type semiconductor layer 43 are formed in this order from the substrate 2 side, no additional layer is formed between these layers. It's okay. As an example, an electron blocking layer for suppressing overflow of electrons from the active layer 42 to the p-type semiconductor layer 43 may be formed between the active layer 42 and the p-type semiconductor layer 43.

(Film forming apparatus 5)
Next, the film forming apparatus 5 will be explained. FIG. 2 is a schematic cross-sectional view of the film forming apparatus 5. As shown in FIG. FIG. 3 is a plan view of the susceptor 52.

In this embodiment, the film forming apparatus 5 is an MOCVD apparatus that manufactures the wafer 1 using a metal organic chemical vapor deposition (MOCVD) method. In particular, in this embodiment, an example in which the film forming apparatus 5 is a vertical MOCVD apparatus will be described, but it may be a horizontal MOCVD apparatus. Further, the film forming apparatus 5 may be an apparatus using an epitaxial growth method other than MOCVD, such as molecular beam epitaxy (MBE) or hydride vapor phase epitaxy (HVPE).

The film forming apparatus 5 includes a reactor 51, a susceptor 52, a rotating shaft 53, and a heater 54. The reactor 51 has an inlet 511 for introducing raw material gas into the inside for forming each semiconductor layer on the substrate 2, and an exhaust port 512 for discharging the raw material gas to the outside, and is used to grow each semiconductor layer on the wafer 1. This is a chamber that partitions a reaction chamber 510 for the reaction. When the film forming apparatus 5 is a vertical MOCVD apparatus, the inlet 511 supplies source gas toward the susceptor 52 in the thickness direction of the susceptor 52 . In FIG. 2, arrows indicate the flow F of the source gas during the deposition of each semiconductor layer.

The susceptor 52 is arranged in a reaction chamber 510 within the reactor 51. The susceptor 52 is formed into a substantially disk shape. The susceptor 52 is made of, for example, graphite with excellent thermal conductivity, and its surface is coated with SiC.

A plurality of pockets 522 are formed on the front surface 521 of the susceptor 52. In addition, in FIG. 3, only one of the plurality of pockets 522 is shown for convenience, and illustration of the other pockets is omitted. The front surface 521 is the surface of the susceptor 52 on the side where each semiconductor layer of the substrate 2 grows (ie, the upper side in FIG. 2). When the film forming apparatus 5 is a vertical MOCVD apparatus, the front surface 521 is a surface facing the inlet 511 of the susceptor 52. The area of the front surface 521 is not particularly limited, but may be, for example, 11200 mm ² or more and 23450 mm ^{2 or} less.

The pocket 522 is a recess formed to be recessed from the front surface 521, and has a substrate mounting surface 522a constituted by the bottom surface of the recess and side surfaces 522b. The substrate mounting surface 522a has a circular shape and is formed in a planar shape perpendicular to the thickness direction of the substrate 2. The side surface 522b is formed straight in the thickness direction of the susceptor 52 from the peripheral edge of the substrate mounting surface 522a. Note that the substrate mounting surface 522a may have a shape other than a flat surface, such as a curved shape or a stepped shape whose diameter changes in the thickness direction of the susceptor 52, for example. Further, the side surface 522b may have a configuration such as a tapered surface that is inclined with respect to the thickness direction of the susceptor 52, for example.

The rotating shaft 53 rotates the susceptor 52 by rotating about the central axis of the rotating shaft 53 when each semiconductor layer of the wafer 1 is formed. The rotating shaft 53 is connected to a rotating mechanism (not shown) and is configured to rotate by receiving rotational force from the rotating mechanism.

The heater 54 may be one that generates heat when energized, for example. The heater 54 heats the substrate 2 via the susceptor 52 and maintains the temperature of the substrate 2 at a temperature suitable for growth of each semiconductor layer.

(Method for manufacturing wafer 1)
Next, a method for manufacturing the wafer 1 of this embodiment will be described. FIG. 4 is a flowchart for explaining the manufacturing method in this embodiment.

The method for manufacturing the wafer 1 includes a baking step S1, a coating step S3, a substrate mounting step S5, a buffer layer film forming step S7, and a layered structure film forming step S9.

The baking step S1 is performed before the coating step S3, and is a step of baking the inside of the reactor 51 housing the susceptor 52 at a temperature higher than the decomposition temperature of gallium nitride (for example, about 1100° C.). In the baking step S1, an inert gas (nitrogen, hydrogen, etc.) is passed into the reactor 51 for a predetermined period of time (for example, 10 minutes to 1 hour), and the heater 54 generates heat so that the temperature of the susceptor 52 reaches the decomposition temperature of gallium nitride. The inside of the reactor 51 is heated to the above predetermined temperature (for example, 1150° C.).

By performing the baking step S1, impurities present in the reactor 51 are removed. The impurities to be removed in the baking step S1 include, for example, deposits formed when the raw material gas of the wafer 1 reacts with the inner wall of the reaction chamber 510, the surface of the susceptor 52, etc. during the previous manufacturing process of the wafer 1. (so-called depot), moisture, etc. After the baking step S1, the temperature of the susceptor 52 is lowered to below the decomposition temperature of gallium nitride, and then the coating step S3 is performed.

FIG. 5 is a schematic cross-sectional view showing a film forming apparatus 5 in which a coating layer 55 is formed on a front surface 521 of a susceptor 52. FIG. 5 is merely a schematic diagram, and the ratio between the dimensions of the susceptor 52 and the dimensions of the coating layer 55 does not necessarily match the actual one.

In the coating step S3, a coating layer 55 containing gallium nitride is formed on the front surface 521 of the susceptor 52 except for the substrate mounting surface 522a. Unlike this embodiment, when a coating layer is formed on the substrate mounting surface 522a, when the coating layer is thermally decomposed, unintended crystal growth occurs on the back surface of the substrate 2 facing the substrate mounting surface 522a, and the substrate 2 In this embodiment, the coating layer 55 is not formed on the substrate mounting surface 522a of the susceptor 52 because there is a risk of staining the back surface of the susceptor 52. The thickness of the coating layer 55 formed in coating step S3 is preferably 60 nm or more and less than 300 nm, more preferably 60 nm or more and 240 nm or less. These numerical values are supported by the experimental examples described later.

In the coating step S3, for example, a dummy substrate is placed on the substrate placement surface 522a, thereby suppressing the formation of gallium nitride on the substrate placement surface 522a. In the coating step S3, the susceptor 52 is heated by the heater 54 to the growth temperature of gallium nitride (for example, 1000° C. or more and 1100° C. or less), and uses trimethyl gallium (TMG) as the gallium source and ammonia (NH ₃ ) as the nitrogen source. The coating layer 55 is formed on the front surface 521 by introducing the raw material gas containing the above into the reaction chamber 510 from the inlet 511. In this embodiment, the coating layer 55 is made of undoped gallium nitride, but it may also contain an n-type impurity or a p-type impurity. After the coating step S3, a dummy substrate is taken out from the susceptor 52, and then a substrate mounting step S5 is performed.

FIG. 6 is a schematic cross-sectional view of the film forming apparatus 5 in a state where the substrate 2 is placed on the substrate placement surface 522a in the substrate placement step S5. FIG. 6 is merely a schematic diagram, and the ratios of the dimensions of the susceptor 52, the coating layer 55, and the substrate 2 do not necessarily match the actual dimensions. In the substrate mounting step S5, the substrate 2 is placed in the pocket 522 of the susceptor 52, on which the coating layer 55 is formed on the front surface 521. As shown in FIG. 4, after the substrate mounting step S5, a buffer layer film forming step S7 is performed.

In the buffer layer deposition step S7, the buffer layer 3 containing aluminum nitride is deposited on the substrate 2 placed on the substrate placement surface 522a of the susceptor 52. In the buffer layer film forming step S7, the temperature of the susceptor 52 and the substrate 2 is adjusted using the heater 54 to a predetermined temperature that is suitable for the growth of aluminum nitride and is higher than the decomposition temperature of gallium nitride constituting the coating layer 55 ( For example, the temperature is raised to 1100° C. or higher and 1300° C. or lower). When the temperatures of the susceptor 52 and the substrate 2 reach the above-mentioned predetermined temperature, a raw material gas containing trimethylaluminum (TMA) as an aluminum source and ammonia as a nitrogen source (not including a gallium source) is introduced into the reaction chamber from the inlet 511. 510. As a result, a buffer layer 3 made of aluminum nitride is epitaxially grown on the substrate 2.

In the initial stage of forming the buffer layer 3, the temperature of the susceptor 52 exceeds the decomposition temperature of gallium nitride, so the coating layer 55 made of gallium nitride formed on the front surface 521 is thermally decomposed, and gallium and nitrogen react. It will float inside the room 510. It is presumed that this has a favorable effect on nucleation of the buffer layer 3 made of aluminum nitride, resulting in improved crystallinity of the buffer layer 3. Almost all of the coating layer 55 is thermally decomposed in the initial stage of forming the buffer layer 3 . When looking at the gallium distribution in the buffer layer 3 in the stacking direction of the substrate 2 and the buffer layer 3, a peak appears in the region of the buffer layer 3 on the substrate 2 side.

After forming the buffer layer 3, a layered structure film forming step S9 is performed. In this embodiment, annealing is not performed after the buffer layer film forming step S7 and before the layered structure film forming step S9, and the layered structure film forming step S9 is performed continuously with the buffer layer film forming step S7. The buffer layer film forming process S7 and the laminated structure film forming process S9 are performed continuously, which means that the substrate 2 is not taken out from the reactor 51 between the buffer layer film forming process S7 and the laminated structure film forming process S9. means. As described above, in this embodiment, the buffer layer 3 with sufficiently high crystallinity can be manufactured, so that annealing is not necessary.

In the layered structure film forming step S9, the n-type semiconductor layer 41, the active layer 42, and the p-type semiconductor layer 43 constituting the wafer 1 are sequentially formed. In growing each semiconductor layer, the temperature of the substrate 2 is appropriately adjusted to a growth temperature suitable for growing each semiconductor layer, and the raw material gas constituting each semiconductor layer is supplied to the reaction chamber 510 of the reactor 51. do. The raw material gases constituting each semiconductor layer include trimethylaluminum as an aluminum source, trimethylgallium as a gallium source, ammonia as a nitrogen source, tetramethylsilane (TMSi) as a silicon (i.e., n-type impurity) source, and magnesium (i.e., p Biscyclopentadienylmagnesium (Cp ₂ Mg) can be used as a source (type impurities). At least in the buffer layer film forming process S7 and the laminated structure film forming process S9, the susceptor 52 is rotated by rotating the rotating shaft 53. Manufacturing conditions such as growth temperature, growth pressure, and growth time for epitaxially growing each semiconductor layer can be general conditions depending on the configuration of each semiconductor layer.

Through the above steps, the wafer 1 is manufactured. Hereinafter, a series of steps for manufacturing the wafer 1 (i.e., baking step S1, coating step S3, substrate mounting step S5, buffer layer film forming step S7, and laminated structure film forming step S9) may be referred to as a wafer manufacturing cycle. .

After the wafer 1 is manufactured, the wafer 1 is taken out from the reactor 51 and the next wafer manufacturing cycle is performed. In this way, a large number of wafers 1 are manufactured by repeating the wafer manufacturing cycle. At the start of the second and subsequent wafer manufacturing cycles, deposits formed on the front surface 521 and the like during the previous wafer manufacturing cycle may remain. Therefore, in order to remove at least gallium nitride from among the deposits, a baking step S1 is performed in every wafer manufacturing cycle.

(Light emitting element 10)
Next, the light emitting device 10 manufactured using the wafer 1 manufactured as described above will be described. FIG. 7 is a schematic diagram showing a schematic configuration of the light emitting element 10. A plurality of light emitting elements 10 are manufactured from one wafer 1 by performing a region removal process, an n-side electrode formation process, a p-side electrode formation process, and a dicing process on the wafer 1 .

The region removal step is a step in which a part of the wafer 1 is etched from the side of the p-type semiconductor layer 43 opposite to the active layer 42 to expose the n-type semiconductor layer 41.

The n-side electrode forming step is a step of forming the n-side electrode 11 on the exposed surface of the n-type semiconductor layer 41 formed in the region removal step. The p-side electrode forming step is a step of forming the p-side electrode 12 on the surface of the p-type semiconductor layer 43 opposite to the active layer 42 . The n-side electrode 11 and the p-side electrode 12 can be formed, for example, by a well-known method such as an electron beam evaporation method or a sputtering method.

In the dicing process, the product obtained through the various processes described above is cut into pieces of predetermined dimensions. As a result, a plurality of light emitting elements 10 as shown in FIG. 7 are formed from one wafer 1. Note that the configuration of the light emitting element 10 shown in this embodiment is merely an example, and various configurations can be adopted.

(Operations and effects of the first embodiment)
The method for manufacturing the film-forming member 1 of this embodiment includes a coating step S3 of forming a coating layer 55 containing gallium nitride on a portion of the front surface 521 of the susceptor 52 excluding the substrate mounting surface 522a; The process includes a buffer layer forming step S7 which is performed after the forming step and forms a buffer layer 3 containing aluminum nitride on the substrate 2 placed on the substrate placing surface 522a of the susceptor 52. Therefore, the crystallinity of the buffer layer 3 is improved.

Furthermore, in the method for manufacturing the film-forming member 1 of this embodiment, before the coating step S3, a baking step S1 is further performed in which the inside of the reactor 51 housing the susceptor 52 is baked at a temperature higher than the decomposition temperature of gallium nitride. be exposed. Therefore, it is possible to suppress the presence of residues (for example, deposits) made of gallium nitride in the reactor 51 before the coating step S3. If a residue made of gallium nitride remains in the reactor 51 before the coating step S3, the thickness of the layer made of gallium nitride formed on the front surface 521 of the susceptor 52 after the coating step S3 is determined as described above. There is a concern that the thickness of the coating layer 55 becomes the sum of the thickness of the residue and the thickness of the coating layer 55 formed in the coating step S3, making it difficult to manage the thickness of the coating layer 55. On the other hand, in this embodiment, such concerns are resolved.

Further, the thickness of the coating layer 55 formed in the coating step S3 is 60 nm or more and less than 300 nm. Therefore, the crystallinity of the buffer layer 3 is further improved.

Furthermore, in the method for manufacturing the film-forming member 1 of this embodiment, the step of forming a semiconductor layer on the buffer layer 3 is performed continuously with the buffer layer film-forming step S7. Therefore, it is not necessary to take the substrate 2 out of the reactor 51 after the buffer layer film forming step S7 in order to anneal the buffer layer 3, for example, and the productivity of the film forming member 1 can be improved.

As described above, according to this embodiment, it is possible to provide a method for manufacturing a film-forming member that can improve the crystallinity of a buffer layer.

[Second embodiment]
FIG. 8 is a flowchart for explaining the first wafer manufacturing process in this embodiment. FIG. 9 is a schematic cross-sectional view showing the film forming apparatus 5 in a state in which the initial coating layer 56 and the coating layer 55 are formed on the susceptor 52 and the substrate 2 is placed. FIG. 9 is merely a schematic diagram, and the ratios among the dimensions of the susceptor 52, the dimensions of the initial coating layer 56, the dimensions of the coating layer 55, and the dimensions of the substrate 2 do not necessarily match the actual dimensions.

In this embodiment, the initial wafer manufacturing process is changed from the method for manufacturing the wafer 1 in the first embodiment. The first wafer manufacturing process means a process of manufacturing the wafer 1 in a state that does not include any configuration other than the standard configuration of the film forming apparatus 5 (for example, deposits formed on the surface of the susceptor 52, etc.). For example, not only the wafer 1 is manufactured using an unused film forming apparatus 5, but also the wafer 1 is manufactured using a film forming apparatus 5 that has already been used for manufacturing the wafer 1. If the wafer 1 is manufactured in a state in which impurities other than the standard configuration have been removed by cleaning, etc., this is the first wafer manufacturing process. In this embodiment, the second and subsequent wafer manufacturing steps following the first wafer manufacturing step are the same as the wafer manufacturing steps in the first embodiment, so the following description will focus on the first wafer manufacturing step.

In the first wafer manufacturing process, before the coating process S3, an initial coating process S2 is performed to form an initial coating layer 56 containing Al _x Ga _1-x N (0<x≦1) on the surface of the susceptor 52. be exposed. In this embodiment, the first wafer manufacturing process includes a baking process S1, an initial coating process S2, a coating process S3, a substrate mounting process S5, a buffer layer film forming process S7, and a layered structure film forming process S9. Be prepared. The baking process S1, the coating process S3, the substrate mounting process S5, the buffer layer film forming process S7, and the laminated structure film forming process S9 are the same as those in the first embodiment, and therefore, redundant explanations will be omitted.

The initial coating step S2 is a step of forming an initial coating layer 56 on at least the substrate mounting surface 522a of the surfaces of the susceptor 52. By forming the initial coating layer 56 on the substrate mounting surface 522a, unintended crystal growth on the back surface side of the substrate 2 (substrate mounting surface 522a side) is suppressed. In other words, if the raw material gas introduced into the reactor 51 in the wafer manufacturing cycle goes around to the back side of the substrate 2, the raw material gas will react with the back side of the substrate 2 and cause crystal growth on the back side of the substrate 2 unless special measures are taken. However, by forming the first coating layer 56 on the substrate mounting surface 522a, the reaction of the raw material gas on the surface of the first coating layer 56 is promoted more than on the back surface of the substrate 2, and crystal growth occurs on the back surface of the substrate 2. The occurrence of this is suppressed.

In the present embodiment, in the first coating step S2, the first coating layer 56 is formed on the substrate mounting surface 522a and the front surface 521 of the surface of the susceptor 52. By forming the initial coating layer 56 also on the front surface 521, heat radiation of the susceptor 52 from the front surface 521 is suppressed, and the temperature distribution of the susceptor 52 can be easily made uniform.

In the first coating step S2, the heater 54 is activated to bring the temperature of the susceptor 52 to a temperature suitable for growing the first coating layer 56. Then, the raw material gas for the first coating layer 56 is introduced into the reactor 51 from the inlet 511, so that the first coating layer 56 is formed on the front surface 521 and the substrate mounting surface 522a.

From the viewpoint of further increasing the effect of suppressing unintended crystal growth on the back surface of the substrate 2, the initial coating layer 56 preferably has an Al composition ratio x of 80% or more and 100% or less, and in this embodiment, aluminum nitride ( That is, the Al composition ratio x is 100%). Further, the initial coating layer 56 preferably has a high Al composition so that it is difficult to decompose in the baking step S1 in the second and subsequent wafer manufacturing cycles.

The initial coating layer 56 may contain n-type impurities or p-type impurities. Note that in this embodiment, the first coating layer 56 is made of aluminum nitride, but is not limited to this; for example, it is made of Al _x Ga _1-x N (0<x≦1) with mutually different Al composition ratios x. It may be a stacked body of a plurality of semiconductor layers. In such a case, it is preferable that the Al composition ratio x of the outermost surface portion of the initial coating layer 56 (the upper surface of the initial coating layer 56 in FIG. 9) is 80% or more and 100% or less.

It is preferable that the initial coating layer 56 has a thickness of 3 μm or more. The susceptor 52 can be used multiple times while replacing the wafer 1 with the initial coating layer 56 formed, but by setting the thickness of the initial coating layer 56 to 3 μm or more, the initial coating layer 56 is worn out early. This can prevent the product from becoming unusable. From this viewpoint, the thickness of the first coating layer 56 is more preferably 5 μm or more. Moreover, the thickness of the initial coating layer 56 can be 20 μm or less. In this case, it is possible to shorten the time and reduce the amount of raw material gas when manufacturing the initial coating layer 56. From this point of view, the thickness of the initial coating layer 56 is more preferably 10 μm or less. In this embodiment, the thickness of the initial coating layer 56 is 4 μm or more and 8 μm or less.

After the first coating step S2 explained above, the same coating step S3 as in the first embodiment, the substrate mounting step S5, the buffer layer film forming step S7, and the layered structure film forming step S9 are performed, and the first wafer manufacturing The process ends. In the second and subsequent wafer manufacturing steps following the first wafer manufacturing step, the same steps as in the first embodiment are performed. At this time, the baking step S1 of the second and subsequent wafer manufacturing steps is performed under the condition that the temperature of the susceptor 52 is lower than the decomposition temperature of the initial coating layer 56.

The rest is the same as the first embodiment.
Note that among the symbols used in the second embodiment and subsequent embodiments, the same symbols as those used in the previously described embodiments represent the same constituent elements as those in the previously described embodiments, unless otherwise specified.

(Operations and effects of the second embodiment)
In the initial manufacturing process of the film forming member 1, an initial coating is performed to form an initial coating layer 56 containing Al _x Ga _1-x N (0<x≦1) on the surface of the susceptor 52 before the coating step S3. Step S2 is performed. Thereby, it is possible to suppress the temperature distribution of the susceptor 52 from becoming non-uniform due to the heat of the susceptor 52 being radiated from the surface of the susceptor 52.

Further, the initial coating layer 56 is formed on at least the substrate mounting surface 522a of the surfaces of the susceptor 52. Therefore, unintended crystal growth on the back side of the substrate 2 is suppressed.
In addition, it has the same functions and effects as the first embodiment.

[Experiment example]
This experimental example is an example showing the relationship between the thickness of the coating layer and the crystallinity of the buffer layer. The mix value was used as an index of the crystallinity of the buffer layer. The mix value of the buffer layer is the half-width [arcsec] of the X-ray rocking curve obtained by ω scan of X-ray diffraction for the (10-12) plane (i.e., mixed plane) of the aluminum nitride crystal forming the buffer layer. , is an example of a typical index showing the crystal quality of aluminum nitride. The smaller the mix value, the higher the crystallinity.

In this experimental example, film-forming members were manufactured under the respective conditions of Examples 1 to 8 and Comparative Example regarding the method of manufacturing film-forming members. Examples 1 to 8 are similar to the manufacturing method shown in the second embodiment. Examples 1 to 8 were manufactured under similar manufacturing conditions except that the thicknesses of the coating layers formed were different. Moreover, the comparative example is an example in which a film-forming member was manufactured without forming a coating layer. The comparative example had the same manufacturing conditions as Examples 1 to 8, except that no coating layer was formed.

In this experimental example, the film forming members manufactured in Comparative Examples and Examples 1 to 8 were templates consisting of a sapphire substrate and a buffer layer. That is, since the purpose of this experimental example is to evaluate the crystallinity of the buffer layer, the layered structure film forming step S9 in FIGS. 4 and 8 is omitted.

Details of the manufacturing method of the film-forming members according to the comparative example and Examples 1 to 8, and the mix values of the buffer layers in the film-forming members manufactured under the conditions of the comparative example and Examples 1 to 8 are shown in Table 1 below. show. The “V/III” ratio described in Table 1 below is the ratio F v of the flow rate F v [μmol/min] of the group V element source gas to the flow rate _{F III} [μmol/min] of the group III element source gas _. /F _III . Further, FIG. 10 shows the relationship between the thickness of the coating layer and the mix value of the buffer layer of the manufactured film forming member.

As can be seen from Table 1 and FIG. 10, in Examples 1 to 8 in which a coating layer was formed, the mix value of the buffer layer was lower, that is, the crystallinity was higher, compared to the comparative example in which no coating layer was formed. I know that there is. Furthermore, it can be seen that the mix value of the buffer layer becomes particularly low when the thickness of the coating layer is 60 nm or more and less than 300 nm, and the mix value of the buffer layer becomes particularly low when the thickness of the coating layer is 60 nm or more and less than 240 nm. Furthermore, as the thickness of the coating layer increases from 100 nm, the mix value of the buffer layer increases, but when the thickness of the coating layer exceeds 400 nm, the mix value of the buffer layer saturates and becomes an approximately constant value. I can see that

Note that although this experimental example is based on the manufacturing method in which an initial coating layer is provided, even if the initial coating layer is not provided (for example, in the first embodiment), the thickness of the coating layer and It is assumed that the relationship with the crystallinity of the buffer layer is similar.

(Summary of embodiments)
Next, technical ideas understood from the embodiments described above will be described using reference numerals and the like in the embodiments. However, each reference numeral in the following description does not limit the constituent elements in the claims to those specifically shown in the embodiments.

[1] The first embodiment of the present invention includes a coating step S3 of forming a coating layer 55 containing gallium nitride on a portion of the front surface 521 of the susceptor 52 excluding the substrate mounting surface 522a, and a coating layer 55 containing gallium nitride. 55, a buffer layer film forming step S7 of forming a buffer layer 3 containing aluminum nitride on the substrate 2 placed on the substrate mounting surface 522a of the susceptor 52; This is a method of manufacturing a film-forming member 1 including:
This improves the crystallinity of the buffer layer 3.

[2] In the second embodiment of the present invention, in the first embodiment, before the coating step S3, the inside of the reactor 51 housing the susceptor 52 is baked at a temperature higher than the decomposition temperature of gallium nitride. A baking step S1 is further performed.
This makes it easier to manage the thickness of the coating layer 55.

[3] A third embodiment of the present invention is that in the first or second embodiment, the thickness of the coating layer 55 formed in the coating step S3 is 60 nm or more and less than 300 nm.
This further improves the crystallinity of the buffer layer 3.

[4] In the fourth embodiment of the present invention, in any one of the first to third embodiments, in the first manufacturing process of the film forming member 1, the susceptor 52 is removed before the coating process S3. An initial coating step S2 is further performed to form an initial coating layer 56 containing Al _x Ga _1-x N (0<x≦1) on the surface of the substrate.
Thereby, it is possible to suppress the temperature distribution of the susceptor 52 from becoming non-uniform.

[5] A fifth embodiment of the present invention is that in the fourth embodiment, the initial coating layer 56 is formed on at least the substrate mounting surface 522a of the surfaces of the susceptor 52. .
This prevents unintended crystal growth from occurring on the back surface side of the substrate 2.

[6] In a sixth embodiment of the present invention, in any one of the first to fifth embodiments, the step of forming a semiconductor stacked structure on the buffer layer 3 is replaced with the buffer layer forming step S7. This is done continuously.
This improves the productivity of the film forming member 1.

(Additional note)
Although the embodiments of the present invention have been described above, the embodiments described above do not limit the invention according to the claims. Furthermore, it should be noted that not all combinations of features described in the embodiments are essential for solving the problems of the invention. Moreover, the present invention can be implemented with appropriate modifications within a range that does not depart from the spirit thereof.

1...Wafer (film forming member)
2...Substrate 3...Buffer layer 51...Reactor 52...Susceptor 521...Front surface 55...Coating layer 56...Initial coating layer 522a...Substrate placement surface S1...Baking process S2...Initial coating process S3...Coating process S7...Buffer Layer deposition process

Claims (6)

a coating step of forming a coating layer containing gallium nitride on a portion of the front surface of the susceptor excluding the substrate mounting surface;
a buffer layer forming step carried out after the step of forming the coating layer, forming a buffer layer containing aluminum nitride on the substrate placed on the substrate placing surface of the susceptor; ,
In the buffer layer forming step, the buffer layer is formed so as to thermally decompose gallium nitride forming the coating layer.
A method for manufacturing a film-forming member. Before the coating step, a baking step is further performed in which the inside of the reactor housing the susceptor is baked at a temperature higher than the decomposition temperature of gallium nitride.
A method for manufacturing a film-forming member according to claim 1. The thickness of the coating layer formed in the coating step is 60 nm or more and less than 300 nm.
A method for manufacturing a film forming member according to claim 1 or 2. In the first manufacturing process of the film-forming member, an initial coating process of forming an initial coating layer containing Al _x Ga _1-x N (0<x≦1) on the surface of the susceptor is performed before the coating process. Further,
A method for manufacturing a film forming member according to claim 1 or 2. The initial coating layer is formed on at least the substrate mounting surface of the surface of the susceptor.
The method for manufacturing a film-forming member according to claim 4. performing the step of forming a semiconductor stacked structure on the buffer layer continuously with the buffer layer forming step;
A method for manufacturing a film forming member according to claim 1 or 2.

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